From: Michal Simek <michal.simek@xilinx.com>
To: Alexandru Ardelean <alexandru.ardelean@analog.com>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<robh+dt@kernel.org>, <lars@metafoo.de>,
<linux-fpga@vger.kernel.org>, <mdf@kernel.org>,
<ardeleanalex@gmail.com>,
Dragos Bogdan <dragos.bogdan@analog.com>
Subject: Re: [PATCH v3 1/4] clk: axi-clkgen: replace ARCH dependencies with driver deps
Date: Mon, 1 Feb 2021 16:15:26 +0100 [thread overview]
Message-ID: <3be0501f-98bf-8371-6994-e77c94b4597b@xilinx.com> (raw)
In-Reply-To: <20210201151245.21845-2-alexandru.ardelean@analog.com>
On 2/1/21 4:12 PM, Alexandru Ardelean wrote:
> The intent is to be able to run this driver to access the IP core in setups
> where FPGA board is also connected via a PCIe bus. In such cases the number
> of combinations explodes, where the host system can be an x86 with Xilinx
> Zynq/ZynqMP/Microblaze board connected via PCIe.
> Or even a ZynqMP board with a ZynqMP/Zynq/Microblaze connected via PCIe.
>
> To accommodate for these cases, this change removes the limitation for this
> driver to be compilable only on Zynq/Microblaze architectures.
> And adds dependencies on the mechanisms required by the driver to work (OF
> and HAS_IOMEM).
>
> Signed-off-by: Dragos Bogdan <dragos.bogdan@analog.com>
> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
> ---
> drivers/clk/Kconfig | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 85856cff506c..cee1d4e657bc 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -247,7 +247,8 @@ config CLK_TWL6040
>
> config COMMON_CLK_AXI_CLKGEN
> tristate "AXI clkgen driver"
> - depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
> + depends on HAS_IOMEM || COMPILE_TEST
> + depends on OF
> help
> Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
> FPGAs. It is commonly used in Analog Devices' reference designs.
>
Make sense.
Acked-by: Michal Simek <michal.simek@xilinx.com>
Thanks,
Michal
next prev parent reply other threads:[~2021-02-01 15:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 15:12 [PATCH v3 0/4] clk: clk-axiclgen: add support for ZynqMP Alexandru Ardelean
2021-02-01 15:12 ` [PATCH v3 1/4] clk: axi-clkgen: replace ARCH dependencies with driver deps Alexandru Ardelean
2021-02-01 15:15 ` Michal Simek [this message]
2021-02-02 4:21 ` Moritz Fischer
2021-02-09 2:28 ` Stephen Boyd
2021-02-01 15:12 ` [PATCH v3 2/4] clk: clk-axiclkgen: add ZynqMP PFD and VCO limits Alexandru Ardelean
2021-02-02 4:22 ` Moritz Fischer
2021-02-09 2:29 ` Stephen Boyd
2021-02-01 15:12 ` [PATCH v3 3/4] dt-bindings: clock: adi,axi-clkgen: add compatible string for ZynqMP support Alexandru Ardelean
2021-02-09 2:29 ` Stephen Boyd
2021-02-01 15:12 ` [PATCH v3 4/4] clk: axi-clkgen: use devm_platform_ioremap_resource() short-hand Alexandru Ardelean
2021-02-09 2:29 ` Stephen Boyd
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