From: David Howells <dhowells@redhat.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: dhowells@redhat.com, Nicholas Piggin <npiggin@gmail.com>,
Mateusz Guzik <mjguzik@gmail.com>,
linux-arch <linux-arch@vger.kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Michael Ellerman <mpe@ellerman.id.au>,
tony.luck@intel.com, viro@zeniv.linux.org.uk,
linux-fsdevel@vger.kernel.org,
Jan Glauber <jan.glauber@gmail.com>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: Memory transaction instructions
Date: Wed, 18 Jan 2023 09:05:43 +0000 [thread overview]
Message-ID: <2496131.1674032743@warthog.procyon.org.uk> (raw)
In-Reply-To: <CAHk-=whjFwzEq0u04=n=t7-kNJdX0HkAOjAMjmLXDDycJ+j9yQ@mail.gmail.com>
Linus Torvalds <torvalds@linux-foundation.org> wrote:
> And for the kernel, where we don't have bad locking, and where we
> actually use fine-grained locks that are _near_ the data that we are
> locking (the lockref of the dcache is obviously one example of that,
> but the skbuff queue you mention is almost certainly exactly the same
> situation): the lock is right by the data that the lock protects, and
> the "shared lock cacheline" model simply does not work. You'll bounce
> the data, and most likely you'll also touch the same lock cacheline
> too.
Yeah. The reason I was actually wondering about them was if it would be
possible to avoid the requirement to disable interrupts/softirqs to, say,
modify the skbuff queue. On some arches actually disabling irqs is quite a
heavy operation (I think this is/was true on ppc64, for example; it certainly
was on frv) and it was necessary to "emulate" the disablement.
David
next prev parent reply other threads:[~2023-01-18 9:59 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-12 23:36 lockref scalability on x86-64 vs cpu_relax Mateusz Guzik
2023-01-13 0:13 ` Linus Torvalds
2023-01-13 0:30 ` Luck, Tony
2023-01-13 0:45 ` Linus Torvalds
2023-01-13 7:55 ` ia64 removal (was: Re: lockref scalability on x86-64 vs cpu_relax) Ard Biesheuvel
2023-01-13 16:17 ` Luck, Tony
2023-01-13 20:49 ` Jessica Clarke
2023-01-13 21:03 ` Luck, Tony
2023-01-13 21:04 ` Jessica Clarke
2023-01-13 21:05 ` John Paul Adrian Glaubitz
2023-01-13 23:25 ` Ard Biesheuvel
2023-01-14 11:24 ` Sedat Dilek
2023-01-14 11:28 ` Sedat Dilek
2023-01-15 0:27 ` Matthew Wilcox
2023-01-15 12:04 ` Sedat Dilek
2023-01-16 9:42 ` John Paul Adrian Glaubitz
2023-01-16 9:41 ` John Paul Adrian Glaubitz
2023-01-16 13:28 ` Matthew Wilcox
2023-01-16 9:40 ` John Paul Adrian Glaubitz
2023-01-16 9:37 ` John Paul Adrian Glaubitz
2023-01-16 9:32 ` John Paul Adrian Glaubitz
2023-01-16 10:09 ` Ard Biesheuvel
2023-01-13 1:12 ` lockref scalability on x86-64 vs cpu_relax Mateusz Guzik
2023-01-13 4:08 ` Linus Torvalds
2023-01-13 9:46 ` Will Deacon
2023-01-13 3:20 ` Nicholas Piggin
2023-01-13 4:15 ` Linus Torvalds
2023-01-13 5:36 ` Nicholas Piggin
2023-01-16 14:08 ` Memory transaction instructions David Howells
2023-01-16 15:09 ` Matthew Wilcox
2023-01-16 16:59 ` Linus Torvalds
2023-01-18 9:05 ` David Howells [this message]
2023-01-19 1:41 ` Nicholas Piggin
2023-01-13 10:23 ` lockref scalability on x86-64 vs cpu_relax Peter Zijlstra
2023-01-13 18:44 ` [PATCH] lockref: stop doing cpu_relax in the cmpxchg loop Mateusz Guzik
2023-01-13 21:47 ` Luck, Tony
2023-01-13 23:31 ` Linus Torvalds
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