From: Maulik Shah <mkshah@codeaurora.org>
To: bjorn.andersson@linaro.org, maz@kernel.org,
linus.walleij@linaro.org, swboyd@chromium.org,
evgreen@chromium.org, mka@chromium.org
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-gpio@vger.kernel.org, agross@kernel.org,
tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org,
rnayak@codeaurora.org, ilina@codeaurora.org,
lsrao@codeaurora.org, Maulik Shah <mkshah@codeaurora.org>
Subject: [PATCH v4 6/7] irqchip: qcom-pdc: Unmask wake up irqs during suspend
Date: Mon, 10 Aug 2020 16:50:59 +0530 [thread overview]
Message-ID: <1597058460-16211-7-git-send-email-mkshah@codeaurora.org> (raw)
In-Reply-To: <1597058460-16211-1-git-send-email-mkshah@codeaurora.org>
From: Douglas Anderson <dianders@chromium.org>
An interrupt that is masked but set for wakeup still needs to be able
to wake up the system. Use the new irq_suspend_one() and
irq_resume_one() callback to handle this by unmasking at the hardware
level at suspend time and putting things back at resume time.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
---
drivers/irqchip/qcom-pdc.c | 51 ++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 49 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index c1c5dfa..dfcdfc5 100644
--- a/drivers/irqchip/qcom-pdc.c
+++ b/drivers/irqchip/qcom-pdc.c
@@ -3,6 +3,7 @@
* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
*/
+#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/interrupt.h>
@@ -38,6 +39,9 @@ struct pdc_pin_region {
u32 cnt;
};
+static DECLARE_BITMAP(pdc_wake_irqs, PDC_MAX_IRQS);
+static DECLARE_BITMAP(pdc_disabled_irqs, PDC_MAX_IRQS);
+
static DEFINE_RAW_SPINLOCK(pdc_lock);
static void __iomem *pdc_base;
static struct pdc_pin_region *pdc_region;
@@ -89,11 +93,51 @@ static void pdc_enable_intr(struct irq_data *d, bool on)
raw_spin_unlock(&pdc_lock);
}
+static void qcom_pdc_irq_suspend_one(struct irq_data *d)
+{
+ if (d->hwirq == GPIO_NO_WAKE_IRQ)
+ return;
+
+ if (test_bit(d->hwirq, pdc_wake_irqs) &&
+ test_bit(d->hwirq, pdc_disabled_irqs)) {
+ /*
+ * Disabled interrupts that have wake enabled need to be able
+ * to wake us up from suspend. Unmask them now to enable
+ * this.
+ */
+ pdc_enable_intr(d, true);
+ irq_chip_unmask_parent(d);
+ }
+}
+
+static void qcom_pdc_irq_resume_one(struct irq_data *d)
+{
+ if (d->hwirq == GPIO_NO_WAKE_IRQ)
+ return;
+
+ if (test_bit(d->hwirq, pdc_wake_irqs) &&
+ test_bit(d->hwirq, pdc_disabled_irqs)) {
+ irq_chip_mask_parent(d);
+ pdc_enable_intr(d, false);
+ }
+}
+
+static int qcom_pdc_gic_set_wake(struct irq_data *d, unsigned int on)
+{
+ if (on)
+ set_bit(d->hwirq, pdc_wake_irqs);
+ else
+ clear_bit(d->hwirq, pdc_wake_irqs);
+
+ return irq_chip_set_wake_parent(d, on);
+}
+
static void qcom_pdc_gic_disable(struct irq_data *d)
{
if (d->hwirq == GPIO_NO_WAKE_IRQ)
return;
+ set_bit(d->hwirq, pdc_disabled_irqs);
pdc_enable_intr(d, false);
irq_chip_disable_parent(d);
}
@@ -103,6 +147,7 @@ static void qcom_pdc_gic_enable(struct irq_data *d)
if (d->hwirq == GPIO_NO_WAKE_IRQ)
return;
+ clear_bit(d->hwirq, pdc_disabled_irqs);
pdc_enable_intr(d, true);
irq_chip_enable_parent(d);
}
@@ -201,13 +246,15 @@ static struct irq_chip qcom_pdc_gic_chip = {
.irq_unmask = qcom_pdc_gic_unmask,
.irq_disable = qcom_pdc_gic_disable,
.irq_enable = qcom_pdc_gic_enable,
+ .irq_set_wake = qcom_pdc_gic_set_wake,
+ .irq_suspend_one = qcom_pdc_irq_suspend_one,
+ .irq_resume_one = qcom_pdc_irq_resume_one,
.irq_get_irqchip_state = qcom_pdc_gic_get_irqchip_state,
.irq_set_irqchip_state = qcom_pdc_gic_set_irqchip_state,
.irq_retrigger = irq_chip_retrigger_hierarchy,
.irq_set_type = qcom_pdc_gic_set_type,
.flags = IRQCHIP_MASK_ON_SUSPEND |
- IRQCHIP_SET_TYPE_MASKED |
- IRQCHIP_SKIP_SET_WAKE,
+ IRQCHIP_SET_TYPE_MASKED,
.irq_set_vcpu_affinity = irq_chip_set_vcpu_affinity_parent,
.irq_set_affinity = irq_chip_set_affinity_parent,
};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2020-08-10 11:22 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-10 11:20 [PATCH v4 0/7] irqchip: qcom: pdc: Introduce irq_set_wake call Maulik Shah
2020-08-10 11:20 ` [PATCH v4 1/7] pinctrl: qcom: Add msmgpio irqchip flags Maulik Shah
2020-08-11 19:32 ` Stephen Boyd
2020-08-13 5:47 ` Maulik Shah
2020-08-11 20:04 ` Doug Anderson
2020-08-10 11:20 ` [PATCH v4 2/7] pinctrl: qcom: Use return value from irq_set_wake call Maulik Shah
2020-08-11 19:34 ` Stephen Boyd
2020-08-11 20:06 ` Doug Anderson
2020-08-13 7:17 ` Maulik Shah
2020-08-13 7:21 ` Stephen Boyd
2020-08-27 22:46 ` Linus Walleij
2020-08-10 11:20 ` [PATCH v4 3/7] genirq: Introduce irq_suspend_one() and irq_resume_one() callbacks Maulik Shah
2020-08-11 20:09 ` Doug Anderson
2020-08-13 7:18 ` Maulik Shah
2020-08-13 9:29 ` Thomas Gleixner
2020-08-13 16:09 ` Doug Anderson
2020-08-13 22:09 ` Thomas Gleixner
2020-08-13 22:58 ` Doug Anderson
2020-08-14 2:07 ` Thomas Gleixner
2020-08-14 3:04 ` Doug Anderson
2020-08-14 12:43 ` Thomas Gleixner
2020-08-18 4:35 ` Maulik Shah
2020-08-18 14:40 ` Thomas Gleixner
2020-08-10 11:20 ` [PATCH v4 4/7] genirq: introduce irq_suspend_parent() and irq_resume_parent() Maulik Shah
2020-08-11 20:10 ` Doug Anderson
2020-08-13 7:19 ` Maulik Shah
2020-08-10 11:20 ` [PATCH v4 5/7] pinctrl: qcom: Call our parent for irq_suspend_one / irq_resume_one Maulik Shah
2020-08-10 11:20 ` Maulik Shah [this message]
2020-08-10 11:21 ` [PATCH v4 7/7] irqchip: qcom-pdc: Reset all pdc interrupts during init Maulik Shah
2020-08-10 12:09 ` Felipe Balbi
2020-08-13 7:21 ` Maulik Shah
2020-08-11 21:31 ` Stephen Boyd
2020-08-13 7:30 ` Maulik Shah
2020-08-14 20:24 ` Stephen Boyd
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