* [PATCH v9 0/2] AD4130
@ 2022-10-06 14:07 Cosmin Tanislav
2022-10-06 14:07 ` [PATCH v9 1/2] dt-bindings: iio: adc: add AD4130 Cosmin Tanislav
2022-10-06 14:07 ` [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver Cosmin Tanislav
0 siblings, 2 replies; 8+ messages in thread
From: Cosmin Tanislav @ 2022-10-06 14:07 UTC (permalink / raw)
Cc: Jonathan Cameron, Rob Herring, Linus Walleij, linux-iio,
linux-gpio, linux-kernel, devicetree, Cosmin Tanislav
AD4130-8 is an ultra-low power, high precision, measurement solution for
low bandwidth battery operated applications.
The fully integrated AFE (Analog Front-End) includes a multiplexer for up
to 16 single-ended or 8 differential inputs, PGA (Programmable Gain
Amplifier), 24-bit Sigma-Delta ADC, on-chip reference and oscillator,
selectable filter options, smart sequencer, sensor biasing and excitation
options, diagnostics, and a FIFO buffer.
V1 -> V2
* add kernel version to ABI file
* merge ABI patch into driver patch
* make copyright header similar to other drivers
* rearrange includes
* use units.h defines where possible and add unit sufix to
SOFT_RESET_SLEEP define
* remove ending comma to last members of enums / lists
* remove unused FILTER_MAX define
* use BIT macro for PIN_FN_*
* rearrange SETUP_SIZE definition
* group bools in ad4130_state and ad4130_chan_info
* put scale_tbls definition on one line
* remove newline before reg size == 0 check
* put mask used as value in a variable
* remove useless ret = 0 assignment
* make buffer attrs oneline
* use for_each_set_bit in update_scan_mode
* use if else for internal reference voltage error checking
* inline reference voltage check
* check number of vbias pins
* remove .has_int_pin = false
* remove avail_len for IIO_AVAIL_RANGE
* remove useless enabled_channels check in unlink_slot
* remove unused AD4130_RESET_CLK_COUNT define
* only call fwnode_handle_put for child in case of error
* default adi,reference-select to REFIN1
* default adi,int-ref-en to false
* of_irq_get_byname -> fwnode_irq_get_byname
* P1 -> P2 as interrupt pin options
* add missing comma in db3_freq_avail init
* cast values to u64 to make math using units.h work
* add datasheet reference to IRQ polarity
* add comment about disabling channels in predisable
* add part number prefix find_table_index
* return voltage from get_ref_voltage
* add datasheet reference for internal reference voltage selection
* add comment explaining AIN and GPIO pin sharing
* parse channel setup before parsing excitation pins
* only validate excitation pin if value is not off
* use FIELD_PREP for bipolar and int_ref_en
* put devm_regmap_init call on one line
* introduce a slot_info struct to contain setup_info for each slot
* enable internal reference automatically if needed
* decide mclk sel based on adi,ext-clk-freq and adi,int-clk-out
* dt-bindings: use internal reference explicitly
* dt-bindings: set type for adi,excitation-pin-0
* dt-bindings: set $ref for adi,vbias-pins
* dt-bindings: remove minItems from interrupts property
* dt-bindings: remove adi,int-ref-en default value
* dt-bindings: remove adi,bipolar default value
* dt-bindings: inline adi,int-ref-en description
* dt-bindings: default adi,reference-select to REFIN1
* dt-bindings: clean up description for diff-channels and
adi,reference-select
* dt-bindings: add more text to interrupt-names description
* dt-bindings: turn interrupt-names into a single string
* dt-bindings: add maxItems to adi,vbias-pins
V2 -> V3
* dt-bindings: add interrupt controller include to example
* dt-bindings: remove $ref in diff-channels
V3 -> V4:
* handle watermark value as number of datum
* DOUT_OR_INT -> INT
* AD4130_8_NAME -> AD4130_NAME
* return early in case of failure when parsing fw channel
* use IIO_DMA_MINALIGN for aligning buffer
* add comments for fs_to_freq and freq_to_fs
* remove support for other variants because of unavailability of model
ids for future chip variants
* remove support for db3 frequency because of inaccuracy when calculating
* remove ternary where possible
* refactor defines
* dt-bindings: add unevaluatedProperties: true to channel node
V4 -> V5:
* simplify get_ref_voltage function and move print statement to first user
* inline statements not going over the 80 cols limit
* simplify scale table filling
* determine table length inside find table index macro
* current_na -> tmp inside ad4130_parse_fw_setup
* define full register set
* put range register size definitions on one line
* nanoamps -> nanoamp
* adi,ext-clk-freq -> adi,ext-clk-freq-hz
* return directly in ad4130_validate_vbias_pins
* place comment regarding irq_trigger at assignment
* inversed -> inverted inside irq_trigger comment
* do not initialize int_clk_out
* return directly in ad4130_validate_diff_channels
* add () after reference to update_scan_mode in comment
* use BIT() for channel offset
* comment nitpicks on slot finding
* return -EINVAL out of reg read for invalid sizes
* place regmap at start of ad4130_state
* place bools at the end of ad4130_setup_info
* remove commas after terminators
* dt-bindings: only allow one element in reg
* dt-bindings: inline reg description
* dt-bindings: remove $ref from adi,ext-clk-freq-hz
V5 -> V6:
* bump KernelVersion
* use IIO_DEVICE_ATTR_RO
* nitpick inside mutex comment
* use valid_mask for validating gpios
* improve DMA comment
V6 -> V7:
* remove $ref from -nanoamp properties (to be added to dtschema)
* use hexadecimal numbers for channel unit-addresses
V7 -> V8:
* pick up Reviewed-By tags
* bump KernelVersion
V8 -> V9:
* bump KernelVersion
* enable internal clock output via CCF
* remove unused AD4130_MCLK_SEL_MAX
* remove unused AD4130_STATUS_POR_FLAG_MASK
* remove unused ad4130_id
* remove double new line
Cosmin Tanislav (2):
dt-bindings: iio: adc: add AD4130
iio: adc: ad4130: add AD4130 driver
.../ABI/testing/sysfs-bus-iio-adc-ad4130 | 36 +
.../bindings/iio/adc/adi,ad4130.yaml | 256 ++
MAINTAINERS | 17 +-
drivers/iio/adc/Kconfig | 13 +
drivers/iio/adc/Makefile | 1 +
drivers/iio/adc/ad4130.c | 2084 +++++++++++++++++
6 files changed, 2398 insertions(+), 9 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130
create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml
create mode 100644 drivers/iio/adc/ad4130.c
--
2.38.0
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v9 1/2] dt-bindings: iio: adc: add AD4130 2022-10-06 14:07 [PATCH v9 0/2] AD4130 Cosmin Tanislav @ 2022-10-06 14:07 ` Cosmin Tanislav 2022-10-06 14:07 ` [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver Cosmin Tanislav 1 sibling, 0 replies; 8+ messages in thread From: Cosmin Tanislav @ 2022-10-06 14:07 UTC (permalink / raw) Cc: Jonathan Cameron, Rob Herring, Linus Walleij, linux-iio, linux-gpio, linux-kernel, devicetree, Cosmin Tanislav, Rob Herring AD4130-8 is an ultra-low power, high precision, measurement solution for low bandwidth battery operated applications. The fully integrated AFE (Analog Front-End) includes a multiplexer for up to 16 single-ended or 8 differential inputs, PGA (Programmable Gain Amplifier), 24-bit Sigma-Delta ADC, on-chip reference and oscillator, selectable filter options, smart sequencer, sensor biasing and excitation options, diagnostics, and a FIFO buffer. Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com> Reviewed-by: Rob Herring <robh@kernel.org> --- .../bindings/iio/adc/adi,ad4130.yaml | 252 ++++++++++++++++++ 1 file changed, 252 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml new file mode 100644 index 000000000000..dea7426095c6 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml @@ -0,0 +1,252 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2022 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD4130 ADC device driver + +maintainers: + - Cosmin Tanislav <cosmin.tanislav@analog.com> + +description: | + Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf + +properties: + compatible: + enum: + - adi,ad4130 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: phandle to the master clock (mclk) + + clock-names: + items: + - const: mclk + + interrupts: + maxItems: 1 + + interrupt-names: + description: | + Specify which interrupt pin should be configured as Data Ready / FIFO + interrupt. + Default if not supplied is int. + enum: + - int + - clk + - p2 + - dout + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + refin1-supply: + description: refin1 supply. Can be used as reference for conversion. + + refin2-supply: + description: refin2 supply. Can be used as reference for conversion. + + avdd-supply: + description: AVDD voltage supply. Can be used as reference for conversion. + + iovdd-supply: + description: IOVDD voltage supply. Used for the chip interface. + + spi-max-frequency: + maximum: 5000000 + + adi,ext-clk-freq-hz: + description: Specify the frequency of the external clock. + enum: [76800, 153600] + default: 76800 + + adi,bipolar: + description: Specify if the device should be used in bipolar mode. + type: boolean + + adi,vbias-pins: + description: Analog inputs to apply a voltage bias of (AVDD − AVSS) / 2 to. + $ref: /schemas/types.yaml#/definitions/uint32-array + maxItems: 16 + items: + minimum: 0 + maximum: 15 + +required: + - compatible + - reg + - interrupts + +patternProperties: + "^channel@([0-9a-f])$": + type: object + $ref: adc.yaml + unevaluatedProperties: false + + properties: + reg: + description: The channel number. + minimum: 0 + maximum: 15 + + diff-channels: + description: | + Besides the analog inputs available, internal inputs can be used. + 16: Internal temperature sensor. + 17: AVSS + 18: Internal reference + 19: DGND + 20: (AVDD − AVSS)/6+ + 21: (AVDD − AVSS)/6- + 22: (IOVDD − DGND)/6+ + 23: (IOVDD − DGND)/6- + 24: (ALDO − AVSS)/6+ + 25: (ALDO − AVSS)/6- + 26: (DLDO − DGND)/6+ + 27: (DLDO − DGND)/6- + 28: V_MV_P + 29: V_MV_M + items: + minimum: 0 + maximum: 29 + + adi,reference-select: + description: | + Select the reference source to use when converting on the + specific channel. Valid values are: + 0: REFIN1(+)/REFIN1(−) + 1: REFIN2(+)/REFIN2(−) + 2: REFOUT/AVSS (Internal reference) + 3: AVDD/AVSS + If not specified, REFIN1 is used. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + default: 0 + + adi,excitation-pin-0: + description: | + Analog input to apply excitation current to while the channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 15 + default: 0 + + adi,excitation-pin-1: + description: | + Analog input to apply excitation current to while this channel + is active. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 15 + default: 0 + + adi,excitation-current-0-nanoamp: + description: | + Excitation current in nanoamps to be applied to pin specified in + adi,excitation-pin-0 while this channel is active. + enum: [0, 100, 10000, 20000, 50000, 100000, 150000, 200000] + default: 0 + + adi,excitation-current-1-nanoamp: + description: | + Excitation current in nanoamps to be applied to pin specified in + adi,excitation-pin-1 while this channel is active. + enum: [0, 100, 10000, 20000, 50000, 100000, 150000, 200000] + default: 0 + + adi,burnout-current-nanoamp: + description: | + Burnout current in nanoamps to be applied for this channel. + enum: [0, 500, 2000, 4000] + default: 0 + + adi,buffered-positive: + description: Enable buffered mode for positive input. + type: boolean + + adi,buffered-negative: + description: Enable buffered mode for negative input. + type: boolean + + required: + - reg + - diff-channels + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4130"; + reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + + spi-max-frequency = <5000000>; + interrupts = <27 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio>; + + channel@0 { + reg = <0>; + + adi,reference-select = <2>; + + /* AIN8, AIN9 */ + diff-channels = <8 9>; + }; + + channel@1 { + reg = <1>; + + adi,reference-select = <2>; + + /* AIN10, AIN11 */ + diff-channels = <10 11>; + }; + + channel@2 { + reg = <2>; + + adi,reference-select = <2>; + + /* Temperature Sensor, DGND */ + diff-channels = <16 19>; + }; + + channel@3 { + reg = <3>; + + adi,reference-select = <2>; + + /* Internal reference, DGND */ + diff-channels = <18 19>; + }; + + channel@4 { + reg = <4>; + + adi,reference-select = <2>; + + /* DGND, DGND */ + diff-channels = <19 19>; + }; + }; + }; -- 2.38.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver 2022-10-06 14:07 [PATCH v9 0/2] AD4130 Cosmin Tanislav 2022-10-06 14:07 ` [PATCH v9 1/2] dt-bindings: iio: adc: add AD4130 Cosmin Tanislav @ 2022-10-06 14:07 ` Cosmin Tanislav 2022-10-07 2:45 ` kernel test robot ` (2 more replies) 1 sibling, 3 replies; 8+ messages in thread From: Cosmin Tanislav @ 2022-10-06 14:07 UTC (permalink / raw) Cc: Jonathan Cameron, Rob Herring, Linus Walleij, linux-iio, linux-gpio, linux-kernel, devicetree, Cosmin Tanislav, Andy Shevchenko AD4130-8 is an ultra-low power, high precision, measurement solution for low bandwidth battery operated applications. The fully integrated AFE (Analog Front-End) includes a multiplexer for up to 16 single-ended or 8 differential inputs, PGA (Programmable Gain Amplifier), 24-bit Sigma-Delta ADC, on-chip reference and oscillator, selectable filter options, smart sequencer, sensor biasing and excitation options, diagnostics, and a FIFO buffer. Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> --- .../ABI/testing/sysfs-bus-iio-adc-ad4130 | 36 + MAINTAINERS | 8 + drivers/iio/adc/Kconfig | 13 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ad4130.c | 2083 +++++++++++++++++ 5 files changed, 2141 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 create mode 100644 drivers/iio/adc/ad4130.c diff --git a/Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 new file mode 100644 index 000000000000..08e2b638c863 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 @@ -0,0 +1,36 @@ +What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available +KernelVersion: 6.0 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns a list with the possible filter modes. + "sinc4" - Sinc 4. Excellent noise performance. Long 1st + conversion time. No natural 50/60Hz rejection. + "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion time. + "sinc3" - Sinc3. Moderate 1st conversion time. Good noise + performance. + "sinc3+rej60" - Sinc3 + 60Hz rejection. At a sampling frequency + of 50Hz, achieves simultaneous 50Hz and 60Hz + rejection. + "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion time. + Best used with a sampling frequency of at least + 216.19Hz. + "sinc3+pf1" - Sinc3 + Post Filter 1. + 53dB rejection @ 50Hz, 58dB rejection @ 60Hz. + "sinc3+pf2" - Sinc3 + Post Filter 2. + 70dB rejection @ 50Hz, 70dB rejection @ 60Hz. + "sinc3+pf3" - Sinc3 + Post Filter 3. + 99dB rejection @ 50Hz, 103dB rejection @ 60Hz. + "sinc3+pf4" - Sinc3 + Post Filter 4. + 103dB rejection @ 50Hz, 109dB rejection @ 60Hz. + +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_mode +KernelVersion: 6.0 +Contact: linux-iio@vger.kernel.org +Description: + Set the filter mode of the differential channel. When the filter + mode changes, the in_voltageY-voltageZ_sampling_frequency and + in_voltageY-voltageZ_sampling_frequency_available attributes + might also change to accommodate the new filter mode. + If the current sampling frequency is out of range for the new + filter mode, the sampling frequency will be changed to the + closest valid one. diff --git a/MAINTAINERS b/MAINTAINERS index c547559eddf9..7aea75ebc64f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1091,6 +1091,14 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git F: drivers/net/amt.c +ANALOG DEVICES INC AD4130 DRIVER +M: Cosmin Tanislav <cosmin.tanislav@analog.com> +L: linux-iio@vger.kernel.org +S: Supported +W: http://ez.analog.com/community/linux-device-drivers +F: Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml +F: drivers/iio/adc/ad4130.c + ANALOG DEVICES INC AD7192 DRIVER M: Alexandru Tachici <alexandru.tachici@analog.com> L: linux-iio@vger.kernel.org diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 791612ca6012..fa4243849ee1 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -21,6 +21,19 @@ config AD_SIGMA_DELTA select IIO_BUFFER select IIO_TRIGGERED_BUFFER +config AD4130 + tristate "Analog Device AD4130 ADC Driver" + depends on SPI + select IIO_BUFFER + select IIO_KFIFO_BUF + select REGMAP_SPI + help + Say yes here to build support for Analog Devices AD4130-8 SPI analog + to digital converters (ADC). + + To compile this driver as a module, choose M here: the module will be + called ad4130. + config AD7091R5 tristate "Analog Devices AD7091R5 ADC Driver" depends on I2C diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index 46caba7a010c..71c2428faa89 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -6,6 +6,7 @@ # When adding new entries keep the list in alphabetical order obj-$(CONFIG_AB8500_GPADC) += ab8500-gpadc.o obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o +obj-$(CONFIG_AD4130) += ad4130.o obj-$(CONFIG_AD7091R5) += ad7091r5.o ad7091r-base.o obj-$(CONFIG_AD7124) += ad7124.o obj-$(CONFIG_AD7192) += ad7192.o diff --git a/drivers/iio/adc/ad4130.c b/drivers/iio/adc/ad4130.c new file mode 100644 index 000000000000..149fa2811a41 --- /dev/null +++ b/drivers/iio/adc/ad4130.c @@ -0,0 +1,2083 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Analog Devices, Inc. + * Author: Cosmin Tanislav <cosmin.tanislav@analog.com> + */ + +#include <linux/bitfield.h> +#include <linux/bitops.h> +#include <linux/clk.h> +#include <linux/clk-provider.h> +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/err.h> +#include <linux/gpio/driver.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/property.h> +#include <linux/regmap.h> +#include <linux/regulator/consumer.h> +#include <linux/spi/spi.h> +#include <linux/units.h> + +#include <asm/div64.h> +#include <asm/unaligned.h> + +#include <linux/iio/buffer.h> +#include <linux/iio/iio.h> +#include <linux/iio/kfifo_buf.h> +#include <linux/iio/sysfs.h> + +#define AD4130_NAME "ad4130" + +#define AD4130_COMMS_READ_MASK BIT(6) + +#define AD4130_STATUS_REG 0x00 + +#define AD4130_ADC_CONTROL_REG 0x01 +#define AD4130_ADC_CONTROL_BIPOLAR_MASK BIT(14) +#define AD4130_ADC_CONTROL_INT_REF_VAL_MASK BIT(13) +#define AD4130_INT_REF_2_5V 2500000 +#define AD4130_INT_REF_1_25V 1250000 +#define AD4130_ADC_CONTROL_CSB_EN_MASK BIT(9) +#define AD4130_ADC_CONTROL_INT_REF_EN_MASK BIT(8) +#define AD4130_ADC_CONTROL_MODE_MASK GENMASK(5, 2) +#define AD4130_ADC_CONTROL_MCLK_SEL_MASK GENMASK(1, 0) +#define AD4130_MCLK_FREQ_76_8KHZ 76800 +#define AD4130_MCLK_FREQ_153_6KHZ 153600 + +#define AD4130_DATA_REG 0x02 + +#define AD4130_IO_CONTROL_REG 0x03 +#define AD4130_IO_CONTROL_INT_PIN_SEL_MASK GENMASK(9, 8) +#define AD4130_IO_CONTROL_GPIO_DATA_MASK GENMASK(7, 4) +#define AD4130_IO_CONTROL_GPIO_CTRL_MASK GENMASK(3, 0) + +#define AD4130_VBIAS_REG 0x04 + +#define AD4130_ID_REG 0x05 + +#define AD4130_ERROR_REG 0x06 + +#define AD4130_ERROR_EN_REG 0x07 + +#define AD4130_MCLK_COUNT_REG 0x08 + +#define AD4130_CHANNEL_X_REG(x) (0x09 + (x)) +#define AD4130_CHANNEL_EN_MASK BIT(23) +#define AD4130_CHANNEL_SETUP_MASK GENMASK(22, 20) +#define AD4130_CHANNEL_AINP_MASK GENMASK(17, 13) +#define AD4130_CHANNEL_AINM_MASK GENMASK(12, 8) +#define AD4130_CHANNEL_IOUT1_MASK GENMASK(7, 4) +#define AD4130_CHANNEL_IOUT2_MASK GENMASK(3, 0) + +#define AD4130_CONFIG_X_REG(x) (0x19 + (x)) +#define AD4130_CONFIG_IOUT1_VAL_MASK GENMASK(15, 13) +#define AD4130_CONFIG_IOUT2_VAL_MASK GENMASK(12, 10) +#define AD4130_CONFIG_BURNOUT_MASK GENMASK(9, 8) +#define AD4130_CONFIG_REF_BUFP_MASK BIT(7) +#define AD4130_CONFIG_REF_BUFM_MASK BIT(6) +#define AD4130_CONFIG_REF_SEL_MASK GENMASK(5, 4) +#define AD4130_CONFIG_PGA_MASK GENMASK(3, 1) + +#define AD4130_FILTER_X_REG(x) (0x21 + (x)) +#define AD4130_FILTER_MODE_MASK GENMASK(15, 12) +#define AD4130_FILTER_SELECT_MASK GENMASK(10, 0) +#define AD4130_FILTER_SELECT_MIN 1 + +#define AD4130_OFFSET_X_REG(x) (0x29 + (x)) + +#define AD4130_GAIN_X_REG(x) (0x31 + (x)) + +#define AD4130_MISC_REG 0x39 + +#define AD4130_FIFO_CONTROL_REG 0x3a +#define AD4130_FIFO_CONTROL_HEADER_MASK BIT(18) +#define AD4130_FIFO_CONTROL_MODE_MASK GENMASK(17, 16) +#define AD4130_FIFO_CONTROL_WM_INT_EN_MASK BIT(9) +#define AD4130_FIFO_CONTROL_WM_MASK GENMASK(7, 0) +#define AD4130_WATERMARK_256 0 + +#define AD4130_FIFO_STATUS_REG 0x3b + +#define AD4130_FIFO_THRESHOLD_REG 0x3c + +#define AD4130_FIFO_DATA_REG 0x3d +#define AD4130_FIFO_SIZE 256 +#define AD4130_FIFO_MAX_SAMPLE_SIZE 3 + +#define AD4130_MAX_ANALOG_PINS 16 +#define AD4130_MAX_CHANNELS 16 +#define AD4130_MAX_DIFF_INPUTS 30 +#define AD4130_MAX_GPIOS 4 +#define AD4130_MAX_ODR 2400 +#define AD4130_MAX_PGA 8 +#define AD4130_MAX_SETUPS 8 + +#define AD4130_AIN2_P1 0x2 +#define AD4130_AIN3_P2 0x3 + +#define AD4130_RESET_BUF_SIZE 8 +#define AD4130_RESET_SLEEP_US (160 * MICRO / AD4130_MCLK_FREQ_76_8KHZ) + +#define AD4130_INVALID_SLOT -1 + +static const unsigned int ad4130_reg_size[] = { + [AD4130_STATUS_REG] = 1, + [AD4130_ADC_CONTROL_REG] = 2, + [AD4130_DATA_REG] = 3, + [AD4130_IO_CONTROL_REG] = 2, + [AD4130_VBIAS_REG] = 2, + [AD4130_ID_REG] = 1, + [AD4130_ERROR_REG] = 2, + [AD4130_ERROR_EN_REG] = 2, + [AD4130_MCLK_COUNT_REG] = 1, + [AD4130_CHANNEL_X_REG(0) ... AD4130_CHANNEL_X_REG(AD4130_MAX_CHANNELS)] = 3, + [AD4130_CONFIG_X_REG(0) ... AD4130_CONFIG_X_REG(AD4130_MAX_SETUPS)] = 2, + [AD4130_FILTER_X_REG(0) ... AD4130_FILTER_X_REG(AD4130_MAX_SETUPS)] = 3, + [AD4130_OFFSET_X_REG(0) ... AD4130_OFFSET_X_REG(AD4130_MAX_SETUPS)] = 3, + [AD4130_GAIN_X_REG(0) ... AD4130_GAIN_X_REG(AD4130_MAX_SETUPS)] = 3, + [AD4130_MISC_REG] = 2, + [AD4130_FIFO_CONTROL_REG] = 3, + [AD4130_FIFO_STATUS_REG] = 1, + [AD4130_FIFO_THRESHOLD_REG] = 3, + [AD4130_FIFO_DATA_REG] = 3, +}; + +enum ad4130_int_ref_val { + AD4130_INT_REF_VAL_2_5V, + AD4130_INT_REF_VAL_1_25V, +}; + +enum ad4130_mclk_sel { + AD4130_MCLK_76_8KHZ, + AD4130_MCLK_76_8KHZ_OUT, + AD4130_MCLK_76_8KHZ_EXT, + AD4130_MCLK_153_6KHZ_EXT, +}; + +enum ad4130_int_pin_sel { + AD4130_INT_PIN_INT, + AD4130_INT_PIN_CLK, + AD4130_INT_PIN_P2, + AD4130_INT_PIN_DOUT, +}; + +enum ad4130_iout { + AD4130_IOUT_OFF, + AD4130_IOUT_10000NA, + AD4130_IOUT_20000NA, + AD4130_IOUT_50000NA, + AD4130_IOUT_100000NA, + AD4130_IOUT_150000NA, + AD4130_IOUT_200000NA, + AD4130_IOUT_100NA, + AD4130_IOUT_MAX +}; + +enum ad4130_burnout { + AD4130_BURNOUT_OFF, + AD4130_BURNOUT_500NA, + AD4130_BURNOUT_2000NA, + AD4130_BURNOUT_4000NA, + AD4130_BURNOUT_MAX +}; + +enum ad4130_ref_sel { + AD4130_REF_REFIN1, + AD4130_REF_REFIN2, + AD4130_REF_REFOUT_AVSS, + AD4130_REF_AVDD_AVSS, + AD4130_REF_SEL_MAX +}; + +enum ad4130_fifo_mode { + AD4130_FIFO_MODE_DISABLED = 0b00, + AD4130_FIFO_MODE_WM = 0b01, +}; + +enum ad4130_mode { + AD4130_MODE_CONTINUOUS = 0b0000, + AD4130_MODE_IDLE = 0b0100, +}; + +enum ad4130_filter_mode { + AD4130_FILTER_SINC4, + AD4130_FILTER_SINC4_SINC1, + AD4130_FILTER_SINC3, + AD4130_FILTER_SINC3_REJ60, + AD4130_FILTER_SINC3_SINC1, + AD4130_FILTER_SINC3_PF1, + AD4130_FILTER_SINC3_PF2, + AD4130_FILTER_SINC3_PF3, + AD4130_FILTER_SINC3_PF4, +}; + +enum ad4130_pin_function { + AD4130_PIN_FN_NONE, + AD4130_PIN_FN_SPECIAL = BIT(0), + AD4130_PIN_FN_DIFF = BIT(1), + AD4130_PIN_FN_EXCITATION = BIT(2), + AD4130_PIN_FN_VBIAS = BIT(3), +}; + +struct ad4130_setup_info { + unsigned int iout0_val; + unsigned int iout1_val; + unsigned int burnout; + unsigned int pga; + unsigned int fs; + u32 ref_sel; + enum ad4130_filter_mode filter_mode; + bool ref_bufp; + bool ref_bufm; +}; + +struct ad4130_slot_info { + struct ad4130_setup_info setup; + unsigned int enabled_channels; + unsigned int channels; +}; + +struct ad4130_chan_info { + struct ad4130_setup_info setup; + u32 iout0; + u32 iout1; + int slot; + bool enabled; + bool initialized; +}; + +struct ad4130_filter_config { + enum ad4130_filter_mode filter_mode; + unsigned int odr_div; + unsigned int fs_max; + enum iio_available_type samp_freq_avail_type; + int samp_freq_avail_len; + int samp_freq_avail[3][2]; +}; + +struct ad4130_state { + struct regmap *regmap; + struct spi_device *spi; + struct clk *mclk; + struct regulator_bulk_data regulators[4]; + u32 irq_trigger; + u32 inv_irq_trigger; + + /* + * Synchronize access to members the of driver state, and ensure + * atomicity of consecutive regmap operations. + */ + struct mutex lock; + struct completion completion; + + struct iio_chan_spec chans[AD4130_MAX_CHANNELS]; + struct ad4130_chan_info chans_info[AD4130_MAX_CHANNELS]; + struct ad4130_slot_info slots_info[AD4130_MAX_SETUPS]; + enum ad4130_pin_function pins_fn[AD4130_MAX_ANALOG_PINS]; + u32 vbias_pins[AD4130_MAX_ANALOG_PINS]; + u32 num_vbias_pins; + int scale_tbls[AD4130_REF_SEL_MAX][AD4130_MAX_PGA][2]; + struct gpio_chip gc; + struct clk_hw int_clk_hw; + + u32 int_pin_sel; + u32 int_ref_uv; + u32 mclk_sel; + bool int_ref_en; + bool bipolar; + + unsigned int num_enabled_channels; + unsigned int effective_watermark; + unsigned int watermark; + + struct spi_message fifo_msg; + struct spi_transfer fifo_xfer[2]; + + /* + * DMA (thus cache coherency maintenance) requires any transfer + * buffers to live in their own cache lines. As the use of these + * buffers is synchronous, all of the buffers used for DMA in this + * driver may share a cache line. + */ + u8 reset_buf[AD4130_RESET_BUF_SIZE] __aligned(IIO_DMA_MINALIGN); + u8 reg_write_tx_buf[4]; + u8 reg_read_tx_buf[1]; + u8 reg_read_rx_buf[3]; + u8 fifo_tx_buf[2]; + u8 fifo_rx_buf[AD4130_FIFO_SIZE * + AD4130_FIFO_MAX_SAMPLE_SIZE]; +}; + +static const char * const ad4130_int_pin_names[] = { + [AD4130_INT_PIN_INT] = "int", + [AD4130_INT_PIN_CLK] = "clk", + [AD4130_INT_PIN_P2] = "p2", + [AD4130_INT_PIN_DOUT] = "dout", +}; + +static const unsigned int ad4130_iout_current_na_tbl[AD4130_IOUT_MAX] = { + [AD4130_IOUT_OFF] = 0, + [AD4130_IOUT_100NA] = 100, + [AD4130_IOUT_10000NA] = 10000, + [AD4130_IOUT_20000NA] = 20000, + [AD4130_IOUT_50000NA] = 50000, + [AD4130_IOUT_100000NA] = 100000, + [AD4130_IOUT_150000NA] = 150000, + [AD4130_IOUT_200000NA] = 200000, +}; + +static const unsigned int ad4130_burnout_current_na_tbl[AD4130_BURNOUT_MAX] = { + [AD4130_BURNOUT_OFF] = 0, + [AD4130_BURNOUT_500NA] = 500, + [AD4130_BURNOUT_2000NA] = 2000, + [AD4130_BURNOUT_4000NA] = 4000, +}; + +#define AD4130_VARIABLE_ODR_CONFIG(_filter_mode, _odr_div, _fs_max) \ +{ \ + .filter_mode = (_filter_mode), \ + .odr_div = (_odr_div), \ + .fs_max = (_fs_max), \ + .samp_freq_avail_type = IIO_AVAIL_RANGE, \ + .samp_freq_avail = { \ + { AD4130_MAX_ODR, (_odr_div) * (_fs_max) }, \ + { AD4130_MAX_ODR, (_odr_div) * (_fs_max) }, \ + { AD4130_MAX_ODR, (_odr_div) }, \ + }, \ +} + +#define AD4130_FIXED_ODR_CONFIG(_filter_mode, _odr_div) \ +{ \ + .filter_mode = (_filter_mode), \ + .odr_div = (_odr_div), \ + .fs_max = AD4130_FILTER_SELECT_MIN, \ + .samp_freq_avail_type = IIO_AVAIL_LIST, \ + .samp_freq_avail_len = 1, \ + .samp_freq_avail = { \ + { AD4130_MAX_ODR, (_odr_div) }, \ + }, \ +} + +static const struct ad4130_filter_config ad4130_filter_configs[] = { + AD4130_VARIABLE_ODR_CONFIG(AD4130_FILTER_SINC4, 1, 10), + AD4130_VARIABLE_ODR_CONFIG(AD4130_FILTER_SINC4_SINC1, 11, 10), + AD4130_VARIABLE_ODR_CONFIG(AD4130_FILTER_SINC3, 1, 2047), + AD4130_VARIABLE_ODR_CONFIG(AD4130_FILTER_SINC3_REJ60, 1, 2047), + AD4130_VARIABLE_ODR_CONFIG(AD4130_FILTER_SINC3_SINC1, 10, 2047), + AD4130_FIXED_ODR_CONFIG(AD4130_FILTER_SINC3_PF1, 92), + AD4130_FIXED_ODR_CONFIG(AD4130_FILTER_SINC3_PF2, 100), + AD4130_FIXED_ODR_CONFIG(AD4130_FILTER_SINC3_PF3, 124), + AD4130_FIXED_ODR_CONFIG(AD4130_FILTER_SINC3_PF4, 148), +}; + +static const char * const ad4130_filter_modes_str[] = { + [AD4130_FILTER_SINC4] = "sinc4", + [AD4130_FILTER_SINC4_SINC1] = "sinc4+sinc1", + [AD4130_FILTER_SINC3] = "sinc3", + [AD4130_FILTER_SINC3_REJ60] = "sinc3+rej60", + [AD4130_FILTER_SINC3_SINC1] = "sinc3+sinc1", + [AD4130_FILTER_SINC3_PF1] = "sinc3+pf1", + [AD4130_FILTER_SINC3_PF2] = "sinc3+pf2", + [AD4130_FILTER_SINC3_PF3] = "sinc3+pf3", + [AD4130_FILTER_SINC3_PF4] = "sinc3+pf4", +}; + +static int ad4130_get_reg_size(struct ad4130_state *st, unsigned int reg, + unsigned int *size) +{ + if (reg >= ARRAY_SIZE(ad4130_reg_size)) + return -EINVAL; + + *size = ad4130_reg_size[reg]; + + return 0; +} + +static unsigned int ad4130_data_reg_size(struct ad4130_state *st) +{ + unsigned int data_reg_size; + int ret; + + ret = ad4130_get_reg_size(st, AD4130_DATA_REG, &data_reg_size); + if (ret) + return 0; + + return data_reg_size; +} + +static unsigned int ad4130_resolution(struct ad4130_state *st) +{ + return ad4130_data_reg_size(st) * BITS_PER_BYTE; +} + +static int ad4130_reg_write(void *context, unsigned int reg, unsigned int val) +{ + struct ad4130_state *st = context; + unsigned int size; + int ret; + + ret = ad4130_get_reg_size(st, reg, &size); + if (ret) + return ret; + + st->reg_write_tx_buf[0] = reg; + + switch (size) { + case 3: + put_unaligned_be24(val, &st->reg_write_tx_buf[1]); + break; + case 2: + put_unaligned_be16(val, &st->reg_write_tx_buf[1]); + break; + case 1: + st->reg_write_tx_buf[1] = val; + break; + default: + return -EINVAL; + } + + return spi_write(st->spi, st->reg_write_tx_buf, size + 1); +} + +static int ad4130_reg_read(void *context, unsigned int reg, unsigned int *val) +{ + struct ad4130_state *st = context; + struct spi_transfer t[] = { + { + .tx_buf = st->reg_read_tx_buf, + .len = sizeof(st->reg_read_tx_buf), + }, + { + .rx_buf = st->reg_read_rx_buf, + }, + }; + unsigned int size; + int ret; + + ret = ad4130_get_reg_size(st, reg, &size); + if (ret) + return ret; + + st->reg_read_tx_buf[0] = AD4130_COMMS_READ_MASK | reg; + t[1].len = size; + + ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); + if (ret) + return ret; + + switch (size) { + case 3: + *val = get_unaligned_be24(st->reg_read_rx_buf); + break; + case 2: + *val = get_unaligned_be16(st->reg_read_rx_buf); + break; + case 1: + *val = st->reg_read_rx_buf[0]; + break; + default: + return -EINVAL; + } + + return 0; +} + +static const struct regmap_config ad4130_regmap_config = { + .reg_read = ad4130_reg_read, + .reg_write = ad4130_reg_write, +}; + +static int ad4130_gpio_init_valid_mask(struct gpio_chip *gc, + unsigned long *valid_mask, + unsigned int ngpios) +{ + struct ad4130_state *st = gpiochip_get_data(gc); + unsigned int i; + + /* + * Output-only GPIO functionality is available on pins AIN2 through + * AIN5. If these pins are used for anything else, do not expose them. + */ + for (i = 0; i < ngpios; i++) { + unsigned int pin = i + AD4130_AIN2_P1; + bool valid = st->pins_fn[pin] == AD4130_PIN_FN_NONE; + + __assign_bit(i, valid_mask, valid); + } + + return 0; +} + +static int ad4130_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) +{ + return GPIO_LINE_DIRECTION_OUT; +} + +static void ad4130_gpio_set(struct gpio_chip *gc, unsigned int offset, + int value) +{ + struct ad4130_state *st = gpiochip_get_data(gc); + unsigned int mask = FIELD_PREP(AD4130_IO_CONTROL_GPIO_DATA_MASK, + BIT(offset)); + + regmap_update_bits(st->regmap, AD4130_IO_CONTROL_REG, mask, + value ? mask : 0); +} + +static int ad4130_set_mode(struct ad4130_state *st, enum ad4130_mode mode) +{ + return regmap_update_bits(st->regmap, AD4130_ADC_CONTROL_REG, + AD4130_ADC_CONTROL_MODE_MASK, + FIELD_PREP(AD4130_ADC_CONTROL_MODE_MASK, mode)); +} + +static int ad4130_set_watermark_interrupt_en(struct ad4130_state *st, bool en) +{ + return regmap_update_bits(st->regmap, AD4130_FIFO_CONTROL_REG, + AD4130_FIFO_CONTROL_WM_INT_EN_MASK, + FIELD_PREP(AD4130_FIFO_CONTROL_WM_INT_EN_MASK, en)); +} + +static unsigned int ad4130_watermark_reg_val(unsigned int val) +{ + if (val == AD4130_FIFO_SIZE) + val = AD4130_WATERMARK_256; + + return val; +} + +static int ad4130_set_fifo_mode(struct ad4130_state *st, + enum ad4130_fifo_mode mode) +{ + return regmap_update_bits(st->regmap, AD4130_FIFO_CONTROL_REG, + AD4130_FIFO_CONTROL_MODE_MASK, + FIELD_PREP(AD4130_FIFO_CONTROL_MODE_MASK, mode)); +} + +static void ad4130_push_fifo_data(struct iio_dev *indio_dev) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int data_reg_size = ad4130_data_reg_size(st); + unsigned int transfer_len = st->effective_watermark * data_reg_size; + unsigned int set_size = st->num_enabled_channels * data_reg_size; + unsigned int i; + int ret; + + st->fifo_tx_buf[1] = ad4130_watermark_reg_val(st->effective_watermark); + st->fifo_xfer[1].len = transfer_len; + + ret = spi_sync(st->spi, &st->fifo_msg); + if (ret) + return; + + for (i = 0; i < transfer_len; i += set_size) + iio_push_to_buffers(indio_dev, &st->fifo_rx_buf[i]); +} + +static irqreturn_t ad4130_irq_handler(int irq, void *private) +{ + struct iio_dev *indio_dev = private; + struct ad4130_state *st = iio_priv(indio_dev); + + if (iio_buffer_enabled(indio_dev)) + ad4130_push_fifo_data(indio_dev); + else + complete(&st->completion); + + return IRQ_HANDLED; +} + +static int ad4130_find_slot(struct ad4130_state *st, + struct ad4130_setup_info *target_setup_info, + unsigned int *slot, bool *overwrite) +{ + unsigned int i; + + *slot = AD4130_INVALID_SLOT; + *overwrite = false; + + for (i = 0; i < AD4130_MAX_SETUPS; i++) { + struct ad4130_slot_info *slot_info = &st->slots_info[i]; + + /* Immediately accept a matching setup info. */ + if (!memcmp(target_setup_info, &slot_info->setup, + sizeof(*target_setup_info))) { + *slot = i; + return 0; + } + + /* Ignore all setups which are used by enabled channels. */ + if (slot_info->enabled_channels) + continue; + + /* Find the least used slot. */ + if (*slot == AD4130_INVALID_SLOT || + slot_info->channels < st->slots_info[*slot].channels) + *slot = i; + } + + if (*slot == AD4130_INVALID_SLOT) + return -EINVAL; + + *overwrite = true; + + return 0; +} + +static void ad4130_unlink_channel(struct ad4130_state *st, unsigned int channel) +{ + struct ad4130_chan_info *chan_info = &st->chans_info[channel]; + struct ad4130_slot_info *slot_info = &st->slots_info[chan_info->slot]; + + chan_info->slot = AD4130_INVALID_SLOT; + slot_info->channels--; +} + +static int ad4130_unlink_slot(struct ad4130_state *st, unsigned int slot) +{ + unsigned int i; + + for (i = 0; i < AD4130_MAX_CHANNELS; i++) { + struct ad4130_chan_info *chan_info = &st->chans_info[i]; + + if (!chan_info->initialized || chan_info->slot != slot) + continue; + + ad4130_unlink_channel(st, i); + } + + return 0; +} + +static int ad4130_link_channel_slot(struct ad4130_state *st, + unsigned int channel, unsigned int slot) +{ + struct ad4130_slot_info *slot_info = &st->slots_info[slot]; + struct ad4130_chan_info *chan_info = &st->chans_info[channel]; + int ret; + + ret = regmap_update_bits(st->regmap, AD4130_CHANNEL_X_REG(channel), + AD4130_CHANNEL_SETUP_MASK, + FIELD_PREP(AD4130_CHANNEL_SETUP_MASK, slot)); + if (ret) + return ret; + + chan_info->slot = slot; + slot_info->channels++; + + return 0; +} + +static int ad4130_write_slot_setup(struct ad4130_state *st, + unsigned int slot, + struct ad4130_setup_info *setup_info) +{ + unsigned int val; + int ret; + + val = FIELD_PREP(AD4130_CONFIG_IOUT1_VAL_MASK, setup_info->iout0_val) | + FIELD_PREP(AD4130_CONFIG_IOUT1_VAL_MASK, setup_info->iout1_val) | + FIELD_PREP(AD4130_CONFIG_BURNOUT_MASK, setup_info->burnout) | + FIELD_PREP(AD4130_CONFIG_REF_BUFP_MASK, setup_info->ref_bufp) | + FIELD_PREP(AD4130_CONFIG_REF_BUFM_MASK, setup_info->ref_bufm) | + FIELD_PREP(AD4130_CONFIG_REF_SEL_MASK, setup_info->ref_sel) | + FIELD_PREP(AD4130_CONFIG_PGA_MASK, setup_info->pga); + + ret = regmap_write(st->regmap, AD4130_CONFIG_X_REG(slot), val); + if (ret) + return ret; + + val = FIELD_PREP(AD4130_FILTER_MODE_MASK, setup_info->filter_mode) | + FIELD_PREP(AD4130_FILTER_SELECT_MASK, setup_info->fs); + + ret = regmap_write(st->regmap, AD4130_FILTER_X_REG(slot), val); + if (ret) + return ret; + + memcpy(&st->slots_info[slot].setup, setup_info, sizeof(*setup_info)); + + return 0; +} + +static int ad4130_write_channel_setup(struct ad4130_state *st, + unsigned int channel, bool on_enable) +{ + struct ad4130_chan_info *chan_info = &st->chans_info[channel]; + struct ad4130_setup_info *setup_info = &chan_info->setup; + bool overwrite; + int slot; + int ret; + + /* + * The following cases need to be handled. + * + * 1. Enabled and linked channel with setup changes: + * - Find a slot. If not possible, return error. + * - Unlink channel from current slot. + * - If the slot has channels linked to it, unlink all channels, and + * write the new setup to it. + * - Link channel to new slot. + * + * 2. Soon to be enabled and unlinked channel: + * - Find a slot. If not possible, return error. + * - If the slot has channels linked to it, unlink all channels, and + * write the new setup to it. + * - Link channel to the slot. + * + * 3. Disabled and linked channel with setup changes: + * - Unlink channel from current slot. + * + * 4. Soon to be enabled and linked channel: + * 5. Disabled and unlinked channel with setup changes: + * - Do nothing. + */ + + /* Case 4 */ + if (on_enable && chan_info->slot != AD4130_INVALID_SLOT) + return 0; + + if (!on_enable && !chan_info->enabled) { + if (chan_info->slot != AD4130_INVALID_SLOT) + /* Case 3 */ + ad4130_unlink_channel(st, channel); + + /* Cases 3 & 5 */ + return 0; + } + + /* Cases 1 & 2 */ + ret = ad4130_find_slot(st, setup_info, &slot, &overwrite); + if (ret) + return ret; + + if (chan_info->slot != AD4130_INVALID_SLOT) + /* Case 1 */ + ad4130_unlink_channel(st, channel); + + if (overwrite) { + ret = ad4130_unlink_slot(st, slot); + if (ret) + return ret; + + ret = ad4130_write_slot_setup(st, slot, setup_info); + if (ret) + return ret; + } + + return ad4130_link_channel_slot(st, channel, slot); +} + +static int ad4130_set_channel_enable(struct ad4130_state *st, + unsigned int channel, bool status) +{ + struct ad4130_chan_info *chan_info = &st->chans_info[channel]; + struct ad4130_slot_info *slot_info; + int ret; + + if (chan_info->enabled == status) + return 0; + + if (status) { + ret = ad4130_write_channel_setup(st, channel, true); + if (ret) + return ret; + } + + slot_info = &st->slots_info[chan_info->slot]; + + ret = regmap_update_bits(st->regmap, AD4130_CHANNEL_X_REG(channel), + AD4130_CHANNEL_EN_MASK, + FIELD_PREP(AD4130_CHANNEL_EN_MASK, status)); + if (ret) + return ret; + + slot_info->enabled_channels += status ? 1 : -1; + chan_info->enabled = status; + + return 0; +} + +/* + * Table 58. FILTER_MODE_n bits and Filter Types of the datasheet describes + * the relation between filter mode, ODR and FS. + * + * Notice that the max ODR of each filter mode is not necessarily the + * absolute max ODR supported by the chip. + * + * The ODR divider is not explicitly specified, but it can be deduced based + * on the ODR range of each filter mode. + * + * For example, for Sinc4+Sinc1, max ODR is 218.18. That means that the + * absolute max ODR is divided by 11 to achieve the max ODR of this filter + * mode. + * + * The formulas for converting between ODR and FS for a specific filter + * mode can be deduced from the same table. + * + * Notice that FS = 1 actually means max ODR, and that ODR decreases by + * (maximum ODR / maximum FS) for each increment of FS. + * + * odr = MAX_ODR / odr_div * (1 - (fs - 1) / fs_max) <=> + * odr = MAX_ODR * (1 - (fs - 1) / fs_max) / odr_div <=> + * odr = MAX_ODR * (1 - (fs - 1) / fs_max) / odr_div <=> + * odr = MAX_ODR * (fs_max - fs + 1) / (fs_max * odr_div) + * (used in ad4130_fs_to_freq) + * + * For the opposite formula, FS can be extracted from the last one. + * + * MAX_ODR * (fs_max - fs + 1) = fs_max * odr_div * odr <=> + * fs_max - fs + 1 = fs_max * odr_div * odr / MAX_ODR <=> + * fs = 1 + fs_max - fs_max * odr_div * odr / MAX_ODR + * (used in ad4130_fs_to_freq) + */ + +static void ad4130_freq_to_fs(enum ad4130_filter_mode filter_mode, + int val, int val2, unsigned int *fs) +{ + const struct ad4130_filter_config *filter_config = + &ad4130_filter_configs[filter_mode]; + u64 dividend, divisor; + int temp; + + dividend = filter_config->fs_max * filter_config->odr_div * + ((u64)val * NANO + val2); + divisor = (u64)AD4130_MAX_ODR * NANO; + + temp = AD4130_FILTER_SELECT_MIN + filter_config->fs_max - + DIV64_U64_ROUND_CLOSEST(dividend, divisor); + + if (temp < AD4130_FILTER_SELECT_MIN) + temp = AD4130_FILTER_SELECT_MIN; + else if (temp > filter_config->fs_max) + temp = filter_config->fs_max; + + *fs = temp; +} + +static void ad4130_fs_to_freq(enum ad4130_filter_mode filter_mode, + unsigned int fs, int *val, int *val2) +{ + const struct ad4130_filter_config *filter_config = + &ad4130_filter_configs[filter_mode]; + unsigned int dividend, divisor; + u64 temp; + + dividend = (filter_config->fs_max - fs + AD4130_FILTER_SELECT_MIN) * + AD4130_MAX_ODR; + divisor = filter_config->fs_max * filter_config->odr_div; + + temp = div_u64((u64)dividend * NANO, divisor); + *val = div_u64_rem(temp, NANO, val2); +} + +static int ad4130_set_filter_mode(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + unsigned int val) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int channel = chan->scan_index; + struct ad4130_chan_info *chan_info = &st->chans_info[channel]; + struct ad4130_setup_info *setup_info = &chan_info->setup; + enum ad4130_filter_mode old_filter_mode; + int freq_val, freq_val2; + unsigned int old_fs; + int ret = 0; + + mutex_lock(&st->lock); + if (setup_info->filter_mode == val) + goto out; + + old_fs = setup_info->fs; + old_filter_mode = setup_info->filter_mode; + + /* + * When switching between filter modes, try to match the ODR as + * close as possible. To do this, convert the current FS into ODR + * using the old filter mode, then convert it back into FS using + * the new filter mode. + */ + ad4130_fs_to_freq(setup_info->filter_mode, setup_info->fs, + &freq_val, &freq_val2); + + ad4130_freq_to_fs(val, freq_val, freq_val2, &setup_info->fs); + + setup_info->filter_mode = val; + + ret = ad4130_write_channel_setup(st, channel, false); + if (ret) { + setup_info->fs = old_fs; + setup_info->filter_mode = old_filter_mode; + } + + out: + mutex_unlock(&st->lock); + + return ret; +} + +static int ad4130_get_filter_mode(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int channel = chan->scan_index; + struct ad4130_setup_info *setup_info = &st->chans_info[channel].setup; + enum ad4130_filter_mode filter_mode; + + mutex_lock(&st->lock); + filter_mode = setup_info->filter_mode; + mutex_unlock(&st->lock); + + return filter_mode; +} + +static const struct iio_enum ad4130_filter_mode_enum = { + .items = ad4130_filter_modes_str, + .num_items = ARRAY_SIZE(ad4130_filter_modes_str), + .set = ad4130_set_filter_mode, + .get = ad4130_get_filter_mode, +}; + +static const struct iio_chan_spec_ext_info ad4130_filter_mode_ext_info[] = { + IIO_ENUM("filter_mode", IIO_SEPARATE, &ad4130_filter_mode_enum), + IIO_ENUM_AVAILABLE("filter_mode", IIO_SHARED_BY_TYPE, + &ad4130_filter_mode_enum), + { } +}; + +static const struct iio_chan_spec ad4130_channel_template = { + .type = IIO_VOLTAGE, + .indexed = 1, + .differential = 1, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_OFFSET) | + BIT(IIO_CHAN_INFO_SAMP_FREQ), + .info_mask_separate_available = BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_SAMP_FREQ), + .ext_info = ad4130_filter_mode_ext_info, + .scan_type = { + .sign = 'u', + .endianness = IIO_BE, + }, +}; + +static int ad4130_set_channel_pga(struct ad4130_state *st, unsigned int channel, + int val, int val2) +{ + struct ad4130_chan_info *chan_info = &st->chans_info[channel]; + struct ad4130_setup_info *setup_info = &chan_info->setup; + unsigned int pga, old_pga; + int ret = 0; + + for (pga = 0; pga < AD4130_MAX_PGA; pga++) + if (val == st->scale_tbls[setup_info->ref_sel][pga][0] && + val2 == st->scale_tbls[setup_info->ref_sel][pga][1]) + break; + + if (pga == AD4130_MAX_PGA) + return -EINVAL; + + mutex_lock(&st->lock); + if (pga == setup_info->pga) + goto out; + + old_pga = setup_info->pga; + setup_info->pga = pga; + + ret = ad4130_write_channel_setup(st, channel, false); + if (ret) + setup_info->pga = old_pga; + +out: + mutex_unlock(&st->lock); + + return ret; +} + +static int ad4130_set_channel_freq(struct ad4130_state *st, + unsigned int channel, int val, int val2) +{ + struct ad4130_chan_info *chan_info = &st->chans_info[channel]; + struct ad4130_setup_info *setup_info = &chan_info->setup; + unsigned int fs, old_fs; + int ret = 0; + + mutex_lock(&st->lock); + old_fs = setup_info->fs; + + ad4130_freq_to_fs(setup_info->filter_mode, val, val2, &fs); + + if (fs == setup_info->fs) + goto out; + + setup_info->fs = fs; + + ret = ad4130_write_channel_setup(st, channel, false); + if (ret) + setup_info->fs = old_fs; + +out: + mutex_unlock(&st->lock); + + return ret; +} + +static int _ad4130_read_sample(struct iio_dev *indio_dev, unsigned int channel, + int *val) +{ + struct ad4130_state *st = iio_priv(indio_dev); + int ret; + + ret = ad4130_set_channel_enable(st, channel, true); + if (ret) + return ret; + + reinit_completion(&st->completion); + + ret = ad4130_set_mode(st, AD4130_MODE_CONTINUOUS); + if (ret) + return ret; + + ret = wait_for_completion_timeout(&st->completion, + msecs_to_jiffies(1000)); + if (!ret) + return -ETIMEDOUT; + + ret = ad4130_set_mode(st, AD4130_MODE_IDLE); + if (ret) + return ret; + + ret = regmap_read(st->regmap, AD4130_DATA_REG, val); + if (ret) + return ret; + + ret = ad4130_set_channel_enable(st, channel, false); + if (ret) + return ret; + + return IIO_VAL_INT; +} + +static int ad4130_read_sample(struct iio_dev *indio_dev, unsigned int channel, + int *val) +{ + struct ad4130_state *st = iio_priv(indio_dev); + int ret; + + ret = iio_device_claim_direct_mode(indio_dev); + if (ret) + return ret; + + mutex_lock(&st->lock); + ret = _ad4130_read_sample(indio_dev, channel, val); + mutex_unlock(&st->lock); + + iio_device_release_direct_mode(indio_dev); + + return ret; +} + +static int ad4130_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long info) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int channel = chan->scan_index; + struct ad4130_setup_info *setup_info = &st->chans_info[channel].setup; + + switch (info) { + case IIO_CHAN_INFO_RAW: + return ad4130_read_sample(indio_dev, channel, val); + case IIO_CHAN_INFO_SCALE: + mutex_lock(&st->lock); + *val = st->scale_tbls[setup_info->ref_sel][setup_info->pga][0]; + *val2 = st->scale_tbls[setup_info->ref_sel][setup_info->pga][1]; + mutex_unlock(&st->lock); + + return IIO_VAL_INT_PLUS_NANO; + case IIO_CHAN_INFO_OFFSET: + *val = st->bipolar ? -BIT(chan->scan_type.realbits - 1) : 0; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_SAMP_FREQ: + mutex_lock(&st->lock); + ad4130_fs_to_freq(setup_info->filter_mode, setup_info->fs, + val, val2); + mutex_unlock(&st->lock); + + return IIO_VAL_INT_PLUS_NANO; + default: + return -EINVAL; + } +} + +static int ad4130_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long info) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int channel = chan->scan_index; + struct ad4130_setup_info *setup_info = &st->chans_info[channel].setup; + const struct ad4130_filter_config *filter_config; + + switch (info) { + case IIO_CHAN_INFO_SCALE: + *vals = (int *)st->scale_tbls[setup_info->ref_sel]; + *length = ARRAY_SIZE(st->scale_tbls[setup_info->ref_sel]) * 2; + + *type = IIO_VAL_INT_PLUS_NANO; + + return IIO_AVAIL_LIST; + case IIO_CHAN_INFO_SAMP_FREQ: + mutex_lock(&st->lock); + filter_config = &ad4130_filter_configs[setup_info->filter_mode]; + mutex_unlock(&st->lock); + + *vals = (int *)filter_config->samp_freq_avail; + *length = filter_config->samp_freq_avail_len * 2; + *type = IIO_VAL_FRACTIONAL; + + return filter_config->samp_freq_avail_type; + default: + return -EINVAL; + } +} + +static int ad4130_write_raw_get_fmt(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + long info) +{ + switch (info) { + case IIO_CHAN_INFO_SCALE: + case IIO_CHAN_INFO_SAMP_FREQ: + return IIO_VAL_INT_PLUS_NANO; + default: + return -EINVAL; + } +} + +static int ad4130_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long info) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int channel = chan->scan_index; + + switch (info) { + case IIO_CHAN_INFO_SCALE: + return ad4130_set_channel_pga(st, channel, val, val2); + case IIO_CHAN_INFO_SAMP_FREQ: + return ad4130_set_channel_freq(st, channel, val, val2); + default: + return -EINVAL; + } +} + +static int ad4130_reg_access(struct iio_dev *indio_dev, unsigned int reg, + unsigned int writeval, unsigned int *readval) +{ + struct ad4130_state *st = iio_priv(indio_dev); + + if (readval) + return regmap_read(st->regmap, reg, readval); + + return regmap_write(st->regmap, reg, writeval); +} + +static int ad4130_update_scan_mode(struct iio_dev *indio_dev, + const unsigned long *scan_mask) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int channel; + unsigned int val = 0; + int ret; + + mutex_lock(&st->lock); + + for_each_set_bit(channel, scan_mask, indio_dev->num_channels) { + ret = ad4130_set_channel_enable(st, channel, true); + if (ret) + goto out; + + val++; + } + + st->num_enabled_channels = val; + +out: + mutex_unlock(&st->lock); + + return 0; +} + +static int ad4130_set_fifo_watermark(struct iio_dev *indio_dev, unsigned int val) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int eff; + int ret; + + if (val > AD4130_FIFO_SIZE) + return -EINVAL; + + eff = val * st->num_enabled_channels; + if (eff > AD4130_FIFO_SIZE) + /* + * Always set watermark to a multiple of the number of + * enabled channels to avoid making the FIFO unaligned. + */ + eff = rounddown(AD4130_FIFO_SIZE, st->num_enabled_channels); + + mutex_lock(&st->lock); + + ret = regmap_update_bits(st->regmap, AD4130_FIFO_CONTROL_REG, + AD4130_FIFO_CONTROL_WM_MASK, + FIELD_PREP(AD4130_FIFO_CONTROL_WM_MASK, + ad4130_watermark_reg_val(eff))); + if (ret) + goto out; + + st->effective_watermark = eff; + st->watermark = val; + +out: + mutex_unlock(&st->lock); + + return ret; +} + +static const struct iio_info ad4130_info = { + .read_raw = ad4130_read_raw, + .read_avail = ad4130_read_avail, + .write_raw_get_fmt = ad4130_write_raw_get_fmt, + .write_raw = ad4130_write_raw, + .update_scan_mode = ad4130_update_scan_mode, + .hwfifo_set_watermark = ad4130_set_fifo_watermark, + .debugfs_reg_access = ad4130_reg_access, +}; + +static int ad4130_buffer_postenable(struct iio_dev *indio_dev) +{ + struct ad4130_state *st = iio_priv(indio_dev); + int ret; + + mutex_lock(&st->lock); + + ret = ad4130_set_watermark_interrupt_en(st, true); + if (ret) + goto out; + + ret = irq_set_irq_type(st->spi->irq, st->inv_irq_trigger); + if (ret) + goto out; + + ret = ad4130_set_fifo_mode(st, AD4130_FIFO_MODE_WM); + if (ret) + goto out; + + ret = ad4130_set_mode(st, AD4130_MODE_CONTINUOUS); + +out: + mutex_unlock(&st->lock); + + return ret; +} + +static int ad4130_buffer_predisable(struct iio_dev *indio_dev) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int i; + int ret; + + mutex_lock(&st->lock); + + ret = ad4130_set_mode(st, AD4130_MODE_IDLE); + if (ret) + goto out; + + ret = irq_set_irq_type(st->spi->irq, st->irq_trigger); + if (ret) + goto out; + + ret = ad4130_set_fifo_mode(st, AD4130_FIFO_MODE_DISABLED); + if (ret) + goto out; + + ret = ad4130_set_watermark_interrupt_en(st, false); + if (ret) + goto out; + + /* + * update_scan_mode() is not called in the disable path, disable all + * channels here. + */ + for (i = 0; i < indio_dev->num_channels; i++) { + ret = ad4130_set_channel_enable(st, i, false); + if (ret) + goto out; + } + +out: + mutex_unlock(&st->lock); + + return ret; +} + +static const struct iio_buffer_setup_ops ad4130_buffer_ops = { + .postenable = ad4130_buffer_postenable, + .predisable = ad4130_buffer_predisable, +}; + +static ssize_t hwfifo_watermark_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct ad4130_state *st = iio_priv(dev_to_iio_dev(dev)); + unsigned int val; + + mutex_lock(&st->lock); + val = st->watermark; + mutex_unlock(&st->lock); + + return sysfs_emit(buf, "%d\n", val); +} + +static ssize_t hwfifo_enabled_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct ad4130_state *st = iio_priv(dev_to_iio_dev(dev)); + unsigned int val; + int ret; + + ret = regmap_read(st->regmap, AD4130_FIFO_CONTROL_REG, &val); + if (ret) + return ret; + + val = FIELD_GET(AD4130_FIFO_CONTROL_MODE_MASK, val); + + return sysfs_emit(buf, "%d\n", val != AD4130_FIFO_MODE_DISABLED); +} + +static IIO_CONST_ATTR(hwfifo_watermark_min, "1"); +static IIO_CONST_ATTR(hwfifo_watermark_max, __stringify(AD4130_FIFO_SIZE)); +static IIO_DEVICE_ATTR_RO(hwfifo_watermark, 0); +static IIO_DEVICE_ATTR_RO(hwfifo_enabled, 0); + +static const struct attribute *ad4130_fifo_attributes[] = { + &iio_const_attr_hwfifo_watermark_min.dev_attr.attr, + &iio_const_attr_hwfifo_watermark_max.dev_attr.attr, + &iio_dev_attr_hwfifo_watermark.dev_attr.attr, + &iio_dev_attr_hwfifo_enabled.dev_attr.attr, + NULL +}; + +static int _ad4130_find_table_index(const unsigned int *tbl, size_t len, + unsigned int val) +{ + unsigned int i; + + for (i = 0; i < len; i++) + if (tbl[i] == val) + return i; + + return -EINVAL; +} + +#define ad4130_find_table_index(table, val) \ + _ad4130_find_table_index(table, ARRAY_SIZE(table), val) + +static int ad4130_get_ref_voltage(struct ad4130_state *st, + enum ad4130_ref_sel ref_sel) +{ + switch (ref_sel) { + case AD4130_REF_REFIN1: + return regulator_get_voltage(st->regulators[2].consumer); + case AD4130_REF_REFIN2: + return regulator_get_voltage(st->regulators[3].consumer); + case AD4130_REF_AVDD_AVSS: + return regulator_get_voltage(st->regulators[0].consumer); + case AD4130_REF_REFOUT_AVSS: + return st->int_ref_uv; + default: + return -EINVAL; + } +} + +static int ad4130_parse_fw_setup(struct ad4130_state *st, + struct fwnode_handle *child, + struct ad4130_setup_info *setup_info) +{ + struct device *dev = &st->spi->dev; + u32 tmp; + int ret; + + tmp = 0; + fwnode_property_read_u32(child, "adi,excitation-current-0-nanoamp", &tmp); + ret = ad4130_find_table_index(ad4130_iout_current_na_tbl, tmp); + if (ret < 0) + return dev_err_probe(dev, ret, + "Invalid excitation current %unA\n", tmp); + setup_info->iout0_val = ret; + + tmp = 0; + fwnode_property_read_u32(child, "adi,excitation-current-1-nanoamp", &tmp); + ret = ad4130_find_table_index(ad4130_iout_current_na_tbl, tmp); + if (ret < 0) + return dev_err_probe(dev, ret, + "Invalid excitation current %unA\n", tmp); + setup_info->iout1_val = ret; + + tmp = 0; + fwnode_property_read_u32(child, "adi,burnout-current-nanoamp", &tmp); + ret = ad4130_find_table_index(ad4130_burnout_current_na_tbl, tmp); + if (ret < 0) + return dev_err_probe(dev, ret, + "Invalid burnout current %unA\n", tmp); + setup_info->burnout = ret; + + setup_info->ref_bufp = fwnode_property_read_bool(child, "adi,buffered-positive"); + setup_info->ref_bufm = fwnode_property_read_bool(child, "adi,buffered-negative"); + + setup_info->ref_sel = AD4130_REF_REFIN1; + fwnode_property_read_u32(child, "adi,reference-select", + &setup_info->ref_sel); + if (setup_info->ref_sel >= AD4130_REF_SEL_MAX) + return dev_err_probe(dev, -EINVAL, + "Invalid reference selected %u\n", + setup_info->ref_sel); + + if (setup_info->ref_sel == AD4130_REF_REFOUT_AVSS) + st->int_ref_en = true; + + ret = ad4130_get_ref_voltage(st, setup_info->ref_sel); + if (ret < 0) + return dev_err_probe(dev, ret, "Cannot use reference %u\n", + setup_info->ref_sel); + + return 0; +} + +static int ad4130_validate_diff_channel(struct ad4130_state *st, u32 pin) +{ + struct device *dev = &st->spi->dev; + + if (pin >= AD4130_MAX_DIFF_INPUTS) + return dev_err_probe(dev, -EINVAL, + "Invalid diffreential channel %u\n", pin); + + if (pin >= AD4130_MAX_ANALOG_PINS) + return 0; + + if (st->pins_fn[pin] == AD4130_PIN_FN_SPECIAL) + return dev_err_probe(dev, -EINVAL, + "Pin %u already used with fn %u\n", pin, + st->pins_fn[pin]); + + st->pins_fn[pin] |= AD4130_PIN_FN_DIFF; + + return 0; +} + +static int ad4130_validate_diff_channels(struct ad4130_state *st, + u32 *pins, unsigned int len) +{ + unsigned int i; + int ret; + + for (i = 0; i < len; i++) { + ret = ad4130_validate_diff_channel(st, pins[i]); + if (ret) + return ret; + } + + return 0; +} + +static int ad4130_validate_excitation_pin(struct ad4130_state *st, u32 pin) +{ + struct device *dev = &st->spi->dev; + + if (pin >= AD4130_MAX_ANALOG_PINS) + return dev_err_probe(dev, -EINVAL, + "Invalid excitation pin %u\n", pin); + + if (st->pins_fn[pin] == AD4130_PIN_FN_SPECIAL) + return dev_err_probe(dev, -EINVAL, + "Pin %u already used with fn %u\n", pin, + st->pins_fn[pin]); + + st->pins_fn[pin] |= AD4130_PIN_FN_EXCITATION; + + return 0; +} + +static int ad4130_validate_vbias_pin(struct ad4130_state *st, u32 pin) +{ + struct device *dev = &st->spi->dev; + + if (pin >= AD4130_MAX_ANALOG_PINS) + return dev_err_probe(dev, -EINVAL, "Invalid vbias pin %u\n", + pin); + + if (st->pins_fn[pin] == AD4130_PIN_FN_SPECIAL) + return dev_err_probe(dev, -EINVAL, + "Pin %u already used with fn %u\n", pin, + st->pins_fn[pin]); + + st->pins_fn[pin] |= AD4130_PIN_FN_VBIAS; + + return 0; +} + +static int ad4130_validate_vbias_pins(struct ad4130_state *st, + u32 *pins, unsigned int len) +{ + unsigned int i; + int ret; + + for (i = 0; i < st->num_vbias_pins; i++) { + ret = ad4130_validate_vbias_pin(st, pins[i]); + if (ret) + return ret; + } + + return 0; +} + +static int ad4130_parse_fw_channel(struct iio_dev *indio_dev, + struct fwnode_handle *child) +{ + struct ad4130_state *st = iio_priv(indio_dev); + unsigned int resolution = ad4130_resolution(st); + unsigned int index = indio_dev->num_channels++; + struct device *dev = &st->spi->dev; + struct ad4130_chan_info *chan_info; + struct iio_chan_spec *chan; + u32 pins[2]; + int ret; + + if (index >= AD4130_MAX_CHANNELS) + return dev_err_probe(dev, -EINVAL, "Too many channels\n"); + + chan = &st->chans[index]; + chan_info = &st->chans_info[index]; + + *chan = ad4130_channel_template; + chan->scan_type.realbits = resolution; + chan->scan_type.storagebits = resolution; + chan->scan_index = index; + + chan_info->slot = AD4130_INVALID_SLOT; + chan_info->setup.fs = AD4130_FILTER_SELECT_MIN; + chan_info->initialized = true; + + ret = fwnode_property_read_u32_array(child, "diff-channels", pins, + ARRAY_SIZE(pins)); + if (ret) + return ret; + + ret = ad4130_validate_diff_channels(st, pins, ARRAY_SIZE(pins)); + if (ret) + return ret; + + chan->channel = pins[0]; + chan->channel2 = pins[1]; + + ret = ad4130_parse_fw_setup(st, child, &chan_info->setup); + if (ret) + return ret; + + fwnode_property_read_u32(child, "adi,excitation-pin-0", + &chan_info->iout0); + if (chan_info->setup.iout0_val != AD4130_IOUT_OFF) { + ret = ad4130_validate_excitation_pin(st, chan_info->iout0); + if (ret) + return ret; + } + + fwnode_property_read_u32(child, "adi,excitation-pin-1", + &chan_info->iout1); + if (chan_info->setup.iout1_val != AD4130_IOUT_OFF) { + ret = ad4130_validate_excitation_pin(st, chan_info->iout1); + if (ret) + return ret; + } + + return 0; +} + +static int ad4130_parse_fw_children(struct iio_dev *indio_dev) +{ + struct ad4130_state *st = iio_priv(indio_dev); + struct device *dev = &st->spi->dev; + struct fwnode_handle *child; + int ret; + + indio_dev->channels = st->chans; + + device_for_each_child_node(dev, child) { + ret = ad4130_parse_fw_channel(indio_dev, child); + if (ret) { + fwnode_handle_put(child); + return ret; + } + } + + return 0; +} + +static int ad4310_parse_fw(struct iio_dev *indio_dev) +{ + struct ad4130_state *st = iio_priv(indio_dev); + struct device *dev = &st->spi->dev; + u32 ext_clk_freq = AD4130_MCLK_FREQ_76_8KHZ; + unsigned int i; + int avdd_uv; + int irq; + int ret; + + st->mclk = devm_clk_get_optional(dev, "mclk"); + if (IS_ERR(st->mclk)) + return dev_err_probe(dev, PTR_ERR(st->mclk), + "Failed to get mclk\n"); + + st->int_pin_sel = AD4130_INT_PIN_INT; + + for (i = 0; i < ARRAY_SIZE(ad4130_int_pin_names); i++) { + irq = fwnode_irq_get_byname(dev_fwnode(dev), + ad4130_int_pin_names[i]); + if (irq > 0) { + st->int_pin_sel = i; + break; + } + } + + if (st->int_pin_sel == AD4130_INT_PIN_DOUT) + return dev_err_probe(dev, -EINVAL, + "Cannot use DOUT as interrupt pin\n"); + + if (st->int_pin_sel == AD4130_INT_PIN_P2) + st->pins_fn[AD4130_AIN3_P2] = AD4130_PIN_FN_SPECIAL; + + device_property_read_u32(dev, "adi,ext-clk-freq-hz", &ext_clk_freq); + if (ext_clk_freq != AD4130_MCLK_FREQ_153_6KHZ && + ext_clk_freq != AD4130_MCLK_FREQ_76_8KHZ) + return dev_err_probe(dev, -EINVAL, + "Invalid external clock frequency %u\n", + ext_clk_freq); + + if (st->mclk && ext_clk_freq == AD4130_MCLK_FREQ_153_6KHZ) + st->mclk_sel = AD4130_MCLK_153_6KHZ_EXT; + else if (st->mclk) + st->mclk_sel = AD4130_MCLK_76_8KHZ_EXT; + else + st->mclk_sel = AD4130_MCLK_76_8KHZ; + + if (st->int_pin_sel == AD4130_INT_PIN_CLK && + st->mclk_sel != AD4130_MCLK_76_8KHZ) + return dev_err_probe(dev, -EINVAL, + "Invalid clock %u for interrupt pin %u\n", + st->mclk_sel, st->int_pin_sel); + + st->int_ref_uv = AD4130_INT_REF_2_5V; + + /* + * When the AVDD supply is set to below 2.5V the internal reference of + * 1.25V should be selected. + * See datasheet page 37, section ADC REFERENCE. + */ + avdd_uv = regulator_get_voltage(st->regulators[0].consumer); + if (avdd_uv > 0 && avdd_uv < AD4130_INT_REF_2_5V) + st->int_ref_uv = AD4130_INT_REF_1_25V; + + st->bipolar = device_property_read_bool(dev, "adi,bipolar"); + + ret = device_property_count_u32(dev, "adi,vbias-pins"); + if (ret > 0) { + if (ret > AD4130_MAX_ANALOG_PINS) + return dev_err_probe(dev, -EINVAL, + "Too many vbias pins %u\n", ret); + + st->num_vbias_pins = ret; + + ret = device_property_read_u32_array(dev, "adi,vbias-pins", + st->vbias_pins, + st->num_vbias_pins); + if (ret) + return dev_err_probe(dev, ret, + "Failed to read vbias pins\n"); + + ret = ad4130_validate_vbias_pins(st, st->vbias_pins, + st->num_vbias_pins); + if (ret) + return ret; + } + + ret = ad4130_parse_fw_children(indio_dev); + if (ret) + return ret; + + return 0; +} + +static void ad4130_fill_scale_tbls(struct ad4130_state *st) +{ + unsigned int pow = ad4130_resolution(st) - st->bipolar; + unsigned int i, j; + + for (i = 0; i < AD4130_REF_SEL_MAX; i++) { + int ret; + u64 nv; + + ret = ad4130_get_ref_voltage(st, i); + if (ret < 0) + continue; + + nv = (u64)ret * NANO; + + for (j = 0; j < AD4130_MAX_PGA; j++) + st->scale_tbls[i][j][1] = div_u64(nv >> (pow + j), MILLI); + } +} + +static void ad4130_clk_disable_unprepare(void *clk) +{ + clk_disable_unprepare(clk); +} + +static int ad4130_set_mclk_sel(struct ad4130_state *st, + enum ad4130_mclk_sel mclk_sel) +{ + return regmap_update_bits(st->regmap, AD4130_ADC_CONTROL_REG, + AD4130_ADC_CONTROL_MCLK_SEL_MASK, + FIELD_PREP(AD4130_ADC_CONTROL_MCLK_SEL_MASK, + mclk_sel)); +} + +static unsigned long ad4130_int_clk_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return AD4130_MCLK_FREQ_76_8KHZ; +} + +static int ad4130_int_clk_is_enabled(struct clk_hw *hw) +{ + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); + + return st->mclk_sel == AD4130_MCLK_76_8KHZ_OUT; +} + +static int ad4130_int_clk_prepare(struct clk_hw *hw) +{ + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); + int ret; + + ret = ad4130_set_mclk_sel(st, AD4130_MCLK_76_8KHZ_OUT); + if (ret) + return ret; + + st->mclk_sel = AD4130_MCLK_76_8KHZ_OUT; + + return 0; +} + +static void ad4130_int_clk_unprepare(struct clk_hw *hw) +{ + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); + int ret; + + ret = ad4130_set_mclk_sel(st, AD4130_MCLK_76_8KHZ); + if (ret) + return; + + st->mclk_sel = AD4130_MCLK_76_8KHZ; +} + +static const struct clk_ops ad4130_int_clk_ops = { + .recalc_rate = ad4130_int_clk_recalc_rate, + .is_enabled = ad4130_int_clk_is_enabled, + .prepare = ad4130_int_clk_prepare, + .unprepare = ad4130_int_clk_unprepare, +}; + +static int ad4130_setup_int_clk(struct ad4130_state *st) +{ + struct device *dev = &st->spi->dev; + struct device_node *of_node = dev->of_node; + struct clk_init_data init; + const char *clk_name; + struct clk *clk; + + if (st->int_pin_sel == AD4130_INT_PIN_CLK || + st->mclk_sel != AD4130_MCLK_76_8KHZ) + return 0; + + clk_name = of_node->name; + of_property_read_string(of_node, "clock-output-names", &clk_name); + + init.name = clk_name; + init.ops = &ad4130_int_clk_ops; + + st->int_clk_hw.init = &init; + clk = devm_clk_register(dev, &st->int_clk_hw); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + return of_clk_add_provider(of_node, of_clk_src_simple_get, clk); +} + +static int ad4130_setup(struct iio_dev *indio_dev) +{ + struct ad4130_state *st = iio_priv(indio_dev); + struct device *dev = &st->spi->dev; + unsigned int int_ref_val; + unsigned long rate = AD4130_MCLK_FREQ_76_8KHZ; + unsigned int val; + unsigned int i; + int ret; + + if (st->mclk_sel == AD4130_MCLK_153_6KHZ_EXT) + rate = AD4130_MCLK_FREQ_153_6KHZ; + + ret = clk_set_rate(st->mclk, rate); + if (ret) + return ret; + + ret = clk_prepare_enable(st->mclk); + if (ret) + return ret; + + ret = devm_add_action_or_reset(dev, ad4130_clk_disable_unprepare, + st->mclk); + if (ret) + return ret; + + if (st->int_ref_uv == AD4130_INT_REF_2_5V) + int_ref_val = AD4130_INT_REF_VAL_2_5V; + else + int_ref_val = AD4130_INT_REF_VAL_1_25V; + + /* Switch to SPI 4-wire mode. */ + val = FIELD_PREP(AD4130_ADC_CONTROL_CSB_EN_MASK, 1); + val |= FIELD_PREP(AD4130_ADC_CONTROL_BIPOLAR_MASK, st->bipolar); + val |= FIELD_PREP(AD4130_ADC_CONTROL_INT_REF_EN_MASK, st->int_ref_en); + val |= FIELD_PREP(AD4130_ADC_CONTROL_MODE_MASK, AD4130_MODE_IDLE); + val |= FIELD_PREP(AD4130_ADC_CONTROL_MCLK_SEL_MASK, st->mclk_sel); + val |= FIELD_PREP(AD4130_ADC_CONTROL_INT_REF_VAL_MASK, int_ref_val); + + ret = regmap_write(st->regmap, AD4130_ADC_CONTROL_REG, val); + if (ret) + return ret; + + /* + * Configure all GPIOs for output. If configured, the interrupt function + * of P2 takes priority over the GPIO out function. + */ + val = AD4130_IO_CONTROL_GPIO_CTRL_MASK; + val |= FIELD_PREP(AD4130_IO_CONTROL_INT_PIN_SEL_MASK, st->int_pin_sel); + + ret = regmap_write(st->regmap, AD4130_IO_CONTROL_REG, val); + if (ret) + return ret; + + val = 0; + for (i = 0; i < st->num_vbias_pins; i++) + val |= BIT(st->vbias_pins[i]); + + ret = regmap_write(st->regmap, AD4130_VBIAS_REG, val); + if (ret) + return ret; + + ret = regmap_update_bits(st->regmap, AD4130_FIFO_CONTROL_REG, + AD4130_FIFO_CONTROL_HEADER_MASK, 0); + if (ret) + return ret; + + /* FIFO watermark interrupt starts out as enabled, disable it. */ + ret = ad4130_set_watermark_interrupt_en(st, false); + if (ret) + return ret; + + /* Setup channels. */ + for (i = 0; i < indio_dev->num_channels; i++) { + struct ad4130_chan_info *chan_info = &st->chans_info[i]; + struct iio_chan_spec *chan = &st->chans[i]; + unsigned int val; + + val = FIELD_PREP(AD4130_CHANNEL_AINP_MASK, chan->channel) | + FIELD_PREP(AD4130_CHANNEL_AINM_MASK, chan->channel2) | + FIELD_PREP(AD4130_CHANNEL_IOUT1_MASK, chan_info->iout0) | + FIELD_PREP(AD4130_CHANNEL_IOUT2_MASK, chan_info->iout1); + + ret = regmap_write(st->regmap, AD4130_CHANNEL_X_REG(i), val); + if (ret) + return ret; + } + + return 0; +} + +static int ad4130_soft_reset(struct ad4130_state *st) +{ + int ret; + + ret = spi_write(st->spi, st->reset_buf, sizeof(st->reset_buf)); + if (ret) + return ret; + + fsleep(AD4130_RESET_SLEEP_US); + + return 0; +} + +static void ad4130_disable_regulators(void *data) +{ + struct ad4130_state *st = data; + + regulator_bulk_disable(ARRAY_SIZE(st->regulators), st->regulators); +} + +static int ad4130_probe(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + struct iio_dev *indio_dev; + struct ad4130_state *st; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st = iio_priv(indio_dev); + + memset(st->reset_buf, 0xff, sizeof(st->reset_buf)); + init_completion(&st->completion); + mutex_init(&st->lock); + st->spi = spi; + + /* + * Xfer: [ XFR1 ] [ XFR2 ] + * Master: 0x7D N ...................... + * Slave: ...... DATA1 DATA2 ... DATAN + */ + st->fifo_tx_buf[0] = AD4130_COMMS_READ_MASK | AD4130_FIFO_DATA_REG; + st->fifo_xfer[0].tx_buf = st->fifo_tx_buf; + st->fifo_xfer[0].len = sizeof(st->fifo_tx_buf); + st->fifo_xfer[1].rx_buf = st->fifo_rx_buf; + spi_message_init_with_transfers(&st->fifo_msg, st->fifo_xfer, + ARRAY_SIZE(st->fifo_xfer)); + + indio_dev->name = AD4130_NAME; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->info = &ad4130_info; + + st->regmap = devm_regmap_init(dev, NULL, st, &ad4130_regmap_config); + if (IS_ERR(st->regmap)) + return PTR_ERR(st->regmap); + + st->regulators[0].supply = "avdd"; + st->regulators[1].supply = "iovdd"; + st->regulators[2].supply = "refin1"; + st->regulators[3].supply = "refin2"; + + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(st->regulators), + st->regulators); + if (ret) + return dev_err_probe(dev, ret, "Failed to get regulators\n"); + + ret = regulator_bulk_enable(ARRAY_SIZE(st->regulators), st->regulators); + if (ret) + return dev_err_probe(dev, ret, "Failed to enable regulators\n"); + + ret = devm_add_action_or_reset(dev, ad4130_disable_regulators, st); + if (ret) + return dev_err_probe(dev, ret, + "Failed to add regulators disable action\n"); + + ret = ad4130_soft_reset(st); + if (ret) + return ret; + + ret = ad4310_parse_fw(indio_dev); + if (ret) + return ret; + + ret = ad4130_setup(indio_dev); + if (ret) + return ret; + + ret = ad4130_setup_int_clk(st); + if (ret) + return ret; + + ad4130_fill_scale_tbls(st); + + st->gc.owner = THIS_MODULE; + st->gc.label = AD4130_NAME; + st->gc.base = -1; + st->gc.ngpio = AD4130_MAX_GPIOS; + st->gc.parent = dev; + st->gc.can_sleep = true; + st->gc.init_valid_mask = ad4130_gpio_init_valid_mask; + st->gc.get_direction = ad4130_gpio_get_direction; + st->gc.set = ad4130_gpio_set; + + ret = devm_gpiochip_add_data(dev, &st->gc, st); + if (ret) + return ret; + + ret = devm_iio_kfifo_buffer_setup_ext(dev, indio_dev, + &ad4130_buffer_ops, + ad4130_fifo_attributes); + if (ret) + return ret; + + ret = devm_request_threaded_irq(dev, spi->irq, NULL, + ad4130_irq_handler, IRQF_ONESHOT, + indio_dev->name, indio_dev); + if (ret) + return dev_err_probe(dev, ret, "Failed to request irq\n"); + + /* + * When the chip enters FIFO mode, IRQ polarity is inverted. + * When the chip exits FIFO mode, IRQ polarity returns to normal. + * See datasheet pages: 65, FIFO Watermark Interrupt section, + * and 71, Bit Descriptions for STATUS Register, RDYB. + * Cache the normal and inverted IRQ triggers to set them when + * entering and exiting FIFO mode. + */ + st->irq_trigger = irq_get_trigger_type(spi->irq); + if (st->irq_trigger & IRQF_TRIGGER_RISING) + st->inv_irq_trigger = IRQF_TRIGGER_FALLING; + else if (st->irq_trigger & IRQF_TRIGGER_FALLING) + st->inv_irq_trigger = IRQF_TRIGGER_RISING; + else + return dev_err_probe(dev, -EINVAL, "Invalid irq flags: %u\n", + st->irq_trigger); + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct of_device_id ad4130_of_match[] = { + { + .compatible = "adi,ad4130", + }, + { } +}; +MODULE_DEVICE_TABLE(of, ad4130_of_match); + +static struct spi_driver ad4130_driver = { + .driver = { + .name = AD4130_NAME, + .of_match_table = ad4130_of_match, + }, + .probe = ad4130_probe, +}; +module_spi_driver(ad4130_driver); + +MODULE_AUTHOR("Cosmin Tanislav <cosmin.tanislav@analog.com>"); +MODULE_DESCRIPTION("Analog Devices AD4130 SPI driver"); +MODULE_LICENSE("GPL"); -- 2.38.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver 2022-10-06 14:07 ` [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver Cosmin Tanislav @ 2022-10-07 2:45 ` kernel test robot 2022-10-08 13:01 ` kernel test robot 2022-10-09 17:31 ` Jonathan Cameron 2 siblings, 0 replies; 8+ messages in thread From: kernel test robot @ 2022-10-07 2:45 UTC (permalink / raw) To: Cosmin Tanislav Cc: kbuild-all, Jonathan Cameron, Rob Herring, Linus Walleij, linux-iio, linux-gpio, linux-kernel, devicetree, Cosmin Tanislav, Andy Shevchenko [-- Attachment #1: Type: text/plain, Size: 2700 bytes --] Hi Cosmin, I love your patch! Perhaps something to improve: [auto build test WARNING on jic23-iio/togreg] [also build test WARNING on robh/for-next linus/master v6.0 next-20221006] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Cosmin-Tanislav/AD4130/20221006-221313 base: https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg reproduce: # https://github.com/intel-lab-lkp/linux/commit/4b905b5c6b166dc9ea13246096c2d044648105b0 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Cosmin-Tanislav/AD4130/20221006-221313 git checkout 4b905b5c6b166dc9ea13246096c2d044648105b0 make menuconfig # enable CONFIG_COMPILE_TEST, CONFIG_WARN_MISSING_DOCUMENTS, CONFIG_WARN_ABI_ERRORS make htmldocs If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> All warnings (new ones prefixed by >>): >> Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130:2: WARNING: Unexpected indentation. >> Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130:2: WARNING: Block quote ends without a blank line; unexpected unindent. vim +2 Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 > 2 KernelVersion: 6.0 3 Contact: linux-iio@vger.kernel.org 4 Description: 5 Reading returns a list with the possible filter modes. 6 "sinc4" - Sinc 4. Excellent noise performance. Long 1st 7 conversion time. No natural 50/60Hz rejection. 8 "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion time. 9 "sinc3" - Sinc3. Moderate 1st conversion time. Good noise 10 performance. 11 "sinc3+rej60" - Sinc3 + 60Hz rejection. At a sampling frequency 12 of 50Hz, achieves simultaneous 50Hz and 60Hz 13 rejection. 14 "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion time. 15 Best used with a sampling frequency of at least 16 216.19Hz. 17 "sinc3+pf1" - Sinc3 + Post Filter 1. 18 53dB rejection @ 50Hz, 58dB rejection @ 60Hz. 19 "sinc3+pf2" - Sinc3 + Post Filter 2. 20 70dB rejection @ 50Hz, 70dB rejection @ 60Hz. 21 "sinc3+pf3" - Sinc3 + Post Filter 3. 22 99dB rejection @ 50Hz, 103dB rejection @ 60Hz. 23 "sinc3+pf4" - Sinc3 + Post Filter 4. 24 103dB rejection @ 50Hz, 109dB rejection @ 60Hz. 25 -- 0-DAY CI Kernel Test Service https://01.org/lkp [-- Attachment #2: config --] [-- Type: text/plain, Size: 38491 bytes --] # # Automatically generated file; DO NOT EDIT. # Linux/x86_64 6.0.0-rc4 Kernel Configuration # CONFIG_CC_VERSION_TEXT="gcc-11 (Debian 11.3.0-5) 11.3.0" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=110300 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y CONFIG_AS_VERSION=23890 CONFIG_LD_IS_BFD=y CONFIG_LD_VERSION=23890 CONFIG_LLD_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_PAHOLE_VERSION=123 CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y # # General setup # CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_COMPILE_TEST=y # CONFIG_WERROR is not set CONFIG_LOCALVERSION="" CONFIG_BUILD_SALT="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y CONFIG_HAVE_KERNEL_ZSTD=y CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set # CONFIG_KERNEL_ZSTD is not set CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" # CONFIG_SYSVIPC is not set # CONFIG_WATCH_QUEUE is not set # CONFIG_CROSS_MEMORY_ATTACH is not set # CONFIG_USELIB is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # end of IRQ subsystem CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y # # Timers subsystem # CONFIG_HZ_PERIODIC=y # CONFIG_NO_HZ_IDLE is not set # CONFIG_NO_HZ is not set # CONFIG_HIGH_RES_TIMERS is not set CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=100 # end of Timers subsystem CONFIG_HAVE_EBPF_JIT=y CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y # # BPF subsystem # # CONFIG_BPF_SYSCALL is not set # end of BPF subsystem CONFIG_PREEMPT_NONE_BUILD=y CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set # CONFIG_PREEMPT_DYNAMIC is not set # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set # CONFIG_IRQ_TIME_ACCOUNTING is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_PSI is not set # end of CPU/Task time and stats accounting CONFIG_CPU_ISOLATION=y # # RCU Subsystem # CONFIG_TINY_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TINY_SRCU=y # end of RCU Subsystem # CONFIG_IKCONFIG is not set # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=17 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # # Scheduler features # # end of Scheduler features CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC12_NO_ARRAY_BOUNDS=y CONFIG_ARCH_SUPPORTS_INT128=y # CONFIG_CGROUPS is not set CONFIG_NAMESPACES=y # CONFIG_UTS_NS is not set # CONFIG_TIME_NS is not set # CONFIG_USER_NS is not set # CONFIG_PID_NS is not set # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_SCHED_AUTOGROUP is not set # CONFIG_SYSFS_DEPRECATED is not set # CONFIG_RELAY is not set # CONFIG_BLK_DEV_INITRD is not set # CONFIG_BOOT_CONFIG is not set # CONFIG_INITRAMFS_PRESERVE_MTIME is not set CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_LD_ORPHAN_WARN=y CONFIG_SYSCTL=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_HAVE_PCSPKR_PLATFORM=y # CONFIG_EXPERT is not set CONFIG_MULTIUSER=y CONFIG_SGETMASK_SYSCALL=y CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_RSEQ=y # CONFIG_EMBEDDED is not set CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y # end of Kernel Performance Events And Counters # CONFIG_PROFILING is not set # end of General setup CONFIG_64BIT=y CONFIG_X86_64=y CONFIG_X86=y CONFIG_INSTRUCTION_DECODER=y CONFIG_OUTPUT_FORMAT="elf64-x86-64" CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_MMU=y CONFIG_ARCH_MMAP_RND_BITS_MIN=28 CONFIG_ARCH_MMAP_RND_BITS_MAX=32 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_NR_GPIO=1024 CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_AUDIT_ARCH=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_PGTABLE_LEVELS=4 CONFIG_CC_HAS_SANE_STACKPROTECTOR=y # # Processor type and features # # CONFIG_SMP is not set CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_MPPARSE=y # CONFIG_GOLDFISH is not set # CONFIG_X86_CPU_RESCTRL is not set # CONFIG_X86_EXTENDED_PLATFORM is not set # CONFIG_SCHED_OMIT_FRAME_POINTER is not set # CONFIG_HYPERVISOR_GUEST is not set # CONFIG_MK8 is not set # CONFIG_MPSC is not set # CONFIG_MCORE2 is not set # CONFIG_MATOM is not set CONFIG_GENERIC_CPU=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 CONFIG_X86_DEBUGCTLMSR=y CONFIG_IA32_FEAT_CTL=y CONFIG_X86_VMX_FEATURE_NAMES=y CONFIG_CPU_SUP_INTEL=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_HYGON=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_CPU_SUP_ZHAOXIN=y CONFIG_HPET_TIMER=y CONFIG_DMI=y CONFIG_NR_CPUS_RANGE_BEGIN=1 CONFIG_NR_CPUS_RANGE_END=1 CONFIG_NR_CPUS_DEFAULT=1 CONFIG_NR_CPUS=1 CONFIG_UP_LATE_INIT=y CONFIG_X86_LOCAL_APIC=y CONFIG_X86_IO_APIC=y # CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set # CONFIG_X86_MCE is not set # # Performance monitoring # # CONFIG_PERF_EVENTS_AMD_POWER is not set # CONFIG_PERF_EVENTS_AMD_UNCORE is not set # CONFIG_PERF_EVENTS_AMD_BRS is not set # end of Performance monitoring CONFIG_X86_16BIT=y CONFIG_X86_ESPFIX64=y CONFIG_X86_VSYSCALL_EMULATION=y # CONFIG_X86_IOPL_IOPERM is not set # CONFIG_MICROCODE is not set # CONFIG_X86_MSR is not set # CONFIG_X86_CPUID is not set # CONFIG_X86_5LEVEL is not set CONFIG_X86_DIRECT_GBPAGES=y # CONFIG_AMD_MEM_ENCRYPT is not set CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_MTRR=y # CONFIG_MTRR_SANITIZER is not set CONFIG_X86_PAT=y CONFIG_ARCH_USES_PG_UNCACHED=y CONFIG_X86_UMIP=y CONFIG_CC_HAS_IBT=y # CONFIG_X86_KERNEL_IBT is not set # CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is not set CONFIG_X86_INTEL_TSX_MODE_OFF=y # CONFIG_X86_INTEL_TSX_MODE_ON is not set # CONFIG_X86_INTEL_TSX_MODE_AUTO is not set # CONFIG_HZ_100 is not set CONFIG_HZ_250=y # CONFIG_HZ_300 is not set # CONFIG_HZ_1000 is not set CONFIG_HZ=250 # CONFIG_KEXEC is not set # CONFIG_CRASH_DUMP is not set CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x200000 CONFIG_LEGACY_VSYSCALL_XONLY=y # CONFIG_LEGACY_VSYSCALL_NONE is not set # CONFIG_CMDLINE_BOOL is not set CONFIG_MODIFY_LDT_SYSCALL=y # CONFIG_STRICT_SIGALTSTACK_SIZE is not set CONFIG_HAVE_LIVEPATCH=y # end of Processor type and features CONFIG_CC_HAS_SLS=y CONFIG_CC_HAS_RETURN_THUNK=y # CONFIG_SPECULATION_MITIGATIONS is not set CONFIG_ARCH_HAS_ADD_PAGES=y CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y # # Power management and ACPI options # # CONFIG_SUSPEND is not set # CONFIG_PM is not set CONFIG_ARCH_SUPPORTS_ACPI=y # CONFIG_ACPI is not set # # CPU Frequency scaling # # CONFIG_CPU_FREQ is not set # end of CPU Frequency scaling # # CPU Idle # # CONFIG_CPU_IDLE is not set # end of CPU Idle # end of Power management and ACPI options # # Bus options (PCI etc.) # CONFIG_ISA_DMA_API=y # end of Bus options (PCI etc.) # # Binary Emulations # # CONFIG_IA32_EMULATION is not set # CONFIG_X86_X32_ABI is not set # end of Binary Emulations CONFIG_HAVE_KVM=y # CONFIG_VIRTUALIZATION is not set CONFIG_AS_AVX512=y CONFIG_AS_SHA1_NI=y CONFIG_AS_SHA256_NI=y CONFIG_AS_TPAUSE=y # # General architecture-dependent options # CONFIG_GENERIC_ENTRY=y # CONFIG_JUMP_LABEL is not set # CONFIG_STATIC_CALL_SELFTEST is not set CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_KPROBES_ON_FTRACE=y CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y CONFIG_HAVE_USER_RETURN_NOTIFIER=y CONFIG_HAVE_PERF_EVENTS_NMI=y CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y CONFIG_MMU_GATHER_MERGE_VMAS=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y # CONFIG_SECCOMP is not set CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y # CONFIG_STACKPROTECTOR is not set CONFIG_ARCH_SUPPORTS_LTO_CLANG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y CONFIG_LTO_NONE=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_CONTEXT_TRACKING_USER_OFFSTACK=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_MOVE_PUD=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y CONFIG_HAVE_ARCH_HUGE_VMAP=y CONFIG_HAVE_ARCH_HUGE_VMALLOC=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=28 CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_HAVE_OBJTOOL=y CONFIG_HAVE_JUMP_LABEL_HACK=y CONFIG_HAVE_NOINSTR_HACK=y CONFIG_HAVE_NOINSTR_VALIDATION=y CONFIG_HAVE_UACCESS_VALIDATION=y CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_RELIABLE_STACKTRACE=y # CONFIG_COMPAT_32BIT_TIME is not set CONFIG_HAVE_ARCH_VMAP_STACK=y # CONFIG_VMAP_STACK is not set CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y CONFIG_RANDOMIZE_KSTACK_OFFSET=y # CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_HAS_MEM_ENCRYPT=y CONFIG_HAVE_STATIC_CALL=y CONFIG_HAVE_STATIC_CALL_INLINE=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_CALL=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAS_ELFCORE_COMPAT=y CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y CONFIG_DYNAMIC_SIGFRAME=y # # GCOV-based kernel profiling # CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling CONFIG_HAVE_GCC_PLUGINS=y # CONFIG_GCC_PLUGINS is not set # end of General architecture-dependent options CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 # CONFIG_MODULES is not set CONFIG_BLOCK=y # CONFIG_BLOCK_LEGACY_AUTOLOAD is not set # CONFIG_BLK_DEV_BSGLIB is not set # CONFIG_BLK_DEV_INTEGRITY is not set # CONFIG_BLK_DEV_ZONED is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_SED_OPAL is not set # CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y CONFIG_EFI_PARTITION=y # end of Partition Types # # IO Schedulers # # CONFIG_MQ_IOSCHED_DEADLINE is not set # CONFIG_MQ_IOSCHED_KYBER is not set # CONFIG_IOSCHED_BFQ is not set # end of IO Schedulers CONFIG_INLINE_SPIN_UNLOCK_IRQ=y CONFIG_INLINE_READ_UNLOCK=y CONFIG_INLINE_READ_UNLOCK_IRQ=y CONFIG_INLINE_WRITE_UNLOCK=y CONFIG_INLINE_WRITE_UNLOCK_IRQ=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y # # Executable file formats # # CONFIG_BINFMT_ELF is not set # CONFIG_BINFMT_SCRIPT is not set # CONFIG_BINFMT_MISC is not set CONFIG_COREDUMP=y # end of Executable file formats # # Memory Management options # # CONFIG_SWAP is not set # # SLAB allocator options # # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLAB_MERGE_DEFAULT is not set # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set # CONFIG_SLUB_STATS is not set # end of SLAB allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y # CONFIG_SPARSEMEM_VMEMMAP is not set CONFIG_HAVE_FAST_GUP=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y # CONFIG_COMPACTION is not set # CONFIG_PAGE_REPORTING is not set CONFIG_PHYS_ADDR_T_64BIT=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANTS_THP_SWAP=y # CONFIG_TRANSPARENT_HUGEPAGE is not set CONFIG_NEED_PER_CPU_KM=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y # CONFIG_CMA is not set CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_IDLE_PAGE_TRACKING is not set CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # # GUP_TEST needs to have DEBUG_FS enabled # CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_SECRETMEM=y # CONFIG_ANON_VMA_NAME is not set # CONFIG_USERFAULTFD is not set # # Data Access Monitoring # # CONFIG_DAMON is not set # end of Data Access Monitoring # end of Memory Management options # CONFIG_NET is not set # # Device Drivers # CONFIG_HAVE_EISA=y # CONFIG_EISA is not set CONFIG_HAVE_PCI=y # CONFIG_PCI is not set # CONFIG_PCCARD is not set # # Generic Driver Options # # CONFIG_UEVENT_HELPER is not set # CONFIG_DEVTMPFS is not set # CONFIG_STANDALONE is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set # # Firmware loader # CONFIG_FW_LOADER=y CONFIG_EXTRA_FIRMWARE="" # CONFIG_FW_LOADER_USER_HELPER is not set # CONFIG_FW_LOADER_COMPRESS is not set # CONFIG_FW_UPLOAD is not set # end of Firmware loader CONFIG_ALLOW_DEV_COREDUMP=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y # end of Generic Driver Options # # Bus devices # # CONFIG_ARM_INTEGRATOR_LM is not set # CONFIG_BT1_APB is not set # CONFIG_BT1_AXI is not set # CONFIG_HISILICON_LPC is not set # CONFIG_INTEL_IXP4XX_EB is not set # CONFIG_QCOM_EBI2 is not set # CONFIG_MHI_BUS is not set # CONFIG_MHI_BUS_EP is not set # end of Bus devices # # Firmware Drivers # # # ARM System Control and Management Interface Protocol # # CONFIG_ARM_SCMI_PROTOCOL is not set # end of ARM System Control and Management Interface Protocol # CONFIG_EDD is not set CONFIG_FIRMWARE_MEMMAP=y # CONFIG_DMIID is not set # CONFIG_DMI_SYSFS is not set CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y # CONFIG_FW_CFG_SYSFS is not set # CONFIG_SYSFB_SIMPLEFB is not set # CONFIG_BCM47XX_NVRAM is not set # CONFIG_GOOGLE_FIRMWARE is not set # # Tegra firmware driver # # end of Tegra firmware driver # end of Firmware Drivers # CONFIG_GNSS is not set # CONFIG_MTD is not set # CONFIG_OF is not set CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y # CONFIG_PARPORT is not set # CONFIG_BLK_DEV is not set # # NVME Support # # CONFIG_NVME_FC is not set # end of NVME Support # # Misc devices # # CONFIG_DUMMY_IRQ is not set # CONFIG_ATMEL_SSC is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_QCOM_COINCELL is not set # CONFIG_SRAM is not set # CONFIG_XILINX_SDFEC is not set # CONFIG_C2PORT is not set # # EEPROM support # # CONFIG_EEPROM_93CX6 is not set # end of EEPROM support # # Texas Instruments shared transport line discipline # # end of Texas Instruments shared transport line discipline # # Altera FPGA firmware download module (requires I2C) # # CONFIG_ECHO is not set # CONFIG_PVPANIC is not set # end of Misc devices # # SCSI device support # CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set # CONFIG_SCSI is not set # end of SCSI device support # CONFIG_ATA is not set # CONFIG_MD is not set # CONFIG_TARGET_CORE is not set # # IEEE 1394 (FireWire) support # # CONFIG_FIREWIRE is not set # end of IEEE 1394 (FireWire) support # CONFIG_MACINTOSH_DRIVERS is not set # # Input device support # CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_SPARSEKMAP is not set # CONFIG_INPUT_MATRIXKMAP is not set # # Userland interfaces # # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set # # Input Device Drivers # # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_MISC is not set # CONFIG_RMI4_CORE is not set # # Hardware I/O ports # # CONFIG_SERIO is not set CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y # CONFIG_GAMEPORT is not set # end of Hardware I/O ports # end of Input device support # # Character devices # CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set # CONFIG_LDISC_AUTOLOAD is not set # # Serial drivers # # CONFIG_SERIAL_8250 is not set # # Non-8250 serial port support # # CONFIG_SERIAL_AMBA_PL010 is not set # CONFIG_SERIAL_ATMEL is not set # CONFIG_SERIAL_MESON is not set # CONFIG_SERIAL_CLPS711X is not set # CONFIG_SERIAL_SAMSUNG is not set # CONFIG_SERIAL_TEGRA is not set # CONFIG_SERIAL_IMX is not set # CONFIG_SERIAL_UARTLITE is not set # CONFIG_SERIAL_SH_SCI is not set # CONFIG_SERIAL_MSM is not set # CONFIG_SERIAL_VT8500 is not set # CONFIG_SERIAL_OMAP is not set # CONFIG_SERIAL_LANTIQ is not set # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_TIMBERDALE is not set # CONFIG_SERIAL_BCM63XX is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_MXS_AUART is not set # CONFIG_SERIAL_MPS2_UART is not set # CONFIG_SERIAL_ARC is not set # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_ST_ASC is not set # CONFIG_SERIAL_STM32 is not set # CONFIG_SERIAL_OWL is not set # CONFIG_SERIAL_RDA is not set # CONFIG_SERIAL_LITEUART is not set # CONFIG_SERIAL_SUNPLUS is not set # end of Serial drivers # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_NULL_TTY is not set # CONFIG_SERIAL_DEV_BUS is not set # CONFIG_VIRTIO_CONSOLE is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_ASPEED_KCS_IPMI_BMC is not set # CONFIG_NPCM7XX_KCS_IPMI_BMC is not set # CONFIG_HW_RANDOM is not set # CONFIG_MWAVE is not set # CONFIG_DEVMEM is not set # CONFIG_NVRAM is not set # CONFIG_HANGCHECK_TIMER is not set # CONFIG_TCG_TPM is not set # CONFIG_TELCLOCK is not set # CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set # end of Character devices # # I2C support # # CONFIG_I2C is not set # end of I2C support # CONFIG_I3C is not set # CONFIG_SPI is not set # CONFIG_SPMI is not set # CONFIG_HSI is not set # CONFIG_PPS is not set # # PTP clock support # CONFIG_PTP_1588_CLOCK_OPTIONAL=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # # end of PTP clock support # CONFIG_PINCTRL is not set # CONFIG_GPIOLIB is not set # CONFIG_W1 is not set # CONFIG_POWER_RESET is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set # CONFIG_WATCHDOG is not set CONFIG_SSB_POSSIBLE=y # CONFIG_SSB is not set CONFIG_BCMA_POSSIBLE=y # CONFIG_BCMA is not set # # Multifunction device drivers # # CONFIG_MFD_SUN4I_GPADC is not set # CONFIG_MFD_AT91_USART is not set # CONFIG_MFD_MADERA is not set # CONFIG_MFD_EXYNOS_LPASS is not set # CONFIG_MFD_MXS_LRADC is not set # CONFIG_MFD_MX25_TSADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_PM8XXX is not set # CONFIG_MFD_SM501 is not set # CONFIG_ABX500_CORE is not set # CONFIG_MFD_SUN6I_PRCM is not set # CONFIG_MFD_SYSCON is not set # CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_MFD_TQMX86 is not set # CONFIG_MFD_STM32_LPTIMER is not set # CONFIG_MFD_STM32_TIMERS is not set # end of Multifunction device drivers # CONFIG_REGULATOR is not set # CONFIG_RC_CORE is not set # # CEC support # # CONFIG_MEDIA_CEC_SUPPORT is not set # end of CEC support # CONFIG_MEDIA_SUPPORT is not set # # Graphics support # # CONFIG_IMX_IPUV3_CORE is not set # CONFIG_DRM is not set # # ARM devices # # end of ARM devices # # Frame buffer Devices # # CONFIG_FB is not set # CONFIG_MMP_DISP is not set # end of Frame buffer Devices # # Backlight & LCD device support # # CONFIG_LCD_CLASS_DEVICE is not set # CONFIG_BACKLIGHT_CLASS_DEVICE is not set # end of Backlight & LCD device support # # Console display driver support # CONFIG_VGA_CONSOLE=y CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 # end of Console display driver support # end of Graphics support # CONFIG_SOUND is not set # # HID support # # CONFIG_HID is not set # end of HID support CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_SUPPORT is not set # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set # CONFIG_NEW_LEDS is not set # CONFIG_ACCESSIBILITY is not set CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_RTC_LIB=y CONFIG_RTC_MC146818_LIB=y # CONFIG_RTC_CLASS is not set # CONFIG_DMADEVICES is not set # # DMABUF options # # CONFIG_SYNC_FILE is not set # CONFIG_DMABUF_HEAPS is not set # end of DMABUF options # CONFIG_AUXDISPLAY is not set # CONFIG_UIO is not set # CONFIG_VFIO is not set # CONFIG_VIRT_DRIVERS is not set # CONFIG_VIRTIO_MENU is not set # CONFIG_VHOST_MENU is not set # # Microsoft Hyper-V guest support # # end of Microsoft Hyper-V guest support # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set # CONFIG_STAGING is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set # CONFIG_OLPC_XO175 is not set # CONFIG_SURFACE_PLATFORMS is not set # CONFIG_X86_PLATFORM_DEVICES is not set # CONFIG_COMMON_CLK is not set # CONFIG_HWSPINLOCK is not set # # Clock Source drivers # CONFIG_CLKEVT_I8253=y CONFIG_I8253_LOCK=y CONFIG_CLKBLD_I8253=y # CONFIG_BCM2835_TIMER is not set # CONFIG_BCM_KONA_TIMER is not set # CONFIG_DAVINCI_TIMER is not set # CONFIG_DIGICOLOR_TIMER is not set # CONFIG_OMAP_DM_TIMER is not set # CONFIG_DW_APB_TIMER is not set # CONFIG_FTTMR010_TIMER is not set # CONFIG_IXP4XX_TIMER is not set # CONFIG_MESON6_TIMER is not set # CONFIG_OWL_TIMER is not set # CONFIG_RDA_TIMER is not set # CONFIG_SUN4I_TIMER is not set # CONFIG_TEGRA_TIMER is not set # CONFIG_VT8500_TIMER is not set # CONFIG_NPCM7XX_TIMER is not set # CONFIG_ASM9260_TIMER is not set # CONFIG_CLKSRC_DBX500_PRCMU is not set # CONFIG_CLPS711X_TIMER is not set # CONFIG_MXS_TIMER is not set # CONFIG_NSPIRE_TIMER is not set # CONFIG_INTEGRATOR_AP_TIMER is not set # CONFIG_CLKSRC_PISTACHIO is not set # CONFIG_CLKSRC_STM32_LP is not set # CONFIG_ARMV7M_SYSTICK is not set # CONFIG_ATMEL_PIT is not set # CONFIG_ATMEL_ST is not set # CONFIG_CLKSRC_SAMSUNG_PWM is not set # CONFIG_FSL_FTM_TIMER is not set # CONFIG_OXNAS_RPS_TIMER is not set # CONFIG_MTK_TIMER is not set # CONFIG_SH_TIMER_CMT is not set # CONFIG_SH_TIMER_MTU2 is not set # CONFIG_RENESAS_OSTM is not set # CONFIG_SH_TIMER_TMU is not set # CONFIG_EM_TIMER_STI is not set # CONFIG_CLKSRC_PXA is not set # CONFIG_TIMER_IMX_SYS_CTR is not set # CONFIG_CLKSRC_ST_LPC is not set # CONFIG_GXP_TIMER is not set # CONFIG_MSC313E_TIMER is not set # CONFIG_MICROCHIP_PIT64B is not set # end of Clock Source drivers # CONFIG_MAILBOX is not set # CONFIG_IOMMU_SUPPORT is not set # # Remoteproc drivers # # CONFIG_REMOTEPROC is not set # end of Remoteproc drivers # # Rpmsg drivers # # CONFIG_RPMSG_VIRTIO is not set # end of Rpmsg drivers # # SOC (System On Chip) specific Drivers # # # Amlogic SoC drivers # # CONFIG_MESON_CANVAS is not set # CONFIG_MESON_CLK_MEASURE is not set # CONFIG_MESON_GX_SOCINFO is not set # CONFIG_MESON_MX_SOCINFO is not set # end of Amlogic SoC drivers # # Apple SoC drivers # # CONFIG_APPLE_SART is not set # end of Apple SoC drivers # # ASPEED SoC drivers # # CONFIG_ASPEED_LPC_CTRL is not set # CONFIG_ASPEED_LPC_SNOOP is not set # CONFIG_ASPEED_UART_ROUTING is not set # CONFIG_ASPEED_P2A_CTRL is not set # CONFIG_ASPEED_SOCINFO is not set # end of ASPEED SoC drivers # CONFIG_AT91_SOC_ID is not set # CONFIG_AT91_SOC_SFR is not set # # Broadcom SoC drivers # # CONFIG_SOC_BCM63XX is not set # CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # # NXP/Freescale QorIQ SoC drivers # # end of NXP/Freescale QorIQ SoC drivers # # fujitsu SoC drivers # # end of fujitsu SoC drivers # # i.MX SoC drivers # # CONFIG_SOC_IMX8M is not set # end of i.MX SoC drivers # # IXP4xx SoC drivers # # CONFIG_IXP4XX_QMGR is not set # CONFIG_IXP4XX_NPE is not set # end of IXP4xx SoC drivers # # Enable LiteX SoC Builder specific drivers # # CONFIG_LITEX_SOC_CONTROLLER is not set # end of Enable LiteX SoC Builder specific drivers # # MediaTek SoC drivers # # CONFIG_MTK_CMDQ is not set # CONFIG_MTK_DEVAPC is not set # CONFIG_MTK_INFRACFG is not set # CONFIG_MTK_SCPSYS is not set # CONFIG_MTK_MMSYS is not set # end of MediaTek SoC drivers # # Qualcomm SoC drivers # # CONFIG_QCOM_GENI_SE is not set # CONFIG_QCOM_GSBI is not set # CONFIG_QCOM_LLCC is not set # CONFIG_QCOM_RPMH is not set # CONFIG_QCOM_SPM is not set # CONFIG_QCOM_ICC_BWMON is not set # end of Qualcomm SoC drivers # CONFIG_SOC_RENESAS is not set # CONFIG_ROCKCHIP_GRF is not set # CONFIG_SOC_SAMSUNG is not set # CONFIG_SOC_TI is not set # CONFIG_UX500_SOC_ID is not set # # Xilinx SoC drivers # # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers # CONFIG_PM_DEVFREQ is not set # CONFIG_EXTCON is not set # CONFIG_MEMORY is not set # CONFIG_IIO is not set # CONFIG_PWM is not set # # IRQ chip support # # CONFIG_AL_FIC is not set # CONFIG_RENESAS_INTC_IRQPIN is not set # CONFIG_RENESAS_IRQC is not set # CONFIG_RENESAS_RZA1_IRQC is not set # CONFIG_RENESAS_RZG2L_IRQC is not set # CONFIG_SL28CPLD_INTC is not set # CONFIG_TS4800_IRQ is not set # CONFIG_INGENIC_TCU_IRQ is not set # CONFIG_IRQ_UNIPHIER_AIDET is not set # CONFIG_MESON_IRQ_GPIO is not set # CONFIG_IMX_IRQSTEER is not set # CONFIG_IMX_INTMUX is not set # CONFIG_EXYNOS_IRQ_COMBINER is not set # CONFIG_MST_IRQ is not set # CONFIG_MCHP_EIC is not set # CONFIG_SUNPLUS_SP7021_INTC is not set # end of IRQ chip support # CONFIG_IPACK_BUS is not set # CONFIG_RESET_CONTROLLER is not set # # PHY Subsystem # # CONFIG_GENERIC_PHY is not set # CONFIG_PHY_PISTACHIO_USB is not set # CONFIG_PHY_CAN_TRANSCEIVER is not set # # PHY drivers for Broadcom platforms # # CONFIG_PHY_BCM63XX_USBH is not set # CONFIG_BCM_KONA_USB2_PHY is not set # end of PHY drivers for Broadcom platforms # CONFIG_PHY_HI6220_USB is not set # CONFIG_PHY_HI3660_USB is not set # CONFIG_PHY_HI3670_USB is not set # CONFIG_PHY_HI3670_PCIE is not set # CONFIG_PHY_HISTB_COMBPHY is not set # CONFIG_PHY_HISI_INNO_USB2 is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_PHY_PXA_USB is not set # CONFIG_PHY_MMP3_USB is not set # CONFIG_PHY_MMP3_HSIC is not set # CONFIG_PHY_MT7621_PCI is not set # CONFIG_PHY_RALINK_USB is not set # CONFIG_PHY_RCAR_GEN3_USB3 is not set # CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set # CONFIG_PHY_ROCKCHIP_PCIE is not set # CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set # CONFIG_PHY_SAMSUNG_USB2 is not set # CONFIG_PHY_ST_SPEAR1310_MIPHY is not set # CONFIG_PHY_ST_SPEAR1340_MIPHY is not set # CONFIG_PHY_TEGRA194_P2U is not set # CONFIG_PHY_DA8XX_USB is not set # CONFIG_OMAP_CONTROL_PHY is not set # CONFIG_TI_PIPE3 is not set # CONFIG_PHY_INTEL_KEEMBAY_EMMC is not set # CONFIG_PHY_INTEL_KEEMBAY_USB is not set # CONFIG_PHY_INTEL_LGM_EMMC is not set # CONFIG_PHY_XILINX_ZYNQMP is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set # CONFIG_MCB is not set # # Performance monitor support # # CONFIG_ARM_CCN is not set # CONFIG_ARM_CMN is not set # CONFIG_FSL_IMX8_DDR_PMU is not set # CONFIG_XGENE_PMU is not set # CONFIG_ARM_DMC620_PMU is not set # CONFIG_MARVELL_CN10K_TAD_PMU is not set # CONFIG_MARVELL_CN10K_DDR_PMU is not set # end of Performance monitor support # CONFIG_RAS is not set # # Android # # CONFIG_ANDROID_BINDER_IPC is not set # end of Android # CONFIG_DAX is not set # CONFIG_NVMEM is not set # # HW tracing support # # CONFIG_STM is not set # CONFIG_INTEL_TH is not set # end of HW tracing support # CONFIG_FPGA is not set # CONFIG_TEE is not set # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set # CONFIG_PECI is not set # CONFIG_HTE is not set # end of Device Drivers # # File systems # CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_VALIDATE_FS_PARSER is not set # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set # CONFIG_EXT4_FS is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set CONFIG_FILE_LOCKING=y # CONFIG_FS_ENCRYPTION is not set # CONFIG_FS_VERITY is not set # CONFIG_DNOTIFY is not set # CONFIG_INOTIFY_USER is not set # CONFIG_FANOTIFY is not set # CONFIG_QUOTA is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_AUTOFS_FS is not set # CONFIG_FUSE_FS is not set # CONFIG_OVERLAY_FS is not set # # Caches # # CONFIG_FSCACHE is not set # end of Caches # # CD-ROM/DVD Filesystems # # CONFIG_ISO9660_FS is not set # CONFIG_UDF_FS is not set # end of CD-ROM/DVD Filesystems # # DOS/FAT/EXFAT/NT Filesystems # # CONFIG_MSDOS_FS is not set # CONFIG_VFAT_FS is not set # CONFIG_EXFAT_FS is not set # CONFIG_NTFS_FS is not set # CONFIG_NTFS3_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems # CONFIG_PROC_FS=y # CONFIG_PROC_KCORE is not set CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROC_CHILDREN is not set CONFIG_PROC_PID_ARCH_STATUS=y CONFIG_KERNFS=y CONFIG_SYSFS=y # CONFIG_TMPFS is not set # CONFIG_HUGETLBFS is not set CONFIG_ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y # CONFIG_CONFIGFS_FS is not set # end of Pseudo filesystems # CONFIG_MISC_FILESYSTEMS is not set # CONFIG_NLS is not set # CONFIG_UNICODE is not set CONFIG_IO_WQ=y # end of File systems # # Security options # # CONFIG_KEYS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y # CONFIG_HARDENED_USERCOPY is not set # CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf" # # Kernel hardening options # # # Memory initialization # CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization CONFIG_RANDSTRUCT_NONE=y # end of Kernel hardening options # end of Security options # CONFIG_CRYPTO is not set # # Library routines # # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y # CONFIG_CORDIC is not set # CONFIG_PRIME_NUMBERS is not set CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y # # Crypto library routines # CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y # CONFIG_CRYPTO_LIB_CURVE25519 is not set CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 # CONFIG_CRYPTO_LIB_POLY1305 is not set # end of Crypto library routines # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set # CONFIG_CRC_T10DIF is not set # CONFIG_CRC64_ROCKSOFT is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set # CONFIG_CRC64 is not set # CONFIG_CRC4 is not set # CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set # CONFIG_CRC8 is not set # CONFIG_RANDOM32_SELFTEST is not set # CONFIG_XZ_DEC is not set CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_SWIOTLB=y # CONFIG_DMA_API_DEBUG is not set # CONFIG_IRQ_POLL is not set CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y CONFIG_ARCH_HAS_PMEM_API=y CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y CONFIG_ARCH_HAS_COPY_MC=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y CONFIG_SBITMAP=y # CONFIG_PARMAN is not set # CONFIG_OBJAGG is not set # end of Library routines # # Kernel hacking # # # printk and dmesg options # # CONFIG_PRINTK_TIME is not set # CONFIG_PRINTK_CALLER is not set # CONFIG_STACKTRACE_BUILD_ID is not set CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_DYNAMIC_DEBUG is not set # CONFIG_DYNAMIC_DEBUG_CORE is not set # CONFIG_SYMBOLIC_ERRNAME is not set CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options # CONFIG_DEBUG_KERNEL is not set # # Compile-time checks and compiler options # CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_HEADERS_INSTALL is not set CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_OBJTOOL=y # end of Compile-time checks and compiler options # # Generic Kernel Debugging Instruments # # CONFIG_MAGIC_SYSRQ is not set # CONFIG_DEBUG_FS is not set CONFIG_HAVE_ARCH_KGDB=y CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments # # Networking Debugging # # end of Networking Debugging # # Memory Debugging # # CONFIG_PAGE_EXTENSION is not set CONFIG_SLUB_DEBUG=y # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_PAGE_TABLE_CHECK is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set CONFIG_GENERIC_PTDUMP=y CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_DEBUG_MEMORY_INIT=y CONFIG_ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP=y CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set CONFIG_HAVE_ARCH_KFENCE=y # CONFIG_KFENCE is not set # end of Memory Debugging # # Debug Oops, Lockups and Hangs # # CONFIG_PANIC_ON_OOPS is not set CONFIG_PANIC_ON_OOPS_VALUE=0 CONFIG_PANIC_TIMEOUT=0 CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y # end of Debug Oops, Lockups and Hangs # # Scheduler Debugging # # end of Scheduler Debugging # CONFIG_DEBUG_TIMEKEEPING is not set # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_WW_MUTEX_SELFTEST is not set # end of Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_DEBUG_IRQFLAGS is not set CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # # Debug kernel data structures # # CONFIG_BUG_ON_DATA_CORRUPTION is not set # end of Debug kernel data structures # # RCU Debugging # # end of RCU Debugging CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_RETHOOK=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_FENTRY=y CONFIG_HAVE_OBJTOOL_MCOUNT=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACING_SUPPORT=y # CONFIG_FTRACE is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y # # x86 Debugging # # CONFIG_X86_VERBOSE_BOOTUP is not set CONFIG_EARLY_PRINTK=y CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set # CONFIG_IO_DELAY_UDELAY is not set # CONFIG_IO_DELAY_NONE is not set CONFIG_UNWINDER_ORC=y # CONFIG_UNWINDER_FRAME_POINTER is not set # end of x86 Debugging # # Kernel Testing and Coverage # # CONFIG_KUNIT is not set CONFIG_ARCH_HAS_KCOV=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_KCOV is not set # CONFIG_RUNTIME_TESTING_MENU is not set CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage CONFIG_WARN_MISSING_DOCUMENTS=y CONFIG_WARN_ABI_ERRORS=y # end of Kernel hacking ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver 2022-10-06 14:07 ` [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver Cosmin Tanislav 2022-10-07 2:45 ` kernel test robot @ 2022-10-08 13:01 ` kernel test robot 2022-10-09 17:31 ` Jonathan Cameron 2 siblings, 0 replies; 8+ messages in thread From: kernel test robot @ 2022-10-08 13:01 UTC (permalink / raw) To: Cosmin Tanislav Cc: kbuild-all, Jonathan Cameron, Rob Herring, Linus Walleij, linux-iio, linux-gpio, linux-kernel, devicetree, Cosmin Tanislav, Andy Shevchenko [-- Attachment #1: Type: text/plain, Size: 1629 bytes --] Hi Cosmin, I love your patch! Yet something to improve: [auto build test ERROR on jic23-iio/togreg] [also build test ERROR on robh/for-next linus/master v6.0 next-20221007] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Cosmin-Tanislav/AD4130/20221006-221313 base: https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg config: ia64-randconfig-c033-20221008 compiler: ia64-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/4b905b5c6b166dc9ea13246096c2d044648105b0 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Cosmin-Tanislav/AD4130/20221006-221313 git checkout 4b905b5c6b166dc9ea13246096c2d044648105b0 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=ia64 SHELL=/bin/bash If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>, old ones prefixed by <<): >> ERROR: modpost: "devm_clk_register" [drivers/iio/adc/ad4130.ko] undefined! -- 0-DAY CI Kernel Test Service https://01.org/lkp [-- Attachment #2: config --] [-- Type: text/plain, Size: 133577 bytes --] # # Automatically generated file; DO NOT EDIT. # Linux/ia64 6.0.0-rc4 Kernel Configuration # CONFIG_CC_VERSION_TEXT="ia64-linux-gcc (GCC) 12.1.0" CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=120100 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y CONFIG_AS_VERSION=23800 CONFIG_LD_IS_BFD=y CONFIG_LD_VERSION=23800 CONFIG_LLD_VERSION=0 CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_PAHOLE_VERSION=123 CONFIG_CONSTRUCTORS=y CONFIG_IRQ_WORK=y # # General setup # CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_COMPILE_TEST=y # CONFIG_WERROR is not set CONFIG_LOCALVERSION="" CONFIG_BUILD_SALT="" CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" # CONFIG_SYSVIPC is not set # CONFIG_WATCH_QUEUE is not set # CONFIG_CROSS_MEMORY_ATTACH is not set # CONFIG_USELIB is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_LEGACY=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_PENDING_IRQ=y CONFIG_GENERIC_IRQ_INJECTION=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_SIM=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_GENERIC_IRQ_DEBUGFS=y # end of IRQ subsystem CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_LEGACY_TIMER_TICK=y CONFIG_TIME_KUNIT_TEST=m CONFIG_CONTEXT_TRACKING=y CONFIG_CONTEXT_TRACKING_IDLE=y # # BPF subsystem # # CONFIG_BPF_SYSCALL is not set # end of BPF subsystem CONFIG_PREEMPT_VOLUNTARY_BUILD=y # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set CONFIG_PREEMPT_COUNT=y # CONFIG_SCHED_CORE is not set # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_PSI=y # CONFIG_PSI_DEFAULT_DISABLED is not set # end of CPU/Task time and stats accounting # CONFIG_CPU_ISOLATION is not set # # RCU Subsystem # CONFIG_TREE_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TREE_SRCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y # end of RCU Subsystem # CONFIG_IKCONFIG is not set CONFIG_IKHEADERS=y CONFIG_LOG_BUF_SHIFT=17 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 # CONFIG_PRINTK_INDEX is not set CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # # Scheduler features # # end of Scheduler features CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC12_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y CONFIG_CGROUPS=y CONFIG_CGROUP_FAVOR_DYNMODS=y # CONFIG_MEMCG is not set CONFIG_BLK_CGROUP=y # CONFIG_CGROUP_SCHED is not set CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_RDMA=y # CONFIG_CGROUP_FREEZER is not set CONFIG_CPUSETS=y CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_MISC=y # CONFIG_CGROUP_DEBUG is not set CONFIG_NAMESPACES=y CONFIG_UTS_NS=y CONFIG_USER_NS=y # CONFIG_PID_NS is not set CONFIG_CHECKPOINT_RESTORE=y # CONFIG_SCHED_AUTOGROUP is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set # CONFIG_BLK_DEV_INITRD is not set # CONFIG_BOOT_CONFIG is not set CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_SYSCTL_ARCH_UNALIGN_NO_WARN=y # CONFIG_EXPERT is not set CONFIG_MULTIUSER=y CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set CONFIG_KCMP=y # CONFIG_EMBEDDED is not set # # Kernel Performance Events And Counters # # end of Kernel Performance Events And Counters CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y # end of General setup CONFIG_PGTABLE_LEVELS=3 # # Processor type and features # CONFIG_IA64=y CONFIG_64BIT=y CONFIG_MMU=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_DMI=y CONFIG_EFI=y CONFIG_SCHED_OMIT_FRAME_POINTER=y CONFIG_IA64_UNCACHED_ALLOCATOR=y CONFIG_ARCH_USES_PG_UNCACHED=y CONFIG_AUDIT_ARCH=y # CONFIG_ITANIUM is not set CONFIG_MCKINLEY=y # CONFIG_IA64_PAGE_SIZE_4KB is not set # CONFIG_IA64_PAGE_SIZE_8KB is not set # CONFIG_IA64_PAGE_SIZE_16KB is not set CONFIG_IA64_PAGE_SIZE_64KB=y # CONFIG_HZ_100 is not set # CONFIG_HZ_250 is not set CONFIG_HZ_300=y # CONFIG_HZ_1000 is not set CONFIG_HZ=300 CONFIG_IA64_L1_CACHE_SHIFT=7 CONFIG_IA64_SGI_UV=y # CONFIG_IA64_HP_SBA_IOMMU is not set CONFIG_IA64_CYCLONE=y CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_SMP=y CONFIG_NR_CPUS=4096 CONFIG_HOTPLUG_CPU=y CONFIG_SCHED_SMT=y # CONFIG_PERMIT_BSP_REMOVE is not set CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_NUMA=y CONFIG_NODES_SHIFT=10 CONFIG_HAVE_ARCH_NODEDATA_EXTENSION=y CONFIG_HAVE_MEMORYLESS_NODES=y CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_IA64_MCA_RECOVERY=y CONFIG_IA64_PALINFO=y # CONFIG_IA64_MC_ERR_INJECT is not set CONFIG_IA64_ESI=y # CONFIG_IA64_HP_AML_NFW is not set # CONFIG_KEXEC is not set CONFIG_CRASH_DUMP=y # end of Processor type and features # # Power management and ACPI options # # CONFIG_PM is not set CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ACPI=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y CONFIG_ACPI_DEBUGGER=y CONFIG_ACPI_DEBUGGER_USER=m CONFIG_ACPI_SPCR_TABLE=y CONFIG_ACPI_EC_DEBUGFS=m CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=m CONFIG_ACPI_BUTTON=m CONFIG_ACPI_TINY_POWER_BUTTON=m CONFIG_ACPI_TINY_POWER_BUTTON_SIGNAL=38 CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=m # CONFIG_ACPI_DOCK is not set CONFIG_ACPI_CPU_FREQ_PSS=y CONFIG_ACPI_PROCESSOR_CSTATE=y CONFIG_ACPI_PROCESSOR_IDLE=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_THERMAL=m CONFIG_ACPI_DEBUG=y CONFIG_ACPI_PCI_SLOT=y CONFIG_ACPI_CONTAINER=y # CONFIG_ACPI_HOTPLUG_MEMORY is not set # CONFIG_ACPI_HED is not set CONFIG_ACPI_CUSTOM_METHOD=m CONFIG_ACPI_NUMA=y CONFIG_ACPI_HMAT=y CONFIG_ACPI_WATCHDOG=y CONFIG_ACPI_CONFIGFS=m CONFIG_ACPI_PFRUT=y # CONFIG_PMIC_OPREGION is not set # end of Power management and ACPI options CONFIG_MSPEC=m # # General architecture-dependent options # CONFIG_CRASH_CORE=y # CONFIG_KPROBES is not set CONFIG_HAVE_64BIT_ALIGNED_ACCESS=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_FUNCTION_DESCRIPTORS=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_TASK_STRUCT_ON_STACK=y CONFIG_ARCH_TASK_STRUCT_ALLOCATOR=y CONFIG_ARCH_THREAD_STACK_ALLOCATOR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_LTO_NONE=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y # CONFIG_COMPAT_32BIT_TIME is not set CONFIG_LOCK_EVENT_COUNTS=y # # GCOV-based kernel profiling # CONFIG_GCOV_KERNEL=y # end of GCOV-based kernel profiling # end of General architecture-dependent options CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y # CONFIG_MODULE_UNLOAD is not set CONFIG_MODVERSIONS=y CONFIG_ASM_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_MODULE_SIG is not set # CONFIG_MODULE_COMPRESS_NONE is not set CONFIG_MODULE_COMPRESS_GZIP=y # CONFIG_MODULE_COMPRESS_XZ is not set # CONFIG_MODULE_COMPRESS_ZSTD is not set # CONFIG_MODULE_DECOMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" CONFIG_BLOCK=y CONFIG_BLOCK_LEGACY_AUTOLOAD=y CONFIG_BLK_RQ_ALLOC_TIME=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_ICQ=y CONFIG_BLK_DEV_BSGLIB=y # CONFIG_BLK_DEV_INTEGRITY is not set # CONFIG_BLK_DEV_ZONED is not set # CONFIG_BLK_DEV_THROTTLING is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set CONFIG_BLK_CGROUP_FC_APPID=y CONFIG_BLK_CGROUP_IOCOST=y # CONFIG_BLK_CGROUP_IOPRIO is not set # CONFIG_BLK_DEBUG_FS is not set # CONFIG_BLK_SED_OPAL is not set # CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_AMIGA_PARTITION=y CONFIG_MSDOS_PARTITION=y CONFIG_EFI_PARTITION=y # end of Partition Types CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLOCK_HOLDER_DEPRECATED=y CONFIG_BLK_MQ_STACKING=y # # IO Schedulers # CONFIG_MQ_IOSCHED_DEADLINE=m CONFIG_MQ_IOSCHED_KYBER=y CONFIG_IOSCHED_BFQ=m # CONFIG_BFQ_GROUP_IOSCHED is not set # end of IO Schedulers CONFIG_PADATA=y CONFIG_ASN1=y CONFIG_UNINLINE_SPIN_UNLOCK=y # # Executable file formats # CONFIG_BINFMT_ELF=y CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y CONFIG_ELFCORE=y CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y CONFIG_BINFMT_SCRIPT=m CONFIG_BINFMT_MISC=y CONFIG_COREDUMP=y # end of Executable file formats # # Memory Management options # CONFIG_ZPOOL=y CONFIG_SWAP=y CONFIG_ZSWAP=y # CONFIG_ZSWAP_DEFAULT_ON is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lz4" CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y # CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set # CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" CONFIG_ZBUD=y CONFIG_Z3FOLD=y # CONFIG_ZSMALLOC is not set # # SLAB allocator options # # CONFIG_SLAB is not set CONFIG_SLUB=y CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set CONFIG_SLUB_STATS=y CONFIG_SLUB_CPU_PARTIAL=y # end of SLAB allocator options CONFIG_SHUFFLE_PAGE_ALLOCATOR=y # CONFIG_COMPAT_BRK is not set CONFIG_SELECT_MEMORY_MODEL=y # CONFIG_FLATMEM_MANUAL is not set CONFIG_SPARSEMEM_MANUAL=y CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y # CONFIG_SPARSEMEM_VMEMMAP is not set CONFIG_NUMA_KEEP_MEMINFO=y CONFIG_MEMORY_ISOLATION=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y CONFIG_MEMORY_HOTPLUG=y CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y CONFIG_MEMORY_HOTREMOVE=y CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_COMPACTION is not set CONFIG_PAGE_REPORTING=y CONFIG_MIGRATION=y CONFIG_CONTIG_ALLOC=y CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_KSM=y CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_USE_PERCPU_NUMA_NODE_ID=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_FRONTSWAP=y CONFIG_CMA=y # CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=19 CONFIG_DEFERRED_STRUCT_PAGE_INIT=y CONFIG_PAGE_IDLE_FLAG=y # CONFIG_IDLE_PAGE_TRACKING is not set CONFIG_ZONE_DMA32=y CONFIG_GET_FREE_REGION=y CONFIG_VM_EVENT_COUNTERS=y CONFIG_PERCPU_STATS=y CONFIG_GUP_TEST=y CONFIG_ANON_VMA_NAME=y # CONFIG_USERFAULTFD is not set # # Data Access Monitoring # CONFIG_DAMON=y CONFIG_DAMON_VADDR=y CONFIG_DAMON_PADDR=y # CONFIG_DAMON_SYSFS is not set CONFIG_DAMON_DBGFS=y CONFIG_DAMON_RECLAIM=y CONFIG_DAMON_LRU_SORT=y # end of Data Access Monitoring # end of Memory Management options # CONFIG_NET is not set # # Device Drivers # CONFIG_HAVE_PCI=y CONFIG_FORCE_PCI=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_SYSCALL=y # CONFIG_PCIEPORTBUS is not set CONFIG_PCIEASPM=y # CONFIG_PCIEASPM_DEFAULT is not set # CONFIG_PCIEASPM_POWERSAVE is not set CONFIG_PCIEASPM_POWER_SUPERSAVE=y # CONFIG_PCIEASPM_PERFORMANCE is not set CONFIG_PCIE_PTM=y CONFIG_PCI_MSI=y CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PCI_MSI_ARCH_FALLBACKS=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_REALLOC_ENABLE_AUTO is not set # CONFIG_PCI_STUB is not set CONFIG_PCI_PF_STUB=m CONFIG_PCI_ATS=y CONFIG_PCI_DOE=y CONFIG_PCI_IOV=y CONFIG_PCI_PRI=y CONFIG_PCI_PASID=y CONFIG_PCI_LABEL=y CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=16 # CONFIG_HOTPLUG_PCI is not set # # PCI controller drivers # # CONFIG_PCIE_XILINX_NWL is not set # CONFIG_PCI_TEGRA is not set # CONFIG_PCIE_RCAR_HOST is not set # CONFIG_PCIE_RCAR_EP is not set # CONFIG_PCIE_XILINX is not set # CONFIG_PCIE_XILINX_CPM is not set # CONFIG_PCI_XGENE is not set # CONFIG_PCI_VERSATILE is not set # CONFIG_PCIE_ALTERA is not set # CONFIG_PCI_HOST_THUNDER_PEM is not set # CONFIG_PCI_HOST_THUNDER_ECAM is not set # CONFIG_PCIE_MEDIATEK_GEN3 is not set # CONFIG_PCI_LOONGSON is not set # CONFIG_PCIE_MT7621 is not set # # DesignWare PCI Core Support # CONFIG_PCIE_DW=y CONFIG_PCIE_DW_HOST=y # CONFIG_PCIE_DW_PLAT_HOST is not set # CONFIG_PCIE_DW_PLAT_EP is not set # CONFIG_PCI_EXYNOS is not set # CONFIG_PCI_IMX6 is not set # CONFIG_PCIE_SPEAR13XX is not set # CONFIG_PCI_KEYSTONE_HOST is not set # CONFIG_PCI_KEYSTONE_EP is not set # CONFIG_PCIE_ARMADA_8K is not set # CONFIG_PCIE_ARTPEC6_HOST is not set # CONFIG_PCIE_ARTPEC6_EP is not set # CONFIG_PCIE_KEEMBAY_HOST is not set # CONFIG_PCIE_KEEMBAY_EP is not set # CONFIG_PCIE_HISI_STB is not set CONFIG_PCI_MESON=m # CONFIG_PCIE_TEGRA194_HOST is not set # CONFIG_PCIE_TEGRA194_EP is not set # CONFIG_PCIE_VISCONTI_HOST is not set # CONFIG_PCIE_FU740 is not set # end of DesignWare PCI Core Support # # Mobiveil PCIe Core Support # # CONFIG_PCIE_LAYERSCAPE_GEN4 is not set # end of Mobiveil PCIe Core Support # # Cadence PCIe controllers support # # end of Cadence PCIe controllers support # end of PCI controller drivers # # PCI Endpoint # CONFIG_PCI_ENDPOINT=y CONFIG_PCI_ENDPOINT_CONFIGFS=y # CONFIG_PCI_EPF_TEST is not set # CONFIG_PCI_EPF_NTB is not set CONFIG_PCI_EPF_VNTB=m # end of PCI Endpoint # # PCI switch controller drivers # CONFIG_PCI_SW_SWITCHTEC=m # end of PCI switch controller drivers CONFIG_CXL_BUS=y CONFIG_CXL_PCI=m CONFIG_CXL_MEM_RAW_COMMANDS=y # CONFIG_CXL_ACPI is not set CONFIG_CXL_MEM=m CONFIG_CXL_PORT=y CONFIG_CXL_REGION=y # CONFIG_PCCARD is not set CONFIG_RAPIDIO=m CONFIG_RAPIDIO_DISC_TIMEOUT=30 # CONFIG_RAPIDIO_ENABLE_RX_TX_PORTS is not set CONFIG_RAPIDIO_DMA_ENGINE=y CONFIG_RAPIDIO_DEBUG=y CONFIG_RAPIDIO_ENUM_BASIC=m CONFIG_RAPIDIO_CHMAN=m # CONFIG_RAPIDIO_MPORT_CDEV is not set # # RapidIO Switch drivers # CONFIG_RAPIDIO_CPS_XX=m CONFIG_RAPIDIO_CPS_GEN2=m # CONFIG_RAPIDIO_RXS_GEN3 is not set # end of RapidIO Switch drivers # # Generic Driver Options # CONFIG_AUXILIARY_BUS=y CONFIG_UEVENT_HELPER=y CONFIG_UEVENT_HELPER_PATH="" # CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y # CONFIG_PREVENT_FIRMWARE_BUILD is not set # # Firmware loader # CONFIG_FW_LOADER=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y CONFIG_EXTRA_FIRMWARE="" CONFIG_FW_LOADER_USER_HELPER=y CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y CONFIG_FW_LOADER_COMPRESS=y # CONFIG_FW_LOADER_COMPRESS_XZ is not set CONFIG_FW_LOADER_COMPRESS_ZSTD=y CONFIG_FW_UPLOAD=y # end of Firmware loader CONFIG_WANT_DEV_COREDUMP=y CONFIG_ALLOW_DEV_COREDUMP=y CONFIG_DEV_COREDUMP=y CONFIG_DEBUG_DRIVER=y # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set CONFIG_HMEM_REPORTING=y CONFIG_TEST_ASYNC_DRIVER_PROBE=m CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SPI=y CONFIG_REGMAP_MMIO=y CONFIG_REGMAP_IRQ=y CONFIG_REGMAP_SPI_AVMM=m CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_FENCE_TRACE=y # end of Generic Driver Options # # Bus devices # # CONFIG_ARM_INTEGRATOR_LM is not set # CONFIG_BT1_APB is not set # CONFIG_BT1_AXI is not set # CONFIG_HISILICON_LPC is not set # CONFIG_INTEL_IXP4XX_EB is not set # CONFIG_QCOM_EBI2 is not set CONFIG_MHI_BUS=m # CONFIG_MHI_BUS_DEBUG is not set CONFIG_MHI_BUS_PCI_GENERIC=m CONFIG_MHI_BUS_EP=y # end of Bus devices # # Firmware Drivers # # # ARM System Control and Management Interface Protocol # # CONFIG_ARM_SCMI_PROTOCOL is not set # end of ARM System Control and Management Interface Protocol # CONFIG_EFI_PCDP is not set CONFIG_DMIID=y # CONFIG_DMI_SYSFS is not set CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y CONFIG_SYSFB=y CONFIG_SYSFB_SIMPLEFB=y # CONFIG_BCM47XX_NVRAM is not set CONFIG_GOOGLE_FIRMWARE=y # CONFIG_GOOGLE_COREBOOT_TABLE is not set # # EFI (Extensible Firmware Interface) Support # CONFIG_EFI_VARS_PSTORE=m CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y CONFIG_EFI_BOOTLOADER_CONTROL=m CONFIG_EFI_TEST=y # CONFIG_EFI_RCI2_TABLE is not set # CONFIG_EFI_DISABLE_PCI_DMA is not set # CONFIG_EFI_CUSTOM_SSDT_OVERLAYS is not set # CONFIG_EFI_DISABLE_RUNTIME is not set CONFIG_EFI_COCO_SECRET=y # end of EFI (Extensible Firmware Interface) Support # # Tegra firmware driver # # end of Tegra firmware driver # end of Firmware Drivers CONFIG_GNSS=m CONFIG_GNSS_USB=m CONFIG_MTD=y # CONFIG_MTD_TESTS is not set # # Partition parsers # CONFIG_MTD_AR7_PARTS=m # CONFIG_MTD_BCM63XX_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=m # CONFIG_MTD_PARSER_IMAGETAG is not set # CONFIG_MTD_PARSER_TRX is not set # CONFIG_MTD_SHARPSL_PARTS is not set CONFIG_MTD_REDBOOT_PARTS=m CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y CONFIG_MTD_REDBOOT_PARTS_READONLY=y # end of Partition parsers # # User Modules And Translation Layers # CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=m # CONFIG_MTD_BLOCK_RO is not set # # Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK. # CONFIG_FTL=m # CONFIG_NFTL is not set CONFIG_INFTL=y CONFIG_RFD_FTL=m CONFIG_SSFDC=m CONFIG_SM_FTL=y # CONFIG_MTD_OOPS is not set CONFIG_MTD_PSTORE=m CONFIG_MTD_SWAP=y # CONFIG_MTD_PARTITIONED_MASTER is not set # # RAM/ROM/Flash chip drivers # CONFIG_MTD_CFI=y # CONFIG_MTD_JEDECPROBE is not set CONFIG_MTD_GEN_PROBE=y CONFIG_MTD_CFI_ADV_OPTIONS=y CONFIG_MTD_CFI_NOSWAP=y # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set # CONFIG_MTD_CFI_GEOMETRY is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y CONFIG_MTD_MAP_BANK_WIDTH_4=y CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y # CONFIG_MTD_OTP is not set CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_CFI_STAA=y CONFIG_MTD_CFI_UTIL=y CONFIG_MTD_RAM=y CONFIG_MTD_ROM=y CONFIG_MTD_ABSENT=y # end of RAM/ROM/Flash chip drivers # # Mapping drivers for chip access # CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_MTD_PHYSMAP=y # CONFIG_MTD_PHYSMAP_COMPAT is not set CONFIG_MTD_PHYSMAP_GPIO_ADDR=y # CONFIG_MTD_SC520CDP is not set # CONFIG_MTD_NETSC520 is not set # CONFIG_MTD_TS5500 is not set # CONFIG_MTD_PCI is not set CONFIG_MTD_INTEL_VR_NOR=y CONFIG_MTD_PLATRAM=y # end of Mapping drivers for chip access # # Self-contained MTD device drivers # CONFIG_MTD_PMC551=m CONFIG_MTD_PMC551_BUGFIX=y # CONFIG_MTD_PMC551_DEBUG is not set CONFIG_MTD_DATAFLASH=m # CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set # CONFIG_MTD_DATAFLASH_OTP is not set # CONFIG_MTD_MCHP23K256 is not set CONFIG_MTD_MCHP48L640=m CONFIG_MTD_SPEAR_SMI=y # CONFIG_MTD_SST25L is not set CONFIG_MTD_SLRAM=y CONFIG_MTD_PHRAM=m CONFIG_MTD_MTDRAM=y CONFIG_MTDRAM_TOTAL_SIZE=4096 CONFIG_MTDRAM_ERASE_SIZE=128 CONFIG_MTD_BLOCK2MTD=y # # Disk-On-Chip Device Drivers # CONFIG_MTD_DOCG3=m CONFIG_BCH_CONST_M=14 CONFIG_BCH_CONST_T=4 # end of Self-contained MTD device drivers # # NAND # CONFIG_MTD_NAND_CORE=y CONFIG_MTD_ONENAND=y CONFIG_MTD_ONENAND_VERIFY_WRITE=y CONFIG_MTD_ONENAND_GENERIC=y # CONFIG_MTD_ONENAND_SAMSUNG is not set # CONFIG_MTD_ONENAND_OTP is not set CONFIG_MTD_ONENAND_2X_PROGRAM=y # CONFIG_MTD_RAW_NAND is not set CONFIG_MTD_SPI_NAND=m # # ECC engine support # CONFIG_MTD_NAND_ECC=y CONFIG_MTD_NAND_ECC_SW_HAMMING=y # CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set CONFIG_MTD_NAND_ECC_SW_BCH=y CONFIG_MTD_NAND_ECC_MXIC=y # CONFIG_MTD_NAND_ECC_MEDIATEK is not set # end of ECC engine support # end of NAND # # LPDDR & LPDDR2 PCM memory drivers # # CONFIG_MTD_LPDDR is not set # end of LPDDR & LPDDR2 PCM memory drivers CONFIG_MTD_SPI_NOR=y # CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set # CONFIG_MTD_SPI_NOR_SWP_DISABLE is not set CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y # CONFIG_MTD_SPI_NOR_SWP_KEEP is not set # CONFIG_SPI_HISI_SFC is not set CONFIG_MTD_UBI=m CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_FASTMAP=y # CONFIG_MTD_UBI_GLUEBI is not set # CONFIG_MTD_UBI_BLOCK is not set CONFIG_MTD_HYPERBUS=y # CONFIG_HBMC_AM654 is not set # CONFIG_OF is not set CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_PARPORT=y CONFIG_PARPORT_PC=m # CONFIG_PARPORT_PC_FIFO is not set CONFIG_PARPORT_PC_SUPERIO=y CONFIG_PARPORT_AX88796=y # CONFIG_PARPORT_1284 is not set CONFIG_PARPORT_NOT_PC=y CONFIG_PNP=y CONFIG_PNP_DEBUG_MESSAGES=y # # Protocols # # CONFIG_ISAPNP is not set CONFIG_PNPACPI=y # CONFIG_BLK_DEV is not set # # NVME Support # CONFIG_NVME_CORE=m # CONFIG_BLK_DEV_NVME is not set # CONFIG_NVME_MULTIPATH is not set # CONFIG_NVME_VERBOSE_ERRORS is not set # CONFIG_NVME_HWMON is not set CONFIG_NVME_FABRICS=m CONFIG_NVME_FC=m # CONFIG_NVME_AUTH is not set # CONFIG_NVME_TARGET is not set # end of NVME Support # # Misc devices # CONFIG_SENSORS_LIS3LV02D=m CONFIG_AD525X_DPOT=y CONFIG_AD525X_DPOT_I2C=m CONFIG_AD525X_DPOT_SPI=y # CONFIG_DUMMY_IRQ is not set # CONFIG_PHANTOM is not set CONFIG_TIFM_CORE=m CONFIG_TIFM_7XX1=m CONFIG_ICS932S401=y # CONFIG_ATMEL_SSC is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_GEHC_ACHC is not set CONFIG_HP_ILO=y # CONFIG_QCOM_COINCELL is not set # CONFIG_QCOM_FASTRPC is not set CONFIG_APDS9802ALS=m # CONFIG_ISL29003 is not set CONFIG_ISL29020=m CONFIG_SENSORS_TSL2550=m # CONFIG_SENSORS_BH1770 is not set CONFIG_SENSORS_APDS990X=y CONFIG_HMC6352=y # CONFIG_DS1682 is not set # CONFIG_PCH_PHUB is not set # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set # CONFIG_DW_XDATA_PCIE is not set # CONFIG_PCI_ENDPOINT_TEST is not set CONFIG_XILINX_SDFEC=m CONFIG_MISC_RTSX=y # CONFIG_HISI_HIKEY_USB is not set CONFIG_C2PORT=m # # EEPROM support # CONFIG_EEPROM_AT24=y # CONFIG_EEPROM_AT25 is not set CONFIG_EEPROM_LEGACY=m CONFIG_EEPROM_MAX6875=y CONFIG_EEPROM_93CX6=m CONFIG_EEPROM_93XX46=y CONFIG_EEPROM_IDT_89HPESX=m # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support # CONFIG_CB710_CORE is not set # # Texas Instruments shared transport line discipline # # end of Texas Instruments shared transport line discipline CONFIG_SENSORS_LIS3_I2C=m CONFIG_ALTERA_STAPL=y CONFIG_GENWQE=m CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY=0 CONFIG_ECHO=y CONFIG_BCM_VK=m # CONFIG_BCM_VK_TTY is not set CONFIG_MISC_ALCOR_PCI=m CONFIG_MISC_RTSX_PCI=y CONFIG_MISC_RTSX_USB=m # CONFIG_HABANA_AI is not set CONFIG_UACCE=y # CONFIG_PVPANIC is not set CONFIG_GP_PCI1XXXX=y # end of Misc devices # # SCSI device support # CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set # CONFIG_SCSI is not set # end of SCSI device support # CONFIG_ATA is not set CONFIG_MD=y # CONFIG_BLK_DEV_MD is not set # CONFIG_BCACHE is not set CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=m CONFIG_DM_DEBUG=y CONFIG_DM_BUFIO=m # CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set CONFIG_DM_BIO_PRISON=m CONFIG_DM_PERSISTENT_DATA=m CONFIG_DM_UNSTRIPED=m # CONFIG_DM_CRYPT is not set CONFIG_DM_SNAPSHOT=m # CONFIG_DM_THIN_PROVISIONING is not set CONFIG_DM_CACHE=m CONFIG_DM_CACHE_SMQ=m CONFIG_DM_WRITECACHE=m CONFIG_DM_EBS=m # CONFIG_DM_ERA is not set # CONFIG_DM_CLONE is not set CONFIG_DM_MIRROR=m # CONFIG_DM_RAID is not set CONFIG_DM_ZERO=m CONFIG_DM_MULTIPATH=m CONFIG_DM_MULTIPATH_QL=m # CONFIG_DM_MULTIPATH_ST is not set CONFIG_DM_MULTIPATH_HST=m # CONFIG_DM_MULTIPATH_IOA is not set CONFIG_DM_DELAY=m # CONFIG_DM_DUST is not set # CONFIG_DM_UEVENT is not set CONFIG_DM_FLAKEY=m CONFIG_DM_VERITY=m # CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG is not set # CONFIG_DM_VERITY_FEC is not set # CONFIG_DM_SWITCH is not set CONFIG_DM_LOG_WRITES=m # CONFIG_DM_INTEGRITY is not set # CONFIG_TARGET_CORE is not set # CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # CONFIG_FIREWIRE=y CONFIG_FIREWIRE_OHCI=y CONFIG_FIREWIRE_NOSY=y # end of IEEE 1394 (FireWire) support # # Input device support # CONFIG_INPUT=y CONFIG_INPUT_LEDS=m CONFIG_INPUT_FF_MEMLESS=y CONFIG_INPUT_SPARSEKMAP=y CONFIG_INPUT_MATRIXKMAP=y CONFIG_INPUT_VIVALDIFMAP=m # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=m CONFIG_INPUT_EVBUG=m # # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ADC is not set # CONFIG_KEYBOARD_ADP5588 is not set # CONFIG_KEYBOARD_ADP5589 is not set # CONFIG_KEYBOARD_APPLESPI is not set CONFIG_KEYBOARD_ATKBD=m CONFIG_KEYBOARD_QT1050=y CONFIG_KEYBOARD_QT1070=y # CONFIG_KEYBOARD_QT2160 is not set # CONFIG_KEYBOARD_DLINK_DIR685 is not set # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_EP93XX is not set CONFIG_KEYBOARD_GPIO=m # CONFIG_KEYBOARD_GPIO_POLLED is not set CONFIG_KEYBOARD_TCA6416=y CONFIG_KEYBOARD_TCA8418=y CONFIG_KEYBOARD_MATRIX=y CONFIG_KEYBOARD_LM8323=m CONFIG_KEYBOARD_LM8333=y CONFIG_KEYBOARD_MAX7359=m CONFIG_KEYBOARD_MCS=m # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_IMX is not set CONFIG_KEYBOARD_NEWTON=m CONFIG_KEYBOARD_OPENCORES=m # CONFIG_KEYBOARD_GOLDFISH_EVENTS is not set CONFIG_KEYBOARD_STOWAWAY=m # CONFIG_KEYBOARD_ST_KEYSCAN is not set CONFIG_KEYBOARD_SUNKBD=y # CONFIG_KEYBOARD_SH_KEYSC is not set CONFIG_KEYBOARD_IQS62X=m # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set CONFIG_KEYBOARD_XTKBD=y # CONFIG_KEYBOARD_MT6779 is not set # CONFIG_KEYBOARD_MTK_PMIC is not set CONFIG_KEYBOARD_CYPRESS_SF=y CONFIG_INPUT_MOUSE=y # CONFIG_MOUSE_PS2 is not set # CONFIG_MOUSE_SERIAL is not set CONFIG_MOUSE_APPLETOUCH=m # CONFIG_MOUSE_BCM5974 is not set CONFIG_MOUSE_CYAPA=m CONFIG_MOUSE_ELAN_I2C=y # CONFIG_MOUSE_ELAN_I2C_I2C is not set CONFIG_MOUSE_ELAN_I2C_SMBUS=y CONFIG_MOUSE_VSXXXAA=m # CONFIG_MOUSE_GPIO is not set # CONFIG_MOUSE_SYNAPTICS_I2C is not set CONFIG_MOUSE_SYNAPTICS_USB=m # CONFIG_INPUT_JOYSTICK is not set CONFIG_INPUT_TABLET=y # CONFIG_TABLET_USB_ACECAD is not set CONFIG_TABLET_USB_AIPTEK=m CONFIG_TABLET_USB_HANWANG=m CONFIG_TABLET_USB_KBTAB=y CONFIG_TABLET_USB_PEGASUS=m CONFIG_TABLET_SERIAL_WACOM4=m # CONFIG_INPUT_TOUCHSCREEN is not set CONFIG_INPUT_MISC=y CONFIG_INPUT_AD714X=y # CONFIG_INPUT_AD714X_I2C is not set CONFIG_INPUT_AD714X_SPI=y # CONFIG_INPUT_ARIEL_PWRBUTTON is not set CONFIG_INPUT_ATC260X_ONKEY=m # CONFIG_INPUT_ATMEL_CAPTOUCH is not set # CONFIG_INPUT_BMA150 is not set CONFIG_INPUT_E3X0_BUTTON=m CONFIG_INPUT_MAX8925_ONKEY=m CONFIG_INPUT_MC13783_PWRBUTTON=m CONFIG_INPUT_MMA8450=y CONFIG_INPUT_GPIO_BEEPER=m # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set CONFIG_INPUT_ATI_REMOTE2=m CONFIG_INPUT_KEYSPAN_REMOTE=y CONFIG_INPUT_KXTJ9=m # CONFIG_INPUT_POWERMATE is not set # CONFIG_INPUT_YEALINK is not set CONFIG_INPUT_CM109=y CONFIG_INPUT_REGULATOR_HAPTIC=m CONFIG_INPUT_TWL6040_VIBRA=y CONFIG_INPUT_UINPUT=m # CONFIG_INPUT_PALMAS_PWRBUTTON is not set CONFIG_INPUT_PCF8574=m # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set # CONFIG_INPUT_DA7280_HAPTICS is not set # CONFIG_INPUT_DA9055_ONKEY is not set # CONFIG_INPUT_DA9063_ONKEY is not set CONFIG_INPUT_WM831X_ON=m CONFIG_INPUT_PCAP=m CONFIG_INPUT_ADXL34X=m CONFIG_INPUT_ADXL34X_I2C=m # CONFIG_INPUT_ADXL34X_SPI is not set CONFIG_INPUT_IMS_PCU=y # CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_IQS626A is not set CONFIG_INPUT_IQS7222=y # CONFIG_INPUT_CMA3000 is not set CONFIG_INPUT_IDEAPAD_SLIDEBAR=m # CONFIG_INPUT_SOC_BUTTON_ARRAY is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set CONFIG_INPUT_DRV2665_HAPTICS=m # CONFIG_INPUT_DRV2667_HAPTICS is not set # CONFIG_INPUT_HISI_POWERKEY is not set # CONFIG_INPUT_SC27XX_VIBRA is not set # CONFIG_RMI4_CORE is not set # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y CONFIG_SERIO_I8042=m CONFIG_SERIO_SERPORT=m CONFIG_SERIO_PARKBD=y CONFIG_SERIO_PCIPS2=y CONFIG_SERIO_LIBPS2=m CONFIG_SERIO_RAW=m # CONFIG_SERIO_ALTERA_PS2 is not set CONFIG_SERIO_PS2MULT=m # CONFIG_SERIO_ARC_PS2 is not set # CONFIG_SERIO_OLPC_APSP is not set # CONFIG_SERIO_SUN4I_PS2 is not set CONFIG_SERIO_GPIO_PS2=y # CONFIG_USERIO is not set CONFIG_GAMEPORT=m CONFIG_GAMEPORT_NS558=m CONFIG_GAMEPORT_L4=m # CONFIG_GAMEPORT_EMU10K1 is not set CONFIG_GAMEPORT_FM801=m # end of Hardware I/O ports # end of Input device support # # Character devices # CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_LDISC_AUTOLOAD is not set # # Serial drivers # # CONFIG_SERIAL_8250 is not set # # Non-8250 serial port support # # CONFIG_SERIAL_AMBA_PL010 is not set # CONFIG_SERIAL_ATMEL is not set # CONFIG_SERIAL_MESON is not set # CONFIG_SERIAL_CLPS711X is not set # CONFIG_SERIAL_SAMSUNG is not set # CONFIG_SERIAL_TEGRA is not set CONFIG_SERIAL_MAX3100=y # CONFIG_SERIAL_MAX310X is not set # CONFIG_SERIAL_IMX is not set CONFIG_SERIAL_UARTLITE=y # CONFIG_SERIAL_UARTLITE_CONSOLE is not set CONFIG_SERIAL_UARTLITE_NR_UARTS=1 # CONFIG_SERIAL_SH_SCI is not set CONFIG_SERIAL_CORE=y # CONFIG_SERIAL_ICOM is not set # CONFIG_SERIAL_JSM is not set # CONFIG_SERIAL_MSM is not set # CONFIG_SERIAL_VT8500 is not set # CONFIG_SERIAL_OMAP is not set # CONFIG_SERIAL_LANTIQ is not set CONFIG_SERIAL_SCCNXP=y # CONFIG_SERIAL_SCCNXP_CONSOLE is not set CONFIG_SERIAL_SC16IS7XX_CORE=y CONFIG_SERIAL_SC16IS7XX=y CONFIG_SERIAL_SC16IS7XX_I2C=y CONFIG_SERIAL_SC16IS7XX_SPI=y # CONFIG_SERIAL_TIMBERDALE is not set # CONFIG_SERIAL_BCM63XX is not set CONFIG_SERIAL_ALTERA_JTAGUART=y # CONFIG_SERIAL_ALTERA_JTAGUART_CONSOLE is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_PCH_UART is not set # CONFIG_SERIAL_MXS_AUART is not set # CONFIG_SERIAL_MPS2_UART is not set CONFIG_SERIAL_ARC=m CONFIG_SERIAL_ARC_NR_PORTS=1 # CONFIG_SERIAL_RP2 is not set # CONFIG_SERIAL_FSL_LPUART is not set CONFIG_SERIAL_FSL_LINFLEXUART=m # CONFIG_SERIAL_ST_ASC is not set CONFIG_SERIAL_MEN_Z135=m # CONFIG_SERIAL_STM32 is not set # CONFIG_SERIAL_OWL is not set # CONFIG_SERIAL_RDA is not set # CONFIG_SERIAL_LITEUART is not set # CONFIG_SERIAL_SUNPLUS is not set # end of Serial drivers # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_NOZOMI is not set # CONFIG_NULL_TTY is not set CONFIG_HVC_DRIVER=y CONFIG_RPMSG_TTY=m # CONFIG_SERIAL_DEV_BUS is not set CONFIG_PRINTER=m CONFIG_LP_CONSOLE=y CONFIG_PPDEV=m CONFIG_VIRTIO_CONSOLE=m # CONFIG_IPMI_HANDLER is not set # CONFIG_ASPEED_KCS_IPMI_BMC is not set # CONFIG_NPCM7XX_KCS_IPMI_BMC is not set # CONFIG_ASPEED_BT_IPMI_BMC is not set CONFIG_IPMB_DEVICE_INTERFACE=y CONFIG_HW_RANDOM=m CONFIG_HW_RANDOM_TIMERIOMEM=m CONFIG_HW_RANDOM_INTEL=m # CONFIG_HW_RANDOM_BA431 is not set CONFIG_HW_RANDOM_BCM2835=m CONFIG_HW_RANDOM_IPROC_RNG200=m CONFIG_HW_RANDOM_IXP4XX=m CONFIG_HW_RANDOM_OMAP=m CONFIG_HW_RANDOM_OMAP3_ROM=m # CONFIG_HW_RANDOM_VIRTIO is not set CONFIG_HW_RANDOM_NOMADIK=m CONFIG_HW_RANDOM_STM32=m CONFIG_HW_RANDOM_MESON=m CONFIG_HW_RANDOM_MTK=m CONFIG_HW_RANDOM_EXYNOS=m CONFIG_HW_RANDOM_NPCM=m CONFIG_HW_RANDOM_XIPHERA=m CONFIG_HW_RANDOM_CN10K=m CONFIG_APPLICOM=m CONFIG_DEVMEM=y CONFIG_DEVPORT=y CONFIG_HPET=y CONFIG_HPET_MMAP=y CONFIG_HPET_MMAP_DEFAULT=y # CONFIG_HANGCHECK_TIMER is not set # CONFIG_TCG_TPM is not set CONFIG_XILLYBUS_CLASS=y CONFIG_XILLYBUS=y CONFIG_XILLYBUS_PCIE=y CONFIG_XILLYUSB=y # CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set # end of Character devices # # I2C support # CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y # CONFIG_I2C_COMPAT is not set CONFIG_I2C_CHARDEV=m CONFIG_I2C_MUX=y # # Multiplexer I2C Chip support # # CONFIG_I2C_ARB_GPIO_CHALLENGE is not set CONFIG_I2C_MUX_GPIO=m # CONFIG_I2C_MUX_GPMUX is not set CONFIG_I2C_MUX_LTC4306=m CONFIG_I2C_MUX_PCA9541=m # CONFIG_I2C_MUX_PCA954x is not set # CONFIG_I2C_MUX_PINCTRL is not set CONFIG_I2C_MUX_REG=y CONFIG_I2C_MUX_MLXCPLD=y # end of Multiplexer I2C Chip support # CONFIG_I2C_HELPER_AUTO is not set CONFIG_I2C_SMBUS=y # # I2C Algorithms # CONFIG_I2C_ALGOBIT=y CONFIG_I2C_ALGOPCF=y CONFIG_I2C_ALGOPCA=y # end of I2C Algorithms # # I2C Hardware Bus support # # # PC SMBus host controller drivers # CONFIG_I2C_CCGX_UCSI=y CONFIG_I2C_ALI1535=y CONFIG_I2C_ALI1563=m CONFIG_I2C_ALI15X3=y CONFIG_I2C_AMD756=y # CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_AMD_MP2 is not set # CONFIG_I2C_HIX5HD2 is not set CONFIG_I2C_I801=y CONFIG_I2C_ISCH=y # CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_NFORCE2 is not set # CONFIG_I2C_NVIDIA_GPU is not set # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set # CONFIG_I2C_SIS96X is not set CONFIG_I2C_VIA=y # CONFIG_I2C_VIAPRO is not set # # ACPI drivers # CONFIG_I2C_SCMI=y # # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_ASPEED is not set # CONFIG_I2C_AT91 is not set # CONFIG_I2C_AXXIA is not set # CONFIG_I2C_BCM_IPROC is not set # CONFIG_I2C_BCM_KONA is not set CONFIG_I2C_BRCMSTB=y # CONFIG_I2C_CADENCE is not set CONFIG_I2C_CBUS_GPIO=m # CONFIG_I2C_DAVINCI is not set CONFIG_I2C_DESIGNWARE_CORE=y CONFIG_I2C_DESIGNWARE_SLAVE=y CONFIG_I2C_DESIGNWARE_PCI=y # CONFIG_I2C_DIGICOLOR is not set # CONFIG_I2C_EG20T is not set CONFIG_I2C_GPIO=y CONFIG_I2C_GPIO_FAULT_INJECTOR=y # CONFIG_I2C_HIGHLANDER is not set # CONFIG_I2C_HISI is not set # CONFIG_I2C_IMG is not set # CONFIG_I2C_IMX is not set # CONFIG_I2C_IMX_LPI2C is not set # CONFIG_I2C_IOP3XX is not set # CONFIG_I2C_JZ4780 is not set CONFIG_I2C_KEMPLD=y # CONFIG_I2C_MT65XX is not set # CONFIG_I2C_MT7621 is not set # CONFIG_I2C_MV64XXX is not set # CONFIG_I2C_MXS is not set # CONFIG_I2C_NPCM is not set # CONFIG_I2C_OCORES is not set # CONFIG_I2C_OMAP is not set # CONFIG_I2C_OWL is not set # CONFIG_I2C_APPLE is not set # CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_PNX is not set # CONFIG_I2C_PXA is not set # CONFIG_I2C_QCOM_CCI is not set # CONFIG_I2C_QUP is not set # CONFIG_I2C_RIIC is not set # CONFIG_I2C_RZV2M is not set # CONFIG_I2C_S3C2410 is not set # CONFIG_I2C_SH_MOBILE is not set # CONFIG_I2C_SIMTEC is not set # CONFIG_I2C_ST is not set # CONFIG_I2C_STM32F4 is not set # CONFIG_I2C_STM32F7 is not set # CONFIG_I2C_SUN6I_P2WI is not set # CONFIG_I2C_SYNQUACER is not set # CONFIG_I2C_TEGRA_BPMP is not set # CONFIG_I2C_UNIPHIER is not set # CONFIG_I2C_UNIPHIER_F is not set # CONFIG_I2C_VERSATILE is not set # CONFIG_I2C_WMT is not set # CONFIG_I2C_THUNDERX is not set CONFIG_I2C_XILINX=m # CONFIG_I2C_XLP9XX is not set # CONFIG_I2C_RCAR is not set # # External I2C/SMBus adapter drivers # # CONFIG_I2C_DIOLAN_U2C is not set CONFIG_I2C_DLN2=m # CONFIG_I2C_CP2615 is not set # CONFIG_I2C_PARPORT is not set CONFIG_I2C_ROBOTFUZZ_OSIF=m # CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_TINY_USB is not set # CONFIG_I2C_VIPERBOARD is not set # # Other I2C/SMBus bus drivers # # CONFIG_I2C_MLXCPLD is not set CONFIG_I2C_VIRTIO=m # end of I2C Hardware Bus support # CONFIG_I2C_STUB is not set CONFIG_I2C_SLAVE=y # CONFIG_I2C_SLAVE_EEPROM is not set CONFIG_I2C_SLAVE_TESTUNIT=y CONFIG_I2C_DEBUG_CORE=y CONFIG_I2C_DEBUG_ALGO=y CONFIG_I2C_DEBUG_BUS=y # end of I2C support CONFIG_I3C=y CONFIG_CDNS_I3C_MASTER=m # CONFIG_DW_I3C_MASTER is not set CONFIG_SVC_I3C_MASTER=y CONFIG_MIPI_I3C_HCI=m CONFIG_SPI=y # CONFIG_SPI_DEBUG is not set CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y # # SPI Master Controller Drivers # # CONFIG_SPI_ALTERA is not set # CONFIG_SPI_ALTERA_CORE is not set # CONFIG_SPI_AR934X is not set # CONFIG_SPI_ATH79 is not set # CONFIG_SPI_ARMADA_3700 is not set CONFIG_SPI_AXI_SPI_ENGINE=y # CONFIG_SPI_BCM2835 is not set # CONFIG_SPI_BCM2835AUX is not set # CONFIG_SPI_BCM63XX is not set # CONFIG_SPI_BCM63XX_HSSPI is not set # CONFIG_SPI_BCM_QSPI is not set CONFIG_SPI_BITBANG=y # CONFIG_SPI_BUTTERFLY is not set # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_XSPI is not set # CONFIG_SPI_CLPS711X is not set CONFIG_SPI_DESIGNWARE=m CONFIG_SPI_DW_DMA=y CONFIG_SPI_DW_PCI=m CONFIG_SPI_DW_MMIO=m # CONFIG_SPI_DW_BT1 is not set CONFIG_SPI_DLN2=m # CONFIG_SPI_EP93XX is not set # CONFIG_SPI_FSL_LPSPI is not set # CONFIG_SPI_FSL_QUADSPI is not set # CONFIG_SPI_GXP is not set # CONFIG_SPI_HISI_KUNPENG is not set # CONFIG_SPI_HISI_SFC_V3XX is not set CONFIG_SPI_NXP_FLEXSPI=m CONFIG_SPI_GPIO=m # CONFIG_SPI_IMG_SPFI is not set # CONFIG_SPI_IMX is not set # CONFIG_SPI_INGENIC is not set # CONFIG_SPI_INTEL_PCI is not set # CONFIG_SPI_INTEL_PLATFORM is not set CONFIG_SPI_LM70_LLP=m # CONFIG_SPI_LP8841_RTC is not set # CONFIG_SPI_FSL_DSPI is not set # CONFIG_SPI_MESON_SPIFC is not set CONFIG_SPI_MICROCHIP_CORE=y # CONFIG_SPI_MT65XX is not set # CONFIG_SPI_MT7621 is not set # CONFIG_SPI_MTK_NOR is not set # CONFIG_SPI_NPCM_PSPI is not set # CONFIG_SPI_LANTIQ_SSC is not set # CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_OMAP24XX is not set # CONFIG_SPI_TI_QSPI is not set # CONFIG_SPI_OMAP_100K is not set # CONFIG_SPI_ORION is not set # CONFIG_SPI_PIC32 is not set # CONFIG_SPI_PIC32_SQI is not set # CONFIG_SPI_PXA2XX is not set CONFIG_SPI_ROCKCHIP=y # CONFIG_SPI_ROCKCHIP_SFC is not set # CONFIG_SPI_RSPI is not set # CONFIG_SPI_QUP is not set # CONFIG_SPI_S3C64XX is not set CONFIG_SPI_SC18IS602=m # CONFIG_SPI_SH is not set # CONFIG_SPI_SH_HSPI is not set CONFIG_SPI_SIFIVE=y # CONFIG_SPI_SPRD is not set # CONFIG_SPI_SPRD_ADI is not set # CONFIG_SPI_STM32 is not set # CONFIG_SPI_ST_SSC4 is not set # CONFIG_SPI_SUN4I is not set # CONFIG_SPI_SUN6I is not set # CONFIG_SPI_SUNPLUS_SP7021 is not set # CONFIG_SPI_SYNQUACER is not set CONFIG_SPI_MXIC=m # CONFIG_SPI_TEGRA210_QUAD is not set # CONFIG_SPI_TEGRA114 is not set # CONFIG_SPI_TEGRA20_SFLASH is not set # CONFIG_SPI_TEGRA20_SLINK is not set # CONFIG_SPI_THUNDERX is not set # CONFIG_SPI_TOPCLIFF_PCH is not set CONFIG_SPI_XCOMM=y CONFIG_SPI_XILINX=m # CONFIG_SPI_XLP is not set # CONFIG_SPI_XTENSA_XTFPGA is not set # CONFIG_SPI_ZYNQ_QSPI is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set CONFIG_SPI_AMD=y # # SPI Multiplexer support # CONFIG_SPI_MUX=y # # SPI Protocol Masters # CONFIG_SPI_SPIDEV=y CONFIG_SPI_LOOPBACK_TEST=m CONFIG_SPI_TLE62X0=m # CONFIG_SPI_SLAVE is not set CONFIG_SPI_DYNAMIC=y # CONFIG_SPMI is not set CONFIG_HSI=y CONFIG_HSI_BOARDINFO=y # # HSI controllers # # # HSI clients # # CONFIG_HSI_CHAR is not set CONFIG_PPS=m # CONFIG_PPS_DEBUG is not set # CONFIG_NTP_PPS is not set # # PPS clients support # # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set CONFIG_PPS_CLIENT_PARPORT=m CONFIG_PPS_CLIENT_GPIO=m # # PPS generators support # # # PTP clock support # CONFIG_PTP_1588_CLOCK_OPTIONAL=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # # end of PTP clock support CONFIG_PINCTRL=y CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y CONFIG_DEBUG_PINCTRL=y CONFIG_PINCTRL_AMD=y CONFIG_PINCTRL_DA9062=m CONFIG_PINCTRL_MCP23S08_I2C=m CONFIG_PINCTRL_MCP23S08_SPI=m CONFIG_PINCTRL_MCP23S08=m # CONFIG_PINCTRL_SX150X is not set # # Intel pinctrl drivers # # CONFIG_PINCTRL_BAYTRAIL is not set # CONFIG_PINCTRL_CHERRYVIEW is not set # CONFIG_PINCTRL_LYNXPOINT is not set # CONFIG_PINCTRL_ALDERLAKE is not set # CONFIG_PINCTRL_BROXTON is not set # CONFIG_PINCTRL_CANNONLAKE is not set # CONFIG_PINCTRL_CEDARFORK is not set # CONFIG_PINCTRL_DENVERTON is not set # CONFIG_PINCTRL_ELKHARTLAKE is not set # CONFIG_PINCTRL_EMMITSBURG is not set # CONFIG_PINCTRL_GEMINILAKE is not set # CONFIG_PINCTRL_ICELAKE is not set # CONFIG_PINCTRL_JASPERLAKE is not set # CONFIG_PINCTRL_LAKEFIELD is not set # CONFIG_PINCTRL_LEWISBURG is not set # CONFIG_PINCTRL_METEORLAKE is not set # CONFIG_PINCTRL_SUNRISEPOINT is not set # CONFIG_PINCTRL_TIGERLAKE is not set # end of Intel pinctrl drivers # # MediaTek pinctrl drivers # # CONFIG_EINT_MTK is not set # end of MediaTek pinctrl drivers # CONFIG_PINCTRL_PXA25X is not set # CONFIG_PINCTRL_PXA27X is not set # CONFIG_PINCTRL_MSM is not set # CONFIG_PINCTRL_LPASS_LPI is not set # # Renesas pinctrl drivers # # CONFIG_PINCTRL_RENESAS is not set # CONFIG_PINCTRL_PFC_EMEV2 is not set # CONFIG_PINCTRL_PFC_R8A77995 is not set # CONFIG_PINCTRL_PFC_R8A7794 is not set # CONFIG_PINCTRL_PFC_R8A77990 is not set # CONFIG_PINCTRL_PFC_R8A7779 is not set # CONFIG_PINCTRL_PFC_R8A7790 is not set # CONFIG_PINCTRL_PFC_R8A77950 is not set # CONFIG_PINCTRL_PFC_R8A77951 is not set # CONFIG_PINCTRL_PFC_R8A7778 is not set # CONFIG_PINCTRL_PFC_R8A7793 is not set # CONFIG_PINCTRL_PFC_R8A7791 is not set # CONFIG_PINCTRL_PFC_R8A77965 is not set # CONFIG_PINCTRL_PFC_R8A77960 is not set # CONFIG_PINCTRL_PFC_R8A77961 is not set # CONFIG_PINCTRL_PFC_R8A779F0 is not set # CONFIG_PINCTRL_PFC_R8A7792 is not set # CONFIG_PINCTRL_PFC_R8A77980 is not set # CONFIG_PINCTRL_PFC_R8A77970 is not set # CONFIG_PINCTRL_PFC_R8A779A0 is not set # CONFIG_PINCTRL_PFC_R8A779G0 is not set # CONFIG_PINCTRL_PFC_R8A7740 is not set # CONFIG_PINCTRL_PFC_R8A73A4 is not set # CONFIG_PINCTRL_PFC_R8A77470 is not set # CONFIG_PINCTRL_PFC_R8A7745 is not set # CONFIG_PINCTRL_PFC_R8A7742 is not set # CONFIG_PINCTRL_PFC_R8A7743 is not set # CONFIG_PINCTRL_PFC_R8A7744 is not set # CONFIG_PINCTRL_PFC_R8A774C0 is not set # CONFIG_PINCTRL_PFC_R8A774E1 is not set # CONFIG_PINCTRL_PFC_R8A774A1 is not set # CONFIG_PINCTRL_PFC_R8A774B1 is not set # CONFIG_PINCTRL_PFC_SH7203 is not set # CONFIG_PINCTRL_PFC_SH7264 is not set # CONFIG_PINCTRL_PFC_SH7269 is not set # CONFIG_PINCTRL_PFC_SH7720 is not set # CONFIG_PINCTRL_PFC_SH7722 is not set # CONFIG_PINCTRL_PFC_SH7734 is not set # CONFIG_PINCTRL_PFC_SH7757 is not set # CONFIG_PINCTRL_PFC_SH7785 is not set # CONFIG_PINCTRL_PFC_SH7786 is not set # CONFIG_PINCTRL_PFC_SH73A0 is not set # CONFIG_PINCTRL_PFC_SH7723 is not set # CONFIG_PINCTRL_PFC_SH7724 is not set # CONFIG_PINCTRL_PFC_SHX3 is not set # end of Renesas pinctrl drivers CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_GPIO_ACPI=y CONFIG_GPIOLIB_IRQCHIP=y # CONFIG_DEBUG_GPIO is not set CONFIG_GPIO_CDEV=y # CONFIG_GPIO_CDEV_V1 is not set CONFIG_GPIO_GENERIC=y CONFIG_GPIO_MAX730X=y # # Memory mapped GPIO drivers # CONFIG_GPIO_AMDPT=y # CONFIG_GPIO_ATH79 is not set # CONFIG_GPIO_CLPS711X is not set CONFIG_GPIO_DWAPB=y # CONFIG_GPIO_GENERIC_PLATFORM is not set # CONFIG_GPIO_HISI is not set # CONFIG_GPIO_IOP is not set # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_MENZ127 is not set # CONFIG_GPIO_MPC8XXX is not set # CONFIG_GPIO_MXC is not set # CONFIG_GPIO_MXS is not set # CONFIG_GPIO_PXA is not set # CONFIG_GPIO_RCAR is not set # CONFIG_GPIO_ROCKCHIP is not set CONFIG_GPIO_SIOX=y # CONFIG_GPIO_THUNDERX is not set # CONFIG_GPIO_VX855 is not set # CONFIG_GPIO_XGENE_SB is not set # CONFIG_GPIO_XLP is not set CONFIG_GPIO_AMD_FCH=m # CONFIG_GPIO_IDT3243X is not set # end of Memory mapped GPIO drivers # # I2C GPIO expanders # # CONFIG_GPIO_ADP5588 is not set CONFIG_GPIO_MAX7300=y # CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set CONFIG_GPIO_PCA9570=y # CONFIG_GPIO_PCF857X is not set # CONFIG_GPIO_TPIC2810 is not set # CONFIG_GPIO_TS4900 is not set # end of I2C GPIO expanders # # MFD GPIO expanders # CONFIG_GPIO_ARIZONA=m CONFIG_GPIO_BD9571MWV=m # CONFIG_GPIO_DA9055 is not set # CONFIG_GPIO_DLN2 is not set # CONFIG_GPIO_KEMPLD is not set CONFIG_GPIO_LP3943=y # CONFIG_GPIO_PALMAS is not set # CONFIG_GPIO_RC5T583 is not set # CONFIG_GPIO_SL28CPLD is not set # CONFIG_GPIO_TPS65086 is not set # CONFIG_GPIO_TPS6586X is not set CONFIG_GPIO_TPS65912=m CONFIG_GPIO_TQMX86=m CONFIG_GPIO_TWL6040=y # CONFIG_GPIO_WM831X is not set # CONFIG_GPIO_WM8994 is not set # end of MFD GPIO expanders # # PCI GPIO expanders # # CONFIG_GPIO_AMD8111 is not set # CONFIG_GPIO_BT8XX is not set # CONFIG_GPIO_MLXBF is not set # CONFIG_GPIO_MLXBF2 is not set # CONFIG_GPIO_ML_IOH is not set # CONFIG_GPIO_PCH is not set # CONFIG_GPIO_PCI_IDIO_16 is not set CONFIG_GPIO_PCIE_IDIO_24=m CONFIG_GPIO_RDC321X=y # end of PCI GPIO expanders # # SPI GPIO expanders # CONFIG_GPIO_MAX3191X=y CONFIG_GPIO_MAX7301=y CONFIG_GPIO_MC33880=m # CONFIG_GPIO_PISOSR is not set CONFIG_GPIO_XRA1403=m # end of SPI GPIO expanders # # USB GPIO expanders # CONFIG_GPIO_VIPERBOARD=m # end of USB GPIO expanders # # Virtual GPIO drivers # CONFIG_GPIO_AGGREGATOR=m CONFIG_GPIO_MOCKUP=m # CONFIG_GPIO_VIRTIO is not set CONFIG_GPIO_SIM=m # end of Virtual GPIO drivers CONFIG_W1=y # # 1-wire Bus Masters # CONFIG_W1_MASTER_MATROX=y CONFIG_W1_MASTER_DS2490=y CONFIG_W1_MASTER_DS2482=y # CONFIG_W1_MASTER_MXC is not set CONFIG_W1_MASTER_DS1WM=y # CONFIG_W1_MASTER_GPIO is not set CONFIG_W1_MASTER_SGI=y # end of 1-wire Bus Masters # # 1-wire Slaves # # CONFIG_W1_SLAVE_THERM is not set CONFIG_W1_SLAVE_SMEM=y CONFIG_W1_SLAVE_DS2405=m CONFIG_W1_SLAVE_DS2408=y CONFIG_W1_SLAVE_DS2408_READBACK=y # CONFIG_W1_SLAVE_DS2413 is not set # CONFIG_W1_SLAVE_DS2406 is not set CONFIG_W1_SLAVE_DS2423=y CONFIG_W1_SLAVE_DS2805=y CONFIG_W1_SLAVE_DS2430=m CONFIG_W1_SLAVE_DS2431=m CONFIG_W1_SLAVE_DS2433=y CONFIG_W1_SLAVE_DS2433_CRC=y # CONFIG_W1_SLAVE_DS2438 is not set CONFIG_W1_SLAVE_DS250X=m CONFIG_W1_SLAVE_DS2780=y CONFIG_W1_SLAVE_DS2781=m CONFIG_W1_SLAVE_DS28E04=m CONFIG_W1_SLAVE_DS28E17=m # end of 1-wire Slaves # CONFIG_POWER_RESET is not set CONFIG_POWER_SUPPLY=y CONFIG_POWER_SUPPLY_DEBUG=y CONFIG_PDA_POWER=m # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_IP5XXX_POWER is not set CONFIG_MAX8925_POWER=y # CONFIG_WM831X_BACKUP is not set CONFIG_WM831X_POWER=m # CONFIG_TEST_POWER is not set CONFIG_CHARGER_ADP5061=y # CONFIG_BATTERY_ACT8945A is not set CONFIG_BATTERY_CW2015=m # CONFIG_BATTERY_DS2760 is not set CONFIG_BATTERY_DS2780=y CONFIG_BATTERY_DS2781=m CONFIG_BATTERY_DS2782=y # CONFIG_BATTERY_SAMSUNG_SDI is not set CONFIG_BATTERY_SBS=y # CONFIG_CHARGER_SBS is not set CONFIG_MANAGER_SBS=y CONFIG_BATTERY_BQ27XXX=y CONFIG_BATTERY_BQ27XXX_I2C=y CONFIG_BATTERY_BQ27XXX_HDQ=m # CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set # CONFIG_CHARGER_DA9150 is not set CONFIG_BATTERY_DA9150=y CONFIG_BATTERY_MAX17040=m CONFIG_BATTERY_MAX17042=y # CONFIG_BATTERY_MAX1721X is not set # CONFIG_CHARGER_ISP1704 is not set CONFIG_CHARGER_MAX8903=y CONFIG_CHARGER_LP8727=m # CONFIG_CHARGER_LP8788 is not set # CONFIG_CHARGER_GPIO is not set CONFIG_CHARGER_MANAGER=m CONFIG_CHARGER_LT3651=y # CONFIG_CHARGER_LTC4162L is not set # CONFIG_CHARGER_MAX14577 is not set # CONFIG_CHARGER_MAX77693 is not set CONFIG_CHARGER_MAX77976=m # CONFIG_CHARGER_MAX8998 is not set # CONFIG_CHARGER_MT6360 is not set CONFIG_CHARGER_BQ2415X=m CONFIG_CHARGER_BQ24190=y CONFIG_CHARGER_BQ24257=y CONFIG_CHARGER_BQ24735=y CONFIG_CHARGER_BQ2515X=y # CONFIG_CHARGER_BQ25890 is not set CONFIG_CHARGER_BQ25980=y CONFIG_CHARGER_BQ256XX=y # CONFIG_CHARGER_SMB347 is not set # CONFIG_CHARGER_TPS65090 is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set CONFIG_BATTERY_GOLDFISH=m CONFIG_BATTERY_RT5033=y CONFIG_CHARGER_RT9455=y # CONFIG_CHARGER_SC2731 is not set # CONFIG_FUEL_GAUGE_SC27XX is not set CONFIG_CHARGER_BD99954=m CONFIG_BATTERY_UG3105=y CONFIG_HWMON=m CONFIG_HWMON_VID=m CONFIG_HWMON_DEBUG_CHIP=y # # Native drivers # CONFIG_SENSORS_AD7314=m # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set CONFIG_SENSORS_ADM1021=m CONFIG_SENSORS_ADM1025=m CONFIG_SENSORS_ADM1026=m CONFIG_SENSORS_ADM1029=m CONFIG_SENSORS_ADM1031=m # CONFIG_SENSORS_ADM1177 is not set CONFIG_SENSORS_ADM9240=m # CONFIG_SENSORS_ADT7310 is not set # CONFIG_SENSORS_ADT7410 is not set # CONFIG_SENSORS_ADT7411 is not set CONFIG_SENSORS_ADT7462=m CONFIG_SENSORS_ADT7470=m # CONFIG_SENSORS_ADT7475 is not set CONFIG_SENSORS_AHT10=m CONFIG_SENSORS_AS370=m CONFIG_SENSORS_ASC7621=m CONFIG_SENSORS_AXI_FAN_CONTROL=m # CONFIG_SENSORS_ASB100 is not set # CONFIG_SENSORS_ASPEED is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_BT1_PVT is not set CONFIG_SENSORS_CORSAIR_CPRO=m CONFIG_SENSORS_CORSAIR_PSU=m # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set CONFIG_SENSORS_DA9055=m # CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_SPARX5 is not set CONFIG_SENSORS_F71805F=m CONFIG_SENSORS_F71882FG=m # CONFIG_SENSORS_F75375S is not set CONFIG_SENSORS_MC13783_ADC=m # CONFIG_SENSORS_FSCHMD is not set # CONFIG_SENSORS_FTSTEUTATES is not set CONFIG_SENSORS_GL518SM=m # CONFIG_SENSORS_GL520SM is not set CONFIG_SENSORS_G760A=m CONFIG_SENSORS_G762=m CONFIG_SENSORS_HIH6130=m # CONFIG_SENSORS_IIO_HWMON is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set CONFIG_SENSORS_POWR1220=m # CONFIG_SENSORS_LAN966X is not set CONFIG_SENSORS_LINEAGE=m CONFIG_SENSORS_LTC2945=m CONFIG_SENSORS_LTC2947=m CONFIG_SENSORS_LTC2947_I2C=m CONFIG_SENSORS_LTC2947_SPI=m CONFIG_SENSORS_LTC2990=m # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set CONFIG_SENSORS_LTC4215=m CONFIG_SENSORS_LTC4222=m CONFIG_SENSORS_LTC4245=m CONFIG_SENSORS_LTC4260=m CONFIG_SENSORS_LTC4261=m CONFIG_SENSORS_MAX1111=m CONFIG_SENSORS_MAX127=m CONFIG_SENSORS_MAX16065=m CONFIG_SENSORS_MAX1619=m # CONFIG_SENSORS_MAX1668 is not set CONFIG_SENSORS_MAX197=m CONFIG_SENSORS_MAX31722=m CONFIG_SENSORS_MAX31730=m CONFIG_SENSORS_MAX6620=m CONFIG_SENSORS_MAX6621=m CONFIG_SENSORS_MAX6639=m CONFIG_SENSORS_MAX6642=m # CONFIG_SENSORS_MAX6650 is not set CONFIG_SENSORS_MAX6697=m # CONFIG_SENSORS_MAX31790 is not set # CONFIG_SENSORS_MCP3021 is not set CONFIG_SENSORS_TC654=m # CONFIG_SENSORS_TPS23861 is not set # CONFIG_SENSORS_MENF21BMC_HWMON is not set CONFIG_SENSORS_MR75203=m # CONFIG_SENSORS_ADCXX is not set CONFIG_SENSORS_LM63=m CONFIG_SENSORS_LM70=m CONFIG_SENSORS_LM73=m CONFIG_SENSORS_LM75=m CONFIG_SENSORS_LM77=m # CONFIG_SENSORS_LM78 is not set # CONFIG_SENSORS_LM80 is not set # CONFIG_SENSORS_LM83 is not set CONFIG_SENSORS_LM85=m CONFIG_SENSORS_LM87=m # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_LM93 is not set CONFIG_SENSORS_LM95234=m CONFIG_SENSORS_LM95241=m CONFIG_SENSORS_LM95245=m # CONFIG_SENSORS_PC87360 is not set CONFIG_SENSORS_PC87427=m # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set CONFIG_SENSORS_NCT6775_CORE=m # CONFIG_SENSORS_NCT6775 is not set CONFIG_SENSORS_NCT6775_I2C=m CONFIG_SENSORS_NCT7802=m CONFIG_SENSORS_NCT7904=m # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set CONFIG_PMBUS=m CONFIG_SENSORS_PMBUS=m CONFIG_SENSORS_ADM1266=m # CONFIG_SENSORS_ADM1275 is not set CONFIG_SENSORS_BEL_PFE=m # CONFIG_SENSORS_BPA_RS600 is not set CONFIG_SENSORS_DELTA_AHE50DC_FAN=m CONFIG_SENSORS_FSP_3Y=m CONFIG_SENSORS_IBM_CFFPS=m CONFIG_SENSORS_DPS920AB=m CONFIG_SENSORS_INSPUR_IPSPS=m CONFIG_SENSORS_IR35221=m CONFIG_SENSORS_IR36021=m CONFIG_SENSORS_IR38064=m CONFIG_SENSORS_IR38064_REGULATOR=y CONFIG_SENSORS_IRPS5401=m CONFIG_SENSORS_ISL68137=m CONFIG_SENSORS_LM25066=m CONFIG_SENSORS_LM25066_REGULATOR=y CONFIG_SENSORS_LT7182S=m # CONFIG_SENSORS_LTC2978 is not set # CONFIG_SENSORS_LTC3815 is not set # CONFIG_SENSORS_MAX15301 is not set CONFIG_SENSORS_MAX16064=m # CONFIG_SENSORS_MAX16601 is not set CONFIG_SENSORS_MAX20730=m CONFIG_SENSORS_MAX20751=m # CONFIG_SENSORS_MAX31785 is not set CONFIG_SENSORS_MAX34440=m # CONFIG_SENSORS_MAX8688 is not set CONFIG_SENSORS_MP2888=m CONFIG_SENSORS_MP2975=m CONFIG_SENSORS_MP5023=m # CONFIG_SENSORS_PIM4328 is not set CONFIG_SENSORS_PLI1209BC=m # CONFIG_SENSORS_PLI1209BC_REGULATOR is not set # CONFIG_SENSORS_PM6764TR is not set # CONFIG_SENSORS_PXE1610 is not set # CONFIG_SENSORS_Q54SJ108A2 is not set CONFIG_SENSORS_STPDDC60=m CONFIG_SENSORS_TPS40422=m # CONFIG_SENSORS_TPS53679 is not set CONFIG_SENSORS_UCD9000=m # CONFIG_SENSORS_UCD9200 is not set CONFIG_SENSORS_XDPE152=m CONFIG_SENSORS_XDPE122=m CONFIG_SENSORS_XDPE122_REGULATOR=y # CONFIG_SENSORS_ZL6100 is not set # CONFIG_SENSORS_PWM_FAN is not set # CONFIG_SENSORS_RASPBERRYPI_HWMON is not set # CONFIG_SENSORS_SL28CPLD is not set CONFIG_SENSORS_SBTSI=m CONFIG_SENSORS_SBRMI=m CONFIG_SENSORS_SHT15=m CONFIG_SENSORS_SHT21=m CONFIG_SENSORS_SHT3x=m CONFIG_SENSORS_SHT4x=m CONFIG_SENSORS_SHTC1=m CONFIG_SENSORS_SIS5595=m # CONFIG_SENSORS_SY7636A is not set CONFIG_SENSORS_DME1737=m CONFIG_SENSORS_EMC1403=m CONFIG_SENSORS_EMC2103=m # CONFIG_SENSORS_EMC6W201 is not set CONFIG_SENSORS_SMSC47M1=m # CONFIG_SENSORS_SMSC47M192 is not set CONFIG_SENSORS_SMSC47B397=m CONFIG_SENSORS_SCH56XX_COMMON=m CONFIG_SENSORS_SCH5627=m CONFIG_SENSORS_SCH5636=m CONFIG_SENSORS_STTS751=m CONFIG_SENSORS_SMM665=m CONFIG_SENSORS_ADC128D818=m CONFIG_SENSORS_ADS7828=m CONFIG_SENSORS_ADS7871=m # CONFIG_SENSORS_AMC6821 is not set CONFIG_SENSORS_INA209=m CONFIG_SENSORS_INA2XX=m CONFIG_SENSORS_INA238=m CONFIG_SENSORS_INA3221=m CONFIG_SENSORS_TC74=m CONFIG_SENSORS_THMC50=m CONFIG_SENSORS_TMP102=m CONFIG_SENSORS_TMP103=m CONFIG_SENSORS_TMP108=m CONFIG_SENSORS_TMP401=m CONFIG_SENSORS_TMP421=m # CONFIG_SENSORS_TMP464 is not set CONFIG_SENSORS_TMP513=m CONFIG_SENSORS_VIA686A=m # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set CONFIG_SENSORS_W83773G=m # CONFIG_SENSORS_W83781D is not set CONFIG_SENSORS_W83791D=m CONFIG_SENSORS_W83792D=m # CONFIG_SENSORS_W83793 is not set CONFIG_SENSORS_W83795=m # CONFIG_SENSORS_W83795_FANCTRL is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83L786NG is not set CONFIG_SENSORS_W83627HF=m CONFIG_SENSORS_W83627EHF=m CONFIG_SENSORS_WM831X=m CONFIG_SENSORS_INTEL_M10_BMC_HWMON=m # # ACPI drivers # CONFIG_SENSORS_ACPI_POWER=m CONFIG_THERMAL=y CONFIG_THERMAL_STATISTICS=y CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_WRITABLE_TRIPS=y # CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE=y # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set CONFIG_THERMAL_GOV_FAIR_SHARE=y # CONFIG_THERMAL_GOV_STEP_WISE is not set CONFIG_THERMAL_GOV_BANG_BANG=y CONFIG_THERMAL_GOV_USER_SPACE=y CONFIG_THERMAL_EMULATION=y # CONFIG_K3_THERMAL is not set # CONFIG_ROCKCHIP_THERMAL is not set # CONFIG_RCAR_THERMAL is not set CONFIG_MTK_THERMAL=y # # Intel thermal drivers # # # ACPI INT340X thermal drivers # # end of ACPI INT340X thermal drivers # CONFIG_INTEL_MENLOW is not set # end of Intel thermal drivers # # Broadcom thermal drivers # # CONFIG_BRCMSTB_THERMAL is not set # CONFIG_BCM_NS_THERMAL is not set # CONFIG_BCM_SR_THERMAL is not set # end of Broadcom thermal drivers # # Texas Instruments thermal drivers # # CONFIG_TI_SOC_THERMAL is not set # end of Texas Instruments thermal drivers # # Samsung thermal drivers # # end of Samsung thermal drivers # # NVIDIA Tegra thermal drivers # # CONFIG_TEGRA_SOCTHERM is not set # CONFIG_TEGRA_BPMP_THERMAL is not set # CONFIG_TEGRA30_TSENSOR is not set # end of NVIDIA Tegra thermal drivers CONFIG_GENERIC_ADC_THERMAL=m # # Qualcomm thermal drivers # # end of Qualcomm thermal drivers # CONFIG_SPRD_THERMAL is not set CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y CONFIG_WATCHDOG_NOWAYOUT=y CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_OPEN_TIMEOUT=0 CONFIG_WATCHDOG_SYSFS=y # CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set # # Watchdog Pretimeout Governors # # CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set # # Watchdog Device Drivers # CONFIG_SOFT_WATCHDOG=m # CONFIG_DA9052_WATCHDOG is not set CONFIG_DA9055_WATCHDOG=m CONFIG_DA9063_WATCHDOG=m CONFIG_DA9062_WATCHDOG=m # CONFIG_MENF21BMC_WATCHDOG is not set CONFIG_MENZ069_WATCHDOG=m CONFIG_WDAT_WDT=m CONFIG_WM831X_WATCHDOG=m CONFIG_XILINX_WATCHDOG=m CONFIG_ZIIRAVE_WATCHDOG=y # CONFIG_SL28CPLD_WATCHDOG is not set # CONFIG_ARMADA_37XX_WATCHDOG is not set # CONFIG_AT91RM9200_WATCHDOG is not set # CONFIG_AT91SAM9X_WATCHDOG is not set # CONFIG_SAMA5D4_WATCHDOG is not set CONFIG_CADENCE_WATCHDOG=y # CONFIG_FTWDT010_WATCHDOG is not set # CONFIG_S3C2410_WATCHDOG is not set # CONFIG_DW_WATCHDOG is not set # CONFIG_EP93XX_WATCHDOG is not set # CONFIG_OMAP_WATCHDOG is not set # CONFIG_PNX4008_WATCHDOG is not set # CONFIG_DAVINCI_WATCHDOG is not set # CONFIG_K3_RTI_WATCHDOG is not set # CONFIG_RN5T618_WATCHDOG is not set # CONFIG_SUNXI_WATCHDOG is not set # CONFIG_NPCM7XX_WATCHDOG is not set # CONFIG_STMP3XXX_RTC_WATCHDOG is not set # CONFIG_TS72XX_WATCHDOG is not set CONFIG_MAX63XX_WATCHDOG=m # CONFIG_MAX77620_WATCHDOG is not set # CONFIG_IMX2_WDT is not set # CONFIG_IMX7ULP_WDT is not set # CONFIG_MOXART_WDT is not set # CONFIG_TEGRA_WATCHDOG is not set # CONFIG_QCOM_WDT is not set # CONFIG_MESON_GXBB_WATCHDOG is not set # CONFIG_MESON_WATCHDOG is not set # CONFIG_MEDIATEK_WATCHDOG is not set # CONFIG_DIGICOLOR_WATCHDOG is not set # CONFIG_LPC18XX_WATCHDOG is not set # CONFIG_RENESAS_WDT is not set # CONFIG_RENESAS_RZAWDT is not set # CONFIG_RENESAS_RZN1WDT is not set # CONFIG_RENESAS_RZG2LWDT is not set # CONFIG_ASPEED_WATCHDOG is not set # CONFIG_SPRD_WATCHDOG is not set # CONFIG_VISCONTI_WATCHDOG is not set # CONFIG_MSC313E_WATCHDOG is not set # CONFIG_APPLE_WATCHDOG is not set # CONFIG_SUNPLUS_WATCHDOG is not set CONFIG_ALIM7101_WDT=y # CONFIG_SC520_WDT is not set CONFIG_I6300ESB_WDT=y CONFIG_ITCO_WDT=y CONFIG_ITCO_VENDOR_SUPPORT=y CONFIG_KEMPLD_WDT=y # CONFIG_RDC321X_WDT is not set # CONFIG_BCM47XX_WDT is not set # CONFIG_BCM_KONA_WDT is not set # CONFIG_BCM7038_WDT is not set # CONFIG_IMGPDC_WDT is not set # CONFIG_MPC5200_WDT is not set # CONFIG_MEN_A21_WDT is not set # CONFIG_UML_WATCHDOG is not set # # PCI-based Watchdog Cards # # CONFIG_PCIPCWATCHDOG is not set CONFIG_WDTPCI=y # # USB-based Watchdog Cards # CONFIG_USBPCWATCHDOG=y CONFIG_SSB_POSSIBLE=y # CONFIG_SSB is not set CONFIG_BCMA_POSSIBLE=y CONFIG_BCMA=y CONFIG_BCMA_HOST_PCI_POSSIBLE=y # CONFIG_BCMA_HOST_PCI is not set CONFIG_BCMA_HOST_SOC=y # CONFIG_BCMA_DRIVER_PCI is not set # CONFIG_BCMA_DRIVER_MIPS is not set # CONFIG_BCMA_SFLASH is not set CONFIG_BCMA_DRIVER_GMAC_CMN=y # CONFIG_BCMA_DRIVER_GPIO is not set CONFIG_BCMA_DEBUG=y # # Multifunction device drivers # CONFIG_MFD_CORE=y # CONFIG_MFD_SUN4I_GPADC is not set CONFIG_MFD_AS3711=y # CONFIG_PMIC_ADP5520 is not set CONFIG_MFD_AAT2870_CORE=y # CONFIG_MFD_AT91_USART is not set CONFIG_MFD_BCM590XX=m CONFIG_MFD_BD9571MWV=m # CONFIG_MFD_AXP20X_I2C is not set # CONFIG_MFD_MADERA is not set # CONFIG_MFD_ASIC3 is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_DA9052_SPI is not set # CONFIG_MFD_DA9052_I2C is not set CONFIG_MFD_DA9055=y CONFIG_MFD_DA9062=m CONFIG_MFD_DA9063=m CONFIG_MFD_DA9150=y CONFIG_MFD_DLN2=m # CONFIG_MFD_ENE_KB3930 is not set # CONFIG_MFD_EXYNOS_LPASS is not set CONFIG_MFD_MC13XXX=m # CONFIG_MFD_MC13XXX_SPI is not set CONFIG_MFD_MC13XXX_I2C=m CONFIG_MFD_MP2629=y # CONFIG_MFD_MXS_LRADC is not set # CONFIG_MFD_MX25_TSADC is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set CONFIG_LPC_ICH=y CONFIG_LPC_SCH=y CONFIG_MFD_IQS62X=y # CONFIG_MFD_JANZ_CMODIO is not set CONFIG_MFD_KEMPLD=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set CONFIG_MFD_MAX14577=m # CONFIG_MFD_MAX77620 is not set # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set CONFIG_MFD_MAX77693=y # CONFIG_MFD_MAX77714 is not set CONFIG_MFD_MAX77843=y CONFIG_MFD_MAX8907=y CONFIG_MFD_MAX8925=y # CONFIG_MFD_MAX8997 is not set CONFIG_MFD_MAX8998=y CONFIG_MFD_MT6360=y # CONFIG_MFD_MT6397 is not set CONFIG_MFD_MENF21BMC=y CONFIG_EZX_PCAP=y # CONFIG_MFD_CPCAP is not set CONFIG_MFD_VIPERBOARD=m # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_MFD_PM8XXX is not set CONFIG_MFD_RDC321X=y CONFIG_MFD_RT4831=m CONFIG_MFD_RT5033=y CONFIG_MFD_RC5T583=y # CONFIG_MFD_SEC_CORE is not set # CONFIG_MFD_SI476X_CORE is not set CONFIG_MFD_SIMPLE_MFD_I2C=y # CONFIG_MFD_SL28CPLD is not set # CONFIG_MFD_SM501 is not set CONFIG_MFD_SKY81452=y # CONFIG_MFD_SC27XX_PMIC is not set # CONFIG_ABX500_CORE is not set # CONFIG_MFD_SUN6I_PRCM is not set CONFIG_MFD_SYSCON=y CONFIG_MFD_TI_AM335X_TSCADC=m CONFIG_MFD_LP3943=y CONFIG_MFD_LP8788=y CONFIG_MFD_TI_LMU=y CONFIG_MFD_PALMAS=y CONFIG_TPS6105X=m # CONFIG_TPS65010 is not set CONFIG_TPS6507X=m CONFIG_MFD_TPS65086=y CONFIG_MFD_TPS65090=y # CONFIG_MFD_TI_LP873X is not set CONFIG_MFD_TPS6586X=y # CONFIG_MFD_TPS65910 is not set CONFIG_MFD_TPS65912=y CONFIG_MFD_TPS65912_I2C=y CONFIG_MFD_TPS65912_SPI=m # CONFIG_TWL4030_CORE is not set CONFIG_TWL6040_CORE=y CONFIG_MFD_WL1273_CORE=y CONFIG_MFD_LM3533=m # CONFIG_MFD_TIMBERDALE is not set CONFIG_MFD_TQMX86=y CONFIG_MFD_VX855=y CONFIG_MFD_ARIZONA=m CONFIG_MFD_ARIZONA_I2C=m # CONFIG_MFD_ARIZONA_SPI is not set CONFIG_MFD_CS47L24=y # CONFIG_MFD_WM5102 is not set CONFIG_MFD_WM5110=y # CONFIG_MFD_WM8997 is not set CONFIG_MFD_WM8998=y # CONFIG_MFD_WM8400 is not set CONFIG_MFD_WM831X=y CONFIG_MFD_WM831X_I2C=y # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_WM8350_I2C is not set CONFIG_MFD_WM8994=m # CONFIG_MFD_STW481X is not set # CONFIG_MFD_STM32_LPTIMER is not set # CONFIG_MFD_STM32_TIMERS is not set # CONFIG_MFD_STMFX is not set CONFIG_MFD_ATC260X=y CONFIG_MFD_ATC260X_I2C=y # CONFIG_MFD_KHADAS_MCU is not set # CONFIG_MFD_ACER_A500_EC is not set CONFIG_MFD_INTEL_M10_BMC=m # end of Multifunction device drivers CONFIG_REGULATOR=y CONFIG_REGULATOR_DEBUG=y CONFIG_REGULATOR_FIXED_VOLTAGE=m CONFIG_REGULATOR_VIRTUAL_CONSUMER=m CONFIG_REGULATOR_USERSPACE_CONSUMER=y CONFIG_REGULATOR_88PG86X=y CONFIG_REGULATOR_ACT8865=y CONFIG_REGULATOR_AD5398=m # CONFIG_REGULATOR_ANATOP is not set # CONFIG_REGULATOR_AAT2870 is not set CONFIG_REGULATOR_AS3711=y CONFIG_REGULATOR_ATC260X=y CONFIG_REGULATOR_BCM590XX=m # CONFIG_REGULATOR_BD9571MWV is not set # CONFIG_REGULATOR_DA9055 is not set # CONFIG_REGULATOR_DA9062 is not set CONFIG_REGULATOR_DA9210=m CONFIG_REGULATOR_DA9211=m CONFIG_REGULATOR_FAN53555=y # CONFIG_REGULATOR_FAN53880 is not set CONFIG_REGULATOR_GPIO=y CONFIG_REGULATOR_ISL9305=m # CONFIG_REGULATOR_ISL6271A is not set CONFIG_REGULATOR_LM363X=m CONFIG_REGULATOR_LP3971=y CONFIG_REGULATOR_LP3972=y CONFIG_REGULATOR_LP872X=y CONFIG_REGULATOR_LP8755=m CONFIG_REGULATOR_LP8788=y CONFIG_REGULATOR_LTC3589=m CONFIG_REGULATOR_LTC3676=y CONFIG_REGULATOR_MAX14577=m CONFIG_REGULATOR_MAX1586=y # CONFIG_REGULATOR_MAX77620 is not set # CONFIG_REGULATOR_MAX77650 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set CONFIG_REGULATOR_MAX8893=y CONFIG_REGULATOR_MAX8907=m CONFIG_REGULATOR_MAX8925=y CONFIG_REGULATOR_MAX8952=y CONFIG_REGULATOR_MAX8998=m CONFIG_REGULATOR_MAX20086=y # CONFIG_REGULATOR_MAX77686 is not set CONFIG_REGULATOR_MAX77693=y # CONFIG_REGULATOR_MAX77802 is not set CONFIG_REGULATOR_MAX77826=y CONFIG_REGULATOR_MC13XXX_CORE=m # CONFIG_REGULATOR_MC13783 is not set CONFIG_REGULATOR_MC13892=m CONFIG_REGULATOR_MP8859=m # CONFIG_REGULATOR_MP886X is not set CONFIG_REGULATOR_MT6311=m CONFIG_REGULATOR_MT6360=y CONFIG_REGULATOR_PALMAS=y # CONFIG_REGULATOR_PBIAS is not set CONFIG_REGULATOR_PCA9450=m CONFIG_REGULATOR_PCAP=y CONFIG_REGULATOR_PV88060=m CONFIG_REGULATOR_PV88080=m CONFIG_REGULATOR_PV88090=y # CONFIG_REGULATOR_QCOM_RPMH is not set # CONFIG_REGULATOR_QCOM_SPMI is not set # CONFIG_REGULATOR_QCOM_USB_VBUS is not set CONFIG_REGULATOR_RC5T583=y CONFIG_REGULATOR_RT4801=m # CONFIG_REGULATOR_RT4831 is not set # CONFIG_REGULATOR_RT5033 is not set CONFIG_REGULATOR_RT5190A=y # CONFIG_REGULATOR_RT5759 is not set # CONFIG_REGULATOR_RT6160 is not set CONFIG_REGULATOR_RT6245=y # CONFIG_REGULATOR_RTQ2134 is not set # CONFIG_REGULATOR_RTMV20 is not set CONFIG_REGULATOR_RTQ6752=m # CONFIG_REGULATOR_S2MPA01 is not set # CONFIG_REGULATOR_S2MPS11 is not set # CONFIG_REGULATOR_S5M8767 is not set # CONFIG_REGULATOR_SC2731 is not set CONFIG_REGULATOR_SKY81452=m CONFIG_REGULATOR_SLG51000=y # CONFIG_REGULATOR_STM32_BOOSTER is not set # CONFIG_REGULATOR_STM32_VREFBUF is not set # CONFIG_REGULATOR_STM32_PWR is not set # CONFIG_REGULATOR_TI_ABB is not set # CONFIG_REGULATOR_STW481X_VMMC is not set CONFIG_REGULATOR_SY7636A=y # CONFIG_REGULATOR_SY8106A is not set # CONFIG_REGULATOR_SY8824X is not set # CONFIG_REGULATOR_SY8827N is not set CONFIG_REGULATOR_TPS51632=m CONFIG_REGULATOR_TPS6105X=m CONFIG_REGULATOR_TPS62360=y CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS6507X=m CONFIG_REGULATOR_TPS65086=m # CONFIG_REGULATOR_TPS65090 is not set # CONFIG_REGULATOR_TPS65132 is not set CONFIG_REGULATOR_TPS6524X=m CONFIG_REGULATOR_TPS6586X=m CONFIG_REGULATOR_TPS65912=m # CONFIG_REGULATOR_TPS68470 is not set CONFIG_REGULATOR_WM831X=m CONFIG_REGULATOR_WM8994=m # CONFIG_REGULATOR_QCOM_LABIBB is not set # CONFIG_RC_CORE is not set CONFIG_CEC_CORE=y CONFIG_CEC_NOTIFIER=y # # CEC support # CONFIG_MEDIA_CEC_SUPPORT=y CONFIG_CEC_CH7322=y # CONFIG_CEC_MESON_AO is not set # CONFIG_CEC_GPIO is not set # CONFIG_CEC_SAMSUNG_S5P is not set # CONFIG_CEC_STI is not set # CONFIG_CEC_STM32 is not set # CONFIG_CEC_TEGRA is not set # CONFIG_CEC_SECO is not set CONFIG_USB_PULSE8_CEC=m # CONFIG_USB_RAINSHADOW_CEC is not set # end of CEC support # CONFIG_MEDIA_SUPPORT is not set # # Graphics support # CONFIG_APERTURE_HELPERS=y CONFIG_AGP=m CONFIG_AGP_I460=m CONFIG_AGP_HP_ZX1=m # CONFIG_IMX_IPUV3_CORE is not set CONFIG_DRM=m CONFIG_DRM_MIPI_DBI=m # CONFIG_DRM_DEBUG_SELFTEST is not set CONFIG_DRM_KMS_HELPER=m # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set CONFIG_DRM_DISPLAY_HELPER=m CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y # CONFIG_DRM_DP_AUX_CHARDEV is not set # CONFIG_DRM_DP_CEC is not set CONFIG_DRM_TTM=m CONFIG_DRM_VRAM_HELPER=m CONFIG_DRM_TTM_HELPER=m CONFIG_DRM_GEM_CMA_HELPER=m CONFIG_DRM_GEM_SHMEM_HELPER=m # # I2C encoder or helper chips # CONFIG_DRM_I2C_CH7006=m # CONFIG_DRM_I2C_SIL164 is not set CONFIG_DRM_I2C_NXP_TDA998X=m CONFIG_DRM_I2C_NXP_TDA9950=m # end of I2C encoder or helper chips # # ARM devices # # end of ARM devices CONFIG_DRM_RADEON=m # CONFIG_DRM_RADEON_USERPTR is not set # CONFIG_DRM_AMDGPU is not set CONFIG_DRM_NOUVEAU=m # CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT is not set CONFIG_NOUVEAU_DEBUG=5 CONFIG_NOUVEAU_DEBUG_DEFAULT=3 CONFIG_NOUVEAU_DEBUG_MMU=y # CONFIG_NOUVEAU_DEBUG_PUSH is not set CONFIG_DRM_NOUVEAU_BACKLIGHT=y # CONFIG_DRM_KMB_DISPLAY is not set CONFIG_DRM_VGEM=m CONFIG_DRM_VKMS=m CONFIG_DRM_UDL=m CONFIG_DRM_AST=m CONFIG_DRM_MGAG200=m CONFIG_DRM_QXL=m CONFIG_DRM_PANEL=y # # Display Panels # # CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set # end of Display Panels CONFIG_DRM_BRIDGE=y CONFIG_DRM_PANEL_BRIDGE=y # # Display Interface Bridges # CONFIG_DRM_ANALOGIX_ANX78XX=m CONFIG_DRM_ANALOGIX_DP=m # end of Display Interface Bridges # CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_HISI_HIBMC is not set # CONFIG_DRM_LOGICVC is not set # CONFIG_DRM_BOCHS is not set CONFIG_DRM_CIRRUS_QEMU=m CONFIG_DRM_GM12U320=m CONFIG_DRM_PANEL_MIPI_DBI=m CONFIG_DRM_SIMPLEDRM=m CONFIG_TINYDRM_HX8357D=m CONFIG_TINYDRM_ILI9163=m CONFIG_TINYDRM_ILI9225=m CONFIG_TINYDRM_ILI9341=m CONFIG_TINYDRM_ILI9486=m # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set CONFIG_TINYDRM_ST7586=m CONFIG_TINYDRM_ST7735R=m # CONFIG_DRM_PANFROST is not set CONFIG_DRM_GUD=m CONFIG_DRM_SSD130X=m # CONFIG_DRM_SSD130X_I2C is not set # CONFIG_DRM_SSD130X_SPI is not set CONFIG_DRM_LEGACY=y CONFIG_DRM_TDFX=m # CONFIG_DRM_R128 is not set CONFIG_DRM_MGA=m # CONFIG_DRM_SIS is not set CONFIG_DRM_VIA=m # CONFIG_DRM_SAVAGE is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=m CONFIG_DRM_NOMODESET=y # # Frame buffer Devices # CONFIG_FB_CMDLINE=y # CONFIG_FB is not set # CONFIG_MMP_DISP is not set # end of Frame buffer Devices # # Backlight & LCD device support # CONFIG_LCD_CLASS_DEVICE=m CONFIG_LCD_L4F00242T03=m CONFIG_LCD_LMS283GF05=m CONFIG_LCD_LTV350QV=m CONFIG_LCD_ILI922X=m # CONFIG_LCD_ILI9320 is not set CONFIG_LCD_TDO24M=m # CONFIG_LCD_VGG2432A4 is not set CONFIG_LCD_PLATFORM=m CONFIG_LCD_AMS369FG06=m # CONFIG_LCD_LMS501KF03 is not set # CONFIG_LCD_HX8357 is not set CONFIG_LCD_OTM3225A=m CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set # CONFIG_BACKLIGHT_LM3533 is not set # CONFIG_BACKLIGHT_OMAP1 is not set CONFIG_BACKLIGHT_MAX8925=m CONFIG_BACKLIGHT_QCOM_WLED=y CONFIG_BACKLIGHT_RT4831=m CONFIG_BACKLIGHT_WM831X=m CONFIG_BACKLIGHT_ADP8860=y CONFIG_BACKLIGHT_ADP8870=m CONFIG_BACKLIGHT_AAT2870=y CONFIG_BACKLIGHT_LM3639=y # CONFIG_BACKLIGHT_SKY81452 is not set CONFIG_BACKLIGHT_AS3711=y # CONFIG_BACKLIGHT_GPIO is not set CONFIG_BACKLIGHT_LV5207LP=m CONFIG_BACKLIGHT_BD6107=y CONFIG_BACKLIGHT_ARCXCNN=y # end of Backlight & LCD device support CONFIG_VIDEOMODE_HELPERS=y CONFIG_HDMI=y # # Console display driver support # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 # end of Console display driver support # end of Graphics support # CONFIG_SOUND is not set # # HID support # CONFIG_HID=y CONFIG_HID_BATTERY_STRENGTH=y # CONFIG_HIDRAW is not set CONFIG_UHID=m # CONFIG_HID_GENERIC is not set # # Special HID drivers # # CONFIG_HID_A4TECH is not set # CONFIG_HID_ACRUX is not set # CONFIG_HID_APPLE is not set CONFIG_HID_AUREAL=y # CONFIG_HID_BELKIN is not set # CONFIG_HID_CHERRY is not set CONFIG_HID_COUGAR=y CONFIG_HID_MACALLY=y CONFIG_HID_CMEDIA=y # CONFIG_HID_CYPRESS is not set CONFIG_HID_DRAGONRISE=m CONFIG_DRAGONRISE_FF=y CONFIG_HID_EMS_FF=m CONFIG_HID_ELECOM=y CONFIG_HID_EZKEY=m CONFIG_HID_GEMBIRD=y CONFIG_HID_GFRM=y # CONFIG_HID_GLORIOUS is not set CONFIG_HID_VIVALDI_COMMON=m CONFIG_HID_VIVALDI=m CONFIG_HID_KEYTOUCH=m CONFIG_HID_KYE=y # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set CONFIG_HID_XIAOMI=m CONFIG_HID_GYRATION=y CONFIG_HID_ICADE=y # CONFIG_HID_ITE is not set CONFIG_HID_JABRA=y CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=m CONFIG_HID_LCPOWER=m # CONFIG_HID_LED is not set # CONFIG_HID_LENOVO is not set CONFIG_HID_MAGICMOUSE=m # CONFIG_HID_MALTRON is not set CONFIG_HID_MAYFLASH=m CONFIG_HID_REDRAGON=y # CONFIG_HID_MICROSOFT is not set CONFIG_HID_MONTEREY=y CONFIG_HID_MULTITOUCH=m # CONFIG_HID_NINTENDO is not set # CONFIG_HID_NTI is not set # CONFIG_HID_ORTEK is not set CONFIG_HID_PANTHERLORD=m CONFIG_PANTHERLORD_FF=y CONFIG_HID_PETALYNX=m CONFIG_HID_PICOLCD=y CONFIG_HID_PICOLCD_BACKLIGHT=y CONFIG_HID_PICOLCD_LEDS=y CONFIG_HID_PLANTRONICS=m # CONFIG_HID_RAZER is not set CONFIG_HID_PRIMAX=y # CONFIG_HID_SAITEK is not set CONFIG_HID_SEMITEK=m # CONFIG_HID_SPEEDLINK is not set # CONFIG_HID_STEAM is not set CONFIG_HID_STEELSERIES=m # CONFIG_HID_SUNPLUS is not set # CONFIG_HID_RMI is not set CONFIG_HID_GREENASIA=m CONFIG_GREENASIA_FF=y # CONFIG_HID_SMARTJOYPLUS is not set # CONFIG_HID_TIVO is not set # CONFIG_HID_TOPSEED is not set # CONFIG_HID_THINGM is not set # CONFIG_HID_UDRAW_PS3 is not set CONFIG_HID_WIIMOTE=m # CONFIG_HID_XINMO is not set CONFIG_HID_ZEROPLUS=m # CONFIG_ZEROPLUS_FF is not set # CONFIG_HID_ZYDACRON is not set # CONFIG_HID_SENSOR_HUB is not set CONFIG_HID_ALPS=y # end of Special HID drivers # # USB HID support # # CONFIG_USB_HID is not set CONFIG_HID_PID=y # end of USB HID support # # I2C HID support # # CONFIG_I2C_HID_ACPI is not set # end of I2C HID support # # Intel ISH HID support # # end of Intel ISH HID support # # AMD SFH HID Support # # CONFIG_AMD_SFH_HID is not set # end of AMD SFH HID Support # end of HID support CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y # CONFIG_USB_LED_TRIG is not set CONFIG_USB_ULPI_BUS=m CONFIG_USB_CONN_GPIO=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y # CONFIG_USB_PCI is not set CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # # Miscellaneous USB options # CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_FEW_INIT_RETRIES is not set CONFIG_USB_DYNAMIC_MINORS=y # CONFIG_USB_OTG_PRODUCTLIST is not set CONFIG_USB_LEDS_TRIGGER_USBPORT=m CONFIG_USB_AUTOSUSPEND_DELAY=2 CONFIG_USB_MON=y # # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=m CONFIG_USB_XHCI_DBGCAP=y CONFIG_USB_XHCI_PCI_RENESAS=m CONFIG_USB_XHCI_PLATFORM=m # CONFIG_USB_XHCI_HISTB is not set # CONFIG_USB_XHCI_MTK is not set # CONFIG_USB_XHCI_MVEBU is not set # CONFIG_USB_XHCI_RCAR is not set # CONFIG_USB_BRCMSTB is not set CONFIG_USB_EHCI_HCD=y # CONFIG_USB_EHCI_ROOT_HUB_TT is not set CONFIG_USB_EHCI_TT_NEWSCHED=y # CONFIG_USB_EHCI_FSL is not set # CONFIG_USB_EHCI_HCD_NPCM7XX is not set CONFIG_USB_EHCI_HCD_OMAP=m # CONFIG_USB_EHCI_HCD_ORION is not set # CONFIG_USB_EHCI_HCD_SPEAR is not set # CONFIG_USB_EHCI_HCD_AT91 is not set # CONFIG_USB_EHCI_SH is not set # CONFIG_USB_EHCI_EXYNOS is not set # CONFIG_USB_EHCI_MV is not set # CONFIG_USB_CNS3XXX_EHCI is not set CONFIG_USB_EHCI_HCD_PLATFORM=y # CONFIG_USB_OXU210HP_HCD is not set CONFIG_USB_ISP116X_HCD=y # CONFIG_USB_ISP1362_HCD is not set # CONFIG_USB_FOTG210_HCD is not set CONFIG_USB_MAX3421_HCD=m CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_HCD_SPEAR is not set # CONFIG_USB_OHCI_HCD_S3C2410 is not set CONFIG_USB_OHCI_HCD_LPC32XX=y # CONFIG_USB_OHCI_HCD_OMAP3 is not set # CONFIG_USB_OHCI_HCD_DAVINCI is not set # CONFIG_USB_OHCI_SH is not set # CONFIG_USB_OHCI_EXYNOS is not set # CONFIG_USB_CNS3XXX_OHCI is not set CONFIG_USB_OHCI_HCD_PLATFORM=y # CONFIG_USB_SL811_HCD is not set CONFIG_USB_R8A66597_HCD=y CONFIG_USB_HCD_BCMA=y # CONFIG_USB_HCD_TEST_MODE is not set # CONFIG_USB_RENESAS_USBHS is not set # # USB Device Class drivers # CONFIG_USB_ACM=y CONFIG_USB_PRINTER=m CONFIG_USB_WDM=m CONFIG_USB_TMC=m # # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # # also be needed; see USB_STORAGE Help for more info # # # USB Imaging devices # CONFIG_USB_MDC800=y CONFIG_USB_CDNS_SUPPORT=m CONFIG_USB_CDNS3=m CONFIG_USB_CDNS3_GADGET=y # CONFIG_USB_CDNS3_HOST is not set CONFIG_USB_CDNS3_TI=m CONFIG_USB_CDNS3_IMX=m # CONFIG_USB_MTU3 is not set CONFIG_USB_MUSB_HDRC=y CONFIG_USB_MUSB_HOST=y # # Platform Glue Layer # # CONFIG_USB_MUSB_UX500 is not set # CONFIG_USB_MUSB_MEDIATEK is not set # CONFIG_USB_MUSB_POLARFIRE_SOC is not set # # MUSB DMA mode # CONFIG_MUSB_PIO_ONLY=y CONFIG_USB_DWC3=m # CONFIG_USB_DWC3_ULPI is not set # CONFIG_USB_DWC3_HOST is not set CONFIG_USB_DWC3_GADGET=y # CONFIG_USB_DWC3_DUAL_ROLE is not set # # Platform Glue Driver Support # CONFIG_USB_DWC3_KEYSTONE=m CONFIG_USB_DWC3_QCOM=m CONFIG_USB_DWC3_AM62=m CONFIG_USB_DWC2=m CONFIG_USB_DWC2_HOST=y # # Gadget/Dual-role mode requires USB Gadget support to be enabled # # CONFIG_USB_DWC2_PERIPHERAL is not set # CONFIG_USB_DWC2_DUAL_ROLE is not set CONFIG_USB_DWC2_DEBUG=y CONFIG_USB_DWC2_VERBOSE=y # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set # CONFIG_USB_DWC2_DEBUG_PERIODIC is not set CONFIG_USB_CHIPIDEA=m CONFIG_USB_CHIPIDEA_UDC=y # CONFIG_USB_CHIPIDEA_HOST is not set CONFIG_USB_CHIPIDEA_MSM=m CONFIG_USB_CHIPIDEA_GENERIC=m # CONFIG_USB_ISP1760 is not set # # USB port drivers # CONFIG_USB_USS720=m CONFIG_USB_SERIAL=y # CONFIG_USB_SERIAL_CONSOLE is not set CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_SERIAL_SIMPLE=m # CONFIG_USB_SERIAL_AIRCABLE is not set # CONFIG_USB_SERIAL_ARK3116 is not set CONFIG_USB_SERIAL_BELKIN=y CONFIG_USB_SERIAL_CH341=m # CONFIG_USB_SERIAL_WHITEHEAT is not set CONFIG_USB_SERIAL_DIGI_ACCELEPORT=y # CONFIG_USB_SERIAL_CP210X is not set # CONFIG_USB_SERIAL_CYPRESS_M8 is not set CONFIG_USB_SERIAL_EMPEG=m CONFIG_USB_SERIAL_FTDI_SIO=m CONFIG_USB_SERIAL_VISOR=y CONFIG_USB_SERIAL_IPAQ=m CONFIG_USB_SERIAL_IR=y CONFIG_USB_SERIAL_EDGEPORT=m # CONFIG_USB_SERIAL_EDGEPORT_TI is not set CONFIG_USB_SERIAL_F81232=y CONFIG_USB_SERIAL_F8153X=y CONFIG_USB_SERIAL_GARMIN=m # CONFIG_USB_SERIAL_IPW is not set # CONFIG_USB_SERIAL_IUU is not set CONFIG_USB_SERIAL_KEYSPAN_PDA=m # CONFIG_USB_SERIAL_KEYSPAN is not set # CONFIG_USB_SERIAL_KLSI is not set CONFIG_USB_SERIAL_KOBIL_SCT=m # CONFIG_USB_SERIAL_MCT_U232 is not set CONFIG_USB_SERIAL_METRO=m CONFIG_USB_SERIAL_MOS7720=m # CONFIG_USB_SERIAL_MOS7715_PARPORT is not set CONFIG_USB_SERIAL_MOS7840=m CONFIG_USB_SERIAL_MXUPORT=m CONFIG_USB_SERIAL_NAVMAN=m # CONFIG_USB_SERIAL_PL2303 is not set CONFIG_USB_SERIAL_OTI6858=y CONFIG_USB_SERIAL_QCAUX=y # CONFIG_USB_SERIAL_QUALCOMM is not set CONFIG_USB_SERIAL_SPCP8X5=y # CONFIG_USB_SERIAL_SAFE is not set # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set # CONFIG_USB_SERIAL_SYMBOL is not set # CONFIG_USB_SERIAL_TI is not set # CONFIG_USB_SERIAL_CYBERJACK is not set CONFIG_USB_SERIAL_WWAN=y CONFIG_USB_SERIAL_OPTION=y CONFIG_USB_SERIAL_OMNINET=y CONFIG_USB_SERIAL_OPTICON=m CONFIG_USB_SERIAL_XSENS_MT=m # CONFIG_USB_SERIAL_WISHBONE is not set CONFIG_USB_SERIAL_SSU100=y # CONFIG_USB_SERIAL_QT2 is not set CONFIG_USB_SERIAL_UPD78F0730=y CONFIG_USB_SERIAL_XR=y CONFIG_USB_SERIAL_DEBUG=y # # USB Miscellaneous drivers # CONFIG_USB_EMI62=m # CONFIG_USB_EMI26 is not set CONFIG_USB_ADUTUX=y # CONFIG_USB_SEVSEG is not set CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m CONFIG_USB_CYPRESS_CY7C63=m CONFIG_USB_CYTHERM=y CONFIG_USB_IDMOUSE=m # CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_QCOM_EUD is not set CONFIG_APPLE_MFI_FASTCHARGE=m CONFIG_USB_SISUSBVGA=y # CONFIG_USB_LD is not set CONFIG_USB_TRANCEVIBRATOR=y CONFIG_USB_IOWARRIOR=y CONFIG_USB_TEST=m # CONFIG_USB_EHSET_TEST_FIXTURE is not set # CONFIG_USB_ISIGHTFW is not set CONFIG_USB_YUREX=m CONFIG_USB_EZUSB_FX2=m # CONFIG_USB_HUB_USB251XB is not set CONFIG_USB_HSIC_USB3503=y CONFIG_USB_HSIC_USB4604=y CONFIG_USB_LINK_LAYER_TEST=m CONFIG_USB_CHAOSKEY=m # CONFIG_BRCM_USB_PINMAP is not set # CONFIG_USB_ONBOARD_HUB is not set # # USB Physical Layer drivers # CONFIG_USB_PHY=y # CONFIG_KEYSTONE_USB_PHY is not set CONFIG_NOP_USB_XCEIV=m # CONFIG_AM335X_PHY_USB is not set CONFIG_USB_GPIO_VBUS=m CONFIG_USB_ISP1301=y # CONFIG_USB_TEGRA_PHY is not set # CONFIG_USB_ULPI is not set # CONFIG_JZ4770_PHY is not set # end of USB Physical Layer drivers CONFIG_USB_GADGET=m CONFIG_USB_GADGET_DEBUG=y CONFIG_USB_GADGET_VERBOSE=y # CONFIG_USB_GADGET_DEBUG_FILES is not set CONFIG_USB_GADGET_DEBUG_FS=y CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 # CONFIG_U_SERIAL_CONSOLE is not set # # USB Peripheral Controller # # CONFIG_USB_LPC32XX is not set CONFIG_USB_FOTG210_UDC=m # CONFIG_USB_GR_UDC is not set CONFIG_USB_R8A66597=m # CONFIG_USB_RENESAS_USB3 is not set CONFIG_USB_PXA27X=m CONFIG_USB_MV_UDC=m CONFIG_USB_MV_U3D=m CONFIG_USB_M66592=m # CONFIG_USB_BDC_UDC is not set CONFIG_USB_NET2272=m CONFIG_USB_NET2272_DMA=y # CONFIG_USB_GADGET_XILINX is not set # CONFIG_USB_MAX3420_UDC is not set # CONFIG_USB_ASPEED_UDC is not set # CONFIG_USB_ASPEED_VHUB is not set CONFIG_USB_DUMMY_HCD=m # end of USB Peripheral Controller CONFIG_USB_LIBCOMPOSITE=m CONFIG_USB_F_ACM=m CONFIG_USB_F_SS_LB=m CONFIG_USB_U_SERIAL=m CONFIG_USB_F_MASS_STORAGE=m CONFIG_USB_F_HID=m # CONFIG_USB_CONFIGFS is not set # # USB Gadget precomposed configurations # CONFIG_USB_ZERO=m CONFIG_USB_GADGETFS=m # CONFIG_USB_FUNCTIONFS is not set CONFIG_USB_MASS_STORAGE=m # CONFIG_USB_G_SERIAL is not set # CONFIG_USB_G_PRINTER is not set CONFIG_USB_G_ACM_MS=m CONFIG_USB_G_HID=m CONFIG_USB_G_DBGP=m CONFIG_USB_G_DBGP_PRINTK=y # CONFIG_USB_G_DBGP_SERIAL is not set CONFIG_USB_RAW_GADGET=m # end of USB Gadget precomposed configurations CONFIG_TYPEC=m # CONFIG_TYPEC_TCPM is not set CONFIG_TYPEC_UCSI=m CONFIG_UCSI_CCG=m CONFIG_UCSI_ACPI=m CONFIG_UCSI_STM32G0=m # CONFIG_TYPEC_TPS6598X is not set # CONFIG_TYPEC_ANX7411 is not set # CONFIG_TYPEC_RT1719 is not set # CONFIG_TYPEC_HD3SS3220 is not set CONFIG_TYPEC_STUSB160X=m # CONFIG_TYPEC_QCOM_PMIC is not set # CONFIG_TYPEC_WUSB3801 is not set # # USB Type-C Multiplexer/DeMultiplexer Switch support # # CONFIG_TYPEC_MUX_FSA4480 is not set CONFIG_TYPEC_MUX_PI3USB30532=m # end of USB Type-C Multiplexer/DeMultiplexer Switch support # # USB Type-C Alternate Mode drivers # CONFIG_TYPEC_DP_ALTMODE=m # CONFIG_TYPEC_NVIDIA_ALTMODE is not set # end of USB Type-C Alternate Mode drivers CONFIG_USB_ROLE_SWITCH=y CONFIG_MMC=y CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_MINORS=8 CONFIG_SDIO_UART=y CONFIG_MMC_TEST=y # # MMC/SD/SDIO Host Controller Drivers # # CONFIG_MMC_DEBUG is not set CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_IO_ACCESSORS=y CONFIG_MMC_SDHCI_PCI=m # CONFIG_MMC_RICOH_MMC is not set CONFIG_MMC_SDHCI_ACPI=m CONFIG_MMC_SDHCI_PLTFM=m # CONFIG_MMC_SDHCI_OF_ESDHC is not set # CONFIG_MMC_SDHCI_OF_SPARX5 is not set # CONFIG_MMC_SDHCI_CNS3XXX is not set # CONFIG_MMC_SDHCI_DOVE is not set # CONFIG_MMC_SDHCI_TEGRA is not set # CONFIG_MMC_SDHCI_S3C is not set # CONFIG_MMC_SDHCI_BCM_KONA is not set CONFIG_MMC_SDHCI_F_SDH30=m # CONFIG_MMC_SDHCI_IPROC is not set # CONFIG_MMC_MOXART is not set # CONFIG_MMC_SDHCI_ST is not set # CONFIG_MMC_OMAP_HS is not set CONFIG_MMC_ALCOR=m # CONFIG_MMC_SDHCI_MSM is not set # CONFIG_MMC_TIFM_SD is not set # CONFIG_MMC_DAVINCI is not set # CONFIG_MMC_SPI is not set # CONFIG_MMC_S3C is not set # CONFIG_MMC_SDHCI_SPRD is not set # CONFIG_MMC_TMIO is not set # CONFIG_MMC_SDHI is not set # CONFIG_MMC_CB710 is not set # CONFIG_MMC_VIA_SDMMC is not set # CONFIG_MMC_DW is not set # CONFIG_MMC_SH_MMCIF is not set # CONFIG_MMC_VUB300 is not set # CONFIG_MMC_USHC is not set CONFIG_MMC_USDHI6ROL0=y # CONFIG_MMC_REALTEK_PCI is not set CONFIG_MMC_REALTEK_USB=m CONFIG_MMC_CQHCI=m # CONFIG_MMC_HSQ is not set # CONFIG_MMC_TOSHIBA_PCI is not set # CONFIG_MMC_BCM2835 is not set CONFIG_MMC_SDHCI_XENON=m # CONFIG_MMC_OWL is not set # CONFIG_MMC_LITEX is not set # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_CLASS_FLASH=y # CONFIG_LEDS_CLASS_MULTICOLOR is not set # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set # # LED drivers # # CONFIG_LEDS_ARIEL is not set CONFIG_LEDS_LM3530=y CONFIG_LEDS_LM3532=y CONFIG_LEDS_LM3533=m # CONFIG_LEDS_LM3642 is not set # CONFIG_LEDS_S3C24XX is not set # CONFIG_LEDS_COBALT_QUBE is not set # CONFIG_LEDS_COBALT_RAQ is not set # CONFIG_LEDS_PCA9532 is not set CONFIG_LEDS_GPIO=y CONFIG_LEDS_LP3944=y CONFIG_LEDS_LP3952=m # CONFIG_LEDS_LP50XX is not set CONFIG_LEDS_LP8788=m # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set CONFIG_LEDS_WM831X_STATUS=y # CONFIG_LEDS_DAC124S085 is not set # CONFIG_LEDS_REGULATOR is not set CONFIG_LEDS_BD2802=y # CONFIG_LEDS_LT3593 is not set # CONFIG_LEDS_MC13783 is not set CONFIG_LEDS_NS2=y CONFIG_LEDS_TCA6507=y CONFIG_LEDS_TLC591XX=y CONFIG_LEDS_LM355x=y # CONFIG_LEDS_OT200 is not set CONFIG_LEDS_MENF21BMC=m # CONFIG_LEDS_IS31FL319X is not set # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) # CONFIG_LEDS_BLINKM=m CONFIG_LEDS_MLXREG=m CONFIG_LEDS_USER=y # CONFIG_LEDS_TI_LMU_COMMON is not set CONFIG_LEDS_TPS6105X=m # CONFIG_LEDS_IP30 is not set # # Flash and Torch LED drivers # # CONFIG_LEDS_AS3645A is not set CONFIG_LEDS_LM3601X=m # CONFIG_LEDS_RT8515 is not set # CONFIG_LEDS_SGM3140 is not set # # RGB LED drivers # # # LED Triggers # CONFIG_LEDS_TRIGGERS=y # CONFIG_LEDS_TRIGGER_TIMER is not set # CONFIG_LEDS_TRIGGER_ONESHOT is not set CONFIG_LEDS_TRIGGER_MTD=y CONFIG_LEDS_TRIGGER_HEARTBEAT=m CONFIG_LEDS_TRIGGER_BACKLIGHT=y # CONFIG_LEDS_TRIGGER_CPU is not set CONFIG_LEDS_TRIGGER_ACTIVITY=y # CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=m # # iptables trigger is under Netfilter config (LED target) # CONFIG_LEDS_TRIGGER_TRANSIENT=y # CONFIG_LEDS_TRIGGER_CAMERA is not set CONFIG_LEDS_TRIGGER_PANIC=y # CONFIG_LEDS_TRIGGER_PATTERN is not set # CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set # # Simple LED drivers # CONFIG_ACCESSIBILITY=y # # Speakup console speech # CONFIG_SPEAKUP=m CONFIG_SPEAKUP_SERIALIO=y # CONFIG_SPEAKUP_SYNTH_ACNTSA is not set # CONFIG_SPEAKUP_SYNTH_ACNTPC is not set CONFIG_SPEAKUP_SYNTH_APOLLO=m # CONFIG_SPEAKUP_SYNTH_AUDPTR is not set # CONFIG_SPEAKUP_SYNTH_BNS is not set CONFIG_SPEAKUP_SYNTH_DECTLK=m # CONFIG_SPEAKUP_SYNTH_DECEXT is not set # CONFIG_SPEAKUP_SYNTH_DECPC is not set # CONFIG_SPEAKUP_SYNTH_DTLK is not set # CONFIG_SPEAKUP_SYNTH_KEYPC is not set CONFIG_SPEAKUP_SYNTH_LTLK=m CONFIG_SPEAKUP_SYNTH_SOFT=m # CONFIG_SPEAKUP_SYNTH_SPKOUT is not set CONFIG_SPEAKUP_SYNTH_TXPRT=m CONFIG_SPEAKUP_SYNTH_DUMMY=m # end of Speakup console speech # CONFIG_RTC_CLASS is not set CONFIG_DMADEVICES=y # CONFIG_DMADEVICES_DEBUG is not set # # DMA Devices # CONFIG_DMA_ENGINE=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DMA_ACPI=y CONFIG_ALTERA_MSGDMA=y # CONFIG_APPLE_ADMAC is not set # CONFIG_AXI_DMAC is not set # CONFIG_DMA_JZ4780 is not set # CONFIG_DMA_SA11X0 is not set # CONFIG_DMA_SUN6I is not set # CONFIG_DW_AXI_DMAC is not set # CONFIG_EP93XX_DMA is not set # CONFIG_HISI_DMA is not set # CONFIG_IMG_MDC_DMA is not set # CONFIG_INTEL_IDMA64 is not set # CONFIG_INTEL_IOP_ADMA is not set # CONFIG_K3_DMA is not set # CONFIG_MCF_EDMA is not set # CONFIG_MMP_PDMA is not set # CONFIG_MMP_TDMA is not set # CONFIG_MV_XOR is not set # CONFIG_MXS_DMA is not set # CONFIG_NBPFAXI_DMA is not set # CONFIG_PCH_DMA is not set CONFIG_PLX_DMA=m # CONFIG_STM32_DMA is not set # CONFIG_STM32_DMAMUX is not set # CONFIG_SPRD_DMA is not set # CONFIG_S3C24XX_DMAC is not set # CONFIG_TEGRA186_GPC_DMA is not set # CONFIG_TEGRA20_APB_DMA is not set # CONFIG_TEGRA210_ADMA is not set # CONFIG_TIMB_DMA is not set # CONFIG_XGENE_DMA is not set # CONFIG_XILINX_ZYNQMP_DMA is not set # CONFIG_MTK_HSDMA is not set # CONFIG_MTK_CQDMA is not set CONFIG_QCOM_HIDMA_MGMT=y CONFIG_QCOM_HIDMA=y CONFIG_DW_DMAC_CORE=m CONFIG_DW_DMAC=m # CONFIG_RZN1_DMAMUX is not set CONFIG_DW_DMAC_PCI=m CONFIG_DW_EDMA=m # CONFIG_DW_EDMA_PCIE is not set # CONFIG_SF_PDMA is not set CONFIG_RENESAS_DMA=y CONFIG_SH_DMAE_BASE=y # CONFIG_SH_DMAE is not set # CONFIG_RCAR_DMAC is not set # CONFIG_RENESAS_USB_DMAC is not set # CONFIG_RZ_DMAC is not set CONFIG_TI_EDMA=y CONFIG_DMA_OMAP=y CONFIG_TI_DMA_CROSSBAR=y # CONFIG_INTEL_LDMA is not set # # DMA Clients # CONFIG_ASYNC_TX_DMA=y # CONFIG_DMATEST is not set # # DMABUF options # CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set # CONFIG_UDMABUF is not set CONFIG_DMABUF_MOVE_NOTIFY=y # CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_HEAPS is not set CONFIG_DMABUF_SYSFS_STATS=y # end of DMABUF options CONFIG_AUXDISPLAY=y CONFIG_CHARLCD=y CONFIG_LINEDISP=m CONFIG_HD44780_COMMON=y # CONFIG_HD44780 is not set CONFIG_KS0108=m CONFIG_KS0108_PORT=0x378 CONFIG_KS0108_DELAY=2 CONFIG_IMG_ASCII_LCD=m CONFIG_LCD2S=m CONFIG_PARPORT_PANEL=y CONFIG_PANEL_PARPORT=0 CONFIG_PANEL_PROFILE=5 # CONFIG_PANEL_CHANGE_MESSAGE is not set # CONFIG_CHARLCD_BL_OFF is not set CONFIG_CHARLCD_BL_ON=y # CONFIG_CHARLCD_BL_FLASH is not set CONFIG_PANEL=y # CONFIG_UIO is not set # CONFIG_VFIO is not set CONFIG_VIRT_DRIVERS=y CONFIG_VMGENID=y CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y # CONFIG_VIRTIO_MENU is not set CONFIG_VHOST_MENU=y # CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set # # Microsoft Hyper-V guest support # # end of Microsoft Hyper-V guest support CONFIG_GREYBUS=y # CONFIG_GREYBUS_ES2 is not set CONFIG_COMEDI=y CONFIG_COMEDI_DEBUG=y CONFIG_COMEDI_DEFAULT_BUF_SIZE_KB=2048 CONFIG_COMEDI_DEFAULT_BUF_MAXSIZE_KB=20480 CONFIG_COMEDI_MISC_DRIVERS=y CONFIG_COMEDI_BOND=m # CONFIG_COMEDI_TEST is not set # CONFIG_COMEDI_PARPORT is not set # CONFIG_COMEDI_SSV_DNP is not set CONFIG_COMEDI_ISA_DRIVERS=y CONFIG_COMEDI_PCL711=y CONFIG_COMEDI_PCL724=m # CONFIG_COMEDI_PCL726 is not set # CONFIG_COMEDI_PCL730 is not set CONFIG_COMEDI_PCL812=m CONFIG_COMEDI_PCL816=m CONFIG_COMEDI_PCL818=m # CONFIG_COMEDI_PCM3724 is not set CONFIG_COMEDI_AMPLC_DIO200_ISA=y CONFIG_COMEDI_AMPLC_PC236_ISA=y CONFIG_COMEDI_AMPLC_PC263_ISA=m CONFIG_COMEDI_RTI800=m CONFIG_COMEDI_RTI802=m CONFIG_COMEDI_DAC02=y CONFIG_COMEDI_DAS16M1=y CONFIG_COMEDI_DAS08_ISA=y CONFIG_COMEDI_DAS16=y CONFIG_COMEDI_DAS800=m # CONFIG_COMEDI_DAS1800 is not set # CONFIG_COMEDI_DAS6402 is not set CONFIG_COMEDI_DT2801=y # CONFIG_COMEDI_DT2811 is not set CONFIG_COMEDI_DT2814=y CONFIG_COMEDI_DT2815=y # CONFIG_COMEDI_DT2817 is not set CONFIG_COMEDI_DT282X=y # CONFIG_COMEDI_DMM32AT is not set CONFIG_COMEDI_FL512=y CONFIG_COMEDI_AIO_AIO12_8=m # CONFIG_COMEDI_AIO_IIRO_16 is not set # CONFIG_COMEDI_II_PCI20KC is not set # CONFIG_COMEDI_C6XDIGIO is not set CONFIG_COMEDI_MPC624=y CONFIG_COMEDI_ADQ12B=y CONFIG_COMEDI_NI_AT_A2150=m CONFIG_COMEDI_NI_AT_AO=y CONFIG_COMEDI_NI_ATMIO=m CONFIG_COMEDI_NI_ATMIO16D=m CONFIG_COMEDI_NI_LABPC_ISA=y CONFIG_COMEDI_PCMAD=y # CONFIG_COMEDI_PCMDA12 is not set CONFIG_COMEDI_PCMMIO=m CONFIG_COMEDI_PCMUIO=y # CONFIG_COMEDI_MULTIQ3 is not set CONFIG_COMEDI_S526=m CONFIG_COMEDI_PCI_DRIVERS=m # CONFIG_COMEDI_8255_PCI is not set CONFIG_COMEDI_ADDI_WATCHDOG=m CONFIG_COMEDI_ADDI_APCI_1032=m # CONFIG_COMEDI_ADDI_APCI_1500 is not set CONFIG_COMEDI_ADDI_APCI_1516=m # CONFIG_COMEDI_ADDI_APCI_1564 is not set CONFIG_COMEDI_ADDI_APCI_16XX=m CONFIG_COMEDI_ADDI_APCI_2032=m # CONFIG_COMEDI_ADDI_APCI_2200 is not set # CONFIG_COMEDI_ADDI_APCI_3120 is not set # CONFIG_COMEDI_ADDI_APCI_3501 is not set # CONFIG_COMEDI_ADDI_APCI_3XXX is not set CONFIG_COMEDI_ADL_PCI6208=m CONFIG_COMEDI_ADL_PCI7X3X=m CONFIG_COMEDI_ADL_PCI8164=m CONFIG_COMEDI_ADL_PCI9111=m CONFIG_COMEDI_ADL_PCI9118=m # CONFIG_COMEDI_ADV_PCI1710 is not set CONFIG_COMEDI_ADV_PCI1720=m # CONFIG_COMEDI_ADV_PCI1723 is not set CONFIG_COMEDI_ADV_PCI1724=m CONFIG_COMEDI_ADV_PCI1760=m CONFIG_COMEDI_ADV_PCI_DIO=m # CONFIG_COMEDI_AMPLC_DIO200_PCI is not set # CONFIG_COMEDI_AMPLC_PC236_PCI is not set CONFIG_COMEDI_AMPLC_PC263_PCI=m CONFIG_COMEDI_AMPLC_PCI224=m CONFIG_COMEDI_AMPLC_PCI230=m CONFIG_COMEDI_CONTEC_PCI_DIO=m CONFIG_COMEDI_DAS08_PCI=m # CONFIG_COMEDI_DT3000 is not set CONFIG_COMEDI_DYNA_PCI10XX=m CONFIG_COMEDI_GSC_HPDI=m # CONFIG_COMEDI_MF6X4 is not set CONFIG_COMEDI_ICP_MULTI=m # CONFIG_COMEDI_DAQBOARD2000 is not set CONFIG_COMEDI_JR3_PCI=m CONFIG_COMEDI_KE_COUNTER=m CONFIG_COMEDI_CB_PCIDAS64=m # CONFIG_COMEDI_CB_PCIDAS is not set CONFIG_COMEDI_CB_PCIDDA=m CONFIG_COMEDI_CB_PCIMDAS=m CONFIG_COMEDI_CB_PCIMDDA=m CONFIG_COMEDI_ME4000=m # CONFIG_COMEDI_ME_DAQ is not set CONFIG_COMEDI_NI_6527=m CONFIG_COMEDI_NI_65XX=m # CONFIG_COMEDI_NI_660X is not set # CONFIG_COMEDI_NI_670X is not set CONFIG_COMEDI_NI_LABPC_PCI=m CONFIG_COMEDI_NI_PCIDIO=m CONFIG_COMEDI_NI_PCIMIO=m # CONFIG_COMEDI_RTD520 is not set # CONFIG_COMEDI_S626 is not set CONFIG_COMEDI_MITE=m CONFIG_COMEDI_NI_TIOCMD=m CONFIG_COMEDI_USB_DRIVERS=y # CONFIG_COMEDI_DT9812 is not set CONFIG_COMEDI_NI_USB6501=y CONFIG_COMEDI_USBDUX=m CONFIG_COMEDI_USBDUXFAST=m # CONFIG_COMEDI_USBDUXSIGMA is not set CONFIG_COMEDI_VMK80XX=m CONFIG_COMEDI_8254=y CONFIG_COMEDI_8255=y CONFIG_COMEDI_8255_SA=y CONFIG_COMEDI_KCOMEDILIB=m CONFIG_COMEDI_AMPLC_DIO200=y CONFIG_COMEDI_AMPLC_PC236=y CONFIG_COMEDI_DAS08=y CONFIG_COMEDI_NI_LABPC=y CONFIG_COMEDI_NI_TIO=m CONFIG_COMEDI_NI_ROUTING=y CONFIG_COMEDI_TESTS=y # CONFIG_COMEDI_TESTS_EXAMPLE is not set CONFIG_COMEDI_TESTS_NI_ROUTES=y # CONFIG_STAGING is not set # CONFIG_GOLDFISH is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set # CONFIG_OLPC_XO175 is not set CONFIG_SURFACE_PLATFORMS=y # CONFIG_SURFACE_3_POWER_OPREGION is not set # CONFIG_SURFACE_GPE is not set # CONFIG_SURFACE_HOTPLUG is not set # CONFIG_SURFACE_PRO3_BUTTON is not set # CONFIG_COMMON_CLK is not set # CONFIG_HWSPINLOCK is not set # CONFIG_MAILBOX is not set CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # # CONFIG_IOMMU_IO_PGTABLE_LPAE is not set # CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set CONFIG_IOMMU_DEFAULT_DMA_STRICT=y # CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set # CONFIG_INTEL_IOMMU is not set # CONFIG_OMAP_IOMMU is not set # CONFIG_ROCKCHIP_IOMMU is not set # CONFIG_SUN50I_IOMMU is not set # CONFIG_EXYNOS_IOMMU is not set # CONFIG_IPMMU_VMSA is not set # CONFIG_APPLE_DART is not set # CONFIG_ARM_SMMU is not set # CONFIG_S390_CCW_IOMMU is not set # CONFIG_S390_AP_IOMMU is not set # CONFIG_MTK_IOMMU is not set # CONFIG_QCOM_IOMMU is not set # CONFIG_SPRD_IOMMU is not set # # Remoteproc drivers # CONFIG_REMOTEPROC=y CONFIG_REMOTEPROC_CDEV=y # CONFIG_INGENIC_VPU_RPROC is not set # CONFIG_MTK_SCP is not set # CONFIG_MESON_MX_AO_ARC_REMOTEPROC is not set # CONFIG_RCAR_REMOTEPROC is not set # end of Remoteproc drivers # # Rpmsg drivers # CONFIG_RPMSG=m # CONFIG_RPMSG_CTRL is not set CONFIG_RPMSG_NS=m CONFIG_RPMSG_VIRTIO=m # end of Rpmsg drivers CONFIG_SOUNDWIRE=y # # SoundWire Devices # # # SOC (System On Chip) specific Drivers # # # Amlogic SoC drivers # # CONFIG_MESON_CANVAS is not set # CONFIG_MESON_CLK_MEASURE is not set # CONFIG_MESON_GX_SOCINFO is not set # CONFIG_MESON_MX_SOCINFO is not set # end of Amlogic SoC drivers # # Apple SoC drivers # # CONFIG_APPLE_SART is not set # end of Apple SoC drivers # # ASPEED SoC drivers # # CONFIG_ASPEED_LPC_CTRL is not set # CONFIG_ASPEED_LPC_SNOOP is not set # CONFIG_ASPEED_UART_ROUTING is not set # CONFIG_ASPEED_P2A_CTRL is not set # CONFIG_ASPEED_SOCINFO is not set # end of ASPEED SoC drivers # CONFIG_AT91_SOC_ID is not set # CONFIG_AT91_SOC_SFR is not set # # Broadcom SoC drivers # # CONFIG_SOC_BCM63XX is not set # CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # # NXP/Freescale QorIQ SoC drivers # # end of NXP/Freescale QorIQ SoC drivers # # fujitsu SoC drivers # # end of fujitsu SoC drivers # # i.MX SoC drivers # # CONFIG_SOC_IMX8M is not set # end of i.MX SoC drivers # # IXP4xx SoC drivers # # CONFIG_IXP4XX_QMGR is not set # CONFIG_IXP4XX_NPE is not set # end of IXP4xx SoC drivers # # Enable LiteX SoC Builder specific drivers # # CONFIG_LITEX_SOC_CONTROLLER is not set # end of Enable LiteX SoC Builder specific drivers # # MediaTek SoC drivers # # CONFIG_MTK_CMDQ is not set # CONFIG_MTK_DEVAPC is not set # CONFIG_MTK_INFRACFG is not set # CONFIG_MTK_PMIC_WRAP is not set # CONFIG_MTK_SCPSYS is not set # CONFIG_MTK_MMSYS is not set # end of MediaTek SoC drivers # # Qualcomm SoC drivers # # CONFIG_QCOM_GENI_SE is not set # CONFIG_QCOM_GSBI is not set # CONFIG_QCOM_LLCC is not set # CONFIG_QCOM_RPMH is not set # CONFIG_QCOM_SMD_RPM is not set # CONFIG_QCOM_SPM is not set # CONFIG_QCOM_WCNSS_CTRL is not set # CONFIG_QCOM_ICC_BWMON is not set # end of Qualcomm SoC drivers # CONFIG_SOC_RENESAS is not set # CONFIG_ROCKCHIP_GRF is not set # CONFIG_SOC_SAMSUNG is not set # CONFIG_SOC_TEGRA20_VOLTAGE_COUPLER is not set # CONFIG_SOC_TEGRA30_VOLTAGE_COUPLER is not set # CONFIG_SOC_TI is not set # CONFIG_UX500_SOC_ID is not set # # Xilinx SoC drivers # # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers # CONFIG_PM_DEVFREQ is not set CONFIG_EXTCON=y # # Extcon Device Drivers # CONFIG_EXTCON_ADC_JACK=m CONFIG_EXTCON_FSA9480=y CONFIG_EXTCON_GPIO=y # CONFIG_EXTCON_INTEL_INT3496 is not set CONFIG_EXTCON_MAX14577=m CONFIG_EXTCON_MAX3355=y # CONFIG_EXTCON_MAX77693 is not set # CONFIG_EXTCON_MAX77843 is not set CONFIG_EXTCON_PALMAS=y # CONFIG_EXTCON_PTN5150 is not set # CONFIG_EXTCON_QCOM_SPMI_MISC is not set CONFIG_EXTCON_RT8973A=m CONFIG_EXTCON_SM5502=y CONFIG_EXTCON_USB_GPIO=y CONFIG_EXTCON_USBC_TUSB320=m CONFIG_MEMORY=y # CONFIG_BRCMSTB_DPFE is not set # CONFIG_BT1_L2_CTL is not set # CONFIG_TI_EMIF is not set # CONFIG_FSL_CORENET_CF is not set # CONFIG_FSL_IFC is not set # CONFIG_MTK_SMI is not set # CONFIG_DA8XX_DDRCTL is not set # CONFIG_RENESAS_RPCIF is not set # CONFIG_STM32_FMC2_EBI is not set # CONFIG_SAMSUNG_MC is not set CONFIG_IIO=y CONFIG_IIO_BUFFER=y CONFIG_IIO_BUFFER_CB=m CONFIG_IIO_BUFFER_DMA=y CONFIG_IIO_BUFFER_DMAENGINE=m CONFIG_IIO_BUFFER_HW_CONSUMER=m CONFIG_IIO_KFIFO_BUF=y CONFIG_IIO_TRIGGERED_BUFFER=y CONFIG_IIO_CONFIGFS=y CONFIG_IIO_TRIGGER=y CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 CONFIG_IIO_SW_DEVICE=y CONFIG_IIO_SW_TRIGGER=y CONFIG_IIO_TRIGGERED_EVENT=m # # Accelerometers # # CONFIG_ADIS16201 is not set # CONFIG_ADIS16209 is not set CONFIG_ADXL313=y # CONFIG_ADXL313_I2C is not set CONFIG_ADXL313_SPI=y CONFIG_ADXL355=y CONFIG_ADXL355_I2C=m CONFIG_ADXL355_SPI=y CONFIG_ADXL367=y # CONFIG_ADXL367_SPI is not set CONFIG_ADXL367_I2C=y CONFIG_ADXL372=m CONFIG_ADXL372_SPI=m # CONFIG_ADXL372_I2C is not set # CONFIG_BMA180 is not set CONFIG_BMA220=y CONFIG_BMA400=m CONFIG_BMA400_I2C=m CONFIG_BMA400_SPI=m CONFIG_BMC150_ACCEL=y CONFIG_BMC150_ACCEL_I2C=y CONFIG_BMC150_ACCEL_SPI=y # CONFIG_BMI088_ACCEL is not set CONFIG_DA280=m # CONFIG_DA311 is not set CONFIG_DMARD06=y # CONFIG_DMARD09 is not set CONFIG_DMARD10=m CONFIG_FXLS8962AF=y # CONFIG_FXLS8962AF_I2C is not set CONFIG_FXLS8962AF_SPI=y CONFIG_IIO_ST_ACCEL_3AXIS=m CONFIG_IIO_ST_ACCEL_I2C_3AXIS=m CONFIG_IIO_ST_ACCEL_SPI_3AXIS=m CONFIG_KXSD9=m CONFIG_KXSD9_SPI=m CONFIG_KXSD9_I2C=m # CONFIG_KXCJK1013 is not set CONFIG_MC3230=y CONFIG_MMA7455=y CONFIG_MMA7455_I2C=y # CONFIG_MMA7455_SPI is not set CONFIG_MMA7660=y CONFIG_MMA8452=y CONFIG_MMA9551_CORE=m CONFIG_MMA9551=m # CONFIG_MMA9553 is not set CONFIG_MSA311=m CONFIG_MXC4005=y # CONFIG_MXC6255 is not set CONFIG_SCA3000=m CONFIG_SCA3300=m CONFIG_STK8312=y CONFIG_STK8BA50=y # end of Accelerometers # # Analog to digital converters # CONFIG_AD_SIGMA_DELTA=y CONFIG_AD4130=m CONFIG_AD7091R5=m CONFIG_AD7124=y CONFIG_AD7192=m # CONFIG_AD7266 is not set CONFIG_AD7280=y # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set CONFIG_AD7476=y CONFIG_AD7606=y CONFIG_AD7606_IFACE_PARALLEL=y CONFIG_AD7606_IFACE_SPI=y # CONFIG_AD7766 is not set CONFIG_AD7768_1=m CONFIG_AD7780=y CONFIG_AD7791=m CONFIG_AD7793=y CONFIG_AD7887=y CONFIG_AD7923=y CONFIG_AD7949=y CONFIG_AD799X=y # CONFIG_AT91_SAMA5D2_ADC is not set # CONFIG_BCM_IPROC_ADC is not set # CONFIG_BERLIN2_ADC is not set CONFIG_DA9150_GPADC=m CONFIG_DLN2_ADC=m # CONFIG_ENVELOPE_DETECTOR is not set # CONFIG_HI8435 is not set CONFIG_HX711=y CONFIG_INA2XX_ADC=m # CONFIG_INGENIC_ADC is not set # CONFIG_IMX7D_ADC is not set # CONFIG_IMX8QXP_ADC is not set CONFIG_LP8788_ADC=m # CONFIG_LPC18XX_ADC is not set # CONFIG_LPC32XX_ADC is not set CONFIG_LTC2471=y CONFIG_LTC2485=m # CONFIG_LTC2496 is not set # CONFIG_LTC2497 is not set CONFIG_MAX1027=m # CONFIG_MAX11100 is not set CONFIG_MAX1118=m CONFIG_MAX11205=m CONFIG_MAX1241=m CONFIG_MAX1363=y # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set CONFIG_MCP3422=y # CONFIG_MCP3911 is not set CONFIG_MEDIATEK_MT6360_ADC=y # CONFIG_MEDIATEK_MT6577_AUXADC is not set CONFIG_MEN_Z188_ADC=m # CONFIG_MP2629_ADC is not set # CONFIG_NAU7802 is not set # CONFIG_NPCM_ADC is not set CONFIG_PALMAS_GPADC=m # CONFIG_RCAR_GYRO_ADC is not set # CONFIG_ROCKCHIP_SARADC is not set # CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_RZG2L_ADC is not set # CONFIG_SC27XX_ADC is not set # CONFIG_SPEAR_ADC is not set CONFIG_SD_ADC_MODULATOR=y # CONFIG_STM32_DFSDM_CORE is not set # CONFIG_STM32_DFSDM_ADC is not set CONFIG_TI_ADC081C=m CONFIG_TI_ADC0832=y CONFIG_TI_ADC084S021=y CONFIG_TI_ADC12138=m CONFIG_TI_ADC108S102=m CONFIG_TI_ADC128S052=m # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set CONFIG_TI_ADS7950=m CONFIG_TI_ADS8344=m CONFIG_TI_ADS8688=m CONFIG_TI_ADS124S08=y CONFIG_TI_ADS131E08=y # CONFIG_TI_AM335X_ADC is not set # CONFIG_TI_TLC4541 is not set CONFIG_TI_TSC2046=y CONFIG_VF610_ADC=y CONFIG_VIPERBOARD_ADC=m CONFIG_XILINX_XADC=m # CONFIG_XILINX_AMS is not set # end of Analog to digital converters # # Analog to digital and digital to analog converters # CONFIG_AD74413R=y # end of Analog to digital and digital to analog converters # # Analog Front Ends # CONFIG_IIO_RESCALE=y # end of Analog Front Ends # # Amplifiers # CONFIG_AD8366=m # CONFIG_ADA4250 is not set # CONFIG_HMC425 is not set # end of Amplifiers # # Capacitance to digital converters # CONFIG_AD7150=m CONFIG_AD7746=m # end of Capacitance to digital converters # # Chemical Sensors # CONFIG_ATLAS_PH_SENSOR=m CONFIG_ATLAS_EZO_SENSOR=y # CONFIG_BME680 is not set CONFIG_CCS811=y CONFIG_IAQCORE=m CONFIG_SCD30_CORE=y # CONFIG_SCD30_I2C is not set CONFIG_SCD4X=y CONFIG_SENSIRION_SGP30=y # CONFIG_SENSIRION_SGP40 is not set CONFIG_SPS30=y CONFIG_SPS30_I2C=y CONFIG_SENSEAIR_SUNRISE_CO2=y CONFIG_VZ89X=y # end of Chemical Sensors # # Hid Sensor IIO Common # # end of Hid Sensor IIO Common CONFIG_IIO_MS_SENSORS_I2C=y # # IIO SCMI Sensors # # end of IIO SCMI Sensors # # SSP Sensor Common # CONFIG_IIO_SSP_SENSORS_COMMONS=m CONFIG_IIO_SSP_SENSORHUB=y # end of SSP Sensor Common CONFIG_IIO_ST_SENSORS_I2C=m CONFIG_IIO_ST_SENSORS_SPI=m CONFIG_IIO_ST_SENSORS_CORE=m # # Digital to analog converters # CONFIG_AD3552R=y CONFIG_AD5064=y # CONFIG_AD5360 is not set # CONFIG_AD5380 is not set # CONFIG_AD5421 is not set CONFIG_AD5446=m # CONFIG_AD5449 is not set # CONFIG_AD5592R is not set # CONFIG_AD5593R is not set CONFIG_AD5504=m CONFIG_AD5624R_SPI=y CONFIG_LTC2688=m # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set CONFIG_AD5755=m CONFIG_AD5758=m # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set # CONFIG_AD5766 is not set CONFIG_AD5770R=y # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set CONFIG_AD7303=m CONFIG_AD8801=y CONFIG_DPOT_DAC=y # CONFIG_DS4424 is not set # CONFIG_LPC18XX_DAC is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set CONFIG_M62332=y CONFIG_MAX517=y CONFIG_MAX5821=y # CONFIG_MCP4725 is not set # CONFIG_MCP4922 is not set # CONFIG_STM32_DAC is not set # CONFIG_TI_DAC082S085 is not set CONFIG_TI_DAC5571=m CONFIG_TI_DAC7311=m # CONFIG_TI_DAC7612 is not set CONFIG_VF610_DAC=m # end of Digital to analog converters # # IIO dummy driver # CONFIG_IIO_DUMMY_EVGEN=y CONFIG_IIO_SIMPLE_DUMMY=y CONFIG_IIO_SIMPLE_DUMMY_EVENTS=y # CONFIG_IIO_SIMPLE_DUMMY_BUFFER is not set # end of IIO dummy driver # # Filters # # end of Filters # # Frequency Synthesizers DDS/PLL # # # Clock Generator/Distribution # CONFIG_AD9523=m # end of Clock Generator/Distribution # # Phase-Locked Loop (PLL) frequency synthesizers # CONFIG_ADF4350=y # CONFIG_ADF4371 is not set CONFIG_ADMV4420=y # end of Phase-Locked Loop (PLL) frequency synthesizers # end of Frequency Synthesizers DDS/PLL # # Digital gyroscope sensors # CONFIG_ADIS16080=y CONFIG_ADIS16130=m CONFIG_ADIS16136=m # CONFIG_ADIS16260 is not set CONFIG_ADXRS290=y CONFIG_ADXRS450=m CONFIG_BMG160=y CONFIG_BMG160_I2C=y CONFIG_BMG160_SPI=y CONFIG_FXAS21002C=m CONFIG_FXAS21002C_I2C=m CONFIG_FXAS21002C_SPI=m CONFIG_MPU3050=y CONFIG_MPU3050_I2C=y # CONFIG_IIO_ST_GYRO_3AXIS is not set # CONFIG_ITG3200 is not set # end of Digital gyroscope sensors # # Health Sensors # # # Heart Rate Monitors # CONFIG_AFE4403=m # CONFIG_AFE4404 is not set # CONFIG_MAX30100 is not set CONFIG_MAX30102=m # end of Heart Rate Monitors # end of Health Sensors # # Humidity sensors # # CONFIG_AM2315 is not set CONFIG_DHT11=y # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set # CONFIG_HTS221 is not set CONFIG_HTU21=y CONFIG_SI7005=y # CONFIG_SI7020 is not set # end of Humidity sensors # # Inertial measurement units # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set CONFIG_ADIS16475=y CONFIG_ADIS16480=m CONFIG_BMI160=y CONFIG_BMI160_I2C=y CONFIG_BMI160_SPI=y # CONFIG_BOSCH_BNO055_I2C is not set CONFIG_FXOS8700=m CONFIG_FXOS8700_I2C=m CONFIG_FXOS8700_SPI=m CONFIG_KMX61=y CONFIG_INV_ICM42600=y # CONFIG_INV_ICM42600_I2C is not set CONFIG_INV_ICM42600_SPI=y CONFIG_INV_MPU6050_IIO=y CONFIG_INV_MPU6050_I2C=m CONFIG_INV_MPU6050_SPI=y # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units CONFIG_IIO_ADIS_LIB=y CONFIG_IIO_ADIS_LIB_BUFFER=y # # Light sensors # CONFIG_ACPI_ALS=y # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set CONFIG_AL3010=y CONFIG_AL3320A=m CONFIG_APDS9300=y # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set CONFIG_BH1750=m # CONFIG_BH1780 is not set CONFIG_CM32181=m CONFIG_CM3232=m CONFIG_CM3323=m CONFIG_CM3605=y CONFIG_CM36651=y # CONFIG_GP2AP002 is not set # CONFIG_GP2AP020A00F is not set CONFIG_IQS621_ALS=y CONFIG_SENSORS_ISL29018=y # CONFIG_SENSORS_ISL29028 is not set CONFIG_ISL29125=m CONFIG_JSA1212=y # CONFIG_RPR0521 is not set CONFIG_SENSORS_LM3533=m CONFIG_LTR501=y CONFIG_LTRF216A=y # CONFIG_LV0104CS is not set CONFIG_MAX44000=m CONFIG_MAX44009=y # CONFIG_NOA1305 is not set CONFIG_OPT3001=y CONFIG_PA12203001=m # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set CONFIG_STK3310=m CONFIG_ST_UVIS25=m CONFIG_ST_UVIS25_I2C=m CONFIG_ST_UVIS25_SPI=m # CONFIG_TCS3414 is not set CONFIG_TCS3472=m CONFIG_SENSORS_TSL2563=m CONFIG_TSL2583=y CONFIG_TSL2591=y CONFIG_TSL2772=m CONFIG_TSL4531=m # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set CONFIG_VCNL4035=y CONFIG_VEML6030=y CONFIG_VEML6070=y # CONFIG_VL6180 is not set CONFIG_ZOPT2201=y # end of Light sensors # # Magnetometer sensors # CONFIG_AK8974=m CONFIG_AK8975=m # CONFIG_AK09911 is not set CONFIG_BMC150_MAGN=y CONFIG_BMC150_MAGN_I2C=y CONFIG_BMC150_MAGN_SPI=m CONFIG_MAG3110=m # CONFIG_MMC35240 is not set # CONFIG_IIO_ST_MAGN_3AXIS is not set CONFIG_SENSORS_HMC5843=y CONFIG_SENSORS_HMC5843_I2C=m CONFIG_SENSORS_HMC5843_SPI=y CONFIG_SENSORS_RM3100=y CONFIG_SENSORS_RM3100_I2C=m CONFIG_SENSORS_RM3100_SPI=y CONFIG_YAMAHA_YAS530=y # end of Magnetometer sensors # # Multiplexers # CONFIG_IIO_MUX=m # end of Multiplexers # # Inclinometer sensors # # end of Inclinometer sensors CONFIG_IIO_RESCALE_KUNIT_TEST=m CONFIG_IIO_FORMAT_KUNIT_TEST=m # # Triggers - standalone # # CONFIG_IIO_HRTIMER_TRIGGER is not set CONFIG_IIO_INTERRUPT_TRIGGER=y # CONFIG_IIO_STM32_LPTIMER_TRIGGER is not set # CONFIG_IIO_STM32_TIMER_TRIGGER is not set CONFIG_IIO_TIGHTLOOP_TRIGGER=m # CONFIG_IIO_SYSFS_TRIGGER is not set # end of Triggers - standalone # # Linear and angular position sensors # # CONFIG_IQS624_POS is not set # end of Linear and angular position sensors # # Digital potentiometers # CONFIG_AD5110=y # CONFIG_AD5272 is not set CONFIG_DS1803=m # CONFIG_MAX5432 is not set # CONFIG_MAX5481 is not set CONFIG_MAX5487=m # CONFIG_MCP4018 is not set CONFIG_MCP4131=m CONFIG_MCP4531=y CONFIG_MCP41010=y # CONFIG_TPL0102 is not set # end of Digital potentiometers # # Digital potentiostats # # CONFIG_LMP91000 is not set # end of Digital potentiostats # # Pressure sensors # CONFIG_ABP060MG=m CONFIG_BMP280=m CONFIG_BMP280_I2C=m CONFIG_BMP280_SPI=m CONFIG_DLHL60D=m CONFIG_DPS310=m CONFIG_HP03=y CONFIG_ICP10100=y CONFIG_MPL115=m # CONFIG_MPL115_I2C is not set CONFIG_MPL115_SPI=m # CONFIG_MPL3115 is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set # CONFIG_IIO_ST_PRESS is not set CONFIG_T5403=m CONFIG_HP206C=m CONFIG_ZPA2326=m CONFIG_ZPA2326_I2C=m CONFIG_ZPA2326_SPI=m # end of Pressure sensors # # Lightning sensors # # CONFIG_AS3935 is not set # end of Lightning sensors # # Proximity and distance sensors # CONFIG_ISL29501=y CONFIG_LIDAR_LITE_V2=m CONFIG_MB1232=m CONFIG_PING=m # CONFIG_RFD77402 is not set CONFIG_SRF04=y CONFIG_SX_COMMON=y CONFIG_SX9310=y CONFIG_SX9324=m CONFIG_SX9360=m # CONFIG_SX9500 is not set CONFIG_SRF08=y CONFIG_VCNL3020=m CONFIG_VL53L0X_I2C=m # end of Proximity and distance sensors # # Resolver to digital converters # CONFIG_AD2S90=m # CONFIG_AD2S1200 is not set # end of Resolver to digital converters # # Temperature sensors # CONFIG_IQS620AT_TEMP=y # CONFIG_LTC2983 is not set CONFIG_MAXIM_THERMOCOUPLE=m CONFIG_MLX90614=y CONFIG_MLX90632=m CONFIG_TMP006=m # CONFIG_TMP007 is not set CONFIG_TMP117=m CONFIG_TSYS01=y CONFIG_TSYS02D=y CONFIG_MAX31856=m # CONFIG_MAX31865 is not set # end of Temperature sensors CONFIG_NTB=m CONFIG_NTB_MSI=y CONFIG_NTB_IDT=m # CONFIG_NTB_EPF is not set # CONFIG_NTB_SWITCHTEC is not set CONFIG_NTB_PINGPONG=m CONFIG_NTB_TOOL=m CONFIG_NTB_PERF=m CONFIG_NTB_MSI_TEST=m # CONFIG_NTB_TRANSPORT is not set # CONFIG_PWM is not set # # IRQ chip support # # CONFIG_AL_FIC is not set # CONFIG_RENESAS_INTC_IRQPIN is not set # CONFIG_RENESAS_IRQC is not set # CONFIG_RENESAS_RZA1_IRQC is not set # CONFIG_RENESAS_RZG2L_IRQC is not set # CONFIG_SL28CPLD_INTC is not set # CONFIG_TS4800_IRQ is not set # CONFIG_INGENIC_TCU_IRQ is not set # CONFIG_IRQ_UNIPHIER_AIDET is not set # CONFIG_MESON_IRQ_GPIO is not set # CONFIG_IMX_IRQSTEER is not set # CONFIG_IMX_INTMUX is not set # CONFIG_EXYNOS_IRQ_COMBINER is not set # CONFIG_MST_IRQ is not set # CONFIG_MCHP_EIC is not set # CONFIG_SUNPLUS_SP7021_INTC is not set # end of IRQ chip support CONFIG_IPACK_BUS=y CONFIG_BOARD_TPCI200=y CONFIG_SERIAL_IPOCTAL=m CONFIG_RESET_CONTROLLER=y # CONFIG_RESET_A10SR is not set # CONFIG_RESET_ATH79 is not set # CONFIG_RESET_AXS10X is not set # CONFIG_RESET_BCM6345 is not set # CONFIG_RESET_BERLIN is not set # CONFIG_RESET_BRCMSTB is not set # CONFIG_RESET_BRCMSTB_RESCAL is not set # CONFIG_RESET_HSDK is not set # CONFIG_RESET_IMX7 is not set # CONFIG_RESET_LANTIQ is not set # CONFIG_RESET_LPC18XX is not set # CONFIG_RESET_MCHP_SPARX5 is not set # CONFIG_RESET_MESON is not set # CONFIG_RESET_MESON_AUDIO_ARB is not set # CONFIG_RESET_NPCM is not set # CONFIG_RESET_PISTACHIO is not set # CONFIG_RESET_QCOM_AOSS is not set # CONFIG_RESET_QCOM_PDC is not set # CONFIG_RESET_RASPBERRYPI is not set # CONFIG_RESET_RZG2L_USBPHY_CTRL is not set # CONFIG_RESET_SCMI is not set # CONFIG_RESET_SIMPLE is not set # CONFIG_RESET_SOCFPGA is not set # CONFIG_RESET_STARFIVE_JH7100 is not set # CONFIG_RESET_SUNPLUS is not set # CONFIG_RESET_SUNXI is not set # CONFIG_RESET_TI_SCI is not set CONFIG_RESET_TI_SYSCON=y CONFIG_RESET_TI_TPS380X=m # CONFIG_RESET_TN48M_CPLD is not set # CONFIG_RESET_ZYNQ is not set # CONFIG_COMMON_RESET_HI3660 is not set # CONFIG_COMMON_RESET_HI6220 is not set # # PHY Subsystem # CONFIG_GENERIC_PHY=y # CONFIG_PHY_PISTACHIO_USB is not set # CONFIG_USB_LGM_PHY is not set CONFIG_PHY_CAN_TRANSCEIVER=m # CONFIG_PHY_SUN4I_USB is not set # CONFIG_PHY_SUN9I_USB is not set # # PHY drivers for Broadcom platforms # # CONFIG_PHY_BCM63XX_USBH is not set # CONFIG_BCM_KONA_USB2_PHY is not set # end of PHY drivers for Broadcom platforms # CONFIG_PHY_HI6220_USB is not set # CONFIG_PHY_HI3660_USB is not set # CONFIG_PHY_HI3670_USB is not set # CONFIG_PHY_HI3670_PCIE is not set # CONFIG_PHY_HISTB_COMBPHY is not set # CONFIG_PHY_HISI_INNO_USB2 is not set # CONFIG_PHY_INGENIC_USB is not set # CONFIG_PHY_PXA_28NM_HSIC is not set CONFIG_PHY_PXA_28NM_USB2=m # CONFIG_PHY_PXA_USB is not set # CONFIG_PHY_MMP3_USB is not set # CONFIG_PHY_MMP3_HSIC is not set # CONFIG_PHY_CPCAP_USB is not set CONFIG_PHY_QCOM_USB_HS=m # CONFIG_PHY_QCOM_USB_HSIC is not set # CONFIG_PHY_MT7621_PCI is not set # CONFIG_PHY_RALINK_USB is not set # CONFIG_PHY_RCAR_GEN3_USB3 is not set # CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set # CONFIG_PHY_ROCKCHIP_PCIE is not set # CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set CONFIG_PHY_SAMSUNG_USB2=m # CONFIG_PHY_S5PV210_USB2 is not set # CONFIG_PHY_ST_SPEAR1310_MIPHY is not set # CONFIG_PHY_ST_SPEAR1340_MIPHY is not set # CONFIG_PHY_STIH407_USB is not set # CONFIG_PHY_TEGRA194_P2U is not set # CONFIG_PHY_DA8XX_USB is not set # CONFIG_PHY_DM816X_USB is not set # CONFIG_OMAP_CONTROL_PHY is not set # CONFIG_TI_PIPE3 is not set CONFIG_PHY_TUSB1210=m # CONFIG_PHY_INTEL_KEEMBAY_EMMC is not set # CONFIG_PHY_INTEL_KEEMBAY_USB is not set # CONFIG_PHY_INTEL_LGM_EMMC is not set # CONFIG_PHY_XILINX_ZYNQMP is not set # end of PHY Subsystem CONFIG_POWERCAP=y CONFIG_MCB=m CONFIG_MCB_PCI=m # CONFIG_MCB_LPC is not set # CONFIG_RAS is not set CONFIG_USB4=y CONFIG_USB4_DEBUGFS_WRITE=y CONFIG_USB4_DMA_TEST=y # # Android # # CONFIG_ANDROID_BINDER_IPC is not set # end of Android CONFIG_DAX=y CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y # CONFIG_NVMEM_IMX_IIM is not set # CONFIG_NVMEM_IMX_OCOTP is not set # CONFIG_NVMEM_LPC18XX_EEPROM is not set # CONFIG_NVMEM_LPC18XX_OTP is not set # CONFIG_NVMEM_MXS_OCOTP is not set # CONFIG_MTK_EFUSE is not set # CONFIG_MICROCHIP_OTPC is not set # CONFIG_NVMEM_NINTENDO_OTP is not set # CONFIG_QCOM_QFPROM is not set # CONFIG_ROCKCHIP_EFUSE is not set # CONFIG_ROCKCHIP_OTP is not set # CONFIG_NVMEM_BCM_OCOTP is not set # CONFIG_NVMEM_STM32_ROMEM is not set # CONFIG_UNIPHIER_EFUSE is not set # CONFIG_NVMEM_VF610_OCOTP is not set # CONFIG_MESON_MX_EFUSE is not set # CONFIG_NVMEM_SNVS_LPGPR is not set # CONFIG_SC27XX_EFUSE is not set # CONFIG_SPRD_EFUSE is not set # CONFIG_NVMEM_RMEM is not set # CONFIG_NVMEM_BRCM_NVRAM is not set # CONFIG_NVMEM_LAYERSCAPE_SFP is not set # CONFIG_NVMEM_SUNPLUS_OCOTP is not set # CONFIG_NVMEM_APPLE_EFUSES is not set # # HW tracing support # CONFIG_STM=y CONFIG_STM_PROTO_BASIC=y CONFIG_STM_PROTO_SYS_T=m CONFIG_STM_DUMMY=m # CONFIG_STM_SOURCE_CONSOLE is not set # CONFIG_STM_SOURCE_HEARTBEAT is not set # CONFIG_INTEL_TH is not set # end of HW tracing support CONFIG_FPGA=m # CONFIG_FPGA_MGR_SOCFPGA is not set # CONFIG_FPGA_MGR_SOCFPGA_A10 is not set CONFIG_ALTERA_PR_IP_CORE=m CONFIG_FPGA_MGR_ALTERA_PS_SPI=m CONFIG_FPGA_MGR_ALTERA_CVP=m # CONFIG_FPGA_MGR_ZYNQ_FPGA is not set CONFIG_FPGA_MGR_XILINX_SPI=m CONFIG_FPGA_MGR_MACHXO2_SPI=m CONFIG_FPGA_BRIDGE=m CONFIG_ALTERA_FREEZE_BRIDGE=m # CONFIG_XILINX_PR_DECOUPLER is not set CONFIG_FPGA_REGION=m # CONFIG_FPGA_DFL is not set # CONFIG_FPGA_MGR_ZYNQMP_FPGA is not set # CONFIG_FPGA_MGR_VERSAL_FPGA is not set # CONFIG_FPGA_M10_BMC_SEC_UPDATE is not set CONFIG_FPGA_MGR_MICROCHIP_SPI=m # CONFIG_TEE is not set CONFIG_MULTIPLEXER=y # # Multiplexer drivers # CONFIG_MUX_ADG792A=y CONFIG_MUX_ADGS1408=y CONFIG_MUX_GPIO=m # CONFIG_MUX_MMIO is not set # end of Multiplexer drivers CONFIG_SIOX=y # CONFIG_SIOX_BUS_GPIO is not set # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set CONFIG_COUNTER=y # CONFIG_104_QUAD_8 is not set CONFIG_INTERRUPT_CNT=y # CONFIG_STM32_TIMER_CNT is not set # CONFIG_STM32_LPTIMER_CNT is not set # CONFIG_TI_EQEP is not set CONFIG_INTEL_QEP=m # CONFIG_MOST is not set # CONFIG_PECI is not set CONFIG_HTE=y # end of Device Drivers # # File systems # # CONFIG_VALIDATE_FS_PARSER is not set CONFIG_FS_IOMAP=y CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=m CONFIG_EXT4_FS_POSIX_ACL=y # CONFIG_EXT4_FS_SECURITY is not set CONFIG_EXT4_DEBUG=y # CONFIG_EXT4_KUNIT_TESTS is not set CONFIG_JBD2=m # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=m # CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set CONFIG_JFS_SECURITY=y CONFIG_JFS_DEBUG=y # CONFIG_JFS_STATISTICS is not set CONFIG_XFS_FS=m # CONFIG_XFS_SUPPORT_V4 is not set CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y # CONFIG_XFS_RT is not set CONFIG_XFS_ONLINE_SCRUB=y # CONFIG_XFS_ONLINE_REPAIR is not set # CONFIG_XFS_WARN is not set # CONFIG_XFS_DEBUG is not set # CONFIG_GFS2_FS is not set CONFIG_BTRFS_FS=y CONFIG_BTRFS_FS_POSIX_ACL=y # CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set CONFIG_BTRFS_ASSERT=y CONFIG_BTRFS_FS_REF_VERIFY=y CONFIG_NILFS2_FS=m CONFIG_F2FS_FS=y # CONFIG_F2FS_STAT_FS is not set # CONFIG_F2FS_FS_XATTR is not set # CONFIG_F2FS_CHECK_FS is not set CONFIG_F2FS_FAULT_INJECTION=y # CONFIG_F2FS_FS_COMPRESSION is not set # CONFIG_F2FS_IOSTAT is not set # CONFIG_F2FS_UNFAIR_RWSEM is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_FILE_LOCKING=y # CONFIG_FS_ENCRYPTION is not set CONFIG_FS_VERITY=y # CONFIG_FS_VERITY_DEBUG is not set CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_FANOTIFY is not set CONFIG_QUOTA=y # CONFIG_PRINT_QUOTA_WARNING is not set # CONFIG_QUOTA_DEBUG is not set CONFIG_QUOTA_TREE=m CONFIG_QFMT_V1=y CONFIG_QFMT_V2=m CONFIG_QUOTACTL=y # CONFIG_AUTOFS4_FS is not set CONFIG_AUTOFS_FS=m CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set CONFIG_OVERLAY_FS=y CONFIG_OVERLAY_FS_REDIRECT_DIR=y # CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW is not set CONFIG_OVERLAY_FS_INDEX=y CONFIG_OVERLAY_FS_XINO_AUTO=y CONFIG_OVERLAY_FS_METACOPY=y # # Caches # # CONFIG_FSCACHE is not set # end of Caches # # CD-ROM/DVD Filesystems # # CONFIG_ISO9660_FS is not set CONFIG_UDF_FS=m # end of CD-ROM/DVD Filesystems # # DOS/FAT/EXFAT/NT Filesystems # CONFIG_FAT_FS=m CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_FAT_DEFAULT_UTF8=y CONFIG_FAT_KUNIT_TEST=m CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" CONFIG_NTFS_FS=m CONFIG_NTFS_DEBUG=y CONFIG_NTFS3_FS=y CONFIG_NTFS3_64BIT_CLUSTER=y CONFIG_NTFS3_LZX_XPRESS=y CONFIG_NTFS3_FS_POSIX_ACL=y # end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y # CONFIG_PROC_VMCORE is not set CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_PROC_CHILDREN=y CONFIG_KERNFS=y CONFIG_SYSFS=y # CONFIG_TMPFS is not set # CONFIG_HUGETLBFS is not set CONFIG_CONFIGFS_FS=y CONFIG_EFIVAR_FS=y # end of Pseudo filesystems CONFIG_MISC_FILESYSTEMS=y CONFIG_ORANGEFS_FS=y CONFIG_ADFS_FS=y CONFIG_ADFS_FS_RW=y CONFIG_AFFS_FS=y # CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set CONFIG_HFSPLUS_FS=m # CONFIG_BEFS_FS is not set CONFIG_BFS_FS=y CONFIG_EFS_FS=m CONFIG_JFFS2_FS=m CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y CONFIG_JFFS2_FS_WBUF_VERIFY=y # CONFIG_JFFS2_SUMMARY is not set # CONFIG_JFFS2_FS_XATTR is not set CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_JFFS2_ZLIB=y # CONFIG_JFFS2_LZO is not set # CONFIG_JFFS2_RTIME is not set # CONFIG_JFFS2_RUBIN is not set # CONFIG_JFFS2_CMODE_NONE is not set # CONFIG_JFFS2_CMODE_PRIORITY is not set CONFIG_JFFS2_CMODE_SIZE=y # CONFIG_JFFS2_CMODE_FAVOURLZO is not set # CONFIG_UBIFS_FS is not set CONFIG_CRAMFS=m CONFIG_CRAMFS_BLOCKDEV=y # CONFIG_CRAMFS_MTD is not set # CONFIG_SQUASHFS is not set CONFIG_VXFS_FS=y CONFIG_MINIX_FS=y # CONFIG_OMFS_FS is not set CONFIG_HPFS_FS=y CONFIG_QNX4FS_FS=m CONFIG_QNX6FS_FS=m CONFIG_QNX6FS_DEBUG=y CONFIG_ROMFS_FS=m # CONFIG_ROMFS_BACKED_BY_BLOCK is not set CONFIG_ROMFS_BACKED_BY_MTD=y # CONFIG_ROMFS_BACKED_BY_BOTH is not set CONFIG_ROMFS_ON_MTD=y CONFIG_PSTORE=y CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240 CONFIG_PSTORE_DEFLATE_COMPRESS=m # CONFIG_PSTORE_LZO_COMPRESS is not set CONFIG_PSTORE_LZ4_COMPRESS=m CONFIG_PSTORE_LZ4HC_COMPRESS=y # CONFIG_PSTORE_842_COMPRESS is not set # CONFIG_PSTORE_ZSTD_COMPRESS is not set CONFIG_PSTORE_COMPRESS=y CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y # CONFIG_PSTORE_LZ4_COMPRESS_DEFAULT is not set # CONFIG_PSTORE_LZ4HC_COMPRESS_DEFAULT is not set CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" # CONFIG_PSTORE_CONSOLE is not set # CONFIG_PSTORE_PMSG is not set CONFIG_PSTORE_RAM=y CONFIG_PSTORE_ZONE=y CONFIG_PSTORE_BLK=y CONFIG_PSTORE_BLK_BLKDEV="" CONFIG_PSTORE_BLK_KMSG_SIZE=64 CONFIG_PSTORE_BLK_MAX_REASON=2 CONFIG_SYSV_FS=y CONFIG_UFS_FS=y CONFIG_UFS_FS_WRITE=y # CONFIG_UFS_DEBUG is not set CONFIG_EROFS_FS=m CONFIG_EROFS_FS_DEBUG=y CONFIG_EROFS_FS_XATTR=y # CONFIG_EROFS_FS_POSIX_ACL is not set # CONFIG_EROFS_FS_SECURITY is not set # CONFIG_EROFS_FS_ZIP is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=m # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set CONFIG_NLS_CODEPAGE_850=y CONFIG_NLS_CODEPAGE_852=y CONFIG_NLS_CODEPAGE_855=m # CONFIG_NLS_CODEPAGE_857 is not set CONFIG_NLS_CODEPAGE_860=y # CONFIG_NLS_CODEPAGE_861 is not set # CONFIG_NLS_CODEPAGE_862 is not set # CONFIG_NLS_CODEPAGE_863 is not set CONFIG_NLS_CODEPAGE_864=y # CONFIG_NLS_CODEPAGE_865 is not set CONFIG_NLS_CODEPAGE_866=y # CONFIG_NLS_CODEPAGE_869 is not set CONFIG_NLS_CODEPAGE_936=y # CONFIG_NLS_CODEPAGE_950 is not set CONFIG_NLS_CODEPAGE_932=y CONFIG_NLS_CODEPAGE_949=m CONFIG_NLS_CODEPAGE_874=y # CONFIG_NLS_ISO8859_8 is not set # CONFIG_NLS_CODEPAGE_1250 is not set CONFIG_NLS_CODEPAGE_1251=y CONFIG_NLS_ASCII=m CONFIG_NLS_ISO8859_1=m CONFIG_NLS_ISO8859_2=m CONFIG_NLS_ISO8859_3=m # CONFIG_NLS_ISO8859_4 is not set CONFIG_NLS_ISO8859_5=y CONFIG_NLS_ISO8859_6=y CONFIG_NLS_ISO8859_7=m CONFIG_NLS_ISO8859_9=m # CONFIG_NLS_ISO8859_13 is not set CONFIG_NLS_ISO8859_14=y CONFIG_NLS_ISO8859_15=y # CONFIG_NLS_KOI8_R is not set CONFIG_NLS_KOI8_U=m # CONFIG_NLS_MAC_ROMAN is not set CONFIG_NLS_MAC_CELTIC=y CONFIG_NLS_MAC_CENTEURO=m CONFIG_NLS_MAC_CROATIAN=y CONFIG_NLS_MAC_CYRILLIC=y CONFIG_NLS_MAC_GAELIC=m CONFIG_NLS_MAC_GREEK=y CONFIG_NLS_MAC_ICELAND=m CONFIG_NLS_MAC_INUIT=m # CONFIG_NLS_MAC_ROMANIAN is not set CONFIG_NLS_MAC_TURKISH=y CONFIG_NLS_UTF8=y CONFIG_UNICODE=m # CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set CONFIG_IO_WQ=y # end of File systems # # Security options # CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set CONFIG_TRUSTED_KEYS=y # # No trust source selected! # # CONFIG_ENCRYPTED_KEYS is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set CONFIG_SECURITY=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y CONFIG_SECURITY_PATH=y CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y # CONFIG_HARDENED_USERCOPY is not set # CONFIG_STATIC_USERMODEHELPER is not set # CONFIG_SECURITY_LOADPIN is not set # CONFIG_SECURITY_YAMA is not set CONFIG_SECURITY_SAFESETID=y # CONFIG_SECURITY_LOCKDOWN_LSM is not set CONFIG_SECURITY_LANDLOCK=y CONFIG_INTEGRITY=y CONFIG_INTEGRITY_SIGNATURE=y CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y CONFIG_INTEGRITY_TRUSTED_KEYRING=y # CONFIG_IMA is not set # CONFIG_EVM is not set CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf" # # Kernel hardening options # # # Memory initialization # CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y # CONFIG_INIT_STACK_NONE is not set # CONFIG_INIT_STACK_ALL_PATTERN is not set CONFIG_INIT_STACK_ALL_ZERO=y CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization CONFIG_RANDSTRUCT_NONE=y # end of Kernel hardening options # end of Security options CONFIG_XOR_BLOCKS=y CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y CONFIG_CRYPTO_KPP=m CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set # CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set CONFIG_CRYPTO_GF128MUL=m CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_PCRYPT is not set CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_TEST=m # # Public-key cryptography # CONFIG_CRYPTO_RSA=y # CONFIG_CRYPTO_DH is not set CONFIG_CRYPTO_ECC=y CONFIG_CRYPTO_ECDH=m CONFIG_CRYPTO_ECDSA=y # CONFIG_CRYPTO_ECRDSA is not set CONFIG_CRYPTO_SM2=y # CONFIG_CRYPTO_CURVE25519 is not set # # Authenticated Encryption with Associated Data # # CONFIG_CRYPTO_CCM is not set CONFIG_CRYPTO_GCM=m # CONFIG_CRYPTO_CHACHA20POLY1305 is not set CONFIG_CRYPTO_AEGIS128=y CONFIG_CRYPTO_SEQIV=y # CONFIG_CRYPTO_ECHAINIV is not set # # Block modes # CONFIG_CRYPTO_CBC=m # CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=m CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_LRW is not set CONFIG_CRYPTO_OFB=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_XTS=y CONFIG_CRYPTO_KEYWRAP=m # CONFIG_CRYPTO_ADIANTUM is not set # CONFIG_CRYPTO_HCTR2 is not set CONFIG_CRYPTO_ESSIV=y # # Hash modes # CONFIG_CRYPTO_CMAC=y CONFIG_CRYPTO_HMAC=y # CONFIG_CRYPTO_XCBC is not set CONFIG_CRYPTO_VMAC=m # # Digest # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_XXHASH=y CONFIG_CRYPTO_BLAKE2B=y CONFIG_CRYPTO_CRCT10DIF=y CONFIG_CRYPTO_CRC64_ROCKSOFT=m CONFIG_CRYPTO_GHASH=m CONFIG_CRYPTO_POLY1305=y CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD5=y # CONFIG_CRYPTO_MICHAEL_MIC is not set # CONFIG_CRYPTO_RMD160 is not set CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=y CONFIG_CRYPTO_SM3_GENERIC=m CONFIG_CRYPTO_STREEBOG=m # CONFIG_CRYPTO_WP512 is not set # # Ciphers # CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_AES_TI is not set CONFIG_CRYPTO_BLOWFISH=y CONFIG_CRYPTO_BLOWFISH_COMMON=y CONFIG_CRYPTO_CAMELLIA=y CONFIG_CRYPTO_CAST_COMMON=y CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=y CONFIG_CRYPTO_DES=y # CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_CHACHA20 is not set CONFIG_CRYPTO_ARIA=m # CONFIG_CRYPTO_SERPENT is not set CONFIG_CRYPTO_SM4=m CONFIG_CRYPTO_SM4_GENERIC=m # CONFIG_CRYPTO_TWOFISH is not set # # Compression # CONFIG_CRYPTO_DEFLATE=m # CONFIG_CRYPTO_LZO is not set CONFIG_CRYPTO_842=y CONFIG_CRYPTO_LZ4=y CONFIG_CRYPTO_LZ4HC=y # CONFIG_CRYPTO_ZSTD is not set # # Random Number Generation # CONFIG_CRYPTO_ANSI_CPRNG=y CONFIG_CRYPTO_DRBG_MENU=y CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_HASH is not set # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_HASH_INFO=y # CONFIG_CRYPTO_HW is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y CONFIG_X509_CERTIFICATE_PARSER=y # CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set # CONFIG_SIGNED_PE_FILE_VERIFICATION is not set CONFIG_FIPS_SIGNATURE_SELFTEST=y # # Certificates for signature checking # CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set # CONFIG_SECONDARY_TRUSTED_KEYRING is not set # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # end of Certificates for signature checking # # Library routines # CONFIG_RAID6_PQ=y # CONFIG_RAID6_PQ_BENCHMARK is not set CONFIG_LINEAR_RANGES=y CONFIG_PACKING=y CONFIG_BITREVERSE=y CONFIG_ARCH_HAS_STRNCPY_FROM_USER=y CONFIG_ARCH_HAS_STRNLEN_USER=y CONFIG_CORDIC=y CONFIG_PRIME_NUMBERS=m CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y # # Crypto library routines # CONFIG_CRYPTO_LIB_AES=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y CONFIG_CRYPTO_LIB_CHACHA=y # CONFIG_CRYPTO_LIB_CURVE25519 is not set CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y CONFIG_CRYPTO_LIB_POLY1305=y CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y # end of Crypto library routines CONFIG_LIB_MEMNEQ=y CONFIG_CRC_CCITT=m CONFIG_CRC16=y CONFIG_CRC_T10DIF=y CONFIG_CRC64_ROCKSOFT=m CONFIG_CRC_ITU_T=y CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set # CONFIG_CRC32_SLICEBY8 is not set CONFIG_CRC32_SLICEBY4=y # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set CONFIG_CRC64=y CONFIG_CRC4=m CONFIG_CRC7=m CONFIG_LIBCRC32C=y CONFIG_CRC8=y CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_842_COMPRESS=y CONFIG_842_DECOMPRESS=y CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_LZ4_COMPRESS=y CONFIG_LZ4HC_COMPRESS=y CONFIG_LZ4_DECOMPRESS=y CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_SPARC=y CONFIG_XZ_DEC_MICROLZMA=y CONFIG_XZ_DEC_BCJ=y CONFIG_XZ_DEC_TEST=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_REED_SOLOMON=y CONFIG_REED_SOLOMON_ENC8=y CONFIG_REED_SOLOMON_DEC8=y CONFIG_REED_SOLOMON_ENC16=y CONFIG_REED_SOLOMON_DEC16=y CONFIG_BCH=y CONFIG_INTERVAL_TREE=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_HAS_DMA_MARK_CLEAN=y CONFIG_SWIOTLB=y CONFIG_DMA_API_DEBUG=y # CONFIG_DMA_API_DEBUG_SG is not set CONFIG_DMA_MAP_BENCHMARK=y CONFIG_SGL_ALLOC=y # CONFIG_CPUMASK_OFFSTACK is not set CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y CONFIG_SIGNATURE=y CONFIG_OID_REGISTRY=y CONFIG_UCS2_STRING=y CONFIG_SG_POOL=y CONFIG_MEMREGION=y CONFIG_STACKDEPOT=y CONFIG_SBITMAP=y # CONFIG_PARMAN is not set # CONFIG_OBJAGG is not set # end of Library routines # # Kernel hacking # # # printk and dmesg options # # CONFIG_PRINTK_TIME is not set # CONFIG_PRINTK_CALLER is not set CONFIG_STACKTRACE_BUILD_ID=y CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 CONFIG_BOOT_PRINTK_DELAY=y CONFIG_DYNAMIC_DEBUG=y CONFIG_DYNAMIC_DEBUG_CORE=y # CONFIG_SYMBOLIC_ERRNAME is not set # end of printk and dmesg options CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_MISC is not set # # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_INFO_NONE is not set CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_DEBUG_INFO_DWARF5 is not set # CONFIG_DEBUG_INFO_REDUCED is not set CONFIG_DEBUG_INFO_COMPRESSED=y # CONFIG_DEBUG_INFO_SPLIT is not set CONFIG_PAHOLE_HAS_SPLIT_BTF=y # CONFIG_GDB_SCRIPTS is not set CONFIG_FRAME_WARN=2048 CONFIG_STRIP_ASM_SYMS=y CONFIG_READABLE_ASM=y CONFIG_HEADERS_INSTALL=y CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_SECTION_MISMATCH_WARN_ONLY=y # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # end of Compile-time checks and compiler options # # Generic Kernel Debugging Instruments # CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 # CONFIG_MAGIC_SYSRQ_SERIAL is not set CONFIG_DEBUG_FS=y # CONFIG_DEBUG_FS_ALLOW_ALL is not set CONFIG_DEBUG_FS_DISALLOW_MOUNT=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_UBSAN=y CONFIG_CC_HAS_UBSAN_BOUNDS=y CONFIG_UBSAN_BOUNDS=y CONFIG_UBSAN_ONLY_BOUNDS=y CONFIG_UBSAN_SHIFT=y # CONFIG_UBSAN_DIV_ZERO is not set CONFIG_UBSAN_UNREACHABLE=y # CONFIG_UBSAN_BOOL is not set CONFIG_UBSAN_ENUM=y CONFIG_TEST_UBSAN=m CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments # # Networking Debugging # # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set # end of Networking Debugging # # Memory Debugging # CONFIG_PAGE_EXTENSION=y # CONFIG_DEBUG_PAGEALLOC is not set CONFIG_SLUB_DEBUG=y # CONFIG_SLUB_DEBUG_ON is not set CONFIG_PAGE_OWNER=y # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_OBJECTS is not set CONFIG_SHRINKER_DEBUG=y # CONFIG_SCHED_STACK_END_CHECK is not set # CONFIG_DEBUG_VM is not set CONFIG_DEBUG_MEMORY_INIT=y CONFIG_DEBUG_PER_CPU_MAPS=y CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # end of Memory Debugging CONFIG_DEBUG_SHIRQ=y # # Debug Oops, Lockups and Hangs # # CONFIG_PANIC_ON_OOPS is not set CONFIG_PANIC_ON_OOPS_VALUE=0 CONFIG_PANIC_TIMEOUT=0 CONFIG_LOCKUP_DETECTOR=y CONFIG_SOFTLOCKUP_DETECTOR=y # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set CONFIG_DETECT_HUNG_TASK=y CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y # CONFIG_WQ_WATCHDOG is not set # CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs # # Scheduler Debugging # CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set # end of Scheduler Debugging CONFIG_DEBUG_TIMEKEEPING=y # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_DEBUG_RT_MUTEXES=y CONFIG_DEBUG_SPINLOCK=y # CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_RWSEMS is not set CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set CONFIG_LOCK_TORTURE_TEST=m CONFIG_WW_MUTEX_SELFTEST=m CONFIG_SCF_TORTURE_TEST=y CONFIG_CSD_LOCK_WAIT_DEBUG=y # end of Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_DEBUG_IRQFLAGS is not set CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set CONFIG_DEBUG_KOBJECT=y # # Debug kernel data structures # CONFIG_DEBUG_LIST=y # CONFIG_DEBUG_PLIST is not set # CONFIG_DEBUG_SG is not set CONFIG_DEBUG_NOTIFIERS=y CONFIG_BUG_ON_DATA_CORRUPTION=y # end of Debug kernel data structures # CONFIG_DEBUG_CREDENTIALS is not set # # RCU Debugging # CONFIG_TORTURE_TEST=y CONFIG_RCU_SCALE_TEST=y CONFIG_RCU_TORTURE_TEST=y # CONFIG_RCU_REF_SCALE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=21 CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_RCU_TRACE is not set CONFIG_RCU_EQS_DEBUG=y # end of RCU Debugging CONFIG_DEBUG_WQ_FORCE_RR_CPU=y CONFIG_CPU_HOTPLUG_STATE_CONTROL=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y # CONFIG_SAMPLES is not set # # ia64 Debugging # CONFIG_IA64_GRANULE_16MB=y CONFIG_IA64_PRINT_HAZARDS=y # CONFIG_DISABLE_VHPT is not set # CONFIG_IA64_DEBUG_CMPXCHG is not set CONFIG_IA64_DEBUG_IRQ=y # end of ia64 Debugging # # Kernel Testing and Coverage # CONFIG_KUNIT=m CONFIG_KUNIT_DEBUGFS=y CONFIG_KUNIT_TEST=m CONFIG_KUNIT_EXAMPLE_TEST=m # CONFIG_KUNIT_ALL_TESTS is not set # CONFIG_NOTIFIER_ERROR_INJECTION is not set CONFIG_FAULT_INJECTION=y CONFIG_FAILSLAB=y # CONFIG_FAIL_PAGE_ALLOC is not set CONFIG_FAULT_INJECTION_USERCOPY=y # CONFIG_FAIL_MAKE_REQUEST is not set CONFIG_FAIL_IO_TIMEOUT=y # CONFIG_FAIL_FUTEX is not set CONFIG_FAULT_INJECTION_DEBUG_FS=y CONFIG_FAIL_MMC_REQUEST=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_CPUMASK_KUNIT_TEST is not set # CONFIG_TEST_LIST_SORT is not set # CONFIG_TEST_MIN_HEAP is not set CONFIG_TEST_SORT=m # CONFIG_TEST_DIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set CONFIG_RBTREE_TEST=y CONFIG_REED_SOLOMON_TEST=m # CONFIG_INTERVAL_TREE_TEST is not set # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set CONFIG_TEST_HEXDUMP=m CONFIG_STRING_SELFTEST=y CONFIG_TEST_STRING_HELPERS=m # CONFIG_TEST_STRSCPY is not set CONFIG_TEST_KSTRTOX=y CONFIG_TEST_PRINTF=m CONFIG_TEST_SCANF=y CONFIG_TEST_BITMAP=m CONFIG_TEST_UUID=y # CONFIG_TEST_XARRAY is not set CONFIG_TEST_RHASHTABLE=m # CONFIG_TEST_SIPHASH is not set CONFIG_TEST_IDA=m CONFIG_TEST_LKM=m # CONFIG_TEST_BITOPS is not set CONFIG_TEST_VMALLOC=m CONFIG_TEST_USER_COPY=m # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set CONFIG_TEST_SYSCTL=m CONFIG_BITFIELD_KUNIT=m CONFIG_HASH_KUNIT_TEST=m CONFIG_RESOURCE_KUNIT_TEST=m CONFIG_SYSCTL_KUNIT_TEST=m # CONFIG_LIST_KUNIT_TEST is not set CONFIG_LINEAR_RANGES_TEST=m # CONFIG_CMDLINE_KUNIT_TEST is not set CONFIG_BITS_TEST=m CONFIG_SLUB_KUNIT_TEST=m CONFIG_MEMCPY_KUNIT_TEST=m CONFIG_OVERFLOW_KUNIT_TEST=m # CONFIG_STACKINIT_KUNIT_TEST is not set CONFIG_TEST_UDELAY=y CONFIG_TEST_STATIC_KEYS=m CONFIG_TEST_MEMCAT_P=m CONFIG_TEST_MEMINIT=m CONFIG_TEST_FREE_PAGES=m # end of Kernel Testing and Coverage # CONFIG_WARN_MISSING_DOCUMENTS is not set # CONFIG_WARN_ABI_ERRORS is not set # end of Kernel hacking ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver 2022-10-06 14:07 ` [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver Cosmin Tanislav 2022-10-07 2:45 ` kernel test robot 2022-10-08 13:01 ` kernel test robot @ 2022-10-09 17:31 ` Jonathan Cameron 2022-10-17 7:08 ` Cosmin Tanislav 2 siblings, 1 reply; 8+ messages in thread From: Jonathan Cameron @ 2022-10-09 17:31 UTC (permalink / raw) To: Cosmin Tanislav Cc: Rob Herring, Linus Walleij, linux-iio, linux-gpio, linux-kernel, devicetree, Cosmin Tanislav, Andy Shevchenko On Thu, 6 Oct 2022 17:07:37 +0300 Cosmin Tanislav <demonsingur@gmail.com> wrote: > AD4130-8 is an ultra-low power, high precision, measurement solution for > low bandwidth battery operated applications. > > The fully integrated AFE (Analog Front-End) includes a multiplexer for up > to 16 single-ended or 8 differential inputs, PGA (Programmable Gain > Amplifier), 24-bit Sigma-Delta ADC, on-chip reference and oscillator, > selectable filter options, smart sequencer, sensor biasing and excitation > options, diagnostics, and a FIFO buffer. > > Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com> > Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Hi Cosmin, I've cropped down (mostly) to the clock changes. A few minor things in there + this looks like it would suffer from the issue with IIO_CONST_ATTR() not being handled correctly for buffer attributes. Jonathan > +static IIO_CONST_ATTR(hwfifo_watermark_min, "1"); > +static IIO_CONST_ATTR(hwfifo_watermark_max, __stringify(AD4130_FIFO_SIZE)); These look like they'd suffer from same problem https://lore.kernel.org/all/cover.1664782676.git.mazziesaccount@gmail.com/ tackles. Short term fix is don't use IIO_CONST_ATTR for buffer attributes. > +static IIO_DEVICE_ATTR_RO(hwfifo_watermark, 0); > +static IIO_DEVICE_ATTR_RO(hwfifo_enabled, 0); > + > +static const struct attribute *ad4130_fifo_attributes[] = { > + &iio_const_attr_hwfifo_watermark_min.dev_attr.attr, > + &iio_const_attr_hwfifo_watermark_max.dev_attr.attr, > + &iio_dev_attr_hwfifo_watermark.dev_attr.attr, > + &iio_dev_attr_hwfifo_enabled.dev_attr.attr, > + NULL > +}; > +static void ad4130_clk_disable_unprepare(void *clk) > +{ > + clk_disable_unprepare(clk); > +} > + > +static int ad4130_set_mclk_sel(struct ad4130_state *st, > + enum ad4130_mclk_sel mclk_sel) > +{ > + return regmap_update_bits(st->regmap, AD4130_ADC_CONTROL_REG, > + AD4130_ADC_CONTROL_MCLK_SEL_MASK, > + FIELD_PREP(AD4130_ADC_CONTROL_MCLK_SEL_MASK, > + mclk_sel)); > +} > + > +static unsigned long ad4130_int_clk_recalc_rate(struct clk_hw *hw, > + unsigned long parent_rate) > +{ > + return AD4130_MCLK_FREQ_76_8KHZ; > +} > + > +static int ad4130_int_clk_is_enabled(struct clk_hw *hw) > +{ > + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); > + > + return st->mclk_sel == AD4130_MCLK_76_8KHZ_OUT; > +} > + > +static int ad4130_int_clk_prepare(struct clk_hw *hw) > +{ > + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); > + int ret; > + > + ret = ad4130_set_mclk_sel(st, AD4130_MCLK_76_8KHZ_OUT); > + if (ret) > + return ret; > + > + st->mclk_sel = AD4130_MCLK_76_8KHZ_OUT; > + > + return 0; > +} > + > +static void ad4130_int_clk_unprepare(struct clk_hw *hw) > +{ > + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); > + int ret; > + > + ret = ad4130_set_mclk_sel(st, AD4130_MCLK_76_8KHZ); > + if (ret) > + return; > + > + st->mclk_sel = AD4130_MCLK_76_8KHZ; > +} > + > +static const struct clk_ops ad4130_int_clk_ops = { > + .recalc_rate = ad4130_int_clk_recalc_rate, > + .is_enabled = ad4130_int_clk_is_enabled, > + .prepare = ad4130_int_clk_prepare, > + .unprepare = ad4130_int_clk_unprepare, > +}; > + > +static int ad4130_setup_int_clk(struct ad4130_state *st) > +{ > + struct device *dev = &st->spi->dev; > + struct device_node *of_node = dev->of_node; Hmm. There goes our careful use of generic firmware properties. I guess there still isn't much we can do about that for clks so at least it's contained to this one function. Also is this code safe to of_node == NULL? > + struct clk_init_data init; > + const char *clk_name; > + struct clk *clk; > + > + if (st->int_pin_sel == AD4130_INT_PIN_CLK || > + st->mclk_sel != AD4130_MCLK_76_8KHZ) > + return 0; > + > + clk_name = of_node->name; > + of_property_read_string(of_node, "clock-output-names", &clk_name); Probably want to check success of that read before using it. I'd also expect that these to be optional + doesn't he dt binding need updating to add this stuff? > + > + init.name = clk_name; > + init.ops = &ad4130_int_clk_ops; > + > + st->int_clk_hw.init = &init; > + clk = devm_clk_register(dev, &st->int_clk_hw); > + if (IS_ERR(clk)) > + return PTR_ERR(clk); > + > + return of_clk_add_provider(of_node, of_clk_src_simple_get, clk); > +} > + ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver 2022-10-09 17:31 ` Jonathan Cameron @ 2022-10-17 7:08 ` Cosmin Tanislav 2022-10-20 17:07 ` Jonathan Cameron 0 siblings, 1 reply; 8+ messages in thread From: Cosmin Tanislav @ 2022-10-17 7:08 UTC (permalink / raw) To: Jonathan Cameron Cc: Rob Herring, Linus Walleij, linux-iio, linux-gpio, linux-kernel, devicetree, Cosmin Tanislav, Andy Shevchenko On 10/9/22 20:31, Jonathan Cameron wrote: > On Thu, 6 Oct 2022 17:07:37 +0300 > Cosmin Tanislav <demonsingur@gmail.com> wrote: > >> AD4130-8 is an ultra-low power, high precision, measurement solution for >> low bandwidth battery operated applications. >> >> The fully integrated AFE (Analog Front-End) includes a multiplexer for up >> to 16 single-ended or 8 differential inputs, PGA (Programmable Gain >> Amplifier), 24-bit Sigma-Delta ADC, on-chip reference and oscillator, >> selectable filter options, smart sequencer, sensor biasing and excitation >> options, diagnostics, and a FIFO buffer. >> >> Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com> >> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> > Hi Cosmin, > > I've cropped down (mostly) to the clock changes. > A few minor things in there + this looks like it would suffer from the issue > with IIO_CONST_ATTR() not being handled correctly for buffer attributes. > > Jonathan > > > >> +static IIO_CONST_ATTR(hwfifo_watermark_min, "1"); >> +static IIO_CONST_ATTR(hwfifo_watermark_max, __stringify(AD4130_FIFO_SIZE)); > > These look like they'd suffer from same problem > https://lore.kernel.org/all/cover.1664782676.git.mazziesaccount@gmail.com/ > tackles. Short term fix is don't use IIO_CONST_ATTR for buffer attributes. > Right, this only works downstream. Should I switch to IIO_STATIC_CONST_DEVICE_ATTR? > >> +static IIO_DEVICE_ATTR_RO(hwfifo_watermark, 0); >> +static IIO_DEVICE_ATTR_RO(hwfifo_enabled, 0); >> + >> +static const struct attribute *ad4130_fifo_attributes[] = { >> + &iio_const_attr_hwfifo_watermark_min.dev_attr.attr, >> + &iio_const_attr_hwfifo_watermark_max.dev_attr.attr, >> + &iio_dev_attr_hwfifo_watermark.dev_attr.attr, >> + &iio_dev_attr_hwfifo_enabled.dev_attr.attr, >> + NULL >> +}; > > >> +static void ad4130_clk_disable_unprepare(void *clk) >> +{ >> + clk_disable_unprepare(clk); >> +} >> + >> +static int ad4130_set_mclk_sel(struct ad4130_state *st, >> + enum ad4130_mclk_sel mclk_sel) >> +{ >> + return regmap_update_bits(st->regmap, AD4130_ADC_CONTROL_REG, >> + AD4130_ADC_CONTROL_MCLK_SEL_MASK, >> + FIELD_PREP(AD4130_ADC_CONTROL_MCLK_SEL_MASK, >> + mclk_sel)); >> +} >> + >> +static unsigned long ad4130_int_clk_recalc_rate(struct clk_hw *hw, >> + unsigned long parent_rate) >> +{ >> + return AD4130_MCLK_FREQ_76_8KHZ; >> +} >> + >> +static int ad4130_int_clk_is_enabled(struct clk_hw *hw) >> +{ >> + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); >> + >> + return st->mclk_sel == AD4130_MCLK_76_8KHZ_OUT; >> +} >> + >> +static int ad4130_int_clk_prepare(struct clk_hw *hw) >> +{ >> + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); >> + int ret; >> + >> + ret = ad4130_set_mclk_sel(st, AD4130_MCLK_76_8KHZ_OUT); >> + if (ret) >> + return ret; >> + >> + st->mclk_sel = AD4130_MCLK_76_8KHZ_OUT; >> + >> + return 0; >> +} >> + >> +static void ad4130_int_clk_unprepare(struct clk_hw *hw) >> +{ >> + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); >> + int ret; >> + >> + ret = ad4130_set_mclk_sel(st, AD4130_MCLK_76_8KHZ); >> + if (ret) >> + return; >> + >> + st->mclk_sel = AD4130_MCLK_76_8KHZ; >> +} >> + >> +static const struct clk_ops ad4130_int_clk_ops = { >> + .recalc_rate = ad4130_int_clk_recalc_rate, >> + .is_enabled = ad4130_int_clk_is_enabled, >> + .prepare = ad4130_int_clk_prepare, >> + .unprepare = ad4130_int_clk_unprepare, >> +}; >> + >> +static int ad4130_setup_int_clk(struct ad4130_state *st) >> +{ >> + struct device *dev = &st->spi->dev; >> + struct device_node *of_node = dev->of_node; > > Hmm. There goes our careful use of generic firmware properties. > I guess there still isn't much we can do about that for clks > so at least it's contained to this one function. > > Also is this code safe to of_node == NULL? > No, I guess it is not. I'll fix it. Should I just if (!of_node) return 0; ? >> + struct clk_init_data init; >> + const char *clk_name; >> + struct clk *clk; >> + >> + if (st->int_pin_sel == AD4130_INT_PIN_CLK || >> + st->mclk_sel != AD4130_MCLK_76_8KHZ) >> + return 0; >> + >> + clk_name = of_node->name; >> + of_property_read_string(of_node, "clock-output-names", &clk_name); > > Probably want to check success of that read before using it. > I'd also expect that these to be optional + doesn't he dt binding need > updating to add this stuff? > It does need updating, sorry. of_node->name is the default clk_name, if clock-output-names is present then the of_property_read_string() result will be used instead. If not, there's no trouble, and we don't care about the return value since we have the default clk_name assigned just above. I can also switch to device_property_read_string() here to minimize the damage from using OF. > >> + >> + init.name = clk_name; >> + init.ops = &ad4130_int_clk_ops; >> + >> + st->int_clk_hw.init = &init; >> + clk = devm_clk_register(dev, &st->int_clk_hw); >> + if (IS_ERR(clk)) >> + return PTR_ERR(clk); >> + >> + return of_clk_add_provider(of_node, of_clk_src_simple_get, clk); >> +} >> + ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver 2022-10-17 7:08 ` Cosmin Tanislav @ 2022-10-20 17:07 ` Jonathan Cameron 0 siblings, 0 replies; 8+ messages in thread From: Jonathan Cameron @ 2022-10-20 17:07 UTC (permalink / raw) To: Cosmin Tanislav Cc: Jonathan Cameron, Rob Herring, Linus Walleij, linux-iio, linux-gpio, linux-kernel, devicetree, Cosmin Tanislav, Andy Shevchenko On Mon, 17 Oct 2022 10:08:10 +0300 Cosmin Tanislav <demonsingur@gmail.com> wrote: > On 10/9/22 20:31, Jonathan Cameron wrote: > > On Thu, 6 Oct 2022 17:07:37 +0300 > > Cosmin Tanislav <demonsingur@gmail.com> wrote: > > > >> AD4130-8 is an ultra-low power, high precision, measurement solution for > >> low bandwidth battery operated applications. > >> > >> The fully integrated AFE (Analog Front-End) includes a multiplexer for up > >> to 16 single-ended or 8 differential inputs, PGA (Programmable Gain > >> Amplifier), 24-bit Sigma-Delta ADC, on-chip reference and oscillator, > >> selectable filter options, smart sequencer, sensor biasing and excitation > >> options, diagnostics, and a FIFO buffer. > >> > >> Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com> > >> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> > > Hi Cosmin, > > > > I've cropped down (mostly) to the clock changes. > > A few minor things in there + this looks like it would suffer from the issue > > with IIO_CONST_ATTR() not being handled correctly for buffer attributes. > > > > Jonathan > > > > > > > >> +static IIO_CONST_ATTR(hwfifo_watermark_min, "1"); > >> +static IIO_CONST_ATTR(hwfifo_watermark_max, __stringify(AD4130_FIFO_SIZE)); > > > > These look like they'd suffer from same problem > > https://lore.kernel.org/all/cover.1664782676.git.mazziesaccount@gmail.com/ > > tackles. Short term fix is don't use IIO_CONST_ATTR for buffer attributes. > > > > Right, this only works downstream. > > Should I switch to IIO_STATIC_CONST_DEVICE_ATTR? Depends a bit on timing. For now I'd just put a hand coded equivalent here similar to the patches I've queue in fixes-togreg. Then we can roll this over to IIO_STATIC_CONST_DEVICE_ATTR once that code lands. > > > > >> +static IIO_DEVICE_ATTR_RO(hwfifo_watermark, 0); > >> +static IIO_DEVICE_ATTR_RO(hwfifo_enabled, 0); > >> + > >> +static const struct attribute *ad4130_fifo_attributes[] = { > >> + &iio_const_attr_hwfifo_watermark_min.dev_attr.attr, > >> + &iio_const_attr_hwfifo_watermark_max.dev_attr.attr, > >> + &iio_dev_attr_hwfifo_watermark.dev_attr.attr, > >> + &iio_dev_attr_hwfifo_enabled.dev_attr.attr, > >> + NULL > >> +}; > > > > > >> +static void ad4130_clk_disable_unprepare(void *clk) > >> +{ > >> + clk_disable_unprepare(clk); > >> +} > >> + > >> +static int ad4130_set_mclk_sel(struct ad4130_state *st, > >> + enum ad4130_mclk_sel mclk_sel) > >> +{ > >> + return regmap_update_bits(st->regmap, AD4130_ADC_CONTROL_REG, > >> + AD4130_ADC_CONTROL_MCLK_SEL_MASK, > >> + FIELD_PREP(AD4130_ADC_CONTROL_MCLK_SEL_MASK, > >> + mclk_sel)); > >> +} > >> + > >> +static unsigned long ad4130_int_clk_recalc_rate(struct clk_hw *hw, > >> + unsigned long parent_rate) > >> +{ > >> + return AD4130_MCLK_FREQ_76_8KHZ; > >> +} > >> + > >> +static int ad4130_int_clk_is_enabled(struct clk_hw *hw) > >> +{ > >> + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); > >> + > >> + return st->mclk_sel == AD4130_MCLK_76_8KHZ_OUT; > >> +} > >> + > >> +static int ad4130_int_clk_prepare(struct clk_hw *hw) > >> +{ > >> + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); > >> + int ret; > >> + > >> + ret = ad4130_set_mclk_sel(st, AD4130_MCLK_76_8KHZ_OUT); > >> + if (ret) > >> + return ret; > >> + > >> + st->mclk_sel = AD4130_MCLK_76_8KHZ_OUT; > >> + > >> + return 0; > >> +} > >> + > >> +static void ad4130_int_clk_unprepare(struct clk_hw *hw) > >> +{ > >> + struct ad4130_state *st = container_of(hw, struct ad4130_state, int_clk_hw); > >> + int ret; > >> + > >> + ret = ad4130_set_mclk_sel(st, AD4130_MCLK_76_8KHZ); > >> + if (ret) > >> + return; > >> + > >> + st->mclk_sel = AD4130_MCLK_76_8KHZ; > >> +} > >> + > >> +static const struct clk_ops ad4130_int_clk_ops = { > >> + .recalc_rate = ad4130_int_clk_recalc_rate, > >> + .is_enabled = ad4130_int_clk_is_enabled, > >> + .prepare = ad4130_int_clk_prepare, > >> + .unprepare = ad4130_int_clk_unprepare, > >> +}; > >> + > >> +static int ad4130_setup_int_clk(struct ad4130_state *st) > >> +{ > >> + struct device *dev = &st->spi->dev; > >> + struct device_node *of_node = dev->of_node; > > > > Hmm. There goes our careful use of generic firmware properties. > > I guess there still isn't much we can do about that for clks > > so at least it's contained to this one function. > > > > Also is this code safe to of_node == NULL? > > > > No, I guess it is not. I'll fix it. > Should I just > if (!of_node) return 0; > ? Good question. I guess we are fine just not having the output clock on ACPI platforms. Maybe this is worth a dev_info message to say we are carrying on without them? > > >> + struct clk_init_data init; > >> + const char *clk_name; > >> + struct clk *clk; > >> + > >> + if (st->int_pin_sel == AD4130_INT_PIN_CLK || > >> + st->mclk_sel != AD4130_MCLK_76_8KHZ) > >> + return 0; > >> + > >> + clk_name = of_node->name; > >> + of_property_read_string(of_node, "clock-output-names", &clk_name); > > > > Probably want to check success of that read before using it. > > I'd also expect that these to be optional + doesn't he dt binding need > > updating to add this stuff? > > > > It does need updating, sorry. > of_node->name is the default clk_name, if clock-output-names is present > then the of_property_read_string() result will be used instead. If not, > there's no trouble, and we don't care about the return value since we > have the default clk_name assigned just above. > I can also switch to device_property_read_string() here to minimize the > damage from using OF. Sounds good to me. Jonathan > > > > >> + > >> + init.name = clk_name; > >> + init.ops = &ad4130_int_clk_ops; > >> + > >> + st->int_clk_hw.init = &init; > >> + clk = devm_clk_register(dev, &st->int_clk_hw); > >> + if (IS_ERR(clk)) > >> + return PTR_ERR(clk); > >> + > >> + return of_clk_add_provider(of_node, of_clk_src_simple_get, clk); > >> +} > >> + ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-10-20 17:07 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-10-06 14:07 [PATCH v9 0/2] AD4130 Cosmin Tanislav 2022-10-06 14:07 ` [PATCH v9 1/2] dt-bindings: iio: adc: add AD4130 Cosmin Tanislav 2022-10-06 14:07 ` [PATCH v9 2/2] iio: adc: ad4130: add AD4130 driver Cosmin Tanislav 2022-10-07 2:45 ` kernel test robot 2022-10-08 13:01 ` kernel test robot 2022-10-09 17:31 ` Jonathan Cameron 2022-10-17 7:08 ` Cosmin Tanislav 2022-10-20 17:07 ` Jonathan Cameron
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