* [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings
@ 2022-10-16 17:21 Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 01/17] arm64: dts: qcom: sm8250: align TLMM pin configuration with DT schema Krzysztof Kozlowski
` (16 more replies)
0 siblings, 17 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:21 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
Hi,
Changes since v2
================
1. Drop drive-strength, reword commit msg of "qcom,sm8250: use common TLMM pin
schema" and "qcom,sc7280: use common TLMM pin schema".
2. Move "dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema" to this
patchset. Previously it was part of:
https://lore.kernel.org/linux-devicetree/20220930192954.242546-1-krzysztof.kozlowski@linaro.org/
3. Add tags.
Changes since v1
================
1. Check for function on non-GPIO pins was moved to common TLMM schema, thus
new patch #12: dt-bindings: pinctrl: qcom,sm8250: drop checks used in common
TLMM
2. Above also makes minor context changes in patch #13 "dt-bindings: pinctrl:
qcom,sm8250: fix matching pin config"
3. Add tags (I am using `b4 trailers` so they might appear in odd order).
Overview
========
This is the *fourth* patchset around Qualcomm pinctrl in recent days:
1. First round of TLMM fixes: merged
2. LPASS fixes:
https://lore.kernel.org/linux-devicetree/20220927153429.55365-1-krzysztof.kozlowski@linaro.org/T/#t
3. ARMv7 TLMM fixes:
https://lore.kernel.org/linux-arm-msm/20221016170035.35014-1-krzysztof.kozlowski@linaro.org/T/#t
4. ARMv8 remaining TLMM fixes: *THIS PATCHSET*
5. Fifth clean - styles and using common TLMM schema:
https://lore.kernel.org/linux-arm-msm/20221011172358.69043-1-krzysztof.kozlowski@linaro.org/T/#m277d25a5f3e9d10ca8221a7fba62ca468a67a60b
Dependencies
============
1. Almost no dependencies - logically the bindings patch "dt-bindings: pinctrl:
qcom,sm8250: drop checks used in common TLMM" depends on patchset #3 above.
This is not a hard-dependency, everything will compile nicely, no warnings.
2. dt-bindings are independent of DTS patches.
Best regards,
Krzysztof
Krzysztof Kozlowski (17):
arm64: dts: qcom: sm8250: align TLMM pin configuration with DT schema
arm64: dts: qcom: sm8250-sony-xperia-edo: fix touchscreen bias-disable
arm64: dts: qcom: sc8280xp: align TLMM pin configuration with DT
schema
arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema
(really)
arm64: dts: qcom: sc7280-herobrine: correct number of gpio-line-names
arm64: dts: qcom: sc7280-idp-ec-h1: add missing QUP GPIO functions
arm64: dts: qcom: msm8953: align TLMM pin configuration with DT schema
arm64: dts: qcom: sdm845: align TLMM pin configuration with DT schema
arm64: dts: qcom: sm6125-sony-xperia: add missing SD CD GPIO functions
arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema
dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and
gpio-line-names
dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schema
dt-bindings: pinctrl: qcom,sm8250: fix matching pin config
dt-bindings: pinctrl: qcom,sm8250: add input-enable
dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOs
dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enable
dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema
.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 28 +-
.../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 140 ++---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 70 +--
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 12 +-
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 8 +-
.../boot/dts/qcom/sc7280-herobrine-crd.dts | 1 +
.../dts/qcom/sc7280-herobrine-evoker-r0.dts | 1 -
.../qcom/sc7280-herobrine-herobrine-r1.dts | 1 -
.../dts/qcom/sc7280-herobrine-villager.dtsi | 1 -
.../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 44 +-
.../arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 10 +-
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 26 +-
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi | 20 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 316 +++++-----
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 12 +-
.../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 12 +-
.../arm64/boot/dts/qcom/sdm845-lg-common.dtsi | 2 +-
.../qcom/sm6125-sony-xperia-seine-pdx201.dts | 2 +
arch/arm64/boot/dts/qcom/sm6125.dtsi | 4 +-
arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 38 +-
.../boot/dts/qcom/sm8250-sony-xperia-edo.dtsi | 18 +-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 556 +++++++-----------
22 files changed, 582 insertions(+), 740 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 01/17] arm64: dts: qcom: sm8250: align TLMM pin configuration with DT schema
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
@ 2022-10-16 17:21 ` Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 02/17] arm64: dts: qcom: sm8250-sony-xperia-edo: fix touchscreen bias-disable Krzysztof Kozlowski
` (15 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:21 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Drop also unneeded split between mux and config.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 12 +-
arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 38 +-
.../boot/dts/qcom/sm8250-sony-xperia-edo.dtsi | 16 +-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 556 +++++++-----------
4 files changed, 239 insertions(+), 383 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index bf8077a1cf9a..62aa32f460ad 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -1210,33 +1210,33 @@ &tlmm {
"HST_WLAN_UART_TX",
"HST_WLAN_UART_RX";
- lt9611_irq_pin: lt9611-irq {
+ lt9611_irq_pin: lt9611-irq-state {
pins = "gpio63";
function = "gpio";
bias-disable;
};
- sdc2_default_state: sdc2-default {
- clk {
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
pins = "sdc2_clk";
bias-disable;
drive-strength = <16>;
};
- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
};
- data {
+ data-pins {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
};
};
- sdc2_card_det_n: sd-card-det-n {
+ sdc2_card_det_n: sd-card-det-n-state {
pins = "gpio77";
function = "gpio";
bias-pull-up;
diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
index a102aa5efa32..9db6136321b4 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
@@ -799,31 +799,19 @@ wcd_tx: wcd9380-tx@0,3 {
&tlmm {
gpio-reserved-ranges = <28 4>, <40 4>;
- wcd938x_reset_default: wcd938x_reset_default {
- mux {
- pins = "gpio32";
- function = "gpio";
- };
-
- config {
- pins = "gpio32";
- drive-strength = <16>;
- output-high;
- };
- };
-
- wcd938x_reset_sleep: wcd938x_reset_sleep {
- mux {
- pins = "gpio32";
- function = "gpio";
- };
-
- config {
- pins = "gpio32";
- drive-strength = <16>;
- bias-disable;
- output-low;
- };
+ wcd938x_reset_default: wcd938x-reset-default-state {
+ pins = "gpio32";
+ function = "gpio";
+ drive-strength = <16>;
+ output-high;
+ };
+
+ wcd938x_reset_sleep: wcd938x-reset-sleep-state {
+ pins = "gpio32";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ output-low;
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
index 549e0a2aa9fe..72162852fae7 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
@@ -582,34 +582,34 @@ &slpi {
&tlmm {
gpio-reserved-ranges = <40 4>, <52 4>;
- sdc2_default_state: sdc2-default {
- clk {
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
pins = "sdc2_clk";
drive-strength = <16>;
bias-disable;
};
- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
drive-strength = <16>;
bias-pull-up;
};
- data {
+ data-pins {
pins = "sdc2_data";
drive-strength = <16>;
bias-pull-up;
};
};
- mdm2ap_default: mdm2ap-default {
+ mdm2ap_default: mdm2ap-default-state {
pins = "gpio1", "gpio3";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
- ts_int_default: ts-int-default {
+ ts_int_default: ts-int-default-state {
pins = "gpio39";
function = "gpio";
drive-strength = <2>;
@@ -617,14 +617,14 @@ ts_int_default: ts-int-default {
input-enable;
};
- ap2mdm_default: ap2mdm-default {
+ ap2mdm_default: ap2mdm-default-state {
pins = "gpio56", "gpio57";
function = "gpio";
drive-strength = <16>;
bias-disable;
};
- sdc2_card_det_n: sd-card-det-n {
+ sdc2_card_det_n: sd-card-det-n-state {
pins = "gpio77";
function = "gpio";
bias-pull-up;
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index e0416d611b66..7eac3ba90c63 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3798,8 +3798,8 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 181>;
wakeup-parent = <&pdc>;
- cci0_default: cci0-default {
- cci0_i2c0_default: cci0-i2c0-default {
+ cci0_default: cci0-default-state {
+ cci0_i2c0_default: cci0-i2c0-default-pins {
/* SDA, SCL */
pins = "gpio101", "gpio102";
function = "cci_i2c";
@@ -3808,7 +3808,7 @@ cci0_i2c0_default: cci0-i2c0-default {
drive-strength = <2>; /* 2 mA */
};
- cci0_i2c1_default: cci0-i2c1-default {
+ cci0_i2c1_default: cci0-i2c1-default-pins {
/* SDA, SCL */
pins = "gpio103", "gpio104";
function = "cci_i2c";
@@ -3818,8 +3818,8 @@ cci0_i2c1_default: cci0-i2c1-default {
};
};
- cci0_sleep: cci0-sleep {
- cci0_i2c0_sleep: cci0-i2c0-sleep {
+ cci0_sleep: cci0-sleep-state {
+ cci0_i2c0_sleep: cci0-i2c0-sleep-pins {
/* SDA, SCL */
pins = "gpio101", "gpio102";
function = "cci_i2c";
@@ -3828,7 +3828,7 @@ cci0_i2c0_sleep: cci0-i2c0-sleep {
bias-pull-down;
};
- cci0_i2c1_sleep: cci0-i2c1-sleep {
+ cci0_i2c1_sleep: cci0-i2c1-sleep-pins {
/* SDA, SCL */
pins = "gpio103", "gpio104";
function = "cci_i2c";
@@ -3838,8 +3838,8 @@ cci0_i2c1_sleep: cci0-i2c1-sleep {
};
};
- cci1_default: cci1-default {
- cci1_i2c0_default: cci1-i2c0-default {
+ cci1_default: cci1-default-state {
+ cci1_i2c0_default: cci1-i2c0-default-pins {
/* SDA, SCL */
pins = "gpio105","gpio106";
function = "cci_i2c";
@@ -3848,7 +3848,7 @@ cci1_i2c0_default: cci1-i2c0-default {
drive-strength = <2>; /* 2 mA */
};
- cci1_i2c1_default: cci1-i2c1-default {
+ cci1_i2c1_default: cci1-i2c1-default-pins {
/* SDA, SCL */
pins = "gpio107","gpio108";
function = "cci_i2c";
@@ -3858,8 +3858,8 @@ cci1_i2c1_default: cci1-i2c1-default {
};
};
- cci1_sleep: cci1-sleep {
- cci1_i2c0_sleep: cci1-i2c0-sleep {
+ cci1_sleep: cci1-sleep-state {
+ cci1_i2c0_sleep: cci1-i2c0-sleep-pins {
/* SDA, SCL */
pins = "gpio105","gpio106";
function = "cci_i2c";
@@ -3868,7 +3868,7 @@ cci1_i2c0_sleep: cci1-i2c0-sleep {
drive-strength = <2>; /* 2 mA */
};
- cci1_i2c1_sleep: cci1-i2c1-sleep {
+ cci1_i2c1_sleep: cci1-i2c1-sleep-pins {
/* SDA, SCL */
pins = "gpio107","gpio108";
function = "cci_i2c";
@@ -3878,22 +3878,22 @@ cci1_i2c1_sleep: cci1-i2c1-sleep {
};
};
- pri_mi2s_active: pri-mi2s-active {
- sclk {
+ pri_mi2s_active: pri-mi2s-active-state {
+ sclk-pins {
pins = "gpio138";
function = "mi2s0_sck";
drive-strength = <8>;
bias-disable;
};
- ws {
+ ws-pins {
pins = "gpio141";
function = "mi2s0_ws";
drive-strength = <8>;
output-high;
};
- data0 {
+ data0-pins {
pins = "gpio139";
function = "mi2s0_data0";
drive-strength = <8>;
@@ -3901,7 +3901,7 @@ data0 {
output-high;
};
- data1 {
+ data1-pins {
pins = "gpio140";
function = "mi2s0_data1";
drive-strength = <8>;
@@ -3909,632 +3909,500 @@ data1 {
};
};
- qup_i2c0_default: qup-i2c0-default {
- mux {
- pins = "gpio28", "gpio29";
- function = "qup0";
- };
-
- config {
- pins = "gpio28", "gpio29";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c0_default: qup-i2c0-default-state {
+ pins = "gpio28", "gpio29";
+ function = "qup0";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c1_default: qup-i2c1-default {
- pinmux {
- pins = "gpio4", "gpio5";
- function = "qup1";
- };
-
- config {
- pins = "gpio4", "gpio5";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c1_default: qup-i2c1-default-state {
+ pins = "gpio4", "gpio5";
+ function = "qup1";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c2_default: qup-i2c2-default {
- mux {
- pins = "gpio115", "gpio116";
- function = "qup2";
- };
-
- config {
- pins = "gpio115", "gpio116";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c2_default: qup-i2c2-default-state {
+ pins = "gpio115", "gpio116";
+ function = "qup2";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c3_default: qup-i2c3-default {
- mux {
- pins = "gpio119", "gpio120";
- function = "qup3";
- };
-
- config {
- pins = "gpio119", "gpio120";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c3_default: qup-i2c3-default-state {
+ pins = "gpio119", "gpio120";
+ function = "qup3";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c4_default: qup-i2c4-default {
- mux {
- pins = "gpio8", "gpio9";
- function = "qup4";
- };
-
- config {
- pins = "gpio8", "gpio9";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c4_default: qup-i2c4-default-state {
+ pins = "gpio8", "gpio9";
+ function = "qup4";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c5_default: qup-i2c5-default {
- mux {
- pins = "gpio12", "gpio13";
- function = "qup5";
- };
-
- config {
- pins = "gpio12", "gpio13";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c5_default: qup-i2c5-default-state {
+ pins = "gpio12", "gpio13";
+ function = "qup5";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c6_default: qup-i2c6-default {
- mux {
- pins = "gpio16", "gpio17";
- function = "qup6";
- };
-
- config {
- pins = "gpio16", "gpio17";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c6_default: qup-i2c6-default-state {
+ pins = "gpio16", "gpio17";
+ function = "qup6";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c7_default: qup-i2c7-default {
- mux {
- pins = "gpio20", "gpio21";
- function = "qup7";
- };
-
- config {
- pins = "gpio20", "gpio21";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c7_default: qup-i2c7-default-state {
+ pins = "gpio20", "gpio21";
+ function = "qup7";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c8_default: qup-i2c8-default {
- mux {
- pins = "gpio24", "gpio25";
- function = "qup8";
- };
-
- config {
- pins = "gpio24", "gpio25";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c8_default: qup-i2c8-default-state {
+ pins = "gpio24", "gpio25";
+ function = "qup8";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c9_default: qup-i2c9-default {
- mux {
- pins = "gpio125", "gpio126";
- function = "qup9";
- };
-
- config {
- pins = "gpio125", "gpio126";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c9_default: qup-i2c9-default-state {
+ pins = "gpio125", "gpio126";
+ function = "qup9";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c10_default: qup-i2c10-default {
- mux {
- pins = "gpio129", "gpio130";
- function = "qup10";
- };
-
- config {
- pins = "gpio129", "gpio130";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c10_default: qup-i2c10-default-state {
+ pins = "gpio129", "gpio130";
+ function = "qup10";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c11_default: qup-i2c11-default {
- mux {
- pins = "gpio60", "gpio61";
- function = "qup11";
- };
-
- config {
- pins = "gpio60", "gpio61";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c11_default: qup-i2c11-default-state {
+ pins = "gpio60", "gpio61";
+ function = "qup11";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c12_default: qup-i2c12-default {
- mux {
- pins = "gpio32", "gpio33";
- function = "qup12";
- };
-
- config {
- pins = "gpio32", "gpio33";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c12_default: qup-i2c12-default-state {
+ pins = "gpio32", "gpio33";
+ function = "qup12";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c13_default: qup-i2c13-default {
- mux {
- pins = "gpio36", "gpio37";
- function = "qup13";
- };
-
- config {
- pins = "gpio36", "gpio37";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c13_default: qup-i2c13-default-state {
+ pins = "gpio36", "gpio37";
+ function = "qup13";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c14_default: qup-i2c14-default {
- mux {
- pins = "gpio40", "gpio41";
- function = "qup14";
- };
-
- config {
- pins = "gpio40", "gpio41";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c14_default: qup-i2c14-default-state {
+ pins = "gpio40", "gpio41";
+ function = "qup14";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c15_default: qup-i2c15-default {
- mux {
- pins = "gpio44", "gpio45";
- function = "qup15";
- };
-
- config {
- pins = "gpio44", "gpio45";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c15_default: qup-i2c15-default-state {
+ pins = "gpio44", "gpio45";
+ function = "qup15";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c16_default: qup-i2c16-default {
- mux {
- pins = "gpio48", "gpio49";
- function = "qup16";
- };
-
- config {
- pins = "gpio48", "gpio49";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c16_default: qup-i2c16-default-state {
+ pins = "gpio48", "gpio49";
+ function = "qup16";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c17_default: qup-i2c17-default {
- mux {
- pins = "gpio52", "gpio53";
- function = "qup17";
- };
-
- config {
- pins = "gpio52", "gpio53";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c17_default: qup-i2c17-default-state {
+ pins = "gpio52", "gpio53";
+ function = "qup17";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c18_default: qup-i2c18-default {
- mux {
- pins = "gpio56", "gpio57";
- function = "qup18";
- };
-
- config {
- pins = "gpio56", "gpio57";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c18_default: qup-i2c18-default-state {
+ pins = "gpio56", "gpio57";
+ function = "qup18";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_i2c19_default: qup-i2c19-default {
- mux {
- pins = "gpio0", "gpio1";
- function = "qup19";
- };
-
- config {
- pins = "gpio0", "gpio1";
- drive-strength = <2>;
- bias-disable;
- };
+ qup_i2c19_default: qup-i2c19-default-state {
+ pins = "gpio0", "gpio1";
+ function = "qup19";
+ drive-strength = <2>;
+ bias-disable;
};
- qup_spi0_cs: qup-spi0-cs {
+ qup_spi0_cs: qup-spi0-cs-state {
pins = "gpio31";
function = "qup0";
};
- qup_spi0_cs_gpio: qup-spi0-cs-gpio {
+ qup_spi0_cs_gpio: qup-spi0-cs-gpio-state {
pins = "gpio31";
function = "gpio";
};
- qup_spi0_data_clk: qup-spi0-data-clk {
+ qup_spi0_data_clk: qup-spi0-data-clk-state {
pins = "gpio28", "gpio29",
"gpio30";
function = "qup0";
};
- qup_spi1_cs: qup-spi1-cs {
+ qup_spi1_cs: qup-spi1-cs-state {
pins = "gpio7";
function = "qup1";
};
- qup_spi1_cs_gpio: qup-spi1-cs-gpio {
+ qup_spi1_cs_gpio: qup-spi1-cs-gpio-state {
pins = "gpio7";
function = "gpio";
};
- qup_spi1_data_clk: qup-spi1-data-clk {
+ qup_spi1_data_clk: qup-spi1-data-clk-state {
pins = "gpio4", "gpio5",
"gpio6";
function = "qup1";
};
- qup_spi2_cs: qup-spi2-cs {
+ qup_spi2_cs: qup-spi2-cs-state {
pins = "gpio118";
function = "qup2";
};
- qup_spi2_cs_gpio: qup-spi2-cs-gpio {
+ qup_spi2_cs_gpio: qup-spi2-cs-gpio-state {
pins = "gpio118";
function = "gpio";
};
- qup_spi2_data_clk: qup-spi2-data-clk {
+ qup_spi2_data_clk: qup-spi2-data-clk-state {
pins = "gpio115", "gpio116",
"gpio117";
function = "qup2";
};
- qup_spi3_cs: qup-spi3-cs {
+ qup_spi3_cs: qup-spi3-cs-state {
pins = "gpio122";
function = "qup3";
};
- qup_spi3_cs_gpio: qup-spi3-cs-gpio {
+ qup_spi3_cs_gpio: qup-spi3-cs-gpio-state {
pins = "gpio122";
function = "gpio";
};
- qup_spi3_data_clk: qup-spi3-data-clk {
+ qup_spi3_data_clk: qup-spi3-data-clk-state {
pins = "gpio119", "gpio120",
"gpio121";
function = "qup3";
};
- qup_spi4_cs: qup-spi4-cs {
+ qup_spi4_cs: qup-spi4-cs-state {
pins = "gpio11";
function = "qup4";
};
- qup_spi4_cs_gpio: qup-spi4-cs-gpio {
+ qup_spi4_cs_gpio: qup-spi4-cs-gpio-state {
pins = "gpio11";
function = "gpio";
};
- qup_spi4_data_clk: qup-spi4-data-clk {
+ qup_spi4_data_clk: qup-spi4-data-clk-state {
pins = "gpio8", "gpio9",
"gpio10";
function = "qup4";
};
- qup_spi5_cs: qup-spi5-cs {
+ qup_spi5_cs: qup-spi5-cs-state {
pins = "gpio15";
function = "qup5";
};
- qup_spi5_cs_gpio: qup-spi5-cs-gpio {
+ qup_spi5_cs_gpio: qup-spi5-cs-gpio-state {
pins = "gpio15";
function = "gpio";
};
- qup_spi5_data_clk: qup-spi5-data-clk {
+ qup_spi5_data_clk: qup-spi5-data-clk-state {
pins = "gpio12", "gpio13",
"gpio14";
function = "qup5";
};
- qup_spi6_cs: qup-spi6-cs {
+ qup_spi6_cs: qup-spi6-cs-state {
pins = "gpio19";
function = "qup6";
};
- qup_spi6_cs_gpio: qup-spi6-cs-gpio {
+ qup_spi6_cs_gpio: qup-spi6-cs-gpio-state {
pins = "gpio19";
function = "gpio";
};
- qup_spi6_data_clk: qup-spi6-data-clk {
+ qup_spi6_data_clk: qup-spi6-data-clk-state {
pins = "gpio16", "gpio17",
"gpio18";
function = "qup6";
};
- qup_spi7_cs: qup-spi7-cs {
+ qup_spi7_cs: qup-spi7-cs-state {
pins = "gpio23";
function = "qup7";
};
- qup_spi7_cs_gpio: qup-spi7-cs-gpio {
+ qup_spi7_cs_gpio: qup-spi7-cs-gpio-state {
pins = "gpio23";
function = "gpio";
};
- qup_spi7_data_clk: qup-spi7-data-clk {
+ qup_spi7_data_clk: qup-spi7-data-clk-state {
pins = "gpio20", "gpio21",
"gpio22";
function = "qup7";
};
- qup_spi8_cs: qup-spi8-cs {
+ qup_spi8_cs: qup-spi8-cs-state {
pins = "gpio27";
function = "qup8";
};
- qup_spi8_cs_gpio: qup-spi8-cs-gpio {
+ qup_spi8_cs_gpio: qup-spi8-cs-gpio-state {
pins = "gpio27";
function = "gpio";
};
- qup_spi8_data_clk: qup-spi8-data-clk {
+ qup_spi8_data_clk: qup-spi8-data-clk-state {
pins = "gpio24", "gpio25",
"gpio26";
function = "qup8";
};
- qup_spi9_cs: qup-spi9-cs {
+ qup_spi9_cs: qup-spi9-cs-state {
pins = "gpio128";
function = "qup9";
};
- qup_spi9_cs_gpio: qup-spi9-cs-gpio {
+ qup_spi9_cs_gpio: qup-spi9-cs-gpio-state {
pins = "gpio128";
function = "gpio";
};
- qup_spi9_data_clk: qup-spi9-data-clk {
+ qup_spi9_data_clk: qup-spi9-data-clk-state {
pins = "gpio125", "gpio126",
"gpio127";
function = "qup9";
};
- qup_spi10_cs: qup-spi10-cs {
+ qup_spi10_cs: qup-spi10-cs-state {
pins = "gpio132";
function = "qup10";
};
- qup_spi10_cs_gpio: qup-spi10-cs-gpio {
+ qup_spi10_cs_gpio: qup-spi10-cs-gpio-state {
pins = "gpio132";
function = "gpio";
};
- qup_spi10_data_clk: qup-spi10-data-clk {
+ qup_spi10_data_clk: qup-spi10-data-clk-state {
pins = "gpio129", "gpio130",
"gpio131";
function = "qup10";
};
- qup_spi11_cs: qup-spi11-cs {
+ qup_spi11_cs: qup-spi11-cs-state {
pins = "gpio63";
function = "qup11";
};
- qup_spi11_cs_gpio: qup-spi11-cs-gpio {
+ qup_spi11_cs_gpio: qup-spi11-cs-gpio-state {
pins = "gpio63";
function = "gpio";
};
- qup_spi11_data_clk: qup-spi11-data-clk {
+ qup_spi11_data_clk: qup-spi11-data-clk-state {
pins = "gpio60", "gpio61",
"gpio62";
function = "qup11";
};
- qup_spi12_cs: qup-spi12-cs {
+ qup_spi12_cs: qup-spi12-cs-state {
pins = "gpio35";
function = "qup12";
};
- qup_spi12_cs_gpio: qup-spi12-cs-gpio {
+ qup_spi12_cs_gpio: qup-spi12-cs-gpio-state {
pins = "gpio35";
function = "gpio";
};
- qup_spi12_data_clk: qup-spi12-data-clk {
+ qup_spi12_data_clk: qup-spi12-data-clk-state {
pins = "gpio32", "gpio33",
"gpio34";
function = "qup12";
};
- qup_spi13_cs: qup-spi13-cs {
+ qup_spi13_cs: qup-spi13-cs-state {
pins = "gpio39";
function = "qup13";
};
- qup_spi13_cs_gpio: qup-spi13-cs-gpio {
+ qup_spi13_cs_gpio: qup-spi13-cs-gpio-state {
pins = "gpio39";
function = "gpio";
};
- qup_spi13_data_clk: qup-spi13-data-clk {
+ qup_spi13_data_clk: qup-spi13-data-clk-state {
pins = "gpio36", "gpio37",
"gpio38";
function = "qup13";
};
- qup_spi14_cs: qup-spi14-cs {
+ qup_spi14_cs: qup-spi14-cs-state {
pins = "gpio43";
function = "qup14";
};
- qup_spi14_cs_gpio: qup-spi14-cs-gpio {
+ qup_spi14_cs_gpio: qup-spi14-cs-gpio-state {
pins = "gpio43";
function = "gpio";
};
- qup_spi14_data_clk: qup-spi14-data-clk {
+ qup_spi14_data_clk: qup-spi14-data-clk-state {
pins = "gpio40", "gpio41",
"gpio42";
function = "qup14";
};
- qup_spi15_cs: qup-spi15-cs {
+ qup_spi15_cs: qup-spi15-cs-state {
pins = "gpio47";
function = "qup15";
};
- qup_spi15_cs_gpio: qup-spi15-cs-gpio {
+ qup_spi15_cs_gpio: qup-spi15-cs-gpio-state {
pins = "gpio47";
function = "gpio";
};
- qup_spi15_data_clk: qup-spi15-data-clk {
+ qup_spi15_data_clk: qup-spi15-data-clk-state {
pins = "gpio44", "gpio45",
"gpio46";
function = "qup15";
};
- qup_spi16_cs: qup-spi16-cs {
+ qup_spi16_cs: qup-spi16-cs-state {
pins = "gpio51";
function = "qup16";
};
- qup_spi16_cs_gpio: qup-spi16-cs-gpio {
+ qup_spi16_cs_gpio: qup-spi16-cs-gpio-state {
pins = "gpio51";
function = "gpio";
};
- qup_spi16_data_clk: qup-spi16-data-clk {
+ qup_spi16_data_clk: qup-spi16-data-clk-state {
pins = "gpio48", "gpio49",
"gpio50";
function = "qup16";
};
- qup_spi17_cs: qup-spi17-cs {
+ qup_spi17_cs: qup-spi17-cs-state {
pins = "gpio55";
function = "qup17";
};
- qup_spi17_cs_gpio: qup-spi17-cs-gpio {
+ qup_spi17_cs_gpio: qup-spi17-cs-gpio-state {
pins = "gpio55";
function = "gpio";
};
- qup_spi17_data_clk: qup-spi17-data-clk {
+ qup_spi17_data_clk: qup-spi17-data-clk-state {
pins = "gpio52", "gpio53",
"gpio54";
function = "qup17";
};
- qup_spi18_cs: qup-spi18-cs {
+ qup_spi18_cs: qup-spi18-cs-state {
pins = "gpio59";
function = "qup18";
};
- qup_spi18_cs_gpio: qup-spi18-cs-gpio {
+ qup_spi18_cs_gpio: qup-spi18-cs-gpio-state {
pins = "gpio59";
function = "gpio";
};
- qup_spi18_data_clk: qup-spi18-data-clk {
+ qup_spi18_data_clk: qup-spi18-data-clk-state {
pins = "gpio56", "gpio57",
"gpio58";
function = "qup18";
};
- qup_spi19_cs: qup-spi19-cs {
+ qup_spi19_cs: qup-spi19-cs-state {
pins = "gpio3";
function = "qup19";
};
- qup_spi19_cs_gpio: qup-spi19-cs-gpio {
+ qup_spi19_cs_gpio: qup-spi19-cs-gpio-state {
pins = "gpio3";
function = "gpio";
};
- qup_spi19_data_clk: qup-spi19-data-clk {
+ qup_spi19_data_clk: qup-spi19-data-clk-state {
pins = "gpio0", "gpio1",
"gpio2";
function = "qup19";
};
- qup_uart2_default: qup-uart2-default {
- mux {
- pins = "gpio117", "gpio118";
- function = "qup2";
- };
+ qup_uart2_default: qup-uart2-default-state {
+ pins = "gpio117", "gpio118";
+ function = "qup2";
};
- qup_uart6_default: qup-uart6-default {
- mux {
- pins = "gpio16", "gpio17",
- "gpio18", "gpio19";
- function = "qup6";
- };
+ qup_uart6_default: qup-uart6-default-state {
+ pins = "gpio16", "gpio17", "gpio18", "gpio19";
+ function = "qup6";
};
- qup_uart12_default: qup-uart12-default {
- mux {
- pins = "gpio34", "gpio35";
- function = "qup12";
- };
+ qup_uart12_default: qup-uart12-default-state {
+ pins = "gpio34", "gpio35";
+ function = "qup12";
};
- qup_uart17_default: qup-uart17-default {
- mux {
- pins = "gpio52", "gpio53",
- "gpio54", "gpio55";
- function = "qup17";
- };
+ qup_uart17_default: qup-uart17-default-state {
+ pins = "gpio52", "gpio53", "gpio54", "gpio55";
+ function = "qup17";
};
- qup_uart18_default: qup-uart18-default {
- mux {
- pins = "gpio58", "gpio59";
- function = "qup18";
- };
+ qup_uart18_default: qup-uart18-default-state {
+ pins = "gpio58", "gpio59";
+ function = "qup18";
};
- tert_mi2s_active: tert-mi2s-active {
- sck {
+ tert_mi2s_active: tert-mi2s-active-state {
+ sck-pins {
pins = "gpio133";
function = "mi2s2_sck";
drive-strength = <8>;
bias-disable;
};
- data0 {
+ data0-pins {
pins = "gpio134";
function = "mi2s2_data0";
drive-strength = <8>;
@@ -4542,7 +4410,7 @@ data0 {
output-high;
};
- ws {
+ ws-pins {
pins = "gpio135";
function = "mi2s2_ws";
drive-strength = <8>;
@@ -4550,42 +4418,42 @@ ws {
};
};
- sdc2_sleep_state: sdc2-sleep {
- clk {
+ sdc2_sleep_state: sdc2-sleep-state {
+ clk-pins {
pins = "sdc2_clk";
drive-strength = <2>;
bias-disable;
};
- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
drive-strength = <2>;
bias-pull-up;
};
- data {
+ data-pins {
pins = "sdc2_data";
drive-strength = <2>;
bias-pull-up;
};
};
- pcie0_default_state: pcie0-default {
- perst {
+ pcie0_default_state: pcie0-default-state {
+ perst-pins {
pins = "gpio79";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
- clkreq {
+ clkreq-pins {
pins = "gpio80";
function = "pci_e0";
drive-strength = <2>;
bias-pull-up;
};
- wake {
+ wake-pins {
pins = "gpio81";
function = "gpio";
drive-strength = <2>;
@@ -4593,22 +4461,22 @@ wake {
};
};
- pcie1_default_state: pcie1-default {
- perst {
+ pcie1_default_state: pcie1-default-state {
+ perst-pins {
pins = "gpio82";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
- clkreq {
+ clkreq-pins {
pins = "gpio83";
function = "pci_e1";
drive-strength = <2>;
bias-pull-up;
};
- wake {
+ wake-pins {
pins = "gpio84";
function = "gpio";
drive-strength = <2>;
@@ -4616,22 +4484,22 @@ wake {
};
};
- pcie2_default_state: pcie2-default {
- perst {
+ pcie2_default_state: pcie2-default-state {
+ perst-pins {
pins = "gpio85";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
- clkreq {
+ clkreq-pins {
pins = "gpio86";
function = "pci_e2";
drive-strength = <2>;
bias-pull-up;
};
- wake {
+ wake-pins {
pins = "gpio87";
function = "gpio";
drive-strength = <2>;
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 02/17] arm64: dts: qcom: sm8250-sony-xperia-edo: fix touchscreen bias-disable
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 01/17] arm64: dts: qcom: sm8250: align TLMM pin configuration with DT schema Krzysztof Kozlowski
@ 2022-10-16 17:21 ` Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 03/17] arm64: dts: qcom: sc8280xp: align TLMM pin configuration with DT schema Krzysztof Kozlowski
` (14 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:21 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
The property to disable bias is "bias-disable".
Fixes: e76c7e1f15fe ("arm64: dts: qcom: sm8250-edo: Add Samsung touchscreen")
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
index 72162852fae7..601a21c381f8 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
@@ -613,7 +613,7 @@ ts_int_default: ts-int-default-state {
pins = "gpio39";
function = "gpio";
drive-strength = <2>;
- bias-disabled;
+ bias-disable;
input-enable;
};
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 03/17] arm64: dts: qcom: sc8280xp: align TLMM pin configuration with DT schema
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 01/17] arm64: dts: qcom: sm8250: align TLMM pin configuration with DT schema Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 02/17] arm64: dts: qcom: sm8250-sony-xperia-edo: fix touchscreen bias-disable Krzysztof Kozlowski
@ 2022-10-16 17:21 ` Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 04/17] arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema (really) Krzysztof Kozlowski
` (13 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:21 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
qcom/sc8280xp-crd.dtb: pinctrl@f100000: kybd-default-state: 'oneOf' conditional failed, one must be fixed:
'pins' is a required property
'function' is a required property
'disable', 'int-n', 'reset' do not match any of the regexes: 'pinctrl-[0-9]+'
'disable', 'int-n', 'reset' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 12 ++++++------
.../boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 12 ++++++------
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
index fea7d8273ccd..a2027f1d1d04 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
@@ -374,19 +374,19 @@ &tlmm {
gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
kybd_default: kybd-default-state {
- disable {
+ disable-pins {
pins = "gpio102";
function = "gpio";
output-low;
};
- int-n {
+ int-n-pins {
pins = "gpio104";
function = "gpio";
bias-disable;
};
- reset {
+ reset-pins {
pins = "gpio105";
function = "gpio";
bias-disable;
@@ -410,7 +410,7 @@ qup2_i2c5_default: qup2-i2c5-default-state {
};
tpad_default: tpad-default-state {
- int-n {
+ int-n-pins {
pins = "gpio182";
function = "gpio";
bias-disable;
@@ -418,13 +418,13 @@ int-n {
};
ts0_default: ts0-default-state {
- int-n {
+ int-n-pins {
pins = "gpio175";
function = "gpio";
bias-disable;
};
- reset-n {
+ reset-n-pins {
pins = "gpio99";
function = "gpio";
output-high;
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index b2b744bb8a53..68b61e8d03c0 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -350,19 +350,19 @@ &tlmm {
gpio-reserved-ranges = <70 2>, <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
kybd_default: kybd-default-state {
- disable {
+ disable-pins {
pins = "gpio102";
function = "gpio";
output-low;
};
- int-n {
+ int-n-pins {
pins = "gpio104";
function = "gpio";
bias-disable;
};
- reset {
+ reset-pins {
pins = "gpio105";
function = "gpio";
bias-disable;
@@ -384,7 +384,7 @@ qup2_i2c5_default: qup2-i2c5-default-state {
};
tpad_default: tpad-default-state {
- int-n {
+ int-n-pins {
pins = "gpio182";
function = "gpio";
bias-disable;
@@ -392,13 +392,13 @@ int-n {
};
ts0_default: ts0-default-state {
- int-n {
+ int-n-pins {
pins = "gpio175";
function = "gpio";
bias-disable;
};
- reset-n {
+ reset-n-pins {
pins = "gpio99";
function = "gpio";
output-high;
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 04/17] arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema (really)
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (2 preceding siblings ...)
2022-10-16 17:21 ` [PATCH v3 03/17] arm64: dts: qcom: sc8280xp: align TLMM pin configuration with DT schema Krzysztof Kozlowski
@ 2022-10-16 17:21 ` Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 05/17] arm64: dts: qcom: sc7280-herobrine: correct number of gpio-line-names Krzysztof Kozlowski
` (12 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:21 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
I already tried to do this in commit d801357a0573 ("arm64: dts: qcom:
sc7280: align TLMM pin configuration with DT schema") and I missed the
fact that these nodes were not part of "state" node. Bindings did not
catch these errors due to its own issues.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts | 8 +-
.../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 44 +--
.../arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 8 +-
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 26 +-
arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi | 20 +-
arch/arm64/boot/dts/qcom/sc7280.dtsi | 316 +++++++++---------
6 files changed, 211 insertions(+), 211 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
index dddb505e220b..1185141f348e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd-r3.dts
@@ -118,25 +118,25 @@ &wcd9385 {
};
&tlmm {
- tp_int_odl: tp-int-odl {
+ tp_int_odl: tp-int-odl-state {
pins = "gpio7";
function = "gpio";
bias-disable;
};
- ts_int_l: ts-int-l {
+ ts_int_l: ts-int-l-state {
pins = "gpio55";
function = "gpio";
bias-pull-up;
};
- ts_reset_l: ts-reset-l {
+ ts_reset_l: ts-reset-l-state {
pins = "gpio54";
function = "gpio";
bias-disable;
};
- us_euro_hs_sel: us-euro-hs-sel {
+ us_euro_hs_sel: us-euro-hs-sel-state {
pins = "gpio81";
function = "gpio";
bias-pull-down;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index c11e37160f34..6a9389c40159 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -744,27 +744,27 @@ &tlmm {
pinctrl-names = "default";
pinctrl-0 = <&bios_flash_wp_od>;
- amp_en: amp-en-pins {
+ amp_en: amp-en-state {
pins = "gpio63";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
- ap_ec_int_l: ap-ec-int-l-pins {
+ ap_ec_int_l: ap-ec-int-l-state {
pins = "gpio18";
function = "gpio";
bias-pull-up;
};
- bios_flash_wp_od: bios-flash-wp-od-pins {
+ bios_flash_wp_od: bios-flash-wp-od-state {
pins = "gpio16";
function = "gpio";
/* Has external pull */
bias-disable;
};
- en_fp_rails: en-fp-rails-pins {
+ en_fp_rails: en-fp-rails-state {
pins = "gpio77";
function = "gpio";
bias-disable;
@@ -772,60 +772,60 @@ en_fp_rails: en-fp-rails-pins {
output-high;
};
- en_pp3300_codec: en-pp3300-codec-pins {
+ en_pp3300_codec: en-pp3300-codec-state {
pins = "gpio105";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
- en_pp3300_dx_edp: en-pp3300-dx-edp-pins {
+ en_pp3300_dx_edp: en-pp3300-dx-edp-state {
pins = "gpio80";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
- fp_rst_l: fp-rst-l-pins {
+ fp_rst_l: fp-rst-l-state {
pins = "gpio78";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
- fp_to_ap_irq_l: fp-to-ap-irq-l-pins {
+ fp_to_ap_irq_l: fp-to-ap-irq-l-state {
pins = "gpio61";
function = "gpio";
/* Has external pullup */
bias-disable;
};
- fpmcu_boot0: fpmcu-boot0-pins {
+ fpmcu_boot0: fpmcu-boot0-state {
pins = "gpio68";
function = "gpio";
bias-disable;
};
- gsc_ap_int_odl: gsc-ap-int-odl-pins {
+ gsc_ap_int_odl: gsc-ap-int-odl-state {
pins = "gpio104";
function = "gpio";
bias-pull-up;
};
- hp_irq: hp-irq-pins {
+ hp_irq: hp-irq-state {
pins = "gpio101";
function = "gpio";
bias-pull-up;
};
- hub_en: hub-en-pins {
+ hub_en: hub-en-state {
pins = "gpio157";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
- pe_wake_odl: pe-wake-odl-pins {
+ pe_wake_odl: pe-wake-odl-state {
pins = "gpio3";
function = "gpio";
/* Has external pull */
@@ -834,45 +834,45 @@ pe_wake_odl: pe-wake-odl-pins {
};
/* For ap_spi_fp */
- qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-pins {
+ qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-state {
pins = "gpio39";
function = "gpio";
output-high;
};
/* For ap_ec_spi */
- qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-pins {
+ qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-state {
pins = "gpio43";
function = "gpio";
output-high;
};
- sar0_irq_odl: sar0-irq-odl-pins {
+ sar0_irq_odl: sar0-irq-odl-state {
pins = "gpio141";
function = "gpio";
bias-pull-up;
};
- sar1_irq_odl: sar1-irq-odl-pins {
+ sar1_irq_odl: sar1-irq-odl-state {
pins = "gpio140";
function = "gpio";
bias-pull-up;
};
- sd_cd_odl: sd-cd-odl-pins {
+ sd_cd_odl: sd-cd-odl-state {
pins = "gpio91";
function = "gpio";
bias-pull-up;
};
- ssd_en: ssd-en-pins {
+ ssd_en: ssd-en-state {
pins = "gpio51";
function = "gpio";
bias-disable;
drive-strength = <2>;
};
- ssd_rst_l: ssd-rst-l-pins {
+ ssd_rst_l: ssd-rst-l-state {
pins = "gpio2";
function = "gpio";
bias-disable;
@@ -880,14 +880,14 @@ ssd_rst_l: ssd-rst-l-pins {
output-low;
};
- tp_int_odl: tp-int-odl-pins {
+ tp_int_odl: tp-int-odl-state {
pins = "gpio7";
function = "gpio";
/* Has external pullup */
bias-disable;
};
- wf_cam_en: wf-cam-en-pins {
+ wf_cam_en: wf-cam-en-state {
pins = "gpio119";
function = "gpio";
/* Has external pulldown */
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
index 7f5143e9bb80..b35f3738933c 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
@@ -79,26 +79,26 @@ cr50: tpm@0 {
};
&tlmm {
- ap_ec_int_l: ap-ec-int-l-pins {
+ ap_ec_int_l: ap-ec-int-l-state {
pins = "gpio18";
function = "gpio";
input-enable;
bias-pull-up;
};
- h1_ap_int_odl: h1-ap-int-odl-pins {
+ h1_ap_int_odl: h1-ap-int-odl-state {
pins = "gpio104";
function = "gpio";
input-enable;
bias-pull-up;
};
- qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-pins {
+ qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-state {
pins = "gpio43";
output-high;
};
- qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high-pins {
+ qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high-state {
pins = "gpio59";
output-high;
};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index cd432a2856a7..11982c14b704 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -747,24 +747,24 @@ &sdc2_data {
};
&tlmm {
- amp_en: amp-en {
+ amp_en: amp-en-state {
pins = "gpio63";
bias-pull-down;
drive-strength = <2>;
};
- bt_en: bt-en-pins {
+ bt_en: bt-en-state {
pins = "gpio85";
function = "gpio";
output-low;
bias-disable;
};
- nvme_pwren: nvme-pwren-pins {
+ nvme_pwren: nvme-pwren-state {
function = "gpio";
};
- pcie1_reset_n: pcie1-reset-n-pins {
+ pcie1_reset_n: pcie1-reset-n-state {
pins = "gpio2";
function = "gpio";
@@ -773,7 +773,7 @@ pcie1_reset_n: pcie1-reset-n-pins {
bias-disable;
};
- pcie1_wake_n: pcie1-wake-n-pins {
+ pcie1_wake_n: pcie1-wake-n-state {
pins = "gpio3";
function = "gpio";
@@ -781,7 +781,7 @@ pcie1_wake_n: pcie1-wake-n-pins {
bias-pull-up;
};
- qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
+ qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {
pins = "gpio28";
function = "gpio";
/*
@@ -794,7 +794,7 @@ qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
bias-bus-hold;
};
- qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
+ qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {
pins = "gpio29";
function = "gpio";
/*
@@ -806,7 +806,7 @@ qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
bias-pull-down;
};
- qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
+ qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {
pins = "gpio30";
function = "gpio";
/*
@@ -816,7 +816,7 @@ qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
bias-pull-up;
};
- qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
+ qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {
pins = "gpio31";
function = "gpio";
/*
@@ -827,25 +827,25 @@ qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
bias-pull-up;
};
- sd_cd: sd-cd-pins {
+ sd_cd: sd-cd-state {
pins = "gpio91";
function = "gpio";
bias-pull-up;
};
- sw_ctrl: sw-ctrl-pins {
+ sw_ctrl: sw-ctrl-state {
pins = "gpio86";
function = "gpio";
bias-pull-down;
};
- wcd_reset_n: wcd-reset-n {
+ wcd_reset_n: wcd-reset-n-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
};
- wcd_reset_n_sleep: wcd-reset-n-sleep {
+ wcd_reset_n_sleep: wcd-reset-n-sleep-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
index 4b8c676b0bb1..a42b5878a75f 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi
@@ -595,7 +595,7 @@ pmic_edp_bl_pwm: pmic-edp-bl-pwm-state {
};
&tlmm {
- mos_bt_en: mos-bt-en-pins {
+ mos_bt_en: mos-bt-en-state {
pins = "gpio85";
function = "gpio";
drive-strength = <2>;
@@ -603,7 +603,7 @@ mos_bt_en: mos-bt-en-pins {
};
/* For mos_bt_uart */
- qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
+ qup_uart7_sleep_cts: qup-uart7-sleep-cts-state {
pins = "gpio28";
function = "gpio";
/*
@@ -617,7 +617,7 @@ qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
};
/* For mos_bt_uart */
- qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
+ qup_uart7_sleep_rts: qup-uart7-sleep-rts-state {
pins = "gpio29";
function = "gpio";
/*
@@ -630,7 +630,7 @@ qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
};
/* For mos_bt_uart */
- qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
+ qup_uart7_sleep_rx: qup-uart7-sleep-rx-state {
pins = "gpio31";
function = "gpio";
/*
@@ -642,7 +642,7 @@ qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
};
/* For mos_bt_uart */
- qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
+ qup_uart7_sleep_tx: qup-uart7-sleep-tx-state {
pins = "gpio30";
function = "gpio";
/*
@@ -652,32 +652,32 @@ qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
bias-pull-up;
};
- ts_int_conn: ts-int-conn-pins {
+ ts_int_conn: ts-int-conn-state {
pins = "gpio55";
function = "gpio";
bias-pull-up;
};
- ts_rst_conn: ts-rst-conn-pins {
+ ts_rst_conn: ts-rst-conn-state {
pins = "gpio54";
function = "gpio";
drive-strength = <2>;
};
- us_euro_hs_sel: us-euro-hs-sel {
+ us_euro_hs_sel: us-euro-hs-sel-state {
pins = "gpio81";
function = "gpio";
bias-pull-down;
drive-strength = <2>;
};
- wcd_reset_n: wcd-reset-n {
+ wcd_reset_n: wcd-reset-n-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
};
- wcd_reset_n_sleep: wcd-reset-n-sleep {
+ wcd_reset_n_sleep: wcd-reset-n-sleep-state {
pins = "gpio83";
function = "gpio";
drive-strength = <8>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 28e3fb9992d9..1a603cf61d8b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -4253,791 +4253,791 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 175>;
wakeup-parent = <&pdc>;
- dp_hot_plug_det: dp-hot-plug-det-pins {
+ dp_hot_plug_det: dp-hot-plug-det-state {
pins = "gpio47";
function = "dp_hot";
};
- edp_hot_plug_det: edp-hot-plug-det-pins {
+ edp_hot_plug_det: edp-hot-plug-det-state {
pins = "gpio60";
function = "edp_hot";
};
- mi2s0_data0: mi2s0-data0-pins {
+ mi2s0_data0: mi2s0-data0-state {
pins = "gpio98";
function = "mi2s0_data0";
};
- mi2s0_data1: mi2s0-data1-pins {
+ mi2s0_data1: mi2s0-data1-state {
pins = "gpio99";
function = "mi2s0_data1";
};
- mi2s0_mclk: mi2s0-mclk-pins {
+ mi2s0_mclk: mi2s0-mclk-state {
pins = "gpio96";
function = "pri_mi2s";
};
- mi2s0_sclk: mi2s0-sclk-pins {
+ mi2s0_sclk: mi2s0-sclk-state {
pins = "gpio97";
function = "mi2s0_sck";
};
- mi2s0_ws: mi2s0-ws-pins {
+ mi2s0_ws: mi2s0-ws-state {
pins = "gpio100";
function = "mi2s0_ws";
};
- mi2s1_data0: mi2s1-data0-pins {
+ mi2s1_data0: mi2s1-data0-state {
pins = "gpio107";
function = "mi2s1_data0";
};
- mi2s1_sclk: mi2s1-sclk-pins {
+ mi2s1_sclk: mi2s1-sclk-state {
pins = "gpio106";
function = "mi2s1_sck";
};
- mi2s1_ws: mi2s1-ws-pins {
+ mi2s1_ws: mi2s1-ws-state {
pins = "gpio108";
function = "mi2s1_ws";
};
- pcie1_clkreq_n: pcie1-clkreq-n-pins {
+ pcie1_clkreq_n: pcie1-clkreq-n-state {
pins = "gpio79";
function = "pcie1_clkreqn";
};
- qspi_clk: qspi-clk-pins {
+ qspi_clk: qspi-clk-state {
pins = "gpio14";
function = "qspi_clk";
};
- qspi_cs0: qspi-cs0-pins {
+ qspi_cs0: qspi-cs0-state {
pins = "gpio15";
function = "qspi_cs";
};
- qspi_cs1: qspi-cs1-pins {
+ qspi_cs1: qspi-cs1-state {
pins = "gpio19";
function = "qspi_cs";
};
- qspi_data01: qspi-data01-pins {
+ qspi_data01: qspi-data01-state {
pins = "gpio12", "gpio13";
function = "qspi_data";
};
- qspi_data12: qspi-data12-pins {
+ qspi_data12: qspi-data12-state {
pins = "gpio16", "gpio17";
function = "qspi_data";
};
- qup_i2c0_data_clk: qup-i2c0-data-clk-pins {
+ qup_i2c0_data_clk: qup-i2c0-data-clk-state {
pins = "gpio0", "gpio1";
function = "qup00";
};
- qup_i2c1_data_clk: qup-i2c1-data-clk-pins {
+ qup_i2c1_data_clk: qup-i2c1-data-clk-state {
pins = "gpio4", "gpio5";
function = "qup01";
};
- qup_i2c2_data_clk: qup-i2c2-data-clk-pins {
+ qup_i2c2_data_clk: qup-i2c2-data-clk-state {
pins = "gpio8", "gpio9";
function = "qup02";
};
- qup_i2c3_data_clk: qup-i2c3-data-clk-pins {
+ qup_i2c3_data_clk: qup-i2c3-data-clk-state {
pins = "gpio12", "gpio13";
function = "qup03";
};
- qup_i2c4_data_clk: qup-i2c4-data-clk-pins {
+ qup_i2c4_data_clk: qup-i2c4-data-clk-state {
pins = "gpio16", "gpio17";
function = "qup04";
};
- qup_i2c5_data_clk: qup-i2c5-data-clk-pins {
+ qup_i2c5_data_clk: qup-i2c5-data-clk-state {
pins = "gpio20", "gpio21";
function = "qup05";
};
- qup_i2c6_data_clk: qup-i2c6-data-clk-pins {
+ qup_i2c6_data_clk: qup-i2c6-data-clk-state {
pins = "gpio24", "gpio25";
function = "qup06";
};
- qup_i2c7_data_clk: qup-i2c7-data-clk-pins {
+ qup_i2c7_data_clk: qup-i2c7-data-clk-state {
pins = "gpio28", "gpio29";
function = "qup07";
};
- qup_i2c8_data_clk: qup-i2c8-data-clk-pins {
+ qup_i2c8_data_clk: qup-i2c8-data-clk-state {
pins = "gpio32", "gpio33";
function = "qup10";
};
- qup_i2c9_data_clk: qup-i2c9-data-clk-pins {
+ qup_i2c9_data_clk: qup-i2c9-data-clk-state {
pins = "gpio36", "gpio37";
function = "qup11";
};
- qup_i2c10_data_clk: qup-i2c10-data-clk-pins {
+ qup_i2c10_data_clk: qup-i2c10-data-clk-state {
pins = "gpio40", "gpio41";
function = "qup12";
};
- qup_i2c11_data_clk: qup-i2c11-data-clk-pins {
+ qup_i2c11_data_clk: qup-i2c11-data-clk-state {
pins = "gpio44", "gpio45";
function = "qup13";
};
- qup_i2c12_data_clk: qup-i2c12-data-clk-pins {
+ qup_i2c12_data_clk: qup-i2c12-data-clk-state {
pins = "gpio48", "gpio49";
function = "qup14";
};
- qup_i2c13_data_clk: qup-i2c13-data-clk-pins {
+ qup_i2c13_data_clk: qup-i2c13-data-clk-state {
pins = "gpio52", "gpio53";
function = "qup15";
};
- qup_i2c14_data_clk: qup-i2c14-data-clk-pins {
+ qup_i2c14_data_clk: qup-i2c14-data-clk-state {
pins = "gpio56", "gpio57";
function = "qup16";
};
- qup_i2c15_data_clk: qup-i2c15-data-clk-pins {
+ qup_i2c15_data_clk: qup-i2c15-data-clk-state {
pins = "gpio60", "gpio61";
function = "qup17";
};
- qup_spi0_data_clk: qup-spi0-data-clk-pins {
+ qup_spi0_data_clk: qup-spi0-data-clk-state {
pins = "gpio0", "gpio1", "gpio2";
function = "qup00";
};
- qup_spi0_cs: qup-spi0-cs-pins {
+ qup_spi0_cs: qup-spi0-cs-state {
pins = "gpio3";
function = "qup00";
};
- qup_spi0_cs_gpio: qup-spi0-cs-gpio-pins {
+ qup_spi0_cs_gpio: qup-spi0-cs-gpio-state {
pins = "gpio3";
function = "gpio";
};
- qup_spi1_data_clk: qup-spi1-data-clk-pins {
+ qup_spi1_data_clk: qup-spi1-data-clk-state {
pins = "gpio4", "gpio5", "gpio6";
function = "qup01";
};
- qup_spi1_cs: qup-spi1-cs-pins {
+ qup_spi1_cs: qup-spi1-cs-state {
pins = "gpio7";
function = "qup01";
};
- qup_spi1_cs_gpio: qup-spi1-cs-gpio-pins {
+ qup_spi1_cs_gpio: qup-spi1-cs-gpio-state {
pins = "gpio7";
function = "gpio";
};
- qup_spi2_data_clk: qup-spi2-data-clk-pins {
+ qup_spi2_data_clk: qup-spi2-data-clk-state {
pins = "gpio8", "gpio9", "gpio10";
function = "qup02";
};
- qup_spi2_cs: qup-spi2-cs-pins {
+ qup_spi2_cs: qup-spi2-cs-state {
pins = "gpio11";
function = "qup02";
};
- qup_spi2_cs_gpio: qup-spi2-cs-gpio-pins {
+ qup_spi2_cs_gpio: qup-spi2-cs-gpio-state {
pins = "gpio11";
function = "gpio";
};
- qup_spi3_data_clk: qup-spi3-data-clk-pins {
+ qup_spi3_data_clk: qup-spi3-data-clk-state {
pins = "gpio12", "gpio13", "gpio14";
function = "qup03";
};
- qup_spi3_cs: qup-spi3-cs-pins {
+ qup_spi3_cs: qup-spi3-cs-state {
pins = "gpio15";
function = "qup03";
};
- qup_spi3_cs_gpio: qup-spi3-cs-gpio-pins {
+ qup_spi3_cs_gpio: qup-spi3-cs-gpio-state {
pins = "gpio15";
function = "gpio";
};
- qup_spi4_data_clk: qup-spi4-data-clk-pins {
+ qup_spi4_data_clk: qup-spi4-data-clk-state {
pins = "gpio16", "gpio17", "gpio18";
function = "qup04";
};
- qup_spi4_cs: qup-spi4-cs-pins {
+ qup_spi4_cs: qup-spi4-cs-state {
pins = "gpio19";
function = "qup04";
};
- qup_spi4_cs_gpio: qup-spi4-cs-gpio-pins {
+ qup_spi4_cs_gpio: qup-spi4-cs-gpio-state {
pins = "gpio19";
function = "gpio";
};
- qup_spi5_data_clk: qup-spi5-data-clk-pins {
+ qup_spi5_data_clk: qup-spi5-data-clk-state {
pins = "gpio20", "gpio21", "gpio22";
function = "qup05";
};
- qup_spi5_cs: qup-spi5-cs-pins {
+ qup_spi5_cs: qup-spi5-cs-state {
pins = "gpio23";
function = "qup05";
};
- qup_spi5_cs_gpio: qup-spi5-cs-gpio-pins {
+ qup_spi5_cs_gpio: qup-spi5-cs-gpio-state {
pins = "gpio23";
function = "gpio";
};
- qup_spi6_data_clk: qup-spi6-data-clk-pins {
+ qup_spi6_data_clk: qup-spi6-data-clk-state {
pins = "gpio24", "gpio25", "gpio26";
function = "qup06";
};
- qup_spi6_cs: qup-spi6-cs-pins {
+ qup_spi6_cs: qup-spi6-cs-state {
pins = "gpio27";
function = "qup06";
};
- qup_spi6_cs_gpio: qup-spi6-cs-gpio-pins {
+ qup_spi6_cs_gpio: qup-spi6-cs-gpio-state {
pins = "gpio27";
function = "gpio";
};
- qup_spi7_data_clk: qup-spi7-data-clk-pins {
+ qup_spi7_data_clk: qup-spi7-data-clk-state {
pins = "gpio28", "gpio29", "gpio30";
function = "qup07";
};
- qup_spi7_cs: qup-spi7-cs-pins {
+ qup_spi7_cs: qup-spi7-cs-state {
pins = "gpio31";
function = "qup07";
};
- qup_spi7_cs_gpio: qup-spi7-cs-gpio-pins {
+ qup_spi7_cs_gpio: qup-spi7-cs-gpio-state {
pins = "gpio31";
function = "gpio";
};
- qup_spi8_data_clk: qup-spi8-data-clk-pins {
+ qup_spi8_data_clk: qup-spi8-data-clk-state {
pins = "gpio32", "gpio33", "gpio34";
function = "qup10";
};
- qup_spi8_cs: qup-spi8-cs-pins {
+ qup_spi8_cs: qup-spi8-cs-state {
pins = "gpio35";
function = "qup10";
};
- qup_spi8_cs_gpio: qup-spi8-cs-gpio-pins {
+ qup_spi8_cs_gpio: qup-spi8-cs-gpio-state {
pins = "gpio35";
function = "gpio";
};
- qup_spi9_data_clk: qup-spi9-data-clk-pins {
+ qup_spi9_data_clk: qup-spi9-data-clk-state {
pins = "gpio36", "gpio37", "gpio38";
function = "qup11";
};
- qup_spi9_cs: qup-spi9-cs-pins {
+ qup_spi9_cs: qup-spi9-cs-state {
pins = "gpio39";
function = "qup11";
};
- qup_spi9_cs_gpio: qup-spi9-cs-gpio-pins {
+ qup_spi9_cs_gpio: qup-spi9-cs-gpio-state {
pins = "gpio39";
function = "gpio";
};
- qup_spi10_data_clk: qup-spi10-data-clk-pins {
+ qup_spi10_data_clk: qup-spi10-data-clk-state {
pins = "gpio40", "gpio41", "gpio42";
function = "qup12";
};
- qup_spi10_cs: qup-spi10-cs-pins {
+ qup_spi10_cs: qup-spi10-cs-state {
pins = "gpio43";
function = "qup12";
};
- qup_spi10_cs_gpio: qup-spi10-cs-gpio-pins {
+ qup_spi10_cs_gpio: qup-spi10-cs-gpio-state {
pins = "gpio43";
function = "gpio";
};
- qup_spi11_data_clk: qup-spi11-data-clk-pins {
+ qup_spi11_data_clk: qup-spi11-data-clk-state {
pins = "gpio44", "gpio45", "gpio46";
function = "qup13";
};
- qup_spi11_cs: qup-spi11-cs-pins {
+ qup_spi11_cs: qup-spi11-cs-state {
pins = "gpio47";
function = "qup13";
};
- qup_spi11_cs_gpio: qup-spi11-cs-gpio-pins {
+ qup_spi11_cs_gpio: qup-spi11-cs-gpio-state {
pins = "gpio47";
function = "gpio";
};
- qup_spi12_data_clk: qup-spi12-data-clk-pins {
+ qup_spi12_data_clk: qup-spi12-data-clk-state {
pins = "gpio48", "gpio49", "gpio50";
function = "qup14";
};
- qup_spi12_cs: qup-spi12-cs-pins {
+ qup_spi12_cs: qup-spi12-cs-state {
pins = "gpio51";
function = "qup14";
};
- qup_spi12_cs_gpio: qup-spi12-cs-gpio-pins {
+ qup_spi12_cs_gpio: qup-spi12-cs-gpio-state {
pins = "gpio51";
function = "gpio";
};
- qup_spi13_data_clk: qup-spi13-data-clk-pins {
+ qup_spi13_data_clk: qup-spi13-data-clk-state {
pins = "gpio52", "gpio53", "gpio54";
function = "qup15";
};
- qup_spi13_cs: qup-spi13-cs-pins {
+ qup_spi13_cs: qup-spi13-cs-state {
pins = "gpio55";
function = "qup15";
};
- qup_spi13_cs_gpio: qup-spi13-cs-gpio-pins {
+ qup_spi13_cs_gpio: qup-spi13-cs-gpio-state {
pins = "gpio55";
function = "gpio";
};
- qup_spi14_data_clk: qup-spi14-data-clk-pins {
+ qup_spi14_data_clk: qup-spi14-data-clk-state {
pins = "gpio56", "gpio57", "gpio58";
function = "qup16";
};
- qup_spi14_cs: qup-spi14-cs-pins {
+ qup_spi14_cs: qup-spi14-cs-state {
pins = "gpio59";
function = "qup16";
};
- qup_spi14_cs_gpio: qup-spi14-cs-gpio-pins {
+ qup_spi14_cs_gpio: qup-spi14-cs-gpio-state {
pins = "gpio59";
function = "gpio";
};
- qup_spi15_data_clk: qup-spi15-data-clk-pins {
+ qup_spi15_data_clk: qup-spi15-data-clk-state {
pins = "gpio60", "gpio61", "gpio62";
function = "qup17";
};
- qup_spi15_cs: qup-spi15-cs-pins {
+ qup_spi15_cs: qup-spi15-cs-state {
pins = "gpio63";
function = "qup17";
};
- qup_spi15_cs_gpio: qup-spi15-cs-gpio-pins {
+ qup_spi15_cs_gpio: qup-spi15-cs-gpio-state {
pins = "gpio63";
function = "gpio";
};
- qup_uart0_cts: qup-uart0-cts-pins {
+ qup_uart0_cts: qup-uart0-cts-state {
pins = "gpio0";
function = "qup00";
};
- qup_uart0_rts: qup-uart0-rts-pins {
+ qup_uart0_rts: qup-uart0-rts-state {
pins = "gpio1";
function = "qup00";
};
- qup_uart0_tx: qup-uart0-tx-pins {
+ qup_uart0_tx: qup-uart0-tx-state {
pins = "gpio2";
function = "qup00";
};
- qup_uart0_rx: qup-uart0-rx-pins {
+ qup_uart0_rx: qup-uart0-rx-state {
pins = "gpio3";
function = "qup00";
};
- qup_uart1_cts: qup-uart1-cts-pins {
+ qup_uart1_cts: qup-uart1-cts-state {
pins = "gpio4";
function = "qup01";
};
- qup_uart1_rts: qup-uart1-rts-pins {
+ qup_uart1_rts: qup-uart1-rts-state {
pins = "gpio5";
function = "qup01";
};
- qup_uart1_tx: qup-uart1-tx-pins {
+ qup_uart1_tx: qup-uart1-tx-state {
pins = "gpio6";
function = "qup01";
};
- qup_uart1_rx: qup-uart1-rx-pins {
+ qup_uart1_rx: qup-uart1-rx-state {
pins = "gpio7";
function = "qup01";
};
- qup_uart2_cts: qup-uart2-cts-pins {
+ qup_uart2_cts: qup-uart2-cts-state {
pins = "gpio8";
function = "qup02";
};
- qup_uart2_rts: qup-uart2-rts-pins {
+ qup_uart2_rts: qup-uart2-rts-state {
pins = "gpio9";
function = "qup02";
};
- qup_uart2_tx: qup-uart2-tx-pins {
+ qup_uart2_tx: qup-uart2-tx-state {
pins = "gpio10";
function = "qup02";
};
- qup_uart2_rx: qup-uart2-rx-pins {
+ qup_uart2_rx: qup-uart2-rx-state {
pins = "gpio11";
function = "qup02";
};
- qup_uart3_cts: qup-uart3-cts-pins {
+ qup_uart3_cts: qup-uart3-cts-state {
pins = "gpio12";
function = "qup03";
};
- qup_uart3_rts: qup-uart3-rts-pins {
+ qup_uart3_rts: qup-uart3-rts-state {
pins = "gpio13";
function = "qup03";
};
- qup_uart3_tx: qup-uart3-tx-pins {
+ qup_uart3_tx: qup-uart3-tx-state {
pins = "gpio14";
function = "qup03";
};
- qup_uart3_rx: qup-uart3-rx-pins {
+ qup_uart3_rx: qup-uart3-rx-state {
pins = "gpio15";
function = "qup03";
};
- qup_uart4_cts: qup-uart4-cts-pins {
+ qup_uart4_cts: qup-uart4-cts-state {
pins = "gpio16";
function = "qup04";
};
- qup_uart4_rts: qup-uart4-rts-pins {
+ qup_uart4_rts: qup-uart4-rts-state {
pins = "gpio17";
function = "qup04";
};
- qup_uart4_tx: qup-uart4-tx-pins {
+ qup_uart4_tx: qup-uart4-tx-state {
pins = "gpio18";
function = "qup04";
};
- qup_uart4_rx: qup-uart4-rx-pins {
+ qup_uart4_rx: qup-uart4-rx-state {
pins = "gpio19";
function = "qup04";
};
- qup_uart5_cts: qup-uart5-cts-pins {
+ qup_uart5_cts: qup-uart5-cts-state {
pins = "gpio20";
function = "qup05";
};
- qup_uart5_rts: qup-uart5-rts-pins {
+ qup_uart5_rts: qup-uart5-rts-state {
pins = "gpio21";
function = "qup05";
};
- qup_uart5_tx: qup-uart5-tx-pins {
+ qup_uart5_tx: qup-uart5-tx-state {
pins = "gpio22";
function = "qup05";
};
- qup_uart5_rx: qup-uart5-rx-pins {
+ qup_uart5_rx: qup-uart5-rx-state {
pins = "gpio23";
function = "qup05";
};
- qup_uart6_cts: qup-uart6-cts-pins {
+ qup_uart6_cts: qup-uart6-cts-state {
pins = "gpio24";
function = "qup06";
};
- qup_uart6_rts: qup-uart6-rts-pins {
+ qup_uart6_rts: qup-uart6-rts-state {
pins = "gpio25";
function = "qup06";
};
- qup_uart6_tx: qup-uart6-tx-pins {
+ qup_uart6_tx: qup-uart6-tx-state {
pins = "gpio26";
function = "qup06";
};
- qup_uart6_rx: qup-uart6-rx-pins {
+ qup_uart6_rx: qup-uart6-rx-state {
pins = "gpio27";
function = "qup06";
};
- qup_uart7_cts: qup-uart7-cts-pins {
+ qup_uart7_cts: qup-uart7-cts-state {
pins = "gpio28";
function = "qup07";
};
- qup_uart7_rts: qup-uart7-rts-pins {
+ qup_uart7_rts: qup-uart7-rts-state {
pins = "gpio29";
function = "qup07";
};
- qup_uart7_tx: qup-uart7-tx-pins {
+ qup_uart7_tx: qup-uart7-tx-state {
pins = "gpio30";
function = "qup07";
};
- qup_uart7_rx: qup-uart7-rx-pins {
+ qup_uart7_rx: qup-uart7-rx-state {
pins = "gpio31";
function = "qup07";
};
- qup_uart8_cts: qup-uart8-cts-pins {
+ qup_uart8_cts: qup-uart8-cts-state {
pins = "gpio32";
function = "qup10";
};
- qup_uart8_rts: qup-uart8-rts-pins {
+ qup_uart8_rts: qup-uart8-rts-state {
pins = "gpio33";
function = "qup10";
};
- qup_uart8_tx: qup-uart8-tx-pins {
+ qup_uart8_tx: qup-uart8-tx-state {
pins = "gpio34";
function = "qup10";
};
- qup_uart8_rx: qup-uart8-rx-pins {
+ qup_uart8_rx: qup-uart8-rx-state {
pins = "gpio35";
function = "qup10";
};
- qup_uart9_cts: qup-uart9-cts-pins {
+ qup_uart9_cts: qup-uart9-cts-state {
pins = "gpio36";
function = "qup11";
};
- qup_uart9_rts: qup-uart9-rts-pins {
+ qup_uart9_rts: qup-uart9-rts-state {
pins = "gpio37";
function = "qup11";
};
- qup_uart9_tx: qup-uart9-tx-pins {
+ qup_uart9_tx: qup-uart9-tx-state {
pins = "gpio38";
function = "qup11";
};
- qup_uart9_rx: qup-uart9-rx-pins {
+ qup_uart9_rx: qup-uart9-rx-state {
pins = "gpio39";
function = "qup11";
};
- qup_uart10_cts: qup-uart10-cts-pins {
+ qup_uart10_cts: qup-uart10-cts-state {
pins = "gpio40";
function = "qup12";
};
- qup_uart10_rts: qup-uart10-rts-pins {
+ qup_uart10_rts: qup-uart10-rts-state {
pins = "gpio41";
function = "qup12";
};
- qup_uart10_tx: qup-uart10-tx-pins {
+ qup_uart10_tx: qup-uart10-tx-state {
pins = "gpio42";
function = "qup12";
};
- qup_uart10_rx: qup-uart10-rx-pins {
+ qup_uart10_rx: qup-uart10-rx-state {
pins = "gpio43";
function = "qup12";
};
- qup_uart11_cts: qup-uart11-cts-pins {
+ qup_uart11_cts: qup-uart11-cts-state {
pins = "gpio44";
function = "qup13";
};
- qup_uart11_rts: qup-uart11-rts-pins {
+ qup_uart11_rts: qup-uart11-rts-state {
pins = "gpio45";
function = "qup13";
};
- qup_uart11_tx: qup-uart11-tx-pins {
+ qup_uart11_tx: qup-uart11-tx-state {
pins = "gpio46";
function = "qup13";
};
- qup_uart11_rx: qup-uart11-rx-pins {
+ qup_uart11_rx: qup-uart11-rx-state {
pins = "gpio47";
function = "qup13";
};
- qup_uart12_cts: qup-uart12-cts-pins {
+ qup_uart12_cts: qup-uart12-cts-state {
pins = "gpio48";
function = "qup14";
};
- qup_uart12_rts: qup-uart12-rts-pins {
+ qup_uart12_rts: qup-uart12-rts-state {
pins = "gpio49";
function = "qup14";
};
- qup_uart12_tx: qup-uart12-tx-pins {
+ qup_uart12_tx: qup-uart12-tx-state {
pins = "gpio50";
function = "qup14";
};
- qup_uart12_rx: qup-uart12-rx-pins {
+ qup_uart12_rx: qup-uart12-rx-state {
pins = "gpio51";
function = "qup14";
};
- qup_uart13_cts: qup-uart13-cts-pins {
+ qup_uart13_cts: qup-uart13-cts-state {
pins = "gpio52";
function = "qup15";
};
- qup_uart13_rts: qup-uart13-rts-pins {
+ qup_uart13_rts: qup-uart13-rts-state {
pins = "gpio53";
function = "qup15";
};
- qup_uart13_tx: qup-uart13-tx-pins {
+ qup_uart13_tx: qup-uart13-tx-state {
pins = "gpio54";
function = "qup15";
};
- qup_uart13_rx: qup-uart13-rx-pins {
+ qup_uart13_rx: qup-uart13-rx-state {
pins = "gpio55";
function = "qup15";
};
- qup_uart14_cts: qup-uart14-cts-pins {
+ qup_uart14_cts: qup-uart14-cts-state {
pins = "gpio56";
function = "qup16";
};
- qup_uart14_rts: qup-uart14-rts-pins {
+ qup_uart14_rts: qup-uart14-rts-state {
pins = "gpio57";
function = "qup16";
};
- qup_uart14_tx: qup-uart14-tx-pins {
+ qup_uart14_tx: qup-uart14-tx-state {
pins = "gpio58";
function = "qup16";
};
- qup_uart14_rx: qup-uart14-rx-pins {
+ qup_uart14_rx: qup-uart14-rx-state {
pins = "gpio59";
function = "qup16";
};
- qup_uart15_cts: qup-uart15-cts-pins {
+ qup_uart15_cts: qup-uart15-cts-state {
pins = "gpio60";
function = "qup17";
};
- qup_uart15_rts: qup-uart15-rts-pins {
+ qup_uart15_rts: qup-uart15-rts-state {
pins = "gpio61";
function = "qup17";
};
- qup_uart15_tx: qup-uart15-tx-pins {
+ qup_uart15_tx: qup-uart15-tx-state {
pins = "gpio62";
function = "qup17";
};
- qup_uart15_rx: qup-uart15-rx-pins {
+ qup_uart15_rx: qup-uart15-rx-state {
pins = "gpio63";
function = "qup17";
};
- sdc1_clk: sdc1-clk-pins {
+ sdc1_clk: sdc1-clk-state {
pins = "sdc1_clk";
};
- sdc1_cmd: sdc1-cmd-pins {
+ sdc1_cmd: sdc1-cmd-state {
pins = "sdc1_cmd";
};
- sdc1_data: sdc1-data-pins {
+ sdc1_data: sdc1-data-state {
pins = "sdc1_data";
};
- sdc1_rclk: sdc1-rclk-pins {
+ sdc1_rclk: sdc1-rclk-state {
pins = "sdc1_rclk";
};
- sdc1_clk_sleep: sdc1-clk-sleep-pins {
+ sdc1_clk_sleep: sdc1-clk-sleep-state {
pins = "sdc1_clk";
drive-strength = <2>;
bias-bus-hold;
};
- sdc1_cmd_sleep: sdc1-cmd-sleep-pins {
+ sdc1_cmd_sleep: sdc1-cmd-sleep-state {
pins = "sdc1_cmd";
drive-strength = <2>;
bias-bus-hold;
};
- sdc1_data_sleep: sdc1-data-sleep-pins {
+ sdc1_data_sleep: sdc1-data-sleep-state {
pins = "sdc1_data";
drive-strength = <2>;
bias-bus-hold;
};
- sdc1_rclk_sleep: sdc1-rclk-sleep-pins {
+ sdc1_rclk_sleep: sdc1-rclk-sleep-state {
pins = "sdc1_rclk";
drive-strength = <2>;
bias-bus-hold;
};
- sdc2_clk: sdc2-clk-pins {
+ sdc2_clk: sdc2-clk-state {
pins = "sdc2_clk";
};
- sdc2_cmd: sdc2-cmd-pins {
+ sdc2_cmd: sdc2-cmd-state {
pins = "sdc2_cmd";
};
- sdc2_data: sdc2-data-pins {
+ sdc2_data: sdc2-data-state {
pins = "sdc2_data";
};
- sdc2_clk_sleep: sdc2-clk-sleep-pins {
+ sdc2_clk_sleep: sdc2-clk-sleep-state {
pins = "sdc2_clk";
drive-strength = <2>;
bias-bus-hold;
};
- sdc2_cmd_sleep: sdc2-cmd-sleep-pins {
+ sdc2_cmd_sleep: sdc2-cmd-sleep-state {
pins = "sdc2_cmd";
drive-strength = <2>;
bias-bus-hold;
};
- sdc2_data_sleep: sdc2-data-sleep-pins {
+ sdc2_data_sleep: sdc2-data-sleep-state {
pins = "sdc2_data";
drive-strength = <2>;
bias-bus-hold;
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 05/17] arm64: dts: qcom: sc7280-herobrine: correct number of gpio-line-names
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (3 preceding siblings ...)
2022-10-16 17:21 ` [PATCH v3 04/17] arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema (really) Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 06/17] arm64: dts: qcom: sc7280-idp-ec-h1: add missing QUP GPIO functions Krzysztof Kozlowski
` (11 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
There are 175 GPIOs (gpio0-174).
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 1 +
arch/arm64/boot/dts/qcom/sc7280-herobrine-evoker-r0.dts | 1 -
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts | 1 -
arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi | 1 -
4 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
index f0f26af1e421..4e0b013e25f4 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts
@@ -372,5 +372,6 @@ &tlmm {
"", /* 170 */
"MOS_BLE_UART_TX",
"MOS_BLE_UART_RX",
+ "",
"";
};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-evoker-r0.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-evoker-r0.dts
index ccbe50b6249a..739e81bd6d68 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-evoker-r0.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-evoker-r0.dts
@@ -328,6 +328,5 @@ &tlmm {
"MOS_BLE_UART_TX",
"MOS_BLE_UART_RX",
"",
- "",
"";
};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts
index c1a671968725..c8ff13db30b9 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dts
@@ -358,6 +358,5 @@ &tlmm {
"MOS_BLE_UART_TX",
"MOS_BLE_UART_RX",
"",
- "",
"";
};
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi
index 4566722bf4dd..3dff610fb946 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi
@@ -321,6 +321,5 @@ &tlmm {
"MOS_BLE_UART_TX",
"MOS_BLE_UART_RX",
"",
- "",
"";
};
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 06/17] arm64: dts: qcom: sc7280-idp-ec-h1: add missing QUP GPIO functions
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (4 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 05/17] arm64: dts: qcom: sc7280-herobrine: correct number of gpio-line-names Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 07/17] arm64: dts: qcom: msm8953: align TLMM pin configuration with DT schema Krzysztof Kozlowski
` (10 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
Add default GPIO function to SPI10 and SPI14 chip-select pins on SC7280
IDP, as required by bindings.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
index b35f3738933c..3cfeb118d379 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
@@ -95,11 +95,13 @@ h1_ap_int_odl: h1-ap-int-odl-state {
qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-state {
pins = "gpio43";
+ function = "gpio";
output-high;
};
qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high-state {
pins = "gpio59";
+ function = "gpio";
output-high;
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 07/17] arm64: dts: qcom: msm8953: align TLMM pin configuration with DT schema
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (5 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 06/17] arm64: dts: qcom: sc7280-idp-ec-h1: add missing QUP GPIO functions Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 08/17] arm64: dts: qcom: sdm845: " Krzysztof Kozlowski
` (9 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
qcom/sdm632-fairphone-fp3.dtb: pinctrl@1000000: 'cd-off-pins', 'cd-on-pins', 'gpio-key-default-pins', ....
do not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8953.dtsi | 70 +++++++++++++--------------
1 file changed, 35 insertions(+), 35 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index 6b992a6d56c1..db94e6fd18f5 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -460,229 +460,229 @@ tlmm: pinctrl@1000000 {
interrupt-controller;
#interrupt-cells = <2>;
- uart_console_active: uart-console-active-pins {
+ uart_console_active: uart-console-active-state {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
drive-strength = <2>;
bias-disable;
};
- uart_console_sleep: uart-console-sleep-pins {
+ uart_console_sleep: uart-console-sleep-state {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
drive-strength = <2>;
bias-pull-down;
};
- sdc1_clk_on: sdc1-clk-on-pins {
+ sdc1_clk_on: sdc1-clk-on-state {
pins = "sdc1_clk";
bias-disable;
drive-strength = <16>;
};
- sdc1_clk_off: sdc1-clk-off-pins {
+ sdc1_clk_off: sdc1-clk-off-state {
pins = "sdc1_clk";
bias-disable;
drive-strength = <2>;
};
- sdc1_cmd_on: sdc1-cmd-on-pins {
+ sdc1_cmd_on: sdc1-cmd-on-state {
pins = "sdc1_cmd";
bias-disable;
drive-strength = <10>;
};
- sdc1_cmd_off: sdc1-cmd-off-pins {
+ sdc1_cmd_off: sdc1-cmd-off-state {
pins = "sdc1_cmd";
bias-disable;
drive-strength = <2>;
};
- sdc1_data_on: sdc1-data-on-pins {
+ sdc1_data_on: sdc1-data-on-state {
pins = "sdc1_data";
bias-pull-up;
drive-strength = <10>;
};
- sdc1_data_off: sdc1-data-off-pins {
+ sdc1_data_off: sdc1-data-off-state {
pins = "sdc1_data";
bias-pull-up;
drive-strength = <2>;
};
- sdc1_rclk_on: sdc1-rclk-on-pins {
+ sdc1_rclk_on: sdc1-rclk-on-state {
pins = "sdc1_rclk";
bias-pull-down;
};
- sdc1_rclk_off: sdc1-rclk-off-pins {
+ sdc1_rclk_off: sdc1-rclk-off-state {
pins = "sdc1_rclk";
bias-pull-down;
};
- sdc2_clk_on: sdc2-clk-on-pins {
+ sdc2_clk_on: sdc2-clk-on-state {
pins = "sdc2_clk";
drive-strength = <16>;
bias-disable;
};
- sdc2_clk_off: sdc2-clk-off-pins {
+ sdc2_clk_off: sdc2-clk-off-state {
pins = "sdc2_clk";
bias-disable;
drive-strength = <2>;
};
- sdc2_cmd_on: sdc2-cmd-on-pins {
+ sdc2_cmd_on: sdc2-cmd-on-state {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
};
- sdc2_cmd_off: sdc2-cmd-off-pins {
+ sdc2_cmd_off: sdc2-cmd-off-state {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <2>;
};
- sdc2_data_on: sdc2-data-on-pins {
+ sdc2_data_on: sdc2-data-on-state {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
};
- sdc2_data_off: sdc2-data-off-pins {
+ sdc2_data_off: sdc2-data-off-state {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <2>;
};
- sdc2_cd_on: cd-on-pins {
+ sdc2_cd_on: cd-on-state {
pins = "gpio133";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
- sdc2_cd_off: cd-off-pins {
+ sdc2_cd_off: cd-off-state {
pins = "gpio133";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
- gpio_key_default: gpio-key-default-pins {
+ gpio_key_default: gpio-key-default-state {
pins = "gpio85";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
- i2c_1_default: i2c-1-default-pins {
+ i2c_1_default: i2c-1-default-state {
pins = "gpio2", "gpio3";
function = "blsp_i2c1";
drive-strength = <2>;
bias-disable;
};
- i2c_1_sleep: i2c-1-sleep-pins {
+ i2c_1_sleep: i2c-1-sleep-state {
pins = "gpio2", "gpio3";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
- i2c_2_default: i2c-2-default-pins {
+ i2c_2_default: i2c-2-default-state {
pins = "gpio6", "gpio7";
function = "blsp_i2c2";
drive-strength = <2>;
bias-disable;
};
- i2c_2_sleep: i2c-2-sleep-pins {
+ i2c_2_sleep: i2c-2-sleep-state {
pins = "gpio6", "gpio7";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
- i2c_3_default: i2c-3-default-pins {
+ i2c_3_default: i2c-3-default-state {
pins = "gpio10", "gpio11";
function = "blsp_i2c3";
drive-strength = <2>;
bias-disable;
};
- i2c_3_sleep: i2c-3-sleep-pins {
+ i2c_3_sleep: i2c-3-sleep-state {
pins = "gpio10", "gpio11";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
- i2c_4_default: i2c-4-default-pins {
+ i2c_4_default: i2c-4-default-state {
pins = "gpio14", "gpio15";
function = "blsp_i2c4";
drive-strength = <2>;
bias-disable;
};
- i2c_4_sleep: i2c-4-sleep-pins {
+ i2c_4_sleep: i2c-4-sleep-state {
pins = "gpio14", "gpio15";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
- i2c_5_default: i2c-5-default-pins {
+ i2c_5_default: i2c-5-default-state {
pins = "gpio18", "gpio19";
function = "blsp_i2c5";
drive-strength = <2>;
bias-disable;
};
- i2c_5_sleep: i2c-5-sleep-pins {
+ i2c_5_sleep: i2c-5-sleep-state {
pins = "gpio18", "gpio19";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
- i2c_6_default: i2c-6-default-pins {
+ i2c_6_default: i2c-6-default-state {
pins = "gpio22", "gpio23";
function = "blsp_i2c6";
drive-strength = <2>;
bias-disable;
};
- i2c_6_sleep: i2c-6-sleep-pins {
+ i2c_6_sleep: i2c-6-sleep-state {
pins = "gpio22", "gpio23";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
- i2c_7_default: i2c-7-default-pins {
+ i2c_7_default: i2c-7-default-state {
pins = "gpio135", "gpio136";
function = "blsp_i2c7";
drive-strength = <2>;
bias-disable;
};
- i2c_7_sleep: i2c-7-sleep-pins {
+ i2c_7_sleep: i2c-7-sleep-state {
pins = "gpio135", "gpio136";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
- i2c_8_default: i2c-8-default-pins {
+ i2c_8_default: i2c-8-default-state {
pins = "gpio98", "gpio99";
function = "blsp_i2c8";
drive-strength = <2>;
bias-disable;
};
- i2c_8_sleep: i2c-8-sleep-pins {
+ i2c_8_sleep: i2c-8-sleep-state {
pins = "gpio98", "gpio99";
function = "gpio";
drive-strength = <2>;
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 08/17] arm64: dts: qcom: sdm845: align TLMM pin configuration with DT schema
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (6 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 07/17] arm64: dts: qcom: msm8953: align TLMM pin configuration with DT schema Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 09/17] arm64: dts: qcom: sm6125-sony-xperia: add missing SD CD GPIO functions Krzysztof Kozlowski
` (8 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
qcom/sdm845-lg-judyln.dtb: gpios@c000: 'vol-up-active-pins' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi
index 20f275f8694d..1eb423e4be24 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi
@@ -604,7 +604,7 @@ pinconf {
};
&pm8998_gpio {
- vol_up_pin_a: vol-up-active-pins {
+ vol_up_pin_a: vol-up-active-state {
pins = "gpio6";
function = "normal";
input-enable;
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 09/17] arm64: dts: qcom: sm6125-sony-xperia: add missing SD CD GPIO functions
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (7 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 08/17] arm64: dts: qcom: sdm845: " Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 10/17] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema Krzysztof Kozlowski
` (7 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski
Add default GPIO function to SD card detect pins on SM6125 Sony Xperia,
as required by bindings:
qcom/sm6125-sony-xperia-seine-pdx201.dtb: pinctrl@500000: sdc2-off-state: 'oneOf' conditional failed, one must be fixed:
'pins' is a required property
'function' is a required property
'clk-pins', 'cmd-pins', 'data-pins', 'sd-cd-pins' do not match any of the regexes: 'pinctrl-[0-9]+'
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
index 6a8b88cc4385..9af4b76fa6d7 100644
--- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
+++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
@@ -89,6 +89,7 @@ &hsusb_phy1 {
&sdc2_off_state {
sd-cd-pins {
pins = "gpio98";
+ function = "gpio";
drive-strength = <2>;
bias-disable;
};
@@ -97,6 +98,7 @@ sd-cd-pins {
&sdc2_on_state {
sd-cd-pins {
pins = "gpio98";
+ function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 10/17] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (8 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 09/17] arm64: dts: qcom: sm6125-sony-xperia: add missing SD CD GPIO functions Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 11/17] dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and gpio-line-names Krzysztof Kozlowski
` (6 subsequent siblings)
16 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Marijn Suijten
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
---
arch/arm64/boot/dts/qcom/sm6125.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 1fe3fa3ad877..af49a748e511 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -407,13 +407,13 @@ data-pins {
};
sdc2_on_state: sdc2-on-state {
- clk {
+ clk-pins {
pins = "sdc2_clk";
drive-strength = <16>;
bias-disable;
};
- cmd-pins-pins {
+ cmd-pins {
pins = "sdc2_cmd";
drive-strength = <10>;
bias-pull-up;
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 11/17] dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and gpio-line-names
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (9 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 10/17] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 12/17] dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schema Krzysztof Kozlowski
` (5 subsequent siblings)
16 siblings, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
Document common GPIO properties (gpio-reserved-ranges and
gpio-line-names), already used on qrb5165-rb5 board.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
---
.../devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
index c44d02d28bc9..d7d8e5d3b659 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
@@ -49,6 +49,13 @@ properties:
gpio-ranges:
maxItems: 1
+ gpio-reserved-ranges:
+ minItems: 1
+ maxItems: 90
+
+ gpio-line-names:
+ maxItems: 180
+
wakeup-parent: true
#PIN CONFIGURATION NODES
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 12/17] dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schema
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (10 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 11/17] dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and gpio-line-names Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 13/17] dt-bindings: pinctrl: qcom,sm8250: fix matching pin config Krzysztof Kozlowski
` (4 subsequent siblings)
16 siblings, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The common Qualcomm TLMM pin controller schema for pin mux and config
already brings requirement of function for gpio pins and the definition
of drive-strength.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
---
Changes since v2:
1. Drop drive-strength, reword commit msg.
2. Add tags.
---
.../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 19 ++-----------------
1 file changed, 2 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
index d7d8e5d3b659..9447b79655e2 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
@@ -64,6 +64,7 @@ patternProperties:
if:
type: object
then:
+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
properties:
pins:
description:
@@ -99,18 +100,12 @@ patternProperties:
tsif0_en, tsif0_error, tsif0_sync, tsif1_clk, tsif1_data, tsif1_en,
tsif1_error, tsif1_sync, usb2phy_ac, usb_phy, vsense_trigger ]
- drive-strength:
- enum: [2, 4, 6, 8, 10, 12, 14, 16]
- default: 2
- description:
- Selects the drive strength for the specified pins, in mA.
-
bias-pull-down: true
bias-pull-up: true
bias-disable: true
-
+ drive-strength: true
output-high: true
output-low: true
@@ -118,16 +113,6 @@ patternProperties:
required:
- pins
- allOf:
- - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
- - if:
- properties:
- pins:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
- then:
- required:
- - function
-
additionalProperties: false
allOf:
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 13/17] dt-bindings: pinctrl: qcom,sm8250: fix matching pin config
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (11 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 12/17] dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schema Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 14/17] dt-bindings: pinctrl: qcom,sm8250: add input-enable Krzysztof Kozlowski
` (3 subsequent siblings)
16 siblings, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
The change causes indentation decrement, so the diff-hunk looks big, but
there are no functional changes in the subnode "properties" section.
The only difference there is removal of blank lines between common GPIO
pinconf properties.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
---
.../bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 117 ++++++++++--------
1 file changed, 62 insertions(+), 55 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
index 9447b79655e2..aa8315a4d9b1 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
@@ -58,62 +58,69 @@ properties:
wakeup-parent: true
-#PIN CONFIGURATION NODES
patternProperties:
- '^.*$':
- if:
- type: object
- then:
- $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
- properties:
- pins:
- description:
- List of gpio pins affected by the properties specified in this
- subnode.
- items:
- oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
- - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
- minItems: 1
- maxItems: 36
-
- function:
- description:
- Specify the alternative function to be configured for the specified
- pins.
-
- enum: [ aoss_cti, atest, audio_ref, cam_mclk, cci_async, cci_i2c,
- cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4, cri_trng,
- cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,
- ddr_pxi2, ddr_pxi3, dp_hot, dp_lcd, gcc_gp1, gcc_gp2, gcc_gp3, gpio,
- ibi_i3c, jitter_bist, lpass_slimbus, mdp_vsync, mdp_vsync0,
- mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s0_data0, mi2s0_data1,
- mi2s0_sck, mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws,
- mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, pci_e0, pci_e1,
- pci_e2, phase_flag, pll_bist, pll_bypassnl, pll_clk, pll_reset,
- pri_mi2s, prng_rosc, qdss_cti, qdss_gpio, qspi0, qspi1, qspi2, qspi3,
- qspi_clk, qspi_cs, qup0, qup1, qup10, qup11, qup12, qup13, qup14,
- qup15, qup16, qup17, qup18, qup19, qup2, qup3, qup4, qup5, qup6,
- qup7, qup8, qup9, qup_l4, qup_l5, qup_l6, sd_write, sdc40, sdc41,
- sdc42, sdc43, sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu, tgu_ch0, tgu_ch1,
- tgu_ch2, tgu_ch3, tsense_pwm1, tsense_pwm2, tsif0_clk, tsif0_data,
- tsif0_en, tsif0_error, tsif0_sync, tsif1_clk, tsif1_data, tsif1_en,
- tsif1_error, tsif1_sync, usb2phy_ac, usb_phy, vsense_trigger ]
-
- bias-pull-down: true
-
- bias-pull-up: true
-
- bias-disable: true
- drive-strength: true
- output-high: true
-
- output-low: true
-
- required:
- - pins
-
- additionalProperties: false
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-sm8250-tlmm-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-sm8250-tlmm-state"
+ additionalProperties: false
+
+$defs:
+ qcom-sm8250-tlmm-state:
+ type: object
+ description:
+ Pinctrl node's client devices use subnodes for desired pin configuration.
+ Client device subnodes use below standard properties.
+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
+
+ properties:
+ pins:
+ description:
+ List of gpio pins affected by the properties specified in this
+ subnode.
+ items:
+ oneOf:
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
+ - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
+ minItems: 1
+ maxItems: 36
+
+ function:
+ description:
+ Specify the alternative function to be configured for the specified
+ pins.
+
+ enum: [ aoss_cti, atest, audio_ref, cam_mclk, cci_async, cci_i2c,
+ cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4, cri_trng,
+ cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,
+ ddr_pxi2, ddr_pxi3, dp_hot, dp_lcd, gcc_gp1, gcc_gp2, gcc_gp3, gpio,
+ ibi_i3c, jitter_bist, lpass_slimbus, mdp_vsync, mdp_vsync0,
+ mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s0_data0, mi2s0_data1,
+ mi2s0_sck, mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws,
+ mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, pci_e0, pci_e1,
+ pci_e2, phase_flag, pll_bist, pll_bypassnl, pll_clk, pll_reset,
+ pri_mi2s, prng_rosc, qdss_cti, qdss_gpio, qspi0, qspi1, qspi2, qspi3,
+ qspi_clk, qspi_cs, qup0, qup1, qup10, qup11, qup12, qup13, qup14,
+ qup15, qup16, qup17, qup18, qup19, qup2, qup3, qup4, qup5, qup6,
+ qup7, qup8, qup9, qup_l4, qup_l5, qup_l6, sd_write, sdc40, sdc41,
+ sdc42, sdc43, sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu, tgu_ch0, tgu_ch1,
+ tgu_ch2, tgu_ch3, tsense_pwm1, tsense_pwm2, tsif0_clk, tsif0_data,
+ tsif0_en, tsif0_error, tsif0_sync, tsif1_clk, tsif1_data, tsif1_en,
+ tsif1_error, tsif1_sync, usb2phy_ac, usb_phy, vsense_trigger ]
+
+ bias-pull-down: true
+ bias-pull-up: true
+ bias-disable: true
+ drive-strength: true
+ output-high: true
+ output-low: true
+
+ required:
+ - pins
+
+ additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 14/17] dt-bindings: pinctrl: qcom,sm8250: add input-enable
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (12 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 13/17] dt-bindings: pinctrl: qcom,sm8250: fix matching pin config Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 15/17] dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOs Krzysztof Kozlowski
` (2 subsequent siblings)
16 siblings, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The SM8250 pinctrl driver supports input-enable and DTS already use it
(sm8250-sony-xperia-edo-pdx203).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
---
.../devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
index aa8315a4d9b1..e9619c4a39d8 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml
@@ -114,6 +114,7 @@ $defs:
bias-pull-up: true
bias-disable: true
drive-strength: true
+ input-enable: true
output-high: true
output-low: true
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 15/17] dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOs
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (13 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 14/17] dt-bindings: pinctrl: qcom,sm8250: add input-enable Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 16/17] dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enable Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 17/17] dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema Krzysztof Kozlowski
16 siblings, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
SC7280 has 175 GPIOs (gpio0-174), so correct size of gpio-line-names and
narrow the pattern for matching pin names.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
---
.../devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index 4606ca980dc4..e56861892050 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -43,7 +43,7 @@ properties:
maxItems: 1
gpio-line-names:
- maxItems: 174
+ maxItems: 175
wakeup-parent: true
@@ -70,7 +70,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|18[0-2])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"
- enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
sdc2_cmd, sdc2_data, ufs_reset ]
minItems: 1
@@ -134,7 +134,7 @@ $defs:
- if:
properties:
pins:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|18[0-2])$"
+ pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"
then:
required:
- function
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 16/17] dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enable
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (14 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 15/17] dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOs Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 17/17] dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema Krzysztof Kozlowski
16 siblings, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The SC7280 pinctrl driver supports bias-bus-hold and input-enable, and
DTS already use it (sc7280-idp).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
---
.../devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index e56861892050..2a6b5a719d18 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -117,13 +117,11 @@ $defs:
Selects the drive strength for the specified pins, in mA.
bias-pull-down: true
-
bias-pull-up: true
-
+ bias-bus-hold: true
bias-disable: true
-
+ input-enable: true
output-high: true
-
output-low: true
required:
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 17/17] dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
` (15 preceding siblings ...)
2022-10-16 17:22 ` [PATCH v3 16/17] dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enable Krzysztof Kozlowski
@ 2022-10-16 17:22 ` Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
16 siblings, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-16 17:22 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel
Cc: Krzysztof Kozlowski, Rob Herring
The common Qualcomm TLMM pin controller schema for pin mux and config
already brings requirement of function for gpio pins and the definition
of drive-strength.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
Changes since v2:
1. Drop drive-strength, reword commit msg.
2. Add tags.
3. This was previously part of:
https://lore.kernel.org/linux-arm-msm/20221011172358.69043-1-krzysztof.kozlowski@linaro.org/T/#m277d25a5f3e9d10ca8221a7fba62ca468a67a60b
---
.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 18 ++----------------
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index 2a6b5a719d18..d70ab12f227d 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -62,6 +62,7 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
properties:
pins:
@@ -110,16 +111,11 @@ $defs:
uim1_clk, uim1_data, uim1_present, uim1_reset, usb2phy_ac,
usb_phy, vfr_0, vfr_1, vsense_trigger ]
- drive-strength:
- enum: [2, 4, 6, 8, 10, 12, 14, 16]
- default: 2
- description:
- Selects the drive strength for the specified pins, in mA.
-
bias-pull-down: true
bias-pull-up: true
bias-bus-hold: true
bias-disable: true
+ drive-strength: true
input-enable: true
output-high: true
output-low: true
@@ -127,16 +123,6 @@ $defs:
required:
- pins
- allOf:
- - $ref: /schemas/pinctrl/pincfg-node.yaml
- - if:
- properties:
- pins:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"
- then:
- required:
- - function
-
additionalProperties: false
allOf:
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: (subset) [PATCH v3 11/17] dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and gpio-line-names
2022-10-16 17:22 ` [PATCH v3 11/17] dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and gpio-line-names Krzysztof Kozlowski
@ 2022-10-18 15:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-18 15:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, devicetree, linux-arm-msm, linux-gpio,
Krzysztof Kozlowski, Andy Gross, linux-kernel, Rob Herring,
Bjorn Andersson, Konrad Dybcio, Linus Walleij
Cc: Rob Herring
On Sun, 16 Oct 2022 13:22:06 -0400, Krzysztof Kozlowski wrote:
> Document common GPIO properties (gpio-reserved-ranges and
> gpio-line-names), already used on qrb5165-rb5 board.
>
>
Applied, thanks!
[11/17] dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and gpio-line-names
https://git.kernel.org/krzk/linux-dt/c/a094b8d8790df774354c36c60017151c3a112e43
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: (subset) [PATCH v3 12/17] dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schema
2022-10-16 17:22 ` [PATCH v3 12/17] dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schema Krzysztof Kozlowski
@ 2022-10-18 15:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-18 15:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, devicetree, linux-arm-msm, linux-gpio,
Krzysztof Kozlowski, Andy Gross, Rob Herring, linux-kernel,
Bjorn Andersson, Konrad Dybcio, Linus Walleij
Cc: Rob Herring
On Sun, 16 Oct 2022 13:22:07 -0400, Krzysztof Kozlowski wrote:
> The common Qualcomm TLMM pin controller schema for pin mux and config
> already brings requirement of function for gpio pins and the definition
> of drive-strength.
>
>
Applied, thanks!
[12/17] dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schema
https://git.kernel.org/krzk/linux-dt/c/fd69e8befa1cbf29435b0666320d5f8848e8b333
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: (subset) [PATCH v3 13/17] dt-bindings: pinctrl: qcom,sm8250: fix matching pin config
2022-10-16 17:22 ` [PATCH v3 13/17] dt-bindings: pinctrl: qcom,sm8250: fix matching pin config Krzysztof Kozlowski
@ 2022-10-18 15:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-18 15:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, devicetree, linux-gpio, linux-arm-msm,
Krzysztof Kozlowski, linux-kernel, Rob Herring, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Linus Walleij
Cc: Rob Herring
On Sun, 16 Oct 2022 13:22:08 -0400, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
> The change causes indentation decrement, so the diff-hunk looks big, but
> there are no functional changes in the subnode "properties" section.
> The only difference there is removal of blank lines between common GPIO
> pinconf properties.
>
> [...]
Applied, thanks!
[13/17] dt-bindings: pinctrl: qcom,sm8250: fix matching pin config
https://git.kernel.org/krzk/linux-dt/c/a327e870af48c7f0bde57263c6a0ec65b0192217
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: (subset) [PATCH v3 14/17] dt-bindings: pinctrl: qcom,sm8250: add input-enable
2022-10-16 17:22 ` [PATCH v3 14/17] dt-bindings: pinctrl: qcom,sm8250: add input-enable Krzysztof Kozlowski
@ 2022-10-18 15:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-18 15:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, devicetree, linux-gpio, linux-arm-msm,
Krzysztof Kozlowski, linux-kernel, Rob Herring, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Linus Walleij
Cc: Rob Herring
On Sun, 16 Oct 2022 13:22:09 -0400, Krzysztof Kozlowski wrote:
> The SM8250 pinctrl driver supports input-enable and DTS already use it
> (sm8250-sony-xperia-edo-pdx203).
>
>
Applied, thanks!
[14/17] dt-bindings: pinctrl: qcom,sm8250: add input-enable
https://git.kernel.org/krzk/linux-dt/c/23e14d262451e050c146eb94d5aff4b72538ed79
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: (subset) [PATCH v3 15/17] dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOs
2022-10-16 17:22 ` [PATCH v3 15/17] dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOs Krzysztof Kozlowski
@ 2022-10-18 15:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-18 15:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, devicetree, linux-arm-msm, linux-gpio,
Krzysztof Kozlowski, Andy Gross, Rob Herring, linux-kernel,
Bjorn Andersson, Konrad Dybcio, Linus Walleij
Cc: Rob Herring
On Sun, 16 Oct 2022 13:22:10 -0400, Krzysztof Kozlowski wrote:
> SC7280 has 175 GPIOs (gpio0-174), so correct size of gpio-line-names and
> narrow the pattern for matching pin names.
>
>
Applied, thanks!
[15/17] dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOs
https://git.kernel.org/krzk/linux-dt/c/06311aa3ad1fd745d6248fc665f4c28880fedff1
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: (subset) [PATCH v3 16/17] dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enable
2022-10-16 17:22 ` [PATCH v3 16/17] dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enable Krzysztof Kozlowski
@ 2022-10-18 15:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-18 15:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, devicetree, linux-gpio, linux-arm-msm,
Krzysztof Kozlowski, Andy Gross, linux-kernel, Rob Herring,
Bjorn Andersson, Konrad Dybcio, Linus Walleij
Cc: Rob Herring
On Sun, 16 Oct 2022 13:22:11 -0400, Krzysztof Kozlowski wrote:
> The SC7280 pinctrl driver supports bias-bus-hold and input-enable, and
> DTS already use it (sc7280-idp).
>
>
Applied, thanks!
[16/17] dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enable
https://git.kernel.org/krzk/linux-dt/c/a92ffc90739fdbb2925bccdcc61f3aa8b62c15b2
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: (subset) [PATCH v3 17/17] dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema
2022-10-16 17:22 ` [PATCH v3 17/17] dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema Krzysztof Kozlowski
@ 2022-10-18 15:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-18 15:49 UTC (permalink / raw)
To: Krzysztof Kozlowski, devicetree, linux-gpio, linux-arm-msm,
Krzysztof Kozlowski, Andy Gross, Rob Herring, linux-kernel,
Bjorn Andersson, Konrad Dybcio, Linus Walleij
Cc: Rob Herring
On Sun, 16 Oct 2022 13:22:12 -0400, Krzysztof Kozlowski wrote:
> The common Qualcomm TLMM pin controller schema for pin mux and config
> already brings requirement of function for gpio pins and the definition
> of drive-strength.
>
>
Applied, thanks!
[17/17] dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema
https://git.kernel.org/krzk/linux-dt/c/b4997c1cb7d4c3900aab6fe5dad521f59369f93d
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
end of thread, other threads:[~2022-10-18 15:51 UTC | newest]
Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-16 17:21 [PATCH v3 00/17] pinctrl/arm64: qcom: 4th set of Qualcomm TLMM pinctrl schema warnings Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 01/17] arm64: dts: qcom: sm8250: align TLMM pin configuration with DT schema Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 02/17] arm64: dts: qcom: sm8250-sony-xperia-edo: fix touchscreen bias-disable Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 03/17] arm64: dts: qcom: sc8280xp: align TLMM pin configuration with DT schema Krzysztof Kozlowski
2022-10-16 17:21 ` [PATCH v3 04/17] arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema (really) Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 05/17] arm64: dts: qcom: sc7280-herobrine: correct number of gpio-line-names Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 06/17] arm64: dts: qcom: sc7280-idp-ec-h1: add missing QUP GPIO functions Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 07/17] arm64: dts: qcom: msm8953: align TLMM pin configuration with DT schema Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 08/17] arm64: dts: qcom: sdm845: " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 09/17] arm64: dts: qcom: sm6125-sony-xperia: add missing SD CD GPIO functions Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 10/17] arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 11/17] dt-bindings: pinctrl: qcom,sm8250: add gpio-reserved-ranges and gpio-line-names Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 12/17] dt-bindings: pinctrl: qcom,sm8250: use common TLMM pin schema Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 13/17] dt-bindings: pinctrl: qcom,sm8250: fix matching pin config Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 14/17] dt-bindings: pinctrl: qcom,sm8250: add input-enable Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 15/17] dt-bindings: pinctrl: qcom,sc7280: correct number of GPIOs Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 16/17] dt-bindings: pinctrl: qcom,sc7280: add bias-bus-hold and input-enable Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
2022-10-16 17:22 ` [PATCH v3 17/17] dt-bindings: pinctrl: qcom,sc7280: use common TLMM pin schema Krzysztof Kozlowski
2022-10-18 15:49 ` (subset) " Krzysztof Kozlowski
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