From: Chester Lin <clin@suse.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: "Chester Lin" <clin@suse.com>, "NXP S32 Linux Team" <s32@nxp.com>,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
"Ghennadi Procopciuc" <Ghennadi.Procopciuc@oss.nxp.com>,
"Andrei Stefanescu" <andrei.stefanescu@nxp.com>,
"Radu Pirea" <radu-nicolae.pirea@nxp.com>,
"Andreas Färber" <afaerber@suse.de>,
"Matthias Brugger" <mbrugger@suse.com>
Subject: [PATCH v5 2/5] pinctrl: s32cc: refactor pin config parsing
Date: Mon, 27 Mar 2023 14:27:51 +0800 [thread overview]
Message-ID: <20230327062754.3326-3-clin@suse.com> (raw)
In-Reply-To: <20230327062754.3326-1-clin@suse.com>
Move common codes into smaller inline functions and remove argument checks
that are not actually used by pull up/down bits in the S32 MSCR register.
Signed-off-by: Chester Lin <clin@suse.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
---
(No change since v3)
drivers/pinctrl/nxp/pinctrl-s32cc.c | 52 ++++++++++++++++++-----------
1 file changed, 33 insertions(+), 19 deletions(-)
diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
index f698e1a240ef..36f323f87785 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
+++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
@@ -474,11 +474,38 @@ static int s32_get_slew_regval(int arg)
return -EINVAL;
}
-static int s32_get_pin_conf(enum pin_config_param param, u32 arg,
- unsigned int *mask, unsigned int *config)
+static inline void s32_pin_set_pull(enum pin_config_param param,
+ unsigned int *mask, unsigned int *config)
{
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
+ *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE);
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ *config |= S32_MSCR_PUS | S32_MSCR_PUE;
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ *config &= ~S32_MSCR_PUS;
+ *config |= S32_MSCR_PUE;
+ break;
+ default:
+ return;
+ }
+
+ *mask |= S32_MSCR_PUS | S32_MSCR_PUE;
+}
+
+static int s32_parse_pincfg(unsigned long pincfg, unsigned int *mask,
+ unsigned int *config)
+{
+ enum pin_config_param param;
+ u32 arg;
int ret;
+ param = pinconf_to_config_param(pincfg);
+ arg = pinconf_to_config_argument(pincfg);
+
switch (param) {
/* All pins are persistent over suspend */
case PIN_CONFIG_PERSIST_STATE:
@@ -508,26 +535,15 @@ static int s32_get_pin_conf(enum pin_config_param param, u32 arg,
*config |= S32_MSCR_SRE((u32)ret);
*mask |= S32_MSCR_SRE(~0);
break;
+ case PIN_CONFIG_BIAS_DISABLE:
case PIN_CONFIG_BIAS_PULL_UP:
- if (arg)
- *config |= S32_MSCR_PUS;
- else
- *config &= ~S32_MSCR_PUS;
- fallthrough;
case PIN_CONFIG_BIAS_PULL_DOWN:
- if (arg)
- *config |= S32_MSCR_PUE;
- else
- *config &= ~S32_MSCR_PUE;
- *mask |= S32_MSCR_PUE | S32_MSCR_PUS;
+ s32_pin_set_pull(param, mask, config);
break;
case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
*config &= ~(S32_MSCR_ODE | S32_MSCR_OBE | S32_MSCR_IBE);
*mask |= S32_MSCR_ODE | S32_MSCR_OBE | S32_MSCR_IBE;
- fallthrough;
- case PIN_CONFIG_BIAS_DISABLE:
- *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE);
- *mask |= S32_MSCR_PUS | S32_MSCR_PUE;
+ s32_pin_set_pull(param, mask, config);
break;
default:
return -EOPNOTSUPP;
@@ -553,9 +569,7 @@ static int s32_pinconf_mscr_update(struct pinctrl_dev *pctldev,
pin_get_name(pctldev, pin_id), num_configs);
for (i = 0; i < num_configs; i++) {
- ret = s32_get_pin_conf(pinconf_to_config_param(configs[i]),
- pinconf_to_config_argument(configs[i]),
- &mask, &config);
+ ret = s32_parse_pincfg(configs[i], &mask, &config);
if (ret)
return ret;
}
--
2.37.3
next prev parent reply other threads:[~2023-03-27 6:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-27 6:27 [PATCH v5 0/5] pinctrl: s32: driver improvements and generic struct use Chester Lin
2023-03-27 6:27 ` [PATCH v5 1/5] pinctrl: s32: refine error/return/config checks and simplify driver codes Chester Lin
2023-03-27 21:34 ` Linus Walleij
2023-03-27 6:27 ` Chester Lin [this message]
2023-03-27 21:35 ` [PATCH v5 2/5] pinctrl: s32cc: refactor pin config parsing Linus Walleij
2023-03-27 6:27 ` [PATCH v5 3/5] pinctrl: s32cc: embed generic struct pingroup Chester Lin
2023-03-27 21:36 ` Linus Walleij
2023-03-27 6:27 ` [PATCH v5 4/5] pinctrl: s32cc: Use generic struct data to describe pin function Chester Lin
2023-03-27 6:27 ` [PATCH v5 5/5] pinctrl: s32: separate const device data from struct s32_pinctrl_soc_info Chester Lin
2023-03-27 11:58 ` Andy Shevchenko
2023-03-27 21:39 ` Linus Walleij
2023-03-29 4:25 ` Chester Lin
2023-03-29 4:16 ` [RESEND PATCH " Chester Lin
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