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* [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context
@ 2023-03-23 12:29 Dhruva Gole
  2023-03-23 12:29 ` [RFC PATCH 2/2] gpio: davinci: Add irq chip flag to skip set wake Dhruva Gole
  2023-03-28 13:29 ` [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context Linus Walleij
  0 siblings, 2 replies; 5+ messages in thread
From: Dhruva Gole @ 2023-03-23 12:29 UTC (permalink / raw)
  To: Keerthy
  Cc: Vibhore Vardhan, Dhruva Gole, Tony Lindgren, Vignesh,
	Linus Walleij, Bartosz Golaszewski, linux-gpio, linux-kernel,
	Devarsh Thakkar

The interrupt enable bits might be set if we want to use the GPIO as
wakeup source. Clearing this will mean disabling of interrupts in the GPIO
banks that we may want to wakeup from.
Thus remove the line that was clearing this bit from the driver's save
context function.

Fixes: 0651a730924b ("gpio: davinci: Add support for system suspend/resume PM")
Cc: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
---
 drivers/gpio/gpio-davinci.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index 7fc83057990a..d7595b39e8c4 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -639,9 +639,6 @@ static void davinci_gpio_save_context(struct davinci_gpio_controller *chips,
 		context->set_falling = readl_relaxed(&g->set_falling);
 	}
 
-	/* Clear Bank interrupt enable bit */
-	writel_relaxed(0, base + BINTEN);
-
 	/* Clear all interrupt status registers */
 	writel_relaxed(GENMASK(31, 0), &g->intstat);
 }
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [RFC PATCH 2/2] gpio: davinci: Add irq chip flag to skip set wake
  2023-03-23 12:29 [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context Dhruva Gole
@ 2023-03-23 12:29 ` Dhruva Gole
  2023-03-28 13:29   ` Linus Walleij
  2023-03-28 13:29 ` [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context Linus Walleij
  1 sibling, 1 reply; 5+ messages in thread
From: Dhruva Gole @ 2023-03-23 12:29 UTC (permalink / raw)
  To: Keerthy
  Cc: Vibhore Vardhan, Dhruva Gole, Tony Lindgren, Vignesh,
	Linus Walleij, Bartosz Golaszewski, linux-gpio, linux-kernel

Add the IRQCHIP_SKIP_SET_WAKE flag since there are no special IRQ Wake
bits that can be set to enable wakeup IRQ.

Fixes: 3d9edf09d452 ("[ARM] 4457/2: davinci: GPIO support")
Signed-off-by: Dhruva Gole <d-gole@ti.com>
---
 drivers/gpio/gpio-davinci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index d7595b39e8c4..aaaf61dc2632 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -322,7 +322,7 @@ static struct irq_chip gpio_irqchip = {
 	.irq_enable	= gpio_irq_enable,
 	.irq_disable	= gpio_irq_disable,
 	.irq_set_type	= gpio_irq_type,
-	.flags		= IRQCHIP_SET_TYPE_MASKED,
+	.flags		= IRQCHIP_SET_TYPE_MASKED | IRQCHIP_SKIP_SET_WAKE,
 };
 
 static void gpio_irq_handler(struct irq_desc *desc)
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context
  2023-03-23 12:29 [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context Dhruva Gole
  2023-03-23 12:29 ` [RFC PATCH 2/2] gpio: davinci: Add irq chip flag to skip set wake Dhruva Gole
@ 2023-03-28 13:29 ` Linus Walleij
  2023-03-30  3:04   ` J, KEERTHY
  1 sibling, 1 reply; 5+ messages in thread
From: Linus Walleij @ 2023-03-28 13:29 UTC (permalink / raw)
  To: Dhruva Gole
  Cc: Keerthy, Vibhore Vardhan, Tony Lindgren, Vignesh,
	Bartosz Golaszewski, linux-gpio, linux-kernel, Devarsh Thakkar

On Thu, Mar 23, 2023 at 1:29 PM Dhruva Gole <d-gole@ti.com> wrote:

> The interrupt enable bits might be set if we want to use the GPIO as
> wakeup source. Clearing this will mean disabling of interrupts in the GPIO
> banks that we may want to wakeup from.
> Thus remove the line that was clearing this bit from the driver's save
> context function.
>
> Fixes: 0651a730924b ("gpio: davinci: Add support for system suspend/resume PM")
> Cc: Devarsh Thakkar <devarsht@ti.com>
> Signed-off-by: Dhruva Gole <d-gole@ti.com>

Looks like the right solution to me.
I'm a bit surprised given how long we have had this driver.
I suppose people have used out-of-tree patches for suspend/resume. :(

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [RFC PATCH 2/2] gpio: davinci: Add irq chip flag to skip set wake
  2023-03-23 12:29 ` [RFC PATCH 2/2] gpio: davinci: Add irq chip flag to skip set wake Dhruva Gole
@ 2023-03-28 13:29   ` Linus Walleij
  0 siblings, 0 replies; 5+ messages in thread
From: Linus Walleij @ 2023-03-28 13:29 UTC (permalink / raw)
  To: Dhruva Gole
  Cc: Keerthy, Vibhore Vardhan, Tony Lindgren, Vignesh,
	Bartosz Golaszewski, linux-gpio, linux-kernel

On Thu, Mar 23, 2023 at 1:29 PM Dhruva Gole <d-gole@ti.com> wrote:

> Add the IRQCHIP_SKIP_SET_WAKE flag since there are no special IRQ Wake
> bits that can be set to enable wakeup IRQ.
>
> Fixes: 3d9edf09d452 ("[ARM] 4457/2: davinci: GPIO support")
> Signed-off-by: Dhruva Gole <d-gole@ti.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context
  2023-03-28 13:29 ` [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context Linus Walleij
@ 2023-03-30  3:04   ` J, KEERTHY
  0 siblings, 0 replies; 5+ messages in thread
From: J, KEERTHY @ 2023-03-30  3:04 UTC (permalink / raw)
  To: Linus Walleij, Dhruva Gole
  Cc: Vibhore Vardhan, Tony Lindgren, Vignesh, Bartosz Golaszewski,
	linux-gpio, linux-kernel, Devarsh Thakkar



On 3/28/2023 6:59 PM, Linus Walleij wrote:
> On Thu, Mar 23, 2023 at 1:29 PM Dhruva Gole <d-gole@ti.com> wrote:
> 
>> The interrupt enable bits might be set if we want to use the GPIO as
>> wakeup source. Clearing this will mean disabling of interrupts in the GPIO
>> banks that we may want to wakeup from.
>> Thus remove the line that was clearing this bit from the driver's save
>> context function.
>>
>> Fixes: 0651a730924b ("gpio: davinci: Add support for system suspend/resume PM")
>> Cc: Devarsh Thakkar <devarsht@ti.com>
>> Signed-off-by: Dhruva Gole <d-gole@ti.com>
> 
> Looks like the right solution to me.
> I'm a bit surprised given how long we have had this driver.
> I suppose people have used out-of-tree patches for suspend/resume. :(
> 
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Acked-by: Keerthy <j-keerthy@ti.com>

> 
> Yours,
> Linus Walleij

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2023-03-30  3:04 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-23 12:29 [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context Dhruva Gole
2023-03-23 12:29 ` [RFC PATCH 2/2] gpio: davinci: Add irq chip flag to skip set wake Dhruva Gole
2023-03-28 13:29   ` Linus Walleij
2023-03-28 13:29 ` [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context Linus Walleij
2023-03-30  3:04   ` J, KEERTHY

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