* [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs
@ 2018-05-04 20:01 Guenter Roeck
2018-05-04 20:01 ` [PATCH v3 2/2] hwmon: (k10temp) Use API function to access System Management Network Guenter Roeck
2018-05-13 14:21 ` [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs Thomas Gleixner
0 siblings, 2 replies; 4+ messages in thread
From: Guenter Roeck @ 2018-05-04 20:01 UTC (permalink / raw)
To: Thomas Gleixner, Clemens Ladisch
Cc: Jean Delvare, Borislav Petkov, Yazen Ghannam, Brian Woods,
linux-kernel, linux-hwmon, Guenter Roeck
Add Raven Ridge root bridge and data fabric PCI IDs.
This is required for amd_pci_dev_to_node_id() and amd_smn_read().
Tested-by: Gabriel Craciunescu <nix.or.die@gmail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
v3: No change.
v2: Use naming scheme suggested by Borislav Petkov.
arch/x86/kernel/amd_nb.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index c88e0b127810..b481b95bd8f6 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -14,8 +14,11 @@
#include <asm/amd_nb.h>
#define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450
+#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
#define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463
#define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
+#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
+#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
/* Protect the PCI config register pairs used for SMN and DF indirect access. */
static DEFINE_MUTEX(smn_mutex);
@@ -24,6 +27,7 @@ static u32 *flush_words;
static const struct pci_device_id amd_root_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
{}
};
@@ -39,6 +43,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
{}
};
@@ -51,6 +56,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
{}
};
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v3 2/2] hwmon: (k10temp) Use API function to access System Management Network
2018-05-04 20:01 [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs Guenter Roeck
@ 2018-05-04 20:01 ` Guenter Roeck
2018-05-13 14:21 ` [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs Thomas Gleixner
1 sibling, 0 replies; 4+ messages in thread
From: Guenter Roeck @ 2018-05-04 20:01 UTC (permalink / raw)
To: Thomas Gleixner, Clemens Ladisch
Cc: Jean Delvare, Borislav Petkov, Yazen Ghannam, Brian Woods,
linux-kernel, linux-hwmon, Guenter Roeck
The SMN (System Management Network) on Family 17h AMD CPUs is also accessed
from other drivers, specifically EDAC. Accessing it directly is racy.
On top of that, accessing the SMN through root bridge 00:00 is wrong on
multi-die CPUs and may result in reading the temperature from the wrong
die. Use available API functions to fix the problem.
For this to work, add dependency on AMD_NB. Also change the Raven Ridge
PCI device ID to point to Data Fabric Function 3, since this ID is used
by the API functions to find the CPU node.
Tested-by: Gabriel Craciunescu <nix.or.die@gmail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
v3: Add dependency on AMD_NB
v2: Fix Raven Ridge device ID and use naming scheme suggested by
Borislav Petkov.
drivers/hwmon/Kconfig | 2 +-
drivers/hwmon/k10temp.c | 11 ++++++-----
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index f249a4428458..6ec307c93ece 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -272,7 +272,7 @@ config SENSORS_K8TEMP
config SENSORS_K10TEMP
tristate "AMD Family 10h+ temperature sensor"
- depends on X86 && PCI
+ depends on X86 && PCI && AMD_NB
help
If you say yes here you get support for the temperature
sensor(s) inside your CPU. Supported are later revisions of
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index f014e03eee5a..e97105ae4158 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -23,6 +23,7 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
+#include <asm/amd_nb.h>
#include <asm/processor.h>
MODULE_DESCRIPTION("AMD Family 10h+ CPU core temperature monitor");
@@ -44,8 +45,8 @@ static DEFINE_MUTEX(nb_smu_ind_mutex);
#define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463
#endif
-#ifndef PCI_DEVICE_ID_AMD_17H_RR_NB
-#define PCI_DEVICE_ID_AMD_17H_RR_NB 0x15d0
+#ifndef PCI_DEVICE_ID_AMD_17H_M10H_DF_F3
+#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
#endif
/* CPUID function 0x80000001, ebx */
@@ -140,8 +141,8 @@ static void read_tempreg_nb_f15(struct pci_dev *pdev, u32 *regval)
static void read_tempreg_nb_f17(struct pci_dev *pdev, u32 *regval)
{
- amd_nb_index_read(pdev, PCI_DEVFN(0, 0), 0x60,
- F17H_M01H_REPORTED_TEMP_CTRL_OFFSET, regval);
+ amd_smn_read(amd_pci_dev_to_node_id(pdev),
+ F17H_M01H_REPORTED_TEMP_CTRL_OFFSET, regval);
}
static ssize_t temp1_input_show(struct device *dev,
@@ -327,7 +328,7 @@ static const struct pci_device_id k10temp_id_table[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },
- { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_RR_NB) },
+ { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
{}
};
MODULE_DEVICE_TABLE(pci, k10temp_id_table);
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs
2018-05-04 20:01 [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs Guenter Roeck
2018-05-04 20:01 ` [PATCH v3 2/2] hwmon: (k10temp) Use API function to access System Management Network Guenter Roeck
@ 2018-05-13 14:21 ` Thomas Gleixner
2018-05-13 14:32 ` Guenter Roeck
1 sibling, 1 reply; 4+ messages in thread
From: Thomas Gleixner @ 2018-05-13 14:21 UTC (permalink / raw)
To: Guenter Roeck
Cc: Clemens Ladisch, Jean Delvare, Borislav Petkov, Yazen Ghannam,
Brian Woods, linux-kernel, linux-hwmon
On Fri, 4 May 2018, Guenter Roeck wrote:
> Add Raven Ridge root bridge and data fabric PCI IDs.
> This is required for amd_pci_dev_to_node_id() and amd_smn_read().
>
> Tested-by: Gabriel Craciunescu <nix.or.die@gmail.com>
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Guenter, if you want to take that through hwmon:
Acked-by: Thomas Gleixner <tglx@linutronix.de>
If not, let me know.
> ---
> v3: No change.
> v2: Use naming scheme suggested by Borislav Petkov.
>
> arch/x86/kernel/amd_nb.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
> index c88e0b127810..b481b95bd8f6 100644
> --- a/arch/x86/kernel/amd_nb.c
> +++ b/arch/x86/kernel/amd_nb.c
> @@ -14,8 +14,11 @@
> #include <asm/amd_nb.h>
>
> #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450
> +#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
> #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463
> #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
> +#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
> +#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
>
> /* Protect the PCI config register pairs used for SMN and DF indirect access. */
> static DEFINE_MUTEX(smn_mutex);
> @@ -24,6 +27,7 @@ static u32 *flush_words;
>
> static const struct pci_device_id amd_root_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
> {}
> };
>
> @@ -39,6 +43,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
> {}
> };
> @@ -51,6 +56,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
> {}
> };
> --
> 2.7.4
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs
2018-05-13 14:21 ` [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs Thomas Gleixner
@ 2018-05-13 14:32 ` Guenter Roeck
0 siblings, 0 replies; 4+ messages in thread
From: Guenter Roeck @ 2018-05-13 14:32 UTC (permalink / raw)
To: Thomas Gleixner
Cc: Clemens Ladisch, Jean Delvare, Borislav Petkov, Yazen Ghannam,
Brian Woods, linux-kernel, linux-hwmon
On 05/13/2018 07:21 AM, Thomas Gleixner wrote:
> On Fri, 4 May 2018, Guenter Roeck wrote:
>
>> Add Raven Ridge root bridge and data fabric PCI IDs.
>> This is required for amd_pci_dev_to_node_id() and amd_smn_read().
>>
>> Tested-by: Gabriel Craciunescu <nix.or.die@gmail.com>
>> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
>
> Guenter, if you want to take that through hwmon:
>
Yes, that was the idea.
> Acked-by: Thomas Gleixner <tglx@linutronix.de>
>
Thanks!
Guenter
> If not, let me know.
>
>> ---
>> v3: No change.
>> v2: Use naming scheme suggested by Borislav Petkov.
>>
>> arch/x86/kernel/amd_nb.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
>> index c88e0b127810..b481b95bd8f6 100644
>> --- a/arch/x86/kernel/amd_nb.c
>> +++ b/arch/x86/kernel/amd_nb.c
>> @@ -14,8 +14,11 @@
>> #include <asm/amd_nb.h>
>>
>> #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450
>> +#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
>> #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463
>> #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
>> +#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
>> +#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
>>
>> /* Protect the PCI config register pairs used for SMN and DF indirect access. */
>> static DEFINE_MUTEX(smn_mutex);
>> @@ -24,6 +27,7 @@ static u32 *flush_words;
>>
>> static const struct pci_device_id amd_root_ids[] = {
>> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) },
>> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
>> {}
>> };
>>
>> @@ -39,6 +43,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
>> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
>> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
>> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },
>> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
>> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
>> {}
>> };
>> @@ -51,6 +56,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
>> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
>> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
>> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) },
>> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) },
>> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
>> {}
>> };
>> --
>> 2.7.4
>>
>>
> --
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2018-05-04 20:01 [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs Guenter Roeck
2018-05-04 20:01 ` [PATCH v3 2/2] hwmon: (k10temp) Use API function to access System Management Network Guenter Roeck
2018-05-13 14:21 ` [PATCH v3 1/2] x86/amd_nb: Add support for Raven Ridge CPUs Thomas Gleixner
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