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* [PATCH v3 00/25] Unify PCI error response checking
@ 2021-10-21 15:07 Naveen Naidu
  2021-10-21 15:07 ` [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions Naveen Naidu
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Naveen Naidu @ 2021-10-21 15:07 UTC (permalink / raw)
  To: bhelgaas
  Cc: Naveen Naidu, linux-kernel-mentees, linux-pci, linux-kernel,
	linux-arm-kernel, linux-hyperv, linux-mediatek, linuxppc-dev,
	linux-renesas-soc, linux-rockchip, linux-samsung-soc,
	Rob Herring, Pali Rohár, skhan, Robert Richter,
	Lorenzo Pieralisi, Krzysztof Wilczyński, Ray Jui,
	Scott Branden, maintainer:BROADCOM IPROC ARM ARCHITECTURE,
	Ryder Lee, Jianjun Wang, Matthias Brugger, Jingoo Han,
	Krzysztof Kozlowski, Shawn Guo, Xiaowei Song, Binghui Wang,
	Thomas Petazzoni, Joyce Ooi, Marek Vasut, Yoshihiro Shimoda,
	Shawn Lin, Heiko Stuebner, Nirmal Patel, Jonathan Derrick,
	Kuppuswamy Sathyanarayanan, Lukas Wunner, Amey Narkhede,
	Russell Currey, Oliver O'Halloran, Sean V Kelley, Qiuxu Zhuo,
	Marc Zyngier, K. Y. Srinivasan, Haiyang Zhang, Stephen Hemminger,
	Wei Liu, Dexuan Cui, Toan Le, Kishon Vijay Abraham I

An MMIO read from a PCI device that doesn't exist or doesn't respond
causes a PCI error.  There's no real data to return to satisfy the 
CPU read, so most hardware fabricates ~0 data.

This patch series adds PCI_ERROR_RESPONSE definition and other helper
definition SET_PCI_ERROR_RESPONSE and RESPONSE_IS_PCI_ERROR and uses it
where appropriate to make these checks consistent and easier to find.

This helps unify PCI error response checking and make error check
consistent and easier to find.

This series also ensures that the error response fabrication now happens
in the PCI_OP_READ and PCI_USER_READ_CONFIG. This removes the
responsibility from controller drivers to do the error response setting. 

Patch 1:
    - Adds the PCI_ERROR_RESPONSE and other related defintions
    - All other patches are dependent on this patch. This patch needs to
      be applied first, before the others

Patch 2:
    - Error fabrication happens in PCI_OP_READ and PCI_USER_READ_CONFIG
      whenever the data read via the controller driver fails.
    - This patch needs to be applied before, Patch 4/24 to Patch 15/24 are
      applied.

Patch 3:
    - Uses SET_PCI_ERROR_RESPONSE() when device is not found 

Patch 4 - 15:
    - Removes redundant error fabrication that happens in controller 
      drivers when the read from a PCI device fails.
    - These patches are dependent on Patch 2/24 of the series.
    - These can be applied in any order.

Patch 16 - 22:
    - Uses RESPONSE_IS_PCI_ERROR() to check the reads from hardware
    - Patches can be applied in any order.

Patch 23 - 25:
    - Edits the comments to include PCI_ERROR_RESPONSE alsong with
      0xFFFFFFFF, so that it becomes easier to grep for faulty 
      hardware reads.

Changelog
=========
v3:
   - Change RESPONSE_IS_PCI_ERROR macro definition
   - Fix the macros, Add () around macro parameters
   - Fix alignment issue in Patch 2/24
   - Add proper receipients for all the patches

v2:
    - Instead of using SET_PCI_ERROR_RESPONSE in all controller drivers
      to fabricate error response, only use them in PCI_OP_READ and
      PCI_USER_READ_CONFIG

Naveen Naidu (25):
  [Patch 1/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions
  [Patch 2/25] PCI: Set error response in config access defines when ops->read() fails
  [Patch 3/25] PCI: Use SET_PCI_ERROR_RESPONSE() when device not found
  [Patch 4/25] PCI: Remove redundant error fabrication when device read fails
  [Patch 5/25] PCI: thunder: Remove redundant error fabrication when device read fails
  [Patch 6/25] PCI: iproc: Remove redundant error fabrication when device read fails
  [Patch 7/25] PCI: mediatek: Remove redundant error fabrication when device read fails
  [Patch 8/25] PCI: exynos: Remove redundant error fabrication when device read fails
  [Patch 9/25] PCI: histb: Remove redundant error fabrication when device read fails
  [Patch 10/25] PCI: kirin: Remove redundant error fabrication when device read fails
  [Patch 11/25] PCI: aardvark: Remove redundant error fabrication when device read fails
  [Patch 12/25] PCI: mvebu: Remove redundant error fabrication when device read fails
  [Patch 13/25] PCI: altera: Remove redundant error fabrication when device read fails
  [Patch 14/25] PCI: rcar: Remove redundant error fabrication when device read fails
  [Patch 15/25] PCI: rockchip: Remove redundant error fabrication when device read fails
  [Patch 16/25] PCI/ERR: Use RESPONSE_IS_PCI_ERROR() to check read from hardware
  [Patch 17/25] PCI: vmd: Use RESPONSE_IS_PCI_ERROR() to check read from hardware
  [Patch 18/25] PCI: pciehp: Use RESPONSE_IS_PCI_ERROR() to check read from hardware
  [Patch 19/25] PCI/DPC: Use RESPONSE_IS_PCI_ERROR() to check read from hardware
  [Patch 20/25] PCI/PME: Use RESPONSE_IS_PCI_ERROR() to check read from hardware
  [Patch 21/25] PCI: cpqphp: Use RESPONSE_IS_PCI_ERROR() to check read from hardware
  [Patch 22/25] PCI: Use PCI_ERROR_RESPONSE to specify hardware error
  [Patch 23/25] PCI: keystone: Use PCI_ERROR_RESPONSE to specify hardware error
  [Patch 24/25] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error
  [Patch 25/25] PCI: xgene: Use PCI_ERROR_RESPONSE to specify hardware error

 drivers/pci/access.c                        | 32 +++++++-------
 drivers/pci/controller/dwc/pci-exynos.c     |  4 +-
 drivers/pci/controller/dwc/pci-keystone.c   |  4 +-
 drivers/pci/controller/dwc/pcie-histb.c     |  4 +-
 drivers/pci/controller/dwc/pcie-kirin.c     |  4 +-
 drivers/pci/controller/pci-aardvark.c       | 10 +----
 drivers/pci/controller/pci-hyperv.c         |  2 +-
 drivers/pci/controller/pci-mvebu.c          |  8 +---
 drivers/pci/controller/pci-thunder-ecam.c   | 46 +++++++--------------
 drivers/pci/controller/pci-thunder-pem.c    |  4 +-
 drivers/pci/controller/pci-xgene.c          |  8 ++--
 drivers/pci/controller/pcie-altera.c        |  4 +-
 drivers/pci/controller/pcie-iproc.c         |  4 +-
 drivers/pci/controller/pcie-mediatek.c      | 11 +----
 drivers/pci/controller/pcie-rcar-host.c     |  4 +-
 drivers/pci/controller/pcie-rockchip-host.c |  4 +-
 drivers/pci/controller/vmd.c                |  2 +-
 drivers/pci/hotplug/cpqphp_ctrl.c           |  4 +-
 drivers/pci/hotplug/pciehp_hpc.c            | 10 ++---
 drivers/pci/pci.c                           | 10 ++---
 drivers/pci/pcie/dpc.c                      |  4 +-
 drivers/pci/pcie/pme.c                      |  4 +-
 drivers/pci/probe.c                         | 10 ++---
 include/linux/pci.h                         |  9 ++++
 24 files changed, 85 insertions(+), 121 deletions(-)

-- 
2.25.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions
  2021-10-21 15:07 [PATCH v3 00/25] Unify PCI error response checking Naveen Naidu
@ 2021-10-21 15:07 ` Naveen Naidu
  2021-10-21 16:08   ` Pali Rohár
  2021-11-17 23:58   ` Bjorn Helgaas
  2021-10-21 15:07 ` [PATCH v3 02/25] PCI: Set error response in config access defines when ops->read() fails Naveen Naidu
  2021-10-21 15:07 ` [PATCH v3 24/25] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu
  2 siblings, 2 replies; 8+ messages in thread
From: Naveen Naidu @ 2021-10-21 15:07 UTC (permalink / raw)
  To: bhelgaas
  Cc: Naveen Naidu, linux-kernel-mentees, linux-pci, linux-kernel,
	linux-arm-kernel, linux-hyperv, linux-mediatek, linuxppc-dev,
	linux-renesas-soc, linux-rockchip, linux-samsung-soc,
	Rob Herring, Pali Rohár, skhan, Robert Richter,
	Lorenzo Pieralisi, Krzysztof Wilczyński, Ray Jui,
	Scott Branden, maintainer:BROADCOM IPROC ARM ARCHITECTURE,
	Ryder Lee, Jianjun Wang, Matthias Brugger, Jingoo Han,
	Krzysztof Kozlowski, Shawn Guo, Xiaowei Song, Binghui Wang,
	Thomas Petazzoni, Joyce Ooi, Marek Vasut, Yoshihiro Shimoda,
	Shawn Lin, Heiko Stuebner, Nirmal Patel, Jonathan Derrick,
	Kuppuswamy Sathyanarayanan, Lukas Wunner, Amey Narkhede,
	Russell Currey, Oliver O'Halloran, Sean V Kelley, Qiuxu Zhuo,
	Marc Zyngier, K. Y. Srinivasan, Haiyang Zhang, Stephen Hemminger,
	Wei Liu, Dexuan Cui, Toan Le

An MMIO read from a PCI device that doesn't exist or doesn't respond
causes a PCI error.  There's no real data to return to satisfy the
CPU read, so most hardware fabricates ~0 data.

Add a PCI_ERROR_RESPONSE definition for that and use it where
appropriate to make these checks consistent and easier to find.

Also add helper definitions SET_PCI_ERROR_RESPONSE and
RESPONSE_IS_PCI_ERROR to make the code more readable.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
---
 include/linux/pci.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/linux/pci.h b/include/linux/pci.h
index cd8aa6fce204..689c8277c584 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -154,6 +154,15 @@ enum pci_interrupt_pin {
 /* The number of legacy PCI INTx interrupts */
 #define PCI_NUM_INTX	4
 
+/*
+ * Reading from a device that doesn't respond typically returns ~0.  A
+ * successful read from a device may also return ~0, so you need additional
+ * information to reliably identify errors.
+ */
+#define PCI_ERROR_RESPONSE     (~0ULL)
+#define SET_PCI_ERROR_RESPONSE(val)    (*(val) = ((typeof(*(val))) PCI_ERROR_RESPONSE))
+#define RESPONSE_IS_PCI_ERROR(val) ((val) == ((typeof(val)) PCI_ERROR_RESPONSE))
+
 /*
  * pci_power_t values must match the bits in the Capabilities PME_Support
  * and Control/Status PowerState fields in the Power Management capability.
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH v3 02/25] PCI: Set error response in config access defines when ops->read() fails
  2021-10-21 15:07 [PATCH v3 00/25] Unify PCI error response checking Naveen Naidu
  2021-10-21 15:07 ` [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions Naveen Naidu
@ 2021-10-21 15:07 ` Naveen Naidu
  2021-10-21 15:59   ` Pali Rohár
  2021-10-21 15:07 ` [PATCH v3 24/25] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu
  2 siblings, 1 reply; 8+ messages in thread
From: Naveen Naidu @ 2021-10-21 15:07 UTC (permalink / raw)
  To: bhelgaas
  Cc: Naveen Naidu, linux-kernel-mentees, linux-pci, linux-kernel,
	linux-arm-kernel, linux-hyperv, linux-mediatek, linuxppc-dev,
	linux-renesas-soc, linux-rockchip, linux-samsung-soc,
	Rob Herring, Pali Rohár, skhan, Robert Richter,
	Lorenzo Pieralisi, Krzysztof Wilczyński, Ray Jui,
	Scott Branden, maintainer:BROADCOM IPROC ARM ARCHITECTURE,
	Ryder Lee, Jianjun Wang, Matthias Brugger, Jingoo Han,
	Krzysztof Kozlowski, Shawn Guo, Xiaowei Song, Binghui Wang,
	Thomas Petazzoni, Joyce Ooi, Marek Vasut, Yoshihiro Shimoda,
	Shawn Lin, Heiko Stuebner, Nirmal Patel, Jonathan Derrick,
	Kuppuswamy Sathyanarayanan, Lukas Wunner, Amey Narkhede,
	Russell Currey, Oliver O'Halloran, Sean V Kelley, Qiuxu Zhuo,
	Marc Zyngier, K. Y. Srinivasan, Haiyang Zhang, Stephen Hemminger,
	Wei Liu, Dexuan Cui, Toan Le

Make PCI_OP_READ and PCI_USER_READ_CONFIG set the data value with error
response (~0), when the PCI device read by a host controller fails.

This ensures that the controller drivers no longer need to fabricate
(~0) value when they detect error. It also  gurantees that the error
response (~0) is always set when the controller drivers fails to read a
config register from a device.

This makes error response fabrication consistent and helps in removal of
a lot of repeated code.

Suggested-by: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
---
 drivers/pci/access.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 46935695cfb9..0f732ba2f71a 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -42,7 +42,10 @@ int noinline pci_bus_read_config_##size \
 	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
 	pci_lock_config(flags);						\
 	res = bus->ops->read(bus, devfn, pos, len, &data);		\
-	*value = (type)data;						\
+	if (res)							\
+		SET_PCI_ERROR_RESPONSE(value);				\
+	else								\
+		*value = (type)data;					\
 	pci_unlock_config(flags);					\
 	return res;							\
 }
@@ -228,7 +231,10 @@ int pci_user_read_config_##size						\
 	ret = dev->bus->ops->read(dev->bus, dev->devfn,			\
 					pos, sizeof(type), &data);	\
 	raw_spin_unlock_irq(&pci_lock);				\
-	*val = (type)data;						\
+	if (ret)							\
+		SET_PCI_ERROR_RESPONSE(val);				\
+	else								\
+		*val = (type)data;					\
 	return pcibios_err_to_errno(ret);				\
 }									\
 EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH v3 24/25] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error
  2021-10-21 15:07 [PATCH v3 00/25] Unify PCI error response checking Naveen Naidu
  2021-10-21 15:07 ` [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions Naveen Naidu
  2021-10-21 15:07 ` [PATCH v3 02/25] PCI: Set error response in config access defines when ops->read() fails Naveen Naidu
@ 2021-10-21 15:07 ` Naveen Naidu
  2 siblings, 0 replies; 8+ messages in thread
From: Naveen Naidu @ 2021-10-21 15:07 UTC (permalink / raw)
  To: bhelgaas
  Cc: Naveen Naidu, linux-kernel-mentees, linux-pci, linux-kernel,
	skhan, K. Y. Srinivasan, Haiyang Zhang, Stephen Hemminger,
	Wei Liu, Dexuan Cui, Lorenzo Pieralisi, Rob Herring,
	Krzysztof Wilczyński,
	open list:Hyper-V/Azure CORE AND DRIVERS

Include PCI_ERROR_RESPONSE along with 0xFFFFFFFF in the comment to
specify a hardware error. This makes MMIO read errors easier to find.

Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
---
 drivers/pci/controller/pci-hyperv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
index 67c46e52c0dc..7e1102e3d7c6 100644
--- a/drivers/pci/controller/pci-hyperv.c
+++ b/drivers/pci/controller/pci-hyperv.c
@@ -1774,7 +1774,7 @@ static void prepopulate_bars(struct hv_pcibus_device *hbus)
 	 * If the memory enable bit is already set, Hyper-V silently ignores
 	 * the below BAR updates, and the related PCI device driver can not
 	 * work, because reading from the device register(s) always returns
-	 * 0xFFFFFFFF.
+	 * 0xFFFFFFFF (PCI_ERROR_RESPONSE).
 	 */
 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
 		_hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command);
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH v3 02/25] PCI: Set error response in config access defines when ops->read() fails
  2021-10-21 15:07 ` [PATCH v3 02/25] PCI: Set error response in config access defines when ops->read() fails Naveen Naidu
@ 2021-10-21 15:59   ` Pali Rohár
  0 siblings, 0 replies; 8+ messages in thread
From: Pali Rohár @ 2021-10-21 15:59 UTC (permalink / raw)
  To: Naveen Naidu
  Cc: bhelgaas, linux-kernel-mentees, linux-pci, linux-kernel,
	linux-arm-kernel, linux-hyperv, linux-mediatek, linuxppc-dev,
	linux-renesas-soc, linux-rockchip, linux-samsung-soc,
	Rob Herring, skhan, Robert Richter, Lorenzo Pieralisi,
	Krzysztof Wilczyński, Ray Jui, Scott Branden,
	maintainer:BROADCOM IPROC ARM ARCHITECTURE, Ryder Lee,
	Jianjun Wang, Matthias Brugger, Jingoo Han, Krzysztof Kozlowski,
	Shawn Guo, Xiaowei Song, Binghui Wang, Thomas Petazzoni,
	Joyce Ooi, Marek Vasut, Yoshihiro Shimoda, Shawn Lin,
	Heiko Stuebner, Nirmal Patel, Jonathan Derrick,
	Kuppuswamy Sathyanarayanan, Lukas Wunner, Amey Narkhede,
	Russell Currey, Oliver O'Halloran, Sean V Kelley, Qiuxu Zhuo,
	Marc Zyngier, K. Y. Srinivasan, Haiyang Zhang, Stephen Hemminger,
	Wei Liu, Dexuan Cui, Toan Le

On Thursday 21 October 2021 20:37:27 Naveen Naidu wrote:
> Make PCI_OP_READ and PCI_USER_READ_CONFIG set the data value with error
> response (~0), when the PCI device read by a host controller fails.
> 
> This ensures that the controller drivers no longer need to fabricate
> (~0) value when they detect error. It also  gurantees that the error
> response (~0) is always set when the controller drivers fails to read a
> config register from a device.
> 
> This makes error response fabrication consistent and helps in removal of
> a lot of repeated code.
> 
> Suggested-by: Rob Herring <robh@kernel.org>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>

Reviewed-by: Pali Rohár <pali@kernel.org>

> ---
>  drivers/pci/access.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pci/access.c b/drivers/pci/access.c
> index 46935695cfb9..0f732ba2f71a 100644
> --- a/drivers/pci/access.c
> +++ b/drivers/pci/access.c
> @@ -42,7 +42,10 @@ int noinline pci_bus_read_config_##size \
>  	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
>  	pci_lock_config(flags);						\
>  	res = bus->ops->read(bus, devfn, pos, len, &data);		\
> -	*value = (type)data;						\
> +	if (res)							\
> +		SET_PCI_ERROR_RESPONSE(value);				\
> +	else								\
> +		*value = (type)data;					\
>  	pci_unlock_config(flags);					\
>  	return res;							\
>  }
> @@ -228,7 +231,10 @@ int pci_user_read_config_##size						\
>  	ret = dev->bus->ops->read(dev->bus, dev->devfn,			\
>  					pos, sizeof(type), &data);	\
>  	raw_spin_unlock_irq(&pci_lock);				\
> -	*val = (type)data;						\
> +	if (ret)							\
> +		SET_PCI_ERROR_RESPONSE(val);				\
> +	else								\
> +		*val = (type)data;					\
>  	return pcibios_err_to_errno(ret);				\
>  }									\
>  EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
> -- 
> 2.25.1
> 

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions
  2021-10-21 15:07 ` [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions Naveen Naidu
@ 2021-10-21 16:08   ` Pali Rohár
  2021-11-17 23:58   ` Bjorn Helgaas
  1 sibling, 0 replies; 8+ messages in thread
From: Pali Rohár @ 2021-10-21 16:08 UTC (permalink / raw)
  To: Naveen Naidu
  Cc: bhelgaas, linux-kernel-mentees, linux-pci, linux-kernel,
	linux-arm-kernel, linux-hyperv, linux-mediatek, linuxppc-dev,
	linux-renesas-soc, linux-rockchip, linux-samsung-soc,
	Rob Herring, skhan, Robert Richter, Lorenzo Pieralisi,
	Krzysztof Wilczyński, Ray Jui, Scott Branden,
	maintainer:BROADCOM IPROC ARM ARCHITECTURE, Ryder Lee,
	Jianjun Wang, Matthias Brugger, Jingoo Han, Krzysztof Kozlowski,
	Shawn Guo, Xiaowei Song, Binghui Wang, Thomas Petazzoni,
	Joyce Ooi, Marek Vasut, Yoshihiro Shimoda, Shawn Lin,
	Heiko Stuebner, Nirmal Patel, Jonathan Derrick,
	Kuppuswamy Sathyanarayanan, Lukas Wunner, Amey Narkhede,
	Russell Currey, Oliver O'Halloran, Sean V Kelley, Qiuxu Zhuo,
	Marc Zyngier, K. Y. Srinivasan, Haiyang Zhang, Stephen Hemminger,
	Wei Liu, Dexuan Cui, Toan Le

On Thursday 21 October 2021 20:37:26 Naveen Naidu wrote:
> An MMIO read from a PCI device that doesn't exist or doesn't respond
> causes a PCI error.  There's no real data to return to satisfy the
> CPU read, so most hardware fabricates ~0 data.
> 
> Add a PCI_ERROR_RESPONSE definition for that and use it where
> appropriate to make these checks consistent and easier to find.
> 
> Also add helper definitions SET_PCI_ERROR_RESPONSE and
> RESPONSE_IS_PCI_ERROR to make the code more readable.
> 
> Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>

Reviewed-by: Pali Rohár <pali@kernel.org>

> ---
>  include/linux/pci.h | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index cd8aa6fce204..689c8277c584 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -154,6 +154,15 @@ enum pci_interrupt_pin {
>  /* The number of legacy PCI INTx interrupts */
>  #define PCI_NUM_INTX	4
>  
> +/*
> + * Reading from a device that doesn't respond typically returns ~0.  A
> + * successful read from a device may also return ~0, so you need additional
> + * information to reliably identify errors.
> + */
> +#define PCI_ERROR_RESPONSE     (~0ULL)
> +#define SET_PCI_ERROR_RESPONSE(val)    (*(val) = ((typeof(*(val))) PCI_ERROR_RESPONSE))
> +#define RESPONSE_IS_PCI_ERROR(val) ((val) == ((typeof(val)) PCI_ERROR_RESPONSE))
> +
>  /*
>   * pci_power_t values must match the bits in the Capabilities PME_Support
>   * and Control/Status PowerState fields in the Power Management capability.
> -- 
> 2.25.1
> 

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions
  2021-10-21 15:07 ` [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions Naveen Naidu
  2021-10-21 16:08   ` Pali Rohár
@ 2021-11-17 23:58   ` Bjorn Helgaas
  2021-11-18 13:30     ` Naveen Naidu
  1 sibling, 1 reply; 8+ messages in thread
From: Bjorn Helgaas @ 2021-11-17 23:58 UTC (permalink / raw)
  To: Naveen Naidu
  Cc: bhelgaas, Krzysztof Wilczyński, linux-hyperv,
	Heiko Stuebner, linux-pci, Shawn Lin, Binghui Wang,
	Kuppuswamy Sathyanarayanan, Oliver O'Halloran,
	Thomas Petazzoni, Russell Currey, Lorenzo Pieralisi, Toan Le,
	K. Y. Srinivasan, Nirmal Patel, Marek Vasut, Rob Herring,
	Wei Liu, linux-samsung-soc, Marc Zyngier, Joyce Ooi, Dexuan Cui,
	Jianjun Wang, linux-rockchip,
	maintainer:BROADCOM IPROC ARM ARCHITECTURE, Jonathan Derrick,
	Xiaowei Song, linux-kernel-mentees, Robert Richter,
	Sean V Kelley, Ray Jui, Haiyang Zhang, Ryder Lee, linux-mediatek,
	Matthias Brugger, Stephen Hemminger, linux-arm-kernel,
	Qiuxu Zhuo, Scott Branden, linuxppc-dev, Yoshihiro Shimoda,
	Krzysztof Kozlowski, linux-kernel, linux-renesas-soc,
	Lukas Wunner, Jingoo Han, Shawn Guo, Pali Rohár

On Thu, Oct 21, 2021 at 08:37:26PM +0530, Naveen Naidu wrote:
> An MMIO read from a PCI device that doesn't exist or doesn't respond
> causes a PCI error.  There's no real data to return to satisfy the
> CPU read, so most hardware fabricates ~0 data.
> 
> Add a PCI_ERROR_RESPONSE definition for that and use it where
> appropriate to make these checks consistent and easier to find.
> 
> Also add helper definitions SET_PCI_ERROR_RESPONSE and
> RESPONSE_IS_PCI_ERROR to make the code more readable.
> 
> Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
> ---
>  include/linux/pci.h | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index cd8aa6fce204..689c8277c584 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -154,6 +154,15 @@ enum pci_interrupt_pin {
>  /* The number of legacy PCI INTx interrupts */
>  #define PCI_NUM_INTX	4
>  
> +/*
> + * Reading from a device that doesn't respond typically returns ~0.  A
> + * successful read from a device may also return ~0, so you need additional
> + * information to reliably identify errors.
> + */
> +#define PCI_ERROR_RESPONSE     (~0ULL)
> +#define SET_PCI_ERROR_RESPONSE(val)    (*(val) = ((typeof(*(val))) PCI_ERROR_RESPONSE))
> +#define RESPONSE_IS_PCI_ERROR(val) ((val) == ((typeof(val)) PCI_ERROR_RESPONSE))

Beautiful!  I really like this.

I would prefer the macros to start with "PCI_", e.g.,
PCI_SET_ERROR_RESPONSE().

I think "RESPONSE_IS_PCI_ERROR()" is too strong because (as the
comment says), ~0 *may* indicate an error.  Or it may be a successful
read of a register that happens to contain ~0.

Possibilities to convey the idea that this isn't definitive:

  PCI_POSSIBLE_ERROR_RESPONSE(val)  # a little long
  PCI_LIKELY_ERROR(val)             # we really have no idea whether
  PCI_PROBABLE_ERROR(val)           #   likely or probable
  PCI_POSSIBLE_ERROR(val)           # promising?

Can you rebase to my "main" branch (v5.16-rc1), tweak the above, and
collect up the acks/reviews?

We should also browse drivers outside drivers/pci for places we could
use these.  Not necessarily as part of this series, although if
authors there object, it would be good to learn that earlier than
later.

Drivers that implement pci_error_handlers might be a fruitful place to
start.  But you've done a great job finding users of ~0 and 0xffff...
in drivers/pci/, too.

> +
>  /*
>   * pci_power_t values must match the bits in the Capabilities PME_Support
>   * and Control/Status PowerState fields in the Power Management capability.
> -- 
> 2.25.1
> 
> _______________________________________________
> Linux-kernel-mentees mailing list
> Linux-kernel-mentees@lists.linuxfoundation.org
> https://lists.linuxfoundation.org/mailman/listinfo/linux-kernel-mentees

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions
  2021-11-17 23:58   ` Bjorn Helgaas
@ 2021-11-18 13:30     ` Naveen Naidu
  0 siblings, 0 replies; 8+ messages in thread
From: Naveen Naidu @ 2021-11-18 13:30 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: bhelgaas, Krzysztof Wilczyński, linux-hyperv,
	Heiko Stuebner, linux-pci, Shawn Lin, Binghui Wang,
	Kuppuswamy Sathyanarayanan, Oliver O'Halloran,
	Thomas Petazzoni, Russell Currey, Lorenzo Pieralisi, Toan Le,
	K. Y. Srinivasan, Nirmal Patel, Marek Vasut, Rob Herring,
	Wei Liu, linux-samsung-soc, Marc Zyngier, Joyce Ooi, Dexuan Cui,
	Jianjun Wang, linux-rockchip,
	maintainer:BROADCOM IPROC ARM ARCHITECTURE, Jonathan Derrick,
	Xiaowei Song, linux-kernel-mentees, Robert Richter,
	Sean V Kelley, Ray Jui, Haiyang Zhang, Ryder Lee, linux-mediatek,
	Matthias Brugger, Stephen Hemminger, linux-arm-kernel,
	Qiuxu Zhuo, Scott Branden, linuxppc-dev, Yoshihiro Shimoda,
	Krzysztof Kozlowski, linux-kernel, linux-renesas-soc,
	Lukas Wunner, Jingoo Han, Shawn Guo, Pali Rohár

On 17/11, Bjorn Helgaas wrote:
> On Thu, Oct 21, 2021 at 08:37:26PM +0530, Naveen Naidu wrote:
> > An MMIO read from a PCI device that doesn't exist or doesn't respond
> > causes a PCI error.  There's no real data to return to satisfy the
> > CPU read, so most hardware fabricates ~0 data.
> > 
> > Add a PCI_ERROR_RESPONSE definition for that and use it where
> > appropriate to make these checks consistent and easier to find.
> > 
> > Also add helper definitions SET_PCI_ERROR_RESPONSE and
> > RESPONSE_IS_PCI_ERROR to make the code more readable.
> > 
> > Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
> > Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
> > ---
> >  include/linux/pci.h | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> > 
> > diff --git a/include/linux/pci.h b/include/linux/pci.h
> > index cd8aa6fce204..689c8277c584 100644
> > --- a/include/linux/pci.h
> > +++ b/include/linux/pci.h
> > @@ -154,6 +154,15 @@ enum pci_interrupt_pin {
> >  /* The number of legacy PCI INTx interrupts */
> >  #define PCI_NUM_INTX	4
> >  
> > +/*
> > + * Reading from a device that doesn't respond typically returns ~0.  A
> > + * successful read from a device may also return ~0, so you need additional
> > + * information to reliably identify errors.
> > + */
> > +#define PCI_ERROR_RESPONSE     (~0ULL)
> > +#define SET_PCI_ERROR_RESPONSE(val)    (*(val) = ((typeof(*(val))) PCI_ERROR_RESPONSE))
> > +#define RESPONSE_IS_PCI_ERROR(val) ((val) == ((typeof(val)) PCI_ERROR_RESPONSE))
> 
> Beautiful!  I really like this.
>

Thank you very much for the review ^^

> I would prefer the macros to start with "PCI_", e.g.,
> PCI_SET_ERROR_RESPONSE().
> 

ACK

> I think "RESPONSE_IS_PCI_ERROR()" is too strong because (as the
> comment says), ~0 *may* indicate an error.  Or it may be a successful
> read of a register that happens to contain ~0.
> 
> Possibilities to convey the idea that this isn't definitive:
> 
>   PCI_POSSIBLE_ERROR_RESPONSE(val)  # a little long
>   PCI_LIKELY_ERROR(val)             # we really have no idea whether
>   PCI_PROBABLE_ERROR(val)           #   likely or probable
>   PCI_POSSIBLE_ERROR(val)           # promising?
>

ACK. Will use PCI_POSSIBLE_ERROR()

> Can you rebase to my "main" branch (v5.16-rc1), tweak the above, and
> collect up the acks/reviews?
> 

ACK

> We should also browse drivers outside drivers/pci for places we could
> use these.  Not necessarily as part of this series, although if
> authors there object, it would be good to learn that earlier than
> later.
> 
> Drivers that implement pci_error_handlers might be a fruitful place to
> start.  But you've done a great job finding users of ~0 and 0xffff...
> in drivers/pci/, too.
> 

A quick grep showed that there are around 80 drivers which have
pci_error_handlers. I was thinking that it would be better if we handle
these drivers in another patch series since the current patch series is
itself 25 patches long. And in my short tenure reading LKML, I gathered
that folks generally are not so kind to a long list of patches in a
single patch series ^^' (I might be wrong though, Apologies)

The consensus on the patch series does seem slightly positive so
ideally, I was hoping that we would not have the case where a author
does not like the way we are handling this patch. Then again, I'm
pretty sure that I might be wrong ^^'

I hope it would be okay that I send in a new patch series with the
suggested changes and handle the other changes in another patch series
^^

Thanks,
Naveen
> > +
> >  /*
> >   * pci_power_t values must match the bits in the Capabilities PME_Support
> >   * and Control/Status PowerState fields in the Power Management capability.
> > -- 
> > 2.25.1
> > 
> > _______________________________________________
> > Linux-kernel-mentees mailing list
> > Linux-kernel-mentees@lists.linuxfoundation.org
> > https://lists.linuxfoundation.org/mailman/listinfo/linux-kernel-mentees

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2021-11-18 13:30 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-21 15:07 [PATCH v3 00/25] Unify PCI error response checking Naveen Naidu
2021-10-21 15:07 ` [PATCH v3 01/25] PCI: Add PCI_ERROR_RESPONSE and it's related definitions Naveen Naidu
2021-10-21 16:08   ` Pali Rohár
2021-11-17 23:58   ` Bjorn Helgaas
2021-11-18 13:30     ` Naveen Naidu
2021-10-21 15:07 ` [PATCH v3 02/25] PCI: Set error response in config access defines when ops->read() fails Naveen Naidu
2021-10-21 15:59   ` Pali Rohár
2021-10-21 15:07 ` [PATCH v3 24/25] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu

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