From: "Ardelean, Alexandru" <alexandru.Ardelean@analog.com>
To: "broonie@kernel.org" <broonie@kernel.org>
Cc: "kernel-usp@googlegroups.com" <kernel-usp@googlegroups.com>,
"knaack.h@gmx.de" <knaack.h@gmx.de>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"devel@driverdev.osuosl.org" <devel@driverdev.osuosl.org>,
"Jonathan.Cameron@huawei.com" <Jonathan.Cameron@huawei.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"jic23@kernel.org" <jic23@kernel.org>,
"lars@metafoo.de" <lars@metafoo.de>,
"Hennerich, Michael" <Michael.Hennerich@analog.com>,
"linux-iio@vger.kernel.org" <linux-iio@vger.kernel.org>,
"Popa, Stefan Serban" <StefanSerban.Popa@analog.com>,
"rodrigorsdc@gmail.com" <rodrigorsdc@gmail.com>,
"pmeerw@pmeerw.net" <pmeerw@pmeerw.net>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4] dt-bindings: iio: accel: add binding documentation for ADIS16240
Date: Thu, 5 Dec 2019 08:19:52 +0000 [thread overview]
Message-ID: <6935c2fcc2fa01f25a62299dc52a00e2a08255ce.camel@analog.com> (raw)
In-Reply-To: <20191204170059.GX1998@sirena.org.uk>
On Wed, 2019-12-04 at 17:00 +0000, Mark Brown wrote:
> On Wed, Dec 04, 2019 at 07:18:15AM +0000, Ardelean, Alexandru wrote:
>
> > One example (for spi-cpha):
> > if (of_property_read_u32(nc, "spi-cpha", &tmp) == 0) {
> > spi->mode |= SPI_CPHA_OVERRIDE;
> > if (tmp)
> > spi->mode |= SPI_CPHA;
>
> We could also do this with a separate flag saying that the wire
> format is forced from DT rather than having one per setting.
>
I will admit that [since you seem to incline towards this approach], I am
also inclined to consider it over the spi-mode-conv driver.
And also since you're saying that the driver would be harder to achieve.
I'll see about an implementation for this flag and come back for a review
[on it].
[Until then] I also owe you some more "delay_usecs" cleanup in other
subsystems.
Thanks
Alex
> > Or maybe, a more complete solution would be an "spi-mode-conv" driver.
> > Similar to the fixed-factor-clock clk driver, which just does a
> > computation
> > based on values from the DT.
> > To tell the truth, this would be a great idea, because we have
> > something
> > like a passive 3-wire-to-4-wire HDL converter. This requires that the
> > driver be configured in 3-wire mode, the SPI controller in normal 4-
> > wire.
> > That's because the SPI framework does a validation of the supported
> > modes
> > (for the SPI controller) and invalidates what the device wants (which
> > is
> > very reasonable).
>
> This is harder to achieve here because we don't have drivers for
> random bits of the wire format...
next prev parent reply other threads:[~2019-12-05 8:20 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-23 5:19 [PATCH v4] dt-bindings: iio: accel: add binding documentation for ADIS16240 Rodrigo Carvalho
2019-11-23 11:41 ` Jonathan Cameron
2019-11-25 7:51 ` Ardelean, Alexandru
2019-12-01 11:40 ` Jonathan Cameron
2019-12-03 16:38 ` Mark Brown
2019-12-03 16:51 ` Jonathan Cameron
2019-12-04 7:18 ` Ardelean, Alexandru
2019-12-04 17:00 ` Mark Brown
2019-12-05 8:19 ` Ardelean, Alexandru [this message]
2019-12-04 11:12 ` Mark Brown
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