From: Florian Fainelli <f.fainelli@gmail.com>
To: justinpopo6@gmail.com, linux-iio@vger.kernel.org
Cc: jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] iio: adc: ti-ads7950: inconsistency with spi msg
Date: Fri, 25 Jan 2019 10:38:11 -0800 [thread overview]
Message-ID: <9d110c8a-2a2a-412e-847e-215b9edc97e4@gmail.com> (raw)
In-Reply-To: <1548440422-27943-1-git-send-email-justinpopo6@gmail.com>
On 1/25/19 10:20 AM, justinpopo6@gmail.com wrote:
> From: Justin Chen <justinpopo6@gmail.com>
>
> To read a channel we require 3 cycles to send, process, and receive
> the data. The transfer buffer for the third transaction is left blank.
> This leaves it up to the SPI driver to decide what to do.
>
> In one particular case, if the tx buffer is not set the spi driver
> sets it to 0xff. This puts the ADC in a alarm programming state,
> therefore the following read to a channel becomes erroneous.
>
> Instead of leaving us to the mercy of the SPI driver, we send the
> ADC cmd on the third transaction to prevent inconsistent behavior.
>
> Fixes: 902c4b2446d4 ("iio: adc: New driver for TI ADS7950 chips")
> Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Thanks!
--
Florian
next prev parent reply other threads:[~2019-01-25 18:38 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-25 18:20 [PATCH v2] iio: adc: ti-ads7950: inconsistency with spi msg justinpopo6
2019-01-25 18:38 ` Florian Fainelli [this message]
2019-01-26 18:30 ` Jonathan Cameron
2019-01-31 5:15 ` Justin Chen
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