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From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Jordan Crouse <jcrouse@codeaurora.org>,
	Rob Clark <robdclark@gmail.com>
Cc: linux-arm-msm@vger.kernel.org,
	Akhil P Oommen <akhilpo@codeaurora.org>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	iommu@lists.linux-foundation.org,
	"Kristian H . Kristensen" <hoegsberg@google.com>,
	freedreno@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCHv4 1/6] iommu/io-pgtable-arm: Add support to use system cache
Date: Fri, 11 Sep 2020 14:27:49 +0000	[thread overview]
Message-ID: <010101747d90b2fe-3db69762-cc53-4012-8e87-56bbdcc2fee5-000000@us-west-2.amazonses.com> (raw)
In-Reply-To: <cover.1599832685.git.saiprakash.ranjan@codeaurora.org>

Add a quirk IO_PGTABLE_QUIRK_SYS_CACHE to override the
attributes set in TCR for the page table walker when
using system cache.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
 drivers/iommu/io-pgtable-arm.c | 7 ++++++-
 include/linux/io-pgtable.h     | 4 ++++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index dc7bcf858b6d..828426c16fa9 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -789,7 +789,8 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)
 
 	if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS |
 			    IO_PGTABLE_QUIRK_NON_STRICT |
-			    IO_PGTABLE_QUIRK_ARM_TTBR1))
+			    IO_PGTABLE_QUIRK_ARM_TTBR1 |
+			    IO_PGTABLE_QUIRK_SYS_CACHE))
 		return NULL;
 
 	data = arm_lpae_alloc_pgtable(cfg);
@@ -801,6 +802,10 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)
 		tcr->sh = ARM_LPAE_TCR_SH_IS;
 		tcr->irgn = ARM_LPAE_TCR_RGN_WBWA;
 		tcr->orgn = ARM_LPAE_TCR_RGN_WBWA;
+	} else if (cfg->quirks & IO_PGTABLE_QUIRK_SYS_CACHE) {
+		tcr->sh = ARM_LPAE_TCR_SH_OS;
+		tcr->irgn = ARM_LPAE_TCR_RGN_NC;
+		tcr->orgn = ARM_LPAE_TCR_RGN_WBWA;
 	} else {
 		tcr->sh = ARM_LPAE_TCR_SH_OS;
 		tcr->irgn = ARM_LPAE_TCR_RGN_NC;
diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h
index 23285ba645db..ecc9d2248b84 100644
--- a/include/linux/io-pgtable.h
+++ b/include/linux/io-pgtable.h
@@ -86,6 +86,9 @@ struct io_pgtable_cfg {
 	 *
 	 * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table
 	 *	for use in the upper half of a split address space.
+	 *
+	 * IO_PGTABLE_QUIRK_SYS_CACHE: Override the attributes set in TCR for
+	 *	the page table walker when using system cache.
 	 */
 	#define IO_PGTABLE_QUIRK_ARM_NS		BIT(0)
 	#define IO_PGTABLE_QUIRK_NO_PERMS	BIT(1)
@@ -93,6 +96,7 @@ struct io_pgtable_cfg {
 	#define IO_PGTABLE_QUIRK_ARM_MTK_EXT	BIT(3)
 	#define IO_PGTABLE_QUIRK_NON_STRICT	BIT(4)
 	#define IO_PGTABLE_QUIRK_ARM_TTBR1	BIT(5)
+	#define IO_PGTABLE_QUIRK_SYS_CACHE	BIT(6)
 	unsigned long			quirks;
 	unsigned long			pgsize_bitmap;
 	unsigned int			ias;
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

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       reply	other threads:[~2020-09-11 14:27 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <cover.1599832685.git.saiprakash.ranjan@codeaurora.org>
2020-09-11 14:27 ` Sai Prakash Ranjan [this message]
2020-09-11 14:27 ` [PATCHv4 2/6] iommu/arm-smmu: Add domain attribute for " Sai Prakash Ranjan
2020-09-11 14:28 ` [PATCHv4 3/6] drm/msm: rearrange the gpu_rmw() function Sai Prakash Ranjan
2020-09-11 14:28 ` [PATCHv4 4/6] drm/msm/a6xx: Add support for using system cache(LLC) Sai Prakash Ranjan
2020-09-11 14:28 ` [PATCHv4 5/6] iommu: arm-smmu-impl: Use table to list QCOM implementations Sai Prakash Ranjan
2020-09-11 14:28 ` [PATCHv4 6/6] iommu: arm-smmu-impl: Remove unwanted extra blank lines Sai Prakash Ranjan
     [not found] ` <010101747d912d9f-c8050b8d-1e81-4be0-ac35-b221f657b490-000000@us-west-2.amazonses.com>
2020-09-11 16:03   ` Robin Murphy
2020-09-11 16:07     ` Will Deacon
2020-09-11 16:21       ` Sai Prakash Ranjan
2020-09-11 16:34         ` Robin Murphy
2020-09-11 16:50           ` Sai Prakash Ranjan
     [not found]           ` <a33160854744942f660fae691a4a30ec@codeaurora.org>
2020-09-15  6:58             ` Sai Prakash Ranjan
2020-09-11 16:19     ` Sai Prakash Ranjan
     [not found] ` <3b1beb6cf6a34a44b0ecff9ec5a2105b5ff91bd4.1599832685.git.saiprakash.ranjan@codeaurora.org>
2020-09-21 18:03   ` [PATCHv4 1/6] iommu/io-pgtable-arm: Add support to use system cache Will Deacon
2020-09-21 22:03     ` Robin Murphy
2020-09-21 22:23       ` Will Deacon
2020-09-22  6:23     ` Sai Prakash Ranjan

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