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* [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node
@ 2019-04-01 15:40 Marc Gonzalez
       [not found] ` <edade219-aa77-e7f0-af68-1c192632b2ca-GANU6spQydw@public.gmane.org>
  2019-06-17 15:49 ` Bjorn Andersson
  0 siblings, 2 replies; 8+ messages in thread
From: Marc Gonzalez @ 2019-04-01 15:40 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: Jeffrey Hugo, MSM, Douglas Anderson, Evan Green,
	Stanimir Varbanov, Manu Gautam, iommu, Srinivas Kandagatla,
	Robin Murphy

The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB.
(*) Aggregate Network-on-Chip #1

Based on the following DTS downstream:
https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18

Signed-off-by: Marc Gonzalez <marc.w.gonzalez-GANU6spQydw@public.gmane.org>
---
Changes from v1:
	Split off from "PCIe and AR8151 on APQ8098/MSM8998" series
	Change compatible string to use qcom,msm8998-smmu-v2
---
 arch/arm64/boot/dts/qcom/msm8998.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index ef71e8f1d102..f807ea3e2c6e 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -606,6 +606,21 @@
 			#thermal-sensor-cells = <1>;
 		};
 
+		anoc1_smmu: arm,smmu@1680000 {
+			compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
+			reg = <0x01680000 0x10000>;
+			#iommu-cells = <1>;
+
+			#global-interrupts = <0>;
+			interrupts =
+				<GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
+				<GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
+				<GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,
+				<GIC_SPI 367 IRQ_TYPE_EDGE_RISING>,
+				<GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,
+				<GIC_SPI 369 IRQ_TYPE_EDGE_RISING>;
+		};
+
 		tcsr_mutex_regs: syscon@1f40000 {
 			compatible = "syscon";
 			reg = <0x1f40000 0x20000>;
-- 
2.17.1

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v2 2/2] dt-bindings: arm-smmu: Add qcom,msm8998-smmu-v2 binding
       [not found] ` <edade219-aa77-e7f0-af68-1c192632b2ca-GANU6spQydw@public.gmane.org>
@ 2019-04-01 15:44   ` Marc Gonzalez
       [not found]     ` <f5029889-6aaa-1315-0225-9b0e46e0697c-GANU6spQydw@public.gmane.org>
  2019-04-02  7:37   ` [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node Marc Gonzalez
  2019-04-11 14:49   ` Marc Gonzalez
  2 siblings, 1 reply; 8+ messages in thread
From: Marc Gonzalez @ 2019-04-01 15:44 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: Jeffrey Hugo, MSM, Douglas Anderson, Evan Green,
	Stanimir Varbanov, Manu Gautam, iommu, Srinivas Kandagatla,
	Robin Murphy

Unused at the moment, just future-proofing the DTS.

Signed-off-by: Marc Gonzalez <marc.w.gonzalez-GANU6spQydw@public.gmane.org>
---
 Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index 3133f3ba7567..75d8487fd86f 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -25,6 +25,7 @@ conditions.
                   Qcom SoCs must contain, as below, SoC-specific compatibles
                   along with "qcom,smmu-v2":
                   "qcom,msm8996-smmu-v2", "qcom,smmu-v2",
+                  "qcom,msm8998-smmu-v2", "qcom,smmu-v2",
                   "qcom,sdm845-smmu-v2", "qcom,smmu-v2".
 
                   Qcom SoCs implementing "arm,mmu-500" must also include,
-- 
2.17.1

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node
       [not found] ` <edade219-aa77-e7f0-af68-1c192632b2ca-GANU6spQydw@public.gmane.org>
  2019-04-01 15:44   ` [PATCH v2 2/2] dt-bindings: arm-smmu: Add qcom,msm8998-smmu-v2 binding Marc Gonzalez
@ 2019-04-02  7:37   ` Marc Gonzalez
  2019-04-11 14:49   ` Marc Gonzalez
  2 siblings, 0 replies; 8+ messages in thread
From: Marc Gonzalez @ 2019-04-02  7:37 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: Jeffrey Hugo, MSM, Douglas Anderson, Evan Green,
	Stanimir Varbanov, Manu Gautam, iommu, Srinivas Kandagatla,
	Robin Murphy

On 01/04/2019 17:40, Marc Gonzalez wrote:

> The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB.
> (*) Aggregate Network-on-Chip #1
> 
> Based on the following DTS downstream:
> https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18
> 
> Signed-off-by: Marc Gonzalez <marc.w.gonzalez-GANU6spQydw@public.gmane.org>
> ---
> Changes from v1:
> 	Split off from "PCIe and AR8151 on APQ8098/MSM8998" series
> 	Change compatible string to use qcom,msm8998-smmu-v2
> ---
>  arch/arm64/boot/dts/qcom/msm8998.dtsi | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index ef71e8f1d102..f807ea3e2c6e 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -606,6 +606,21 @@
>  			#thermal-sensor-cells = <1>;
>  		};
>  
> +		anoc1_smmu: arm,smmu@1680000 {

Doh! This should probably be anoc1_smmu: iommu@1680000

Bjorn, can you fix it up when you pick up the patch, or do you need me
to respin?

Regards.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node
       [not found] ` <edade219-aa77-e7f0-af68-1c192632b2ca-GANU6spQydw@public.gmane.org>
  2019-04-01 15:44   ` [PATCH v2 2/2] dt-bindings: arm-smmu: Add qcom,msm8998-smmu-v2 binding Marc Gonzalez
  2019-04-02  7:37   ` [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node Marc Gonzalez
@ 2019-04-11 14:49   ` Marc Gonzalez
  2019-04-11 14:49     ` Marc Gonzalez
  2 siblings, 1 reply; 8+ messages in thread
From: Marc Gonzalez @ 2019-04-11 14:49 UTC (permalink / raw)
  To: Bjorn Andersson, Rob Herring, Mark Rutland
  Cc: Jeffrey Hugo, MSM, Douglas Anderson, Evan Green,
	Stanimir Varbanov, Manu Gautam, iommu, Srinivas Kandagatla,
	Robin Murphy

+robh, +mrutland for DT

On 01/04/2019 17:40, Marc Gonzalez wrote:

> The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB.
> (*) Aggregate Network-on-Chip #1
> 
> Based on the following DTS downstream:
> https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18
> 
> Signed-off-by: Marc Gonzalez <marc.w.gonzalez-GANU6spQydw@public.gmane.org>
> ---
> Changes from v1:
> 	Split off from "PCIe and AR8151 on APQ8098/MSM8998" series
> 	Change compatible string to use qcom,msm8998-smmu-v2
> ---
>  arch/arm64/boot/dts/qcom/msm8998.dtsi | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index ef71e8f1d102..f807ea3e2c6e 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -606,6 +606,21 @@
>  			#thermal-sensor-cells = <1>;
>  		};
>  
> +		anoc1_smmu: arm,smmu@1680000 {

As discussed with Arnd, this should probably be anoc1_smmu: iommu@1680000

> +			compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
> +			reg = <0x01680000 0x10000>;
> +			#iommu-cells = <1>;
> +
> +			#global-interrupts = <0>;
> +			interrupts =
> +				<GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 367 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 369 IRQ_TYPE_EDGE_RISING>;
> +		};
> +
>  		tcsr_mutex_regs: syscon@1f40000 {
>  			compatible = "syscon";
>  			reg = <0x1f40000 0x20000>;

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node
  2019-04-11 14:49   ` Marc Gonzalez
@ 2019-04-11 14:49     ` Marc Gonzalez
  0 siblings, 0 replies; 8+ messages in thread
From: Marc Gonzalez @ 2019-04-11 14:49 UTC (permalink / raw)
  To: Bjorn Andersson, Rob Herring, Mark Rutland
  Cc: Jeffrey Hugo, MSM, Douglas Anderson, Evan Green,
	Stanimir Varbanov, Manu Gautam, iommu, Srinivas Kandagatla,
	Robin Murphy

+robh, +mrutland for DT

On 01/04/2019 17:40, Marc Gonzalez wrote:

> The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB.
> (*) Aggregate Network-on-Chip #1
> 
> Based on the following DTS downstream:
> https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18
> 
> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
> ---
> Changes from v1:
> 	Split off from "PCIe and AR8151 on APQ8098/MSM8998" series
> 	Change compatible string to use qcom,msm8998-smmu-v2
> ---
>  arch/arm64/boot/dts/qcom/msm8998.dtsi | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index ef71e8f1d102..f807ea3e2c6e 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -606,6 +606,21 @@
>  			#thermal-sensor-cells = <1>;
>  		};
>  
> +		anoc1_smmu: arm,smmu@1680000 {

As discussed with Arnd, this should probably be anoc1_smmu: iommu@1680000

> +			compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
> +			reg = <0x01680000 0x10000>;
> +			#iommu-cells = <1>;
> +
> +			#global-interrupts = <0>;
> +			interrupts =
> +				<GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 367 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 369 IRQ_TYPE_EDGE_RISING>;
> +		};
> +
>  		tcsr_mutex_regs: syscon@1f40000 {
>  			compatible = "syscon";
>  			reg = <0x1f40000 0x20000>;
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 2/2] dt-bindings: arm-smmu: Add qcom,msm8998-smmu-v2 binding
       [not found]     ` <f5029889-6aaa-1315-0225-9b0e46e0697c-GANU6spQydw@public.gmane.org>
@ 2019-04-11 14:50       ` Marc Gonzalez
  2019-04-11 14:50         ` Marc Gonzalez
  0 siblings, 1 reply; 8+ messages in thread
From: Marc Gonzalez @ 2019-04-11 14:50 UTC (permalink / raw)
  To: Bjorn Andersson, Rob Herring, Mark Rutland
  Cc: Jeffrey Hugo, MSM, Douglas Anderson, Evan Green,
	Stanimir Varbanov, Manu Gautam, iommu, Srinivas Kandagatla,
	Robin Murphy

+robh, +mrutland for DT

On 01/04/2019 17:44, Marc Gonzalez wrote:

> Unused at the moment, just future-proofing the DTS.
> 
> Signed-off-by: Marc Gonzalez <marc.w.gonzalez-GANU6spQydw@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index 3133f3ba7567..75d8487fd86f 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -25,6 +25,7 @@ conditions.
>                    Qcom SoCs must contain, as below, SoC-specific compatibles
>                    along with "qcom,smmu-v2":
>                    "qcom,msm8996-smmu-v2", "qcom,smmu-v2",
> +                  "qcom,msm8998-smmu-v2", "qcom,smmu-v2",
>                    "qcom,sdm845-smmu-v2", "qcom,smmu-v2".
>  
>                    Qcom SoCs implementing "arm,mmu-500" must also include,

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 2/2] dt-bindings: arm-smmu: Add qcom,msm8998-smmu-v2 binding
  2019-04-11 14:50       ` Marc Gonzalez
@ 2019-04-11 14:50         ` Marc Gonzalez
  0 siblings, 0 replies; 8+ messages in thread
From: Marc Gonzalez @ 2019-04-11 14:50 UTC (permalink / raw)
  To: Bjorn Andersson, Rob Herring, Mark Rutland
  Cc: Jeffrey Hugo, MSM, Douglas Anderson, Evan Green,
	Stanimir Varbanov, Manu Gautam, iommu, Srinivas Kandagatla,
	Robin Murphy

+robh, +mrutland for DT

On 01/04/2019 17:44, Marc Gonzalez wrote:

> Unused at the moment, just future-proofing the DTS.
> 
> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
> ---
>  Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index 3133f3ba7567..75d8487fd86f 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -25,6 +25,7 @@ conditions.
>                    Qcom SoCs must contain, as below, SoC-specific compatibles
>                    along with "qcom,smmu-v2":
>                    "qcom,msm8996-smmu-v2", "qcom,smmu-v2",
> +                  "qcom,msm8998-smmu-v2", "qcom,smmu-v2",
>                    "qcom,sdm845-smmu-v2", "qcom,smmu-v2".
>  
>                    Qcom SoCs implementing "arm,mmu-500" must also include,
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node
  2019-04-01 15:40 [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node Marc Gonzalez
       [not found] ` <edade219-aa77-e7f0-af68-1c192632b2ca-GANU6spQydw@public.gmane.org>
@ 2019-06-17 15:49 ` Bjorn Andersson
  1 sibling, 0 replies; 8+ messages in thread
From: Bjorn Andersson @ 2019-06-17 15:49 UTC (permalink / raw)
  To: Marc Gonzalez
  Cc: Jeffrey Hugo, MSM, Douglas Anderson, Evan Green,
	Stanimir Varbanov, Manu Gautam, iommu, Srinivas Kandagatla,
	Robin Murphy

On Mon 01 Apr 08:40 PDT 2019, Marc Gonzalez wrote:

> The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB.
> (*) Aggregate Network-on-Chip #1
> 
> Based on the following DTS downstream:
> https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18
> 
> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>

Patch 1 applied

Thanks,
Bjorn

> ---
> Changes from v1:
> 	Split off from "PCIe and AR8151 on APQ8098/MSM8998" series
> 	Change compatible string to use qcom,msm8998-smmu-v2
> ---
>  arch/arm64/boot/dts/qcom/msm8998.dtsi | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index ef71e8f1d102..f807ea3e2c6e 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -606,6 +606,21 @@
>  			#thermal-sensor-cells = <1>;
>  		};
>  
> +		anoc1_smmu: arm,smmu@1680000 {
> +			compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
> +			reg = <0x01680000 0x10000>;
> +			#iommu-cells = <1>;
> +
> +			#global-interrupts = <0>;
> +			interrupts =
> +				<GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 367 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,
> +				<GIC_SPI 369 IRQ_TYPE_EDGE_RISING>;
> +		};
> +
>  		tcsr_mutex_regs: syscon@1f40000 {
>  			compatible = "syscon";
>  			reg = <0x1f40000 0x20000>;
> -- 
> 2.17.1
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

^ permalink raw reply	[flat|nested] 8+ messages in thread

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Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-04-01 15:40 [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node Marc Gonzalez
     [not found] ` <edade219-aa77-e7f0-af68-1c192632b2ca-GANU6spQydw@public.gmane.org>
2019-04-01 15:44   ` [PATCH v2 2/2] dt-bindings: arm-smmu: Add qcom,msm8998-smmu-v2 binding Marc Gonzalez
     [not found]     ` <f5029889-6aaa-1315-0225-9b0e46e0697c-GANU6spQydw@public.gmane.org>
2019-04-11 14:50       ` Marc Gonzalez
2019-04-11 14:50         ` Marc Gonzalez
2019-04-02  7:37   ` [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node Marc Gonzalez
2019-04-11 14:49   ` Marc Gonzalez
2019-04-11 14:49     ` Marc Gonzalez
2019-06-17 15:49 ` Bjorn Andersson

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