* [PATCH 0/4] iommu: Finish off PASID support for Arm SMMUv3
@ 2020-02-13 10:14 Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 1/4] PCI/ATS: Export symbols of PASID functions Jean-Philippe Brucker
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Jean-Philippe Brucker @ 2020-02-13 10:14 UTC (permalink / raw)
To: linux-pci, linux-arm-kernel, iommu, will, bhelgaas
Cc: zhangfei.gao, robin.murphy
Support for context descriptor tables was added to the SMMUv3 driver by
commit 87f42391f6a5 ("iommu/arm-smmu-v3: Add support for Substream
IDs"). The last patch enabling PASID in PCI devices couldn't be included
right away since it would have prevented from building SMMUv3 as a
module, another feature introduced in Linux v5.6. Export the relevant
symbols in patch 1 before using them in patch 2. Patches 3 and 4 address
the other remaining comments for the PASID series [1].
[1] https://lore.kernel.org/linux-iommu/20200114154007.GC2579@willie-the-truck/
Jean-Philippe Brucker (4):
PCI/ATS: Export symbols of PASID functions
iommu/arm-smmu-v3: Add support for PCI PASID
iommu/arm-smmu-v3: Batch context descriptor invalidation
iommu/arm-smmu-v3: Write level-1 descriptors atomically
drivers/iommu/arm-smmu-v3.c | 78 +++++++++++++++++++++++++++++++++++--
drivers/pci/ats.c | 4 ++
2 files changed, 78 insertions(+), 4 deletions(-)
--
2.25.0
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/4] PCI/ATS: Export symbols of PASID functions
2020-02-13 10:14 [PATCH 0/4] iommu: Finish off PASID support for Arm SMMUv3 Jean-Philippe Brucker
@ 2020-02-13 10:14 ` Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 2/4] iommu/arm-smmu-v3: Add support for PCI PASID Jean-Philippe Brucker
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Jean-Philippe Brucker @ 2020-02-13 10:14 UTC (permalink / raw)
To: linux-pci, linux-arm-kernel, iommu, will, bhelgaas
Cc: zhangfei.gao, robin.murphy
The Arm SMMUv3 driver uses pci_{enable,disable}_pasid() and related
functions. Export them to allow the driver to be built as a module.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
drivers/pci/ats.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index 3ef0bb281e7c..390e92f2d8d1 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -366,6 +366,7 @@ int pci_enable_pasid(struct pci_dev *pdev, int features)
return 0;
}
+EXPORT_SYMBOL_GPL(pci_enable_pasid);
/**
* pci_disable_pasid - Disable the PASID capability
@@ -390,6 +391,7 @@ void pci_disable_pasid(struct pci_dev *pdev)
pdev->pasid_enabled = 0;
}
+EXPORT_SYMBOL_GPL(pci_disable_pasid);
/**
* pci_restore_pasid_state - Restore PASID capabilities
@@ -441,6 +443,7 @@ int pci_pasid_features(struct pci_dev *pdev)
return supported;
}
+EXPORT_SYMBOL_GPL(pci_pasid_features);
#define PASID_NUMBER_SHIFT 8
#define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
@@ -469,4 +472,5 @@ int pci_max_pasids(struct pci_dev *pdev)
return (1 << supported);
}
+EXPORT_SYMBOL_GPL(pci_max_pasids);
#endif /* CONFIG_PCI_PASID */
--
2.25.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/4] iommu/arm-smmu-v3: Add support for PCI PASID
2020-02-13 10:14 [PATCH 0/4] iommu: Finish off PASID support for Arm SMMUv3 Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 1/4] PCI/ATS: Export symbols of PASID functions Jean-Philippe Brucker
@ 2020-02-13 10:14 ` Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 3/4] iommu/arm-smmu-v3: Batch context descriptor invalidation Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 4/4] iommu/arm-smmu-v3: Write level-1 descriptors atomically Jean-Philippe Brucker
3 siblings, 0 replies; 5+ messages in thread
From: Jean-Philippe Brucker @ 2020-02-13 10:14 UTC (permalink / raw)
To: linux-pci, linux-arm-kernel, iommu, will, bhelgaas
Cc: zhangfei.gao, robin.murphy
Enable PASID for PCI devices that support it. Initialize PASID early in
add_device() because it must be enabled before ATS.
Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
drivers/iommu/arm-smmu-v3.c | 62 ++++++++++++++++++++++++++++++++++++-
1 file changed, 61 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index aa3ac2a03807..6b76df37025e 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -2628,6 +2628,53 @@ static void arm_smmu_disable_ats(struct arm_smmu_master *master)
atomic_dec(&smmu_domain->nr_ats_masters);
}
+static int arm_smmu_enable_pasid(struct arm_smmu_master *master)
+{
+ int ret;
+ int features;
+ int num_pasids;
+ struct pci_dev *pdev;
+
+ if (!dev_is_pci(master->dev))
+ return -ENODEV;
+
+ pdev = to_pci_dev(master->dev);
+
+ features = pci_pasid_features(pdev);
+ if (features < 0)
+ return features;
+
+ num_pasids = pci_max_pasids(pdev);
+ if (num_pasids <= 0)
+ return num_pasids;
+
+ ret = pci_enable_pasid(pdev, features);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to enable PASID\n");
+ return ret;
+ }
+
+ master->ssid_bits = min_t(u8, ilog2(num_pasids),
+ master->smmu->ssid_bits);
+ return 0;
+}
+
+static void arm_smmu_disable_pasid(struct arm_smmu_master *master)
+{
+ struct pci_dev *pdev;
+
+ if (!dev_is_pci(master->dev))
+ return;
+
+ pdev = to_pci_dev(master->dev);
+
+ if (!pdev->pasid_enabled)
+ return;
+
+ master->ssid_bits = 0;
+ pci_disable_pasid(pdev);
+}
+
static void arm_smmu_detach_dev(struct arm_smmu_master *master)
{
unsigned long flags;
@@ -2831,13 +2878,23 @@ static int arm_smmu_add_device(struct device *dev)
master->ssid_bits = min(smmu->ssid_bits, fwspec->num_pasid_bits);
+ /*
+ * Note that PASID must be enabled before, and disabled after ATS:
+ * PCI Express Base 4.0r1.0 - 10.5.1.3 ATS Control Register
+ *
+ * Behavior is undefined if this bit is Set and the value of the PASID
+ * Enable, Execute Requested Enable, or Privileged Mode Requested bits
+ * are changed.
+ */
+ arm_smmu_enable_pasid(master);
+
if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB))
master->ssid_bits = min_t(u8, master->ssid_bits,
CTXDESC_LINEAR_CDMAX);
ret = iommu_device_link(&smmu->iommu, dev);
if (ret)
- goto err_free_master;
+ goto err_disable_pasid;
group = iommu_group_get_for_dev(dev);
if (IS_ERR(group)) {
@@ -2850,6 +2907,8 @@ static int arm_smmu_add_device(struct device *dev)
err_unlink:
iommu_device_unlink(&smmu->iommu, dev);
+err_disable_pasid:
+ arm_smmu_disable_pasid(master);
err_free_master:
kfree(master);
fwspec->iommu_priv = NULL;
@@ -2870,6 +2929,7 @@ static void arm_smmu_remove_device(struct device *dev)
arm_smmu_detach_dev(master);
iommu_group_remove_device(dev);
iommu_device_unlink(&smmu->iommu, dev);
+ arm_smmu_disable_pasid(master);
kfree(master);
iommu_fwspec_free(dev);
}
--
2.25.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/4] iommu/arm-smmu-v3: Batch context descriptor invalidation
2020-02-13 10:14 [PATCH 0/4] iommu: Finish off PASID support for Arm SMMUv3 Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 1/4] PCI/ATS: Export symbols of PASID functions Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 2/4] iommu/arm-smmu-v3: Add support for PCI PASID Jean-Philippe Brucker
@ 2020-02-13 10:14 ` Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 4/4] iommu/arm-smmu-v3: Write level-1 descriptors atomically Jean-Philippe Brucker
3 siblings, 0 replies; 5+ messages in thread
From: Jean-Philippe Brucker @ 2020-02-13 10:14 UTC (permalink / raw)
To: linux-pci, linux-arm-kernel, iommu, will, bhelgaas
Cc: zhangfei.gao, robin.murphy
Rather than publishing one command at a time when invalidating a context
descriptor, batch the commands for all SIDs in the domain.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
drivers/iommu/arm-smmu-v3.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 6b76df37025e..11123fbf22a5 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1487,8 +1487,10 @@ static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain,
int ssid, bool leaf)
{
size_t i;
+ int cmdn = 0;
unsigned long flags;
struct arm_smmu_master *master;
+ u64 cmds[CMDQ_BATCH_ENTRIES * CMDQ_ENT_DWORDS];
struct arm_smmu_device *smmu = smmu_domain->smmu;
struct arm_smmu_cmdq_ent cmd = {
.opcode = CMDQ_OP_CFGI_CD,
@@ -1501,13 +1503,19 @@ static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain,
spin_lock_irqsave(&smmu_domain->devices_lock, flags);
list_for_each_entry(master, &smmu_domain->devices, domain_head) {
for (i = 0; i < master->num_sids; i++) {
+ if (cmdn == CMDQ_BATCH_ENTRIES) {
+ arm_smmu_cmdq_issue_cmdlist(smmu, cmds, cmdn, false);
+ cmdn = 0;
+ }
+
cmd.cfgi.sid = master->sids[i];
- arm_smmu_cmdq_issue_cmd(smmu, &cmd);
+ arm_smmu_cmdq_build_cmd(&cmds[cmdn * CMDQ_ENT_DWORDS], &cmd);
+ cmdn++;
}
}
spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
- arm_smmu_cmdq_issue_sync(smmu);
+ arm_smmu_cmdq_issue_cmdlist(smmu, cmds, cmdn, true);
}
static int arm_smmu_alloc_cd_leaf_table(struct arm_smmu_device *smmu,
--
2.25.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 4/4] iommu/arm-smmu-v3: Write level-1 descriptors atomically
2020-02-13 10:14 [PATCH 0/4] iommu: Finish off PASID support for Arm SMMUv3 Jean-Philippe Brucker
` (2 preceding siblings ...)
2020-02-13 10:14 ` [PATCH 3/4] iommu/arm-smmu-v3: Batch context descriptor invalidation Jean-Philippe Brucker
@ 2020-02-13 10:14 ` Jean-Philippe Brucker
3 siblings, 0 replies; 5+ messages in thread
From: Jean-Philippe Brucker @ 2020-02-13 10:14 UTC (permalink / raw)
To: linux-pci, linux-arm-kernel, iommu, will, bhelgaas
Cc: zhangfei.gao, robin.murphy
Use WRITE_ONCE() to make sure that the SMMU doesn't read incomplete
stream table descriptors. Refer to the comment about 64-bit accesses,
and add the comment to the equivalent context descriptor code.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
drivers/iommu/arm-smmu-v3.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 11123fbf22a5..034ad9671b83 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1539,6 +1539,7 @@ static void arm_smmu_write_cd_l1_desc(__le64 *dst,
u64 val = (l1_desc->l2ptr_dma & CTXDESC_L1_DESC_L2PTR_MASK) |
CTXDESC_L1_DESC_V;
+ /* See comment in arm_smmu_write_ctx_desc() */
WRITE_ONCE(*dst, cpu_to_le64(val));
}
@@ -1734,7 +1735,8 @@ arm_smmu_write_strtab_l1_desc(__le64 *dst, struct arm_smmu_strtab_l1_desc *desc)
val |= FIELD_PREP(STRTAB_L1_DESC_SPAN, desc->span);
val |= desc->l2ptr_dma & STRTAB_L1_DESC_L2PTR_MASK;
- *dst = cpu_to_le64(val);
+ /* See comment in arm_smmu_write_ctx_desc() */
+ WRITE_ONCE(*dst, cpu_to_le64(val));
}
static void arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, u32 sid)
--
2.25.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread
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2020-02-13 10:14 [PATCH 0/4] iommu: Finish off PASID support for Arm SMMUv3 Jean-Philippe Brucker
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2020-02-13 10:14 ` [PATCH 2/4] iommu/arm-smmu-v3: Add support for PCI PASID Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 3/4] iommu/arm-smmu-v3: Batch context descriptor invalidation Jean-Philippe Brucker
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