* [PATCH] iommu/qcom: add optional clock for TLB invalidate
@ 2020-05-09 13:08 Shawn Guo
2020-05-09 13:21 ` Stanimir Varbanov
2020-05-12 5:52 ` Bjorn Andersson
0 siblings, 2 replies; 7+ messages in thread
From: Shawn Guo @ 2020-05-09 13:08 UTC (permalink / raw)
To: Rob Clark, Joerg Roedel
Cc: linux-arm-msm, Konrad Dybcio, Bjorn Andersson, iommu, Andy Gross,
Shawn Guo
On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
will not be correctly reflected, causing the system to go into a bad
state. Add it as an optional clock, so that platforms that have this
clock can pass it over DT.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
drivers/iommu/qcom_iommu.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
index 0e2a96467767..2f6c6da7d540 100644
--- a/drivers/iommu/qcom_iommu.c
+++ b/drivers/iommu/qcom_iommu.c
@@ -45,6 +45,7 @@ struct qcom_iommu_dev {
struct device *dev;
struct clk *iface_clk;
struct clk *bus_clk;
+ struct clk *tlb_clk;
void __iomem *local_base;
u32 sec_id;
u8 num_ctxs;
@@ -643,11 +644,20 @@ static int qcom_iommu_enable_clocks(struct qcom_iommu_dev *qcom_iommu)
return ret;
}
+ ret = clk_prepare_enable(qcom_iommu->tlb_clk);
+ if (ret) {
+ dev_err(qcom_iommu->dev, "Couldn't enable tlb_clk\n");
+ clk_disable_unprepare(qcom_iommu->bus_clk);
+ clk_disable_unprepare(qcom_iommu->iface_clk);
+ return ret;
+ }
+
return 0;
}
static void qcom_iommu_disable_clocks(struct qcom_iommu_dev *qcom_iommu)
{
+ clk_disable_unprepare(qcom_iommu->tlb_clk);
clk_disable_unprepare(qcom_iommu->bus_clk);
clk_disable_unprepare(qcom_iommu->iface_clk);
}
@@ -839,6 +849,12 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
return PTR_ERR(qcom_iommu->bus_clk);
}
+ qcom_iommu->tlb_clk = devm_clk_get(dev, "tlb");
+ if (IS_ERR(qcom_iommu->tlb_clk)) {
+ dev_dbg(dev, "failed to get tlb clock\n");
+ qcom_iommu->tlb_clk = NULL;
+ }
+
if (of_property_read_u32(dev->of_node, "qcom,iommu-secure-id",
&qcom_iommu->sec_id)) {
dev_err(dev, "missing qcom,iommu-secure-id property\n");
--
2.17.1
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] iommu/qcom: add optional clock for TLB invalidate
2020-05-09 13:08 [PATCH] iommu/qcom: add optional clock for TLB invalidate Shawn Guo
@ 2020-05-09 13:21 ` Stanimir Varbanov
2020-05-10 14:30 ` Shawn Guo
2020-05-12 5:52 ` Bjorn Andersson
1 sibling, 1 reply; 7+ messages in thread
From: Stanimir Varbanov @ 2020-05-09 13:21 UTC (permalink / raw)
To: Shawn Guo, Rob Clark, Joerg Roedel
Cc: linux-arm-msm, iommu, Andy Gross, Konrad Dybcio, Bjorn Andersson
Hi Shawn,
On 5/9/20 4:08 PM, Shawn Guo wrote:
> On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
> needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
> will not be correctly reflected, causing the system to go into a bad
> state. Add it as an optional clock, so that platforms that have this
> clock can pass it over DT.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> drivers/iommu/qcom_iommu.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
> index 0e2a96467767..2f6c6da7d540 100644
> --- a/drivers/iommu/qcom_iommu.c
> +++ b/drivers/iommu/qcom_iommu.c
> @@ -45,6 +45,7 @@ struct qcom_iommu_dev {
> struct device *dev;
> struct clk *iface_clk;
> struct clk *bus_clk;
> + struct clk *tlb_clk;
> void __iomem *local_base;
> u32 sec_id;
> u8 num_ctxs;
> @@ -643,11 +644,20 @@ static int qcom_iommu_enable_clocks(struct qcom_iommu_dev *qcom_iommu)
> return ret;
> }
>
> + ret = clk_prepare_enable(qcom_iommu->tlb_clk);
> + if (ret) {
> + dev_err(qcom_iommu->dev, "Couldn't enable tlb_clk\n");
> + clk_disable_unprepare(qcom_iommu->bus_clk);
> + clk_disable_unprepare(qcom_iommu->iface_clk);
> + return ret;
> + }
> +
> return 0;
> }
>
> static void qcom_iommu_disable_clocks(struct qcom_iommu_dev *qcom_iommu)
> {
> + clk_disable_unprepare(qcom_iommu->tlb_clk);
> clk_disable_unprepare(qcom_iommu->bus_clk);
> clk_disable_unprepare(qcom_iommu->iface_clk);
> }
> @@ -839,6 +849,12 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
> return PTR_ERR(qcom_iommu->bus_clk);
> }
>
> + qcom_iommu->tlb_clk = devm_clk_get(dev, "tlb");
IMO, devm_clk_get_optional() would be better.
> + if (IS_ERR(qcom_iommu->tlb_clk)) {
> + dev_dbg(dev, "failed to get tlb clock\n");
> + qcom_iommu->tlb_clk = NULL;
> + }
> +
> if (of_property_read_u32(dev->of_node, "qcom,iommu-secure-id",
> &qcom_iommu->sec_id)) {
> dev_err(dev, "missing qcom,iommu-secure-id property\n");
>
--
regards,
Stan
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] iommu/qcom: add optional clock for TLB invalidate
2020-05-09 13:21 ` Stanimir Varbanov
@ 2020-05-10 14:30 ` Shawn Guo
0 siblings, 0 replies; 7+ messages in thread
From: Shawn Guo @ 2020-05-10 14:30 UTC (permalink / raw)
To: Stanimir Varbanov
Cc: linux-arm-msm, Konrad Dybcio, iommu, Bjorn Andersson, Andy Gross
Hi Stanimir,
On Sat, May 09, 2020 at 04:21:20PM +0300, Stanimir Varbanov wrote:
...
> > @@ -839,6 +849,12 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
> > return PTR_ERR(qcom_iommu->bus_clk);
> > }
> >
> > + qcom_iommu->tlb_clk = devm_clk_get(dev, "tlb");
>
> IMO, devm_clk_get_optional() would be better.
Yes, indeed. The function will make it clear that the clock is
an optional one. I will make the change in v2.
Thanks for the comment!
Shawn
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] iommu/qcom: add optional clock for TLB invalidate
2020-05-09 13:08 [PATCH] iommu/qcom: add optional clock for TLB invalidate Shawn Guo
2020-05-09 13:21 ` Stanimir Varbanov
@ 2020-05-12 5:52 ` Bjorn Andersson
2020-05-12 18:35 ` Rob Clark
2020-05-14 14:39 ` Shawn Guo
1 sibling, 2 replies; 7+ messages in thread
From: Bjorn Andersson @ 2020-05-12 5:52 UTC (permalink / raw)
To: Shawn Guo; +Cc: linux-arm-msm, iommu, Konrad Dybcio, Andy Gross
On Sat 09 May 06:08 PDT 2020, Shawn Guo wrote:
> On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
> needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
> will not be correctly reflected, causing the system to go into a bad
> state. Add it as an optional clock, so that platforms that have this
> clock can pass it over DT.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> drivers/iommu/qcom_iommu.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
> index 0e2a96467767..2f6c6da7d540 100644
> --- a/drivers/iommu/qcom_iommu.c
> +++ b/drivers/iommu/qcom_iommu.c
> @@ -45,6 +45,7 @@ struct qcom_iommu_dev {
> struct device *dev;
> struct clk *iface_clk;
> struct clk *bus_clk;
> + struct clk *tlb_clk;
> void __iomem *local_base;
> u32 sec_id;
> u8 num_ctxs;
> @@ -643,11 +644,20 @@ static int qcom_iommu_enable_clocks(struct qcom_iommu_dev *qcom_iommu)
> return ret;
> }
>
> + ret = clk_prepare_enable(qcom_iommu->tlb_clk);
> + if (ret) {
> + dev_err(qcom_iommu->dev, "Couldn't enable tlb_clk\n");
> + clk_disable_unprepare(qcom_iommu->bus_clk);
> + clk_disable_unprepare(qcom_iommu->iface_clk);
> + return ret;
> + }
Seems this is an excellent opportunity to replace
qcom_iommu_enable_clocks() to clk_bulk_prepare_enable() and disable,
respectively.
> +
> return 0;
> }
>
> static void qcom_iommu_disable_clocks(struct qcom_iommu_dev *qcom_iommu)
> {
> + clk_disable_unprepare(qcom_iommu->tlb_clk);
> clk_disable_unprepare(qcom_iommu->bus_clk);
> clk_disable_unprepare(qcom_iommu->iface_clk);
> }
> @@ -839,6 +849,12 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
> return PTR_ERR(qcom_iommu->bus_clk);
> }
>
> + qcom_iommu->tlb_clk = devm_clk_get(dev, "tlb");
Wouldn't "tbu" be a better name for this clock? Given that seems the
actually be the hardware block you're clocking.
That said, I thought we used device links and pm_runtime to ensure that
the TBUs are powered and clocked...
Regards,
Bjorn
> + if (IS_ERR(qcom_iommu->tlb_clk)) {
> + dev_dbg(dev, "failed to get tlb clock\n");
> + qcom_iommu->tlb_clk = NULL;
> + }
> +
> if (of_property_read_u32(dev->of_node, "qcom,iommu-secure-id",
> &qcom_iommu->sec_id)) {
> dev_err(dev, "missing qcom,iommu-secure-id property\n");
> --
> 2.17.1
>
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] iommu/qcom: add optional clock for TLB invalidate
2020-05-12 5:52 ` Bjorn Andersson
@ 2020-05-12 18:35 ` Rob Clark
2020-05-14 14:39 ` Shawn Guo
1 sibling, 0 replies; 7+ messages in thread
From: Rob Clark @ 2020-05-12 18:35 UTC (permalink / raw)
To: Bjorn Andersson
Cc: linux-arm-msm, Konrad Dybcio,
list@263.net:IOMMU DRIVERS
<iommu@lists.linux-foundation.org>,
Joerg Roedel <joro@8bytes.org>, ,
Andy Gross, Shawn Guo
On Mon, May 11, 2020 at 10:52 PM Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Sat 09 May 06:08 PDT 2020, Shawn Guo wrote:
>
> > On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
> > needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
> > will not be correctly reflected, causing the system to go into a bad
> > state. Add it as an optional clock, so that platforms that have this
> > clock can pass it over DT.
> >
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
[snip]
> > @@ -839,6 +849,12 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
> > return PTR_ERR(qcom_iommu->bus_clk);
> > }
> >
> > + qcom_iommu->tlb_clk = devm_clk_get(dev, "tlb");
>
> Wouldn't "tbu" be a better name for this clock? Given that seems the
> actually be the hardware block you're clocking.
>
>
> That said, I thought we used device links and pm_runtime to ensure that
> the TBUs are powered and clocked...
>
please don't rely on device-link for that, buffers can be freed (and
therefore need to be unmapped) at times when the gpu is off.
BR,
-R
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] iommu/qcom: add optional clock for TLB invalidate
2020-05-12 5:52 ` Bjorn Andersson
2020-05-12 18:35 ` Rob Clark
@ 2020-05-14 14:39 ` Shawn Guo
2020-05-14 15:15 ` Bjorn Andersson
1 sibling, 1 reply; 7+ messages in thread
From: Shawn Guo @ 2020-05-14 14:39 UTC (permalink / raw)
To: Bjorn Andersson; +Cc: linux-arm-msm, iommu, Konrad Dybcio, Andy Gross
Hi Bjorn,
On Mon, May 11, 2020 at 10:52:42PM -0700, Bjorn Andersson wrote:
> On Sat 09 May 06:08 PDT 2020, Shawn Guo wrote:
>
> > On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
> > needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
> > will not be correctly reflected, causing the system to go into a bad
> > state. Add it as an optional clock, so that platforms that have this
> > clock can pass it over DT.
> >
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > ---
> > drivers/iommu/qcom_iommu.c | 16 ++++++++++++++++
> > 1 file changed, 16 insertions(+)
> >
> > diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
> > index 0e2a96467767..2f6c6da7d540 100644
> > --- a/drivers/iommu/qcom_iommu.c
> > +++ b/drivers/iommu/qcom_iommu.c
> > @@ -45,6 +45,7 @@ struct qcom_iommu_dev {
> > struct device *dev;
> > struct clk *iface_clk;
> > struct clk *bus_clk;
> > + struct clk *tlb_clk;
> > void __iomem *local_base;
> > u32 sec_id;
> > u8 num_ctxs;
> > @@ -643,11 +644,20 @@ static int qcom_iommu_enable_clocks(struct qcom_iommu_dev *qcom_iommu)
> > return ret;
> > }
> >
> > + ret = clk_prepare_enable(qcom_iommu->tlb_clk);
> > + if (ret) {
> > + dev_err(qcom_iommu->dev, "Couldn't enable tlb_clk\n");
> > + clk_disable_unprepare(qcom_iommu->bus_clk);
> > + clk_disable_unprepare(qcom_iommu->iface_clk);
> > + return ret;
> > + }
>
> Seems this is an excellent opportunity to replace
> qcom_iommu_enable_clocks() to clk_bulk_prepare_enable() and disable,
> respectively.
So we have two required and one optional clocks. I guess we don't want
to use clk_bulk_get_optional() to get all of them as optional. So we
will end up with getting clock with individual call and enabling/disabling
with bulk version. I'm personally not fond of this mixed style. But if
you really like this, I can change.
>
> > +
> > return 0;
> > }
> >
> > static void qcom_iommu_disable_clocks(struct qcom_iommu_dev *qcom_iommu)
> > {
> > + clk_disable_unprepare(qcom_iommu->tlb_clk);
> > clk_disable_unprepare(qcom_iommu->bus_clk);
> > clk_disable_unprepare(qcom_iommu->iface_clk);
> > }
> > @@ -839,6 +849,12 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
> > return PTR_ERR(qcom_iommu->bus_clk);
> > }
> >
> > + qcom_iommu->tlb_clk = devm_clk_get(dev, "tlb");
>
> Wouldn't "tbu" be a better name for this clock? Given that seems the
> actually be the hardware block you're clocking.
I was trying to emphasize the function of this clock. But I agree that
'tbu' is a better name now. I will change it in v2.
Thanks for the comments.
Shawn
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] iommu/qcom: add optional clock for TLB invalidate
2020-05-14 14:39 ` Shawn Guo
@ 2020-05-14 15:15 ` Bjorn Andersson
0 siblings, 0 replies; 7+ messages in thread
From: Bjorn Andersson @ 2020-05-14 15:15 UTC (permalink / raw)
To: Shawn Guo; +Cc: linux-arm-msm, iommu, Konrad Dybcio, Andy Gross
On Thu 14 May 07:39 PDT 2020, Shawn Guo wrote:
> Hi Bjorn,
>
> On Mon, May 11, 2020 at 10:52:42PM -0700, Bjorn Andersson wrote:
> > On Sat 09 May 06:08 PDT 2020, Shawn Guo wrote:
> >
> > > On some SoCs like MSM8939 with A405 adreno, there is a gfx_tbu clock
> > > needs to be on while doing TLB invalidate. Otherwise, TLBSYNC status
> > > will not be correctly reflected, causing the system to go into a bad
> > > state. Add it as an optional clock, so that platforms that have this
> > > clock can pass it over DT.
> > >
> > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > > ---
> > > drivers/iommu/qcom_iommu.c | 16 ++++++++++++++++
> > > 1 file changed, 16 insertions(+)
> > >
> > > diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
> > > index 0e2a96467767..2f6c6da7d540 100644
> > > --- a/drivers/iommu/qcom_iommu.c
> > > +++ b/drivers/iommu/qcom_iommu.c
> > > @@ -45,6 +45,7 @@ struct qcom_iommu_dev {
> > > struct device *dev;
> > > struct clk *iface_clk;
> > > struct clk *bus_clk;
> > > + struct clk *tlb_clk;
> > > void __iomem *local_base;
> > > u32 sec_id;
> > > u8 num_ctxs;
> > > @@ -643,11 +644,20 @@ static int qcom_iommu_enable_clocks(struct qcom_iommu_dev *qcom_iommu)
> > > return ret;
> > > }
> > >
> > > + ret = clk_prepare_enable(qcom_iommu->tlb_clk);
> > > + if (ret) {
> > > + dev_err(qcom_iommu->dev, "Couldn't enable tlb_clk\n");
> > > + clk_disable_unprepare(qcom_iommu->bus_clk);
> > > + clk_disable_unprepare(qcom_iommu->iface_clk);
> > > + return ret;
> > > + }
> >
> > Seems this is an excellent opportunity to replace
> > qcom_iommu_enable_clocks() to clk_bulk_prepare_enable() and disable,
> > respectively.
>
> So we have two required and one optional clocks. I guess we don't want
> to use clk_bulk_get_optional() to get all of them as optional. So we
> will end up with getting clock with individual call and enabling/disabling
> with bulk version. I'm personally not fond of this mixed style. But if
> you really like this, I can change.
>
I share your dislike for mixing them, but I do prefer it over the nasty
error handling we end up with in qcom_iommu_enable_clocks().
Regards,
Bjorn
> >
> > > +
> > > return 0;
> > > }
> > >
> > > static void qcom_iommu_disable_clocks(struct qcom_iommu_dev *qcom_iommu)
> > > {
> > > + clk_disable_unprepare(qcom_iommu->tlb_clk);
> > > clk_disable_unprepare(qcom_iommu->bus_clk);
> > > clk_disable_unprepare(qcom_iommu->iface_clk);
> > > }
> > > @@ -839,6 +849,12 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
> > > return PTR_ERR(qcom_iommu->bus_clk);
> > > }
> > >
> > > + qcom_iommu->tlb_clk = devm_clk_get(dev, "tlb");
> >
> > Wouldn't "tbu" be a better name for this clock? Given that seems the
> > actually be the hardware block you're clocking.
>
> I was trying to emphasize the function of this clock. But I agree that
> 'tbu' is a better name now. I will change it in v2.
>
> Thanks for the comments.
>
> Shawn
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2020-05-14 15:17 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-09 13:08 [PATCH] iommu/qcom: add optional clock for TLB invalidate Shawn Guo
2020-05-09 13:21 ` Stanimir Varbanov
2020-05-10 14:30 ` Shawn Guo
2020-05-12 5:52 ` Bjorn Andersson
2020-05-12 18:35 ` Rob Clark
2020-05-14 14:39 ` Shawn Guo
2020-05-14 15:15 ` Bjorn Andersson
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