* Re: [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled
2020-07-23 22:37 [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled Ashok Raj
@ 2020-07-23 23:54 ` Bjorn Helgaas
2020-07-24 2:32 ` Lu Baolu
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Bjorn Helgaas @ 2020-07-23 23:54 UTC (permalink / raw)
To: Ashok Raj; +Cc: Lu Baolu, linux-pci, linux-kernel, stable, iommu, Bjorn Helgaas
On Thu, Jul 23, 2020 at 03:37:29PM -0700, Ashok Raj wrote:
> PASID and PRI capabilities are only enumerated in PF devices. VF devices
> do not enumerate these capabilites. IOMMU drivers also need to enumerate
> them before enabling features in the IOMMU. Extending the same support as
> PASID feature discovery (pci_pasid_features) for PRI.
>
> Fixes: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS")
> Signed-off-by: Ashok Raj <ashok.raj@intel.com>
This looks right to me, but I would like Joerg's ack before applying
it.
> To: Bjorn Helgaas <bhelgaas@google.com>
> To: Joerg Roedel <joro@8bytes.com>
> To: Lu Baolu <baolu.lu@intel.com>
> Cc: stable@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: Ashok Raj <ashok.raj@intel.com>
> Cc: iommu@lists.linux-foundation.org
> ---
> v3: Added Fixes tag
> v2: Fixed build failure reported from lkp when CONFIG_PRI=n
>
> drivers/iommu/intel/iommu.c | 2 +-
> drivers/pci/ats.c | 13 +++++++++++++
> include/linux/pci-ats.h | 4 ++++
> 3 files changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index d759e7234e98..276452f5e6a7 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -2560,7 +2560,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
> }
>
> if (info->ats_supported && ecap_prs(iommu->ecap) &&
> - pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI))
> + pci_pri_supported(pdev))
> info->pri_supported = 1;
> }
> }
> diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
> index b761c1f72f67..2e6cf0c700f7 100644
> --- a/drivers/pci/ats.c
> +++ b/drivers/pci/ats.c
> @@ -325,6 +325,19 @@ int pci_prg_resp_pasid_required(struct pci_dev *pdev)
>
> return pdev->pasid_required;
> }
> +
> +/**
> + * pci_pri_supported - Check if PRI is supported.
> + * @pdev: PCI device structure
> + *
> + * Returns true if PRI capability is present, false otherwise.
> + */
> +bool pci_pri_supported(struct pci_dev *pdev)
> +{
> + /* VFs share the PF PRI configuration */
> + return !!(pci_physfn(pdev)->pri_cap);
> +}
> +EXPORT_SYMBOL_GPL(pci_pri_supported);
> #endif /* CONFIG_PCI_PRI */
>
> #ifdef CONFIG_PCI_PASID
> diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h
> index f75c307f346d..df54cd5b15db 100644
> --- a/include/linux/pci-ats.h
> +++ b/include/linux/pci-ats.h
> @@ -28,6 +28,10 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs);
> void pci_disable_pri(struct pci_dev *pdev);
> int pci_reset_pri(struct pci_dev *pdev);
> int pci_prg_resp_pasid_required(struct pci_dev *pdev);
> +bool pci_pri_supported(struct pci_dev *pdev);
> +#else
> +static inline bool pci_pri_supported(struct pci_dev *pdev)
> +{ return false; }
> #endif /* CONFIG_PCI_PRI */
>
> #ifdef CONFIG_PCI_PASID
> --
> 2.7.4
>
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled
2020-07-23 22:37 [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled Ashok Raj
2020-07-23 23:54 ` Bjorn Helgaas
@ 2020-07-24 2:32 ` Lu Baolu
2020-07-24 8:48 ` Joerg Roedel
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Lu Baolu @ 2020-07-24 2:32 UTC (permalink / raw)
To: Ashok Raj, linux-pci, Bjorn Helgaas, Joerg Roedel, Lu Baolu
Cc: iommu, linux-kernel, stable
On 7/24/20 6:37 AM, Ashok Raj wrote:
> PASID and PRI capabilities are only enumerated in PF devices. VF devices
> do not enumerate these capabilites. IOMMU drivers also need to enumerate
> them before enabling features in the IOMMU. Extending the same support as
> PASID feature discovery (pci_pasid_features) for PRI.
>
> Fixes: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS")
> Signed-off-by: Ashok Raj <ashok.raj@intel.com>
>
> To: Bjorn Helgaas <bhelgaas@google.com>
> To: Joerg Roedel <joro@8bytes.com>
> To: Lu Baolu <baolu.lu@intel.com>
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
Best regards,
baolu
> Cc: stable@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: Ashok Raj <ashok.raj@intel.com>
> Cc: iommu@lists.linux-foundation.org
> ---
> v3: Added Fixes tag
> v2: Fixed build failure reported from lkp when CONFIG_PRI=n
>
> drivers/iommu/intel/iommu.c | 2 +-
> drivers/pci/ats.c | 13 +++++++++++++
> include/linux/pci-ats.h | 4 ++++
> 3 files changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index d759e7234e98..276452f5e6a7 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -2560,7 +2560,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
> }
>
> if (info->ats_supported && ecap_prs(iommu->ecap) &&
> - pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI))
> + pci_pri_supported(pdev))
> info->pri_supported = 1;
> }
> }
> diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
> index b761c1f72f67..2e6cf0c700f7 100644
> --- a/drivers/pci/ats.c
> +++ b/drivers/pci/ats.c
> @@ -325,6 +325,19 @@ int pci_prg_resp_pasid_required(struct pci_dev *pdev)
>
> return pdev->pasid_required;
> }
> +
> +/**
> + * pci_pri_supported - Check if PRI is supported.
> + * @pdev: PCI device structure
> + *
> + * Returns true if PRI capability is present, false otherwise.
> + */
> +bool pci_pri_supported(struct pci_dev *pdev)
> +{
> + /* VFs share the PF PRI configuration */
> + return !!(pci_physfn(pdev)->pri_cap);
> +}
> +EXPORT_SYMBOL_GPL(pci_pri_supported);
> #endif /* CONFIG_PCI_PRI */
>
> #ifdef CONFIG_PCI_PASID
> diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h
> index f75c307f346d..df54cd5b15db 100644
> --- a/include/linux/pci-ats.h
> +++ b/include/linux/pci-ats.h
> @@ -28,6 +28,10 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs);
> void pci_disable_pri(struct pci_dev *pdev);
> int pci_reset_pri(struct pci_dev *pdev);
> int pci_prg_resp_pasid_required(struct pci_dev *pdev);
> +bool pci_pri_supported(struct pci_dev *pdev);
> +#else
> +static inline bool pci_pri_supported(struct pci_dev *pdev)
> +{ return false; }
> #endif /* CONFIG_PCI_PRI */
>
> #ifdef CONFIG_PCI_PASID
>
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https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled
2020-07-23 22:37 [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled Ashok Raj
2020-07-23 23:54 ` Bjorn Helgaas
2020-07-24 2:32 ` Lu Baolu
@ 2020-07-24 8:48 ` Joerg Roedel
2020-07-24 14:51 ` Bjorn Helgaas
2020-07-27 21:24 ` Sasha Levin
4 siblings, 0 replies; 7+ messages in thread
From: Joerg Roedel @ 2020-07-24 8:48 UTC (permalink / raw)
To: Ashok Raj; +Cc: Lu Baolu, linux-pci, linux-kernel, stable, iommu, Bjorn Helgaas
On Thu, Jul 23, 2020 at 03:37:29PM -0700, Ashok Raj wrote:
> PASID and PRI capabilities are only enumerated in PF devices. VF devices
> do not enumerate these capabilites. IOMMU drivers also need to enumerate
> them before enabling features in the IOMMU. Extending the same support as
> PASID feature discovery (pci_pasid_features) for PRI.
>
> Fixes: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS")
> Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled
2020-07-23 22:37 [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled Ashok Raj
` (2 preceding siblings ...)
2020-07-24 8:48 ` Joerg Roedel
@ 2020-07-24 14:51 ` Bjorn Helgaas
2020-07-27 21:24 ` Sasha Levin
4 siblings, 0 replies; 7+ messages in thread
From: Bjorn Helgaas @ 2020-07-24 14:51 UTC (permalink / raw)
To: Ashok Raj; +Cc: Lu Baolu, linux-pci, linux-kernel, stable, iommu, Bjorn Helgaas
On Thu, Jul 23, 2020 at 03:37:29PM -0700, Ashok Raj wrote:
> PASID and PRI capabilities are only enumerated in PF devices. VF devices
> do not enumerate these capabilites. IOMMU drivers also need to enumerate
> them before enabling features in the IOMMU. Extending the same support as
> PASID feature discovery (pci_pasid_features) for PRI.
>
> Fixes: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS")
> Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Applied with Baolu's reviewed-by and Joerg's ack to pci/virtualization
for v5.9, thanks!
> To: Bjorn Helgaas <bhelgaas@google.com>
> To: Joerg Roedel <joro@8bytes.com>
> To: Lu Baolu <baolu.lu@intel.com>
> Cc: stable@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: Ashok Raj <ashok.raj@intel.com>
> Cc: iommu@lists.linux-foundation.org
> ---
> v3: Added Fixes tag
> v2: Fixed build failure reported from lkp when CONFIG_PRI=n
>
> drivers/iommu/intel/iommu.c | 2 +-
> drivers/pci/ats.c | 13 +++++++++++++
> include/linux/pci-ats.h | 4 ++++
> 3 files changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index d759e7234e98..276452f5e6a7 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -2560,7 +2560,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
> }
>
> if (info->ats_supported && ecap_prs(iommu->ecap) &&
> - pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI))
> + pci_pri_supported(pdev))
> info->pri_supported = 1;
> }
> }
> diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
> index b761c1f72f67..2e6cf0c700f7 100644
> --- a/drivers/pci/ats.c
> +++ b/drivers/pci/ats.c
> @@ -325,6 +325,19 @@ int pci_prg_resp_pasid_required(struct pci_dev *pdev)
>
> return pdev->pasid_required;
> }
> +
> +/**
> + * pci_pri_supported - Check if PRI is supported.
> + * @pdev: PCI device structure
> + *
> + * Returns true if PRI capability is present, false otherwise.
> + */
> +bool pci_pri_supported(struct pci_dev *pdev)
> +{
> + /* VFs share the PF PRI configuration */
> + return !!(pci_physfn(pdev)->pri_cap);
> +}
> +EXPORT_SYMBOL_GPL(pci_pri_supported);
> #endif /* CONFIG_PCI_PRI */
>
> #ifdef CONFIG_PCI_PASID
> diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h
> index f75c307f346d..df54cd5b15db 100644
> --- a/include/linux/pci-ats.h
> +++ b/include/linux/pci-ats.h
> @@ -28,6 +28,10 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs);
> void pci_disable_pri(struct pci_dev *pdev);
> int pci_reset_pri(struct pci_dev *pdev);
> int pci_prg_resp_pasid_required(struct pci_dev *pdev);
> +bool pci_pri_supported(struct pci_dev *pdev);
> +#else
> +static inline bool pci_pri_supported(struct pci_dev *pdev)
> +{ return false; }
> #endif /* CONFIG_PCI_PRI */
>
> #ifdef CONFIG_PCI_PASID
> --
> 2.7.4
>
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iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled
2020-07-23 22:37 [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled Ashok Raj
` (3 preceding siblings ...)
2020-07-24 14:51 ` Bjorn Helgaas
@ 2020-07-27 21:24 ` Sasha Levin
2020-07-28 16:31 ` Raj, Ashok
4 siblings, 1 reply; 7+ messages in thread
From: Sasha Levin @ 2020-07-27 21:24 UTC (permalink / raw)
To: Sasha Levin, Ashok Raj, linux-pci, Bjorn Helgaas, Bjorn Helgaas,
Joerg Roedel, Lu Baolu
Cc: linux-pci, iommu, Ashok Raj, stable, linux-kernel
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS").
The bot has tested the following trees: v5.7.10, v5.4.53, v4.19.134, v4.14.189, v4.9.231, v4.4.231.
v5.7.10: Build OK!
v5.4.53: Failed to apply! Possible dependencies:
2b0ae7cc3bfc ("PCI/ATS: Handle sharing of PF PASID Capability with all VFs")
751035b8dc06 ("PCI/ATS: Cache PASID Capability offset")
8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
c065190bbcd4 ("PCI/ATS: Cache PRI Capability offset")
e5adf79a1d80 ("PCI/ATS: Cache PRI PRG Response PASID Required bit")
v4.19.134: Failed to apply! Possible dependencies:
2b0ae7cc3bfc ("PCI/ATS: Handle sharing of PF PASID Capability with all VFs")
4f802170a861 ("PCI/DPC: Save and restore config state")
6e1ffbb7c2ab ("PCI: Move ATS declarations outside of CONFIG_PCI")
751035b8dc06 ("PCI/ATS: Cache PASID Capability offset")
8c938ddc6df3 ("PCI/ATS: Add pci_ats_page_aligned() interface")
8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
9c2120090586 ("PCI: Provide pci_match_id() with CONFIG_PCI=n")
b92b512a435d ("PCI: Make pci_ats_init() private")
c065190bbcd4 ("PCI/ATS: Cache PRI Capability offset")
e5567f5f6762 ("PCI/ATS: Add pci_prg_resp_pasid_required() interface.")
e5adf79a1d80 ("PCI/ATS: Cache PRI PRG Response PASID Required bit")
fff42928ade5 ("PCI/ATS: Add inline to pci_prg_resp_pasid_required()")
v4.14.189: Failed to apply! Possible dependencies:
1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe controller")
1e4511604dfa ("PCI/AER: Expose internal API for obtaining AER information")
3133e6dd07ed ("PCI: Tidy Makefiles")
37dddf14f1ae ("PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller")
4696b828ca37 ("PCI/AER: Hoist aerdrv.c, aer_inject.c up to drivers/pci/pcie/")
4f802170a861 ("PCI/DPC: Save and restore config state")
8c938ddc6df3 ("PCI/ATS: Add pci_ats_page_aligned() interface")
8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
9de0eec29c07 ("PCI: Regroup all PCI related entries into drivers/pci/Makefile")
b92b512a435d ("PCI: Make pci_ats_init() private")
c065190bbcd4 ("PCI/ATS: Cache PRI Capability offset")
d3252ace0bc6 ("PCI: Restore resized BAR state on resume")
e5567f5f6762 ("PCI/ATS: Add pci_prg_resp_pasid_required() interface.")
e5adf79a1d80 ("PCI/ATS: Cache PRI PRG Response PASID Required bit")
fff42928ade5 ("PCI/ATS: Add inline to pci_prg_resp_pasid_required()")
v4.9.231: Failed to apply! Possible dependencies:
4ebeb1ec56d4 ("PCI: Restore PRI and PASID state after Function-Level Reset")
8c938ddc6df3 ("PCI/ATS: Add pci_ats_page_aligned() interface")
8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
a4f4fa681add ("PCI: Cache PRI and PASID bits in pci_dev")
c065190bbcd4 ("PCI/ATS: Cache PRI Capability offset")
e5567f5f6762 ("PCI/ATS: Add pci_prg_resp_pasid_required() interface.")
e5adf79a1d80 ("PCI/ATS: Cache PRI PRG Response PASID Required bit")
fff42928ade5 ("PCI/ATS: Add inline to pci_prg_resp_pasid_required()")
v4.4.231: Failed to apply! Possible dependencies:
2a2aca316aed ("PCI: Include <asm/dma.h> for isa_dma_bridge_buggy")
4d3f13845957 ("PCI: Add pci_unmap_iospace() to unmap I/O resources")
4ebeb1ec56d4 ("PCI: Restore PRI and PASID state after Function-Level Reset")
8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
a4f4fa681add ("PCI: Cache PRI and PASID bits in pci_dev")
c5076cfe7689 ("PCI, of: Move PCI I/O space management to PCI core code")
e5567f5f6762 ("PCI/ATS: Add pci_prg_resp_pasid_required() interface.")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
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iommu mailing list
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v3 1/1] PCI/ATS: Check PRI supported on the PF device when SRIOV is enabled
2020-07-27 21:24 ` Sasha Levin
@ 2020-07-28 16:31 ` Raj, Ashok
0 siblings, 0 replies; 7+ messages in thread
From: Raj, Ashok @ 2020-07-28 16:31 UTC (permalink / raw)
To: Sasha Levin
Cc: Lu Baolu, linux-pci, linux-kernel, stable, Joerg Roedel, iommu,
Bjorn Helgaas, Ashok Raj
Hi Sasha
On Mon, Jul 27, 2020 at 09:24:35PM +0000, Sasha Levin wrote:
> Hi
>
> [This is an automated email]
>
> This commit has been processed because it contains a "Fixes:" tag
> fixing commit: b16d0cb9e2fc ("iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS").
>
> The bot has tested the following trees: v5.7.10, v5.4.53, v4.19.134, v4.14.189, v4.9.231, v4.4.231.
Looks like the dependency is making this more involved with the backport. I
We could pursue a simpler fix for these older versions where there is a
conflict, but I'm not sure if that's recommended.
In addition from our perspective 5.7 and above if there are other products
that require PASID/PRI on prior versions for SRIOV devices we can drop the
backports. I see the same issue with other IOMMU's, for e.g. AMD as
well, I'm not sure if there are real regressions.
>
> v5.7.10: Build OK!
> v5.4.53: Failed to apply! Possible dependencies:
> 2b0ae7cc3bfc ("PCI/ATS: Handle sharing of PF PASID Capability with all VFs")
> 751035b8dc06 ("PCI/ATS: Cache PASID Capability offset")
> 8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
> 9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
> c065190bbcd4 ("PCI/ATS: Cache PRI Capability offset")
> e5adf79a1d80 ("PCI/ATS: Cache PRI PRG Response PASID Required bit")
>
> v4.19.134: Failed to apply! Possible dependencies:
> 2b0ae7cc3bfc ("PCI/ATS: Handle sharing of PF PASID Capability with all VFs")
> 4f802170a861 ("PCI/DPC: Save and restore config state")
> 6e1ffbb7c2ab ("PCI: Move ATS declarations outside of CONFIG_PCI")
> 751035b8dc06 ("PCI/ATS: Cache PASID Capability offset")
> 8c938ddc6df3 ("PCI/ATS: Add pci_ats_page_aligned() interface")
> 8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
> 9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
> 9c2120090586 ("PCI: Provide pci_match_id() with CONFIG_PCI=n")
> b92b512a435d ("PCI: Make pci_ats_init() private")
> c065190bbcd4 ("PCI/ATS: Cache PRI Capability offset")
> e5567f5f6762 ("PCI/ATS: Add pci_prg_resp_pasid_required() interface.")
> e5adf79a1d80 ("PCI/ATS: Cache PRI PRG Response PASID Required bit")
> fff42928ade5 ("PCI/ATS: Add inline to pci_prg_resp_pasid_required()")
>
> v4.14.189: Failed to apply! Possible dependencies:
> 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe controller")
> 1e4511604dfa ("PCI/AER: Expose internal API for obtaining AER information")
> 3133e6dd07ed ("PCI: Tidy Makefiles")
> 37dddf14f1ae ("PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller")
> 4696b828ca37 ("PCI/AER: Hoist aerdrv.c, aer_inject.c up to drivers/pci/pcie/")
> 4f802170a861 ("PCI/DPC: Save and restore config state")
> 8c938ddc6df3 ("PCI/ATS: Add pci_ats_page_aligned() interface")
> 8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
> 9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
> 9de0eec29c07 ("PCI: Regroup all PCI related entries into drivers/pci/Makefile")
> b92b512a435d ("PCI: Make pci_ats_init() private")
> c065190bbcd4 ("PCI/ATS: Cache PRI Capability offset")
> d3252ace0bc6 ("PCI: Restore resized BAR state on resume")
> e5567f5f6762 ("PCI/ATS: Add pci_prg_resp_pasid_required() interface.")
> e5adf79a1d80 ("PCI/ATS: Cache PRI PRG Response PASID Required bit")
> fff42928ade5 ("PCI/ATS: Add inline to pci_prg_resp_pasid_required()")
>
> v4.9.231: Failed to apply! Possible dependencies:
> 4ebeb1ec56d4 ("PCI: Restore PRI and PASID state after Function-Level Reset")
> 8c938ddc6df3 ("PCI/ATS: Add pci_ats_page_aligned() interface")
> 8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
> 9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
> a4f4fa681add ("PCI: Cache PRI and PASID bits in pci_dev")
> c065190bbcd4 ("PCI/ATS: Cache PRI Capability offset")
> e5567f5f6762 ("PCI/ATS: Add pci_prg_resp_pasid_required() interface.")
> e5adf79a1d80 ("PCI/ATS: Cache PRI PRG Response PASID Required bit")
> fff42928ade5 ("PCI/ATS: Add inline to pci_prg_resp_pasid_required()")
>
> v4.4.231: Failed to apply! Possible dependencies:
> 2a2aca316aed ("PCI: Include <asm/dma.h> for isa_dma_bridge_buggy")
> 4d3f13845957 ("PCI: Add pci_unmap_iospace() to unmap I/O resources")
> 4ebeb1ec56d4 ("PCI: Restore PRI and PASID state after Function-Level Reset")
> 8cbb8a9374a2 ("PCI/ATS: Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI")
> 9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs")
> a4f4fa681add ("PCI: Cache PRI and PASID bits in pci_dev")
> c5076cfe7689 ("PCI, of: Move PCI I/O space management to PCI core code")
> e5567f5f6762 ("PCI/ATS: Add pci_prg_resp_pasid_required() interface.")
>
>
> NOTE: The patch will not be queued to stable trees until it is upstream.
>
> How should we proceed with this patch?
>
> --
> Thanks
> Sasha
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