* [PATCH] iommu/arm-smmu-qcom: Initialize SCTLR of the bypass context
@ 2021-01-06 0:50 Bjorn Andersson
2021-01-07 14:22 ` Will Deacon
0 siblings, 1 reply; 2+ messages in thread
From: Bjorn Andersson @ 2021-01-06 0:50 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel
Cc: linux-arm-msm, iommu, linux-arm-kernel, linux-kernel
On SM8150 it's occasionally observed that the boot hangs in between the
writing of SMEs and context banks in arm_smmu_device_reset().
The problem seems to coincide with a display refresh happening after
updating the stream mapping, but before clearing - and there by
disabling translation - the context bank picked to emulate translation
bypass.
Resolve this by explicitly disabling the bypass context already in
cfg_probe.
Fixes: f9081b8ff593 ("iommu/arm-smmu-qcom: Implement S2CR quirk")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 5dff7ffbef11..1b83d140742f 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -196,6 +196,8 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu)
set_bit(qsmmu->bypass_cbndx, smmu->context_map);
+ arm_smmu_cb_write(smmu, qsmmu->bypass_cbndx, ARM_SMMU_CB_SCTLR, 0);
+
reg = FIELD_PREP(ARM_SMMU_CBAR_TYPE, CBAR_TYPE_S1_TRANS_S2_BYPASS);
arm_smmu_gr1_write(smmu, ARM_SMMU_GR1_CBAR(qsmmu->bypass_cbndx), reg);
}
--
2.29.2
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* Re: [PATCH] iommu/arm-smmu-qcom: Initialize SCTLR of the bypass context
2021-01-06 0:50 [PATCH] iommu/arm-smmu-qcom: Initialize SCTLR of the bypass context Bjorn Andersson
@ 2021-01-07 14:22 ` Will Deacon
0 siblings, 0 replies; 2+ messages in thread
From: Will Deacon @ 2021-01-07 14:22 UTC (permalink / raw)
To: Joerg Roedel, Bjorn Andersson, Robin Murphy
Cc: Will Deacon, catalin.marinas, linux-kernel, iommu, linux-arm-msm,
kernel-team, linux-arm-kernel
On Tue, 5 Jan 2021 16:50:38 -0800, Bjorn Andersson wrote:
> On SM8150 it's occasionally observed that the boot hangs in between the
> writing of SMEs and context banks in arm_smmu_device_reset().
>
> The problem seems to coincide with a display refresh happening after
> updating the stream mapping, but before clearing - and there by
> disabling translation - the context bank picked to emulate translation
> bypass.
>
> [...]
Applied to arm64 (for-next/iommu/fixes), thanks!
[1/1] iommu/arm-smmu-qcom: Initialize SCTLR of the bypass context
https://git.kernel.org/arm64/c/aded8c7c2b72
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
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