From: "Guo, Kaijie" <kaijie.guo@intel.com>
To: Lu Baolu <baolu.lu@linux.intel.com>,
"Liu, Yi L" <yi.l.liu@intel.com>,
"Pan, Jacob jun" <jacob.jun.pan@intel.com>,
"Zeng, Xin" <xin.zeng@intel.com>,
"will@kernel.org" <will@kernel.org>,
"joro@8bytes.org" <joro@8bytes.org>
Cc: "Tian, Kevin" <kevin.tian@intel.com>,
"Raj, Ashok" <ashok.raj@intel.com>,
"Tian, Jun J" <jun.j.tian@intel.com>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
David Woodhouse <dwmw2@infradead.org>
Subject: RE: [PATCH 1/3] iommu/vt-d: Move intel_iommu info from struct intel_svm to struct intel_svm_dev
Date: Mon, 21 Dec 2020 01:43:39 +0000 [thread overview]
Message-ID: <DM6PR11MB274554562E9C49530AB07F1999C00@DM6PR11MB2745.namprd11.prod.outlook.com> (raw)
In-Reply-To: <e0761970-3151-ac82-51c4-94cdd2a43ce4@linux.intel.com>
Hi Baolu,
I have verified on 5.9.13 this fix can resolve the error "DMAR: DRHD: handling fault status reg 40".
Regards,
Kaijie
-----Original Message-----
From: Lu Baolu <baolu.lu@linux.intel.com>
Sent: Saturday, December 19, 2020 2:50 PM
To: Liu, Yi L <yi.l.liu@intel.com>; Pan, Jacob jun <jacob.jun.pan@intel.com>; Zeng, Xin <xin.zeng@intel.com>; Guo, Kaijie <kaijie.guo@intel.com>; will@kernel.org; joro@8bytes.org
Cc: baolu.lu@linux.intel.com; Tian, Kevin <kevin.tian@intel.com>; Tian, Jun J <jun.j.tian@intel.com>; Raj, Ashok <ashok.raj@intel.com>; iommu@lists.linux-foundation.org; Jacob Pan <jacob.jun.pan@linux.intel.com>; David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH 1/3] iommu/vt-d: Move intel_iommu info from struct intel_svm to struct intel_svm_dev
Hi,
On 2020/12/20 8:03, Liu Yi L wrote:
> Current struct intel_svm has a field to record the struct intel_iommu
> pointer for a PASID bind. And struct intel_svm will be shared by all
> the devices bind to the same process. The devices may be behind
> different DMAR units. As the iommu driver code uses the intel_iommu
> pointer stored in intel_svm struct to do cache invalidations, it may
> only flush the cache on a single DMAR unit, for others, the cache invalidation is missed.
>
> As intel_svm struct already has a device list, this patch just moves
> the intel_iommu pointer to be a field of intel_svm_dev struct.
>
> Fixes: 2f26e0a9c986 ("iommu/vt-d: Add basic SVM PASID support")
> Cc: Lu Baolu <baolu.lu@linux.intel.com>
> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Cc: Raj Ashok <ashok.raj@intel.com>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Reported-by: Guo Kaijie <Kaijie.Guo@intel.com>
> Reported-by: Xin Zeng <xin.zeng@intel.com>
Kaijie or Xin, can you please confirm whether this fix work for you?
Best regards,
baolu
> Signed-off-by: Guo Kaijie <Kaijie.Guo@intel.com>
> Signed-off-by: Xin Zeng <xin.zeng@intel.com>
> Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
> ---
> drivers/iommu/intel/svm.c | 9 +++++----
> include/linux/intel-iommu.h | 2 +-
> 2 files changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
> index 3242ebd0bca3..4a10c9ff368c 100644
> --- a/drivers/iommu/intel/svm.c
> +++ b/drivers/iommu/intel/svm.c
> @@ -142,7 +142,7 @@ static void intel_flush_svm_range_dev (struct intel_svm *svm, struct intel_svm_d
> }
> desc.qw2 = 0;
> desc.qw3 = 0;
> - qi_submit_sync(svm->iommu, &desc, 1, 0);
> + qi_submit_sync(sdev->iommu, &desc, 1, 0);
>
> if (sdev->dev_iotlb) {
> desc.qw0 = QI_DEV_EIOTLB_PASID(svm->pasid) | @@ -166,7 +166,7 @@
> static void intel_flush_svm_range_dev (struct intel_svm *svm, struct intel_svm_d
> }
> desc.qw2 = 0;
> desc.qw3 = 0;
> - qi_submit_sync(svm->iommu, &desc, 1, 0);
> + qi_submit_sync(sdev->iommu, &desc, 1, 0);
> }
> }
>
> @@ -211,7 +211,7 @@ static void intel_mm_release(struct mmu_notifier *mn, struct mm_struct *mm)
> */
> rcu_read_lock();
> list_for_each_entry_rcu(sdev, &svm->devs, list)
> - intel_pasid_tear_down_entry(svm->iommu, sdev->dev,
> + intel_pasid_tear_down_entry(sdev->iommu, sdev->dev,
> svm->pasid, true);
> rcu_read_unlock();
>
> @@ -363,6 +363,7 @@ int intel_svm_bind_gpasid(struct iommu_domain *domain, struct device *dev,
> }
> sdev->dev = dev;
> sdev->sid = PCI_DEVID(info->bus, info->devfn);
> + sdev->iommu = iommu;
>
> /* Only count users if device has aux domains */
> if (iommu_dev_feature_enabled(dev, IOMMU_DEV_FEAT_AUX)) @@ -546,6
> +547,7 @@ intel_svm_bind_mm(struct device *dev, unsigned int flags,
> goto out;
> }
> sdev->dev = dev;
> + sdev->iommu = iommu;
>
> ret = intel_iommu_enable_pasid(iommu, dev);
> if (ret) {
> @@ -575,7 +577,6 @@ intel_svm_bind_mm(struct device *dev, unsigned int flags,
> kfree(sdev);
> goto out;
> }
> - svm->iommu = iommu;
>
> if (pasid_max > intel_pasid_max_id)
> pasid_max = intel_pasid_max_id;
> diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
> index d956987ed032..94522685a0d9 100644
> --- a/include/linux/intel-iommu.h
> +++ b/include/linux/intel-iommu.h
> @@ -758,6 +758,7 @@ struct intel_svm_dev {
> struct list_head list;
> struct rcu_head rcu;
> struct device *dev;
> + struct intel_iommu *iommu;
> struct svm_dev_ops *ops;
> struct iommu_sva sva;
> u32 pasid;
> @@ -771,7 +772,6 @@ struct intel_svm {
> struct mmu_notifier notifier;
> struct mm_struct *mm;
>
> - struct intel_iommu *iommu;
> unsigned int flags;
> u32 pasid;
> int gpasid; /* In case that guest PASID is different from host
> PASID */
>
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next prev parent reply other threads:[~2020-12-21 3:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-20 0:03 [PATCH 0/4] iommu/vtd-: Misc fixes on scalable mode Liu Yi L
2020-12-20 0:03 ` [PATCH 1/3] iommu/vt-d: Move intel_iommu info from struct intel_svm to struct intel_svm_dev Liu Yi L
2020-12-19 6:50 ` Lu Baolu
2020-12-21 1:43 ` Guo, Kaijie [this message]
2020-12-20 0:03 ` [PATCH 2/3] iommu/vt-d: Track device aux-attach with subdevice_domain_info Liu Yi L
2020-12-19 6:52 ` Lu Baolu
2020-12-22 20:21 ` Jacob Pan
2020-12-23 3:59 ` Liu, Yi L
2020-12-20 0:03 ` [PATCH 3/3] iommu/vt-d: A fix to iommu_flush_dev_iotlb() for aux-domain Liu Yi L
2020-12-19 6:52 ` Lu Baolu
2020-12-22 18:17 ` [PATCH 0/4] iommu/vtd-: Misc fixes on scalable mode Jacob Pan
2020-12-23 3:57 ` Liu, Yi L
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