* [PATCH 6/7] perf: Use MSR names in the extra reg lists
@ 2010-12-27 15:38 Lin Ming
2011-01-04 12:07 ` Peter Zijlstra
0 siblings, 1 reply; 2+ messages in thread
From: Lin Ming @ 2010-12-27 15:38 UTC (permalink / raw)
To: Peter Zijlstra, Ingo Molnar, Andi Kleen, Stephane Eranian; +Cc: lkml
MSR names is much more readable.
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
---
arch/x86/include/asm/msr-index.h | 3 +++
arch/x86/kernel/cpu/perf_event_intel.c | 9 ++++++---
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 6b89f5e..c3c42b1 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -47,6 +47,9 @@
#define MSR_IA32_MCG_STATUS 0x0000017a
#define MSR_IA32_MCG_CTL 0x0000017b
+#define MSR_OFFCORE_RSP_0 0x000001a6
+#define MSR_OFFCORE_RSP_1 0x000001a7
+
#define MSR_IA32_PEBS_ENABLE 0x000003f1
#define MSR_IA32_DS_AREA 0x00000600
#define MSR_IA32_PERF_CAPABILITIES 0x00000345
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index ad70c2c..0a67425 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -88,7 +88,8 @@ static struct event_constraint intel_nehalem_event_constraints[] =
static struct extra_reg intel_nehalem_extra_regs[] =
{
- INTEL_EVENT_EXTRA_REG(0xb7, 0x1a6, 0xffff, 32), /* OFFCORE_RESPONSE */
+ /* OFFCORE_RESPONSE */
+ INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0xffff, 32),
EVENT_EXTRA_END
};
@@ -112,8 +113,10 @@ static struct event_constraint intel_westmere_event_constraints[] =
static struct extra_reg intel_westmere_extra_regs[] =
{
- INTEL_EVENT_EXTRA_REG(0xb7, 0x1a6, 0xffff, 32), /* OFFCORE_RESPONSE_0 */
- INTEL_EVENT_EXTRA_REG(0xbb, 0x1a7, 0xffff, 32), /* OFFCORE_RESPONSE_1 */
+ /* OFFCORE_RESPONSE_0 */
+ INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0xffff, 32),
+ /* OFFCORE_RESPONSE_1 */
+ INTEL_EVENT_EXTRA_REG(0xbb, MSR_OFFCORE_RSP_1, 0xffff, 32),
EVENT_EXTRA_END
};
--
1.7.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 6/7] perf: Use MSR names in the extra reg lists
2010-12-27 15:38 [PATCH 6/7] perf: Use MSR names in the extra reg lists Lin Ming
@ 2011-01-04 12:07 ` Peter Zijlstra
0 siblings, 0 replies; 2+ messages in thread
From: Peter Zijlstra @ 2011-01-04 12:07 UTC (permalink / raw)
To: Lin Ming; +Cc: Ingo Molnar, Andi Kleen, Stephane Eranian, lkml
On Mon, 2010-12-27 at 23:38 +0800, Lin Ming wrote:
> @@ -88,7 +88,8 @@ static struct event_constraint intel_nehalem_event_constraints[] =
>
> static struct extra_reg intel_nehalem_extra_regs[] =
> {
> - INTEL_EVENT_EXTRA_REG(0xb7, 0x1a6, 0xffff, 32), /* OFFCORE_RESPONSE */
> + /* OFFCORE_RESPONSE */
> + INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0xffff, 32),
> EVENT_EXTRA_END
> };
Since we're going for another posting anyway, I think you can drop that
comment here, it should be evident from the MSR name included in the
constraint.
^ permalink raw reply [flat|nested] 2+ messages in thread
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