* [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format.
@ 2014-06-10 10:25 Denis Carikli
2014-06-10 10:25 ` [PATCH v13 02/10] imx-drm: Add RGB666 support for parallel display Denis Carikli
` (8 more replies)
0 siblings, 9 replies; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
That new macro is needed by the imx_drm staging driver
for supporting the QVGA display of the eukrea-cpuimx51 board.
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
---
ChangeLog v10->v13:
- No changes
ChangeLog v9->v10:
- Rebased on top of:
"211e7f2 [media] DocBook media: drop the old incorrect packed RGB table"
- Added Philipp Zabel's Ack.
ChangeLog v8->v9:
- Removed the Cc. They are now set in git-send-email directly.
ChangeLog v7->v8:
- Added Mauro Carvalho Chehab back to the list of Cc
ChangeLog v6->v7:
- Shrinked even more the Cc list.
ChangeLog v5->v6:
- Remove people not concerned by this patch from the Cc list.
ChangeLog v3->v4:
- Added Laurent Pinchart's Ack.
ChangeLog v2->v3:
- Added some interested people in the Cc list.
- Added Mauro Carvalho Chehab's Ack.
- Added documentation.
---
.../DocBook/media/v4l/pixfmt-packed-rgb.xml | 39 ++++++++++++++++++++
include/uapi/linux/videodev2.h | 1 +
2 files changed, 40 insertions(+)
diff --git a/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml b/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml
index e1c4f8b..88a7fe1 100644
--- a/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml
+++ b/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml
@@ -279,6 +279,45 @@ colorspace <constant>V4L2_COLORSPACE_SRGB</constant>.</para>
<entry></entry>
<entry></entry>
</row>
+ <row id="V4L2-PIX-FMT-RGB666">
+ <entry><constant>V4L2_PIX_FMT_RGB666</constant></entry>
+ <entry>'RGBH'</entry>
+ <entry></entry>
+ <entry>r<subscript>5</subscript></entry>
+ <entry>r<subscript>4</subscript></entry>
+ <entry>r<subscript>3</subscript></entry>
+ <entry>r<subscript>2</subscript></entry>
+ <entry>r<subscript>1</subscript></entry>
+ <entry>r<subscript>0</subscript></entry>
+ <entry>g<subscript>5</subscript></entry>
+ <entry>g<subscript>4</subscript></entry>
+ <entry></entry>
+ <entry>g<subscript>3</subscript></entry>
+ <entry>g<subscript>2</subscript></entry>
+ <entry>g<subscript>1</subscript></entry>
+ <entry>g<subscript>0</subscript></entry>
+ <entry>b<subscript>5</subscript></entry>
+ <entry>b<subscript>4</subscript></entry>
+ <entry>b<subscript>3</subscript></entry>
+ <entry>b<subscript>2</subscript></entry>
+ <entry></entry>
+ <entry>b<subscript>1</subscript></entry>
+ <entry>b<subscript>0</subscript></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ <entry></entry>
+ </row>
<row id="V4L2-PIX-FMT-BGR24">
<entry><constant>V4L2_PIX_FMT_BGR24</constant></entry>
<entry>'BGR3'</entry>
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 168ff50..08cac01 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -299,6 +299,7 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R', 'G', 'B', 'Q') /* 16 RGB-5-5-5 BE */
#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R', 'G', 'B', 'R') /* 16 RGB-5-6-5 BE */
#define V4L2_PIX_FMT_BGR666 v4l2_fourcc('B', 'G', 'R', 'H') /* 18 BGR-6-6-6 */
+#define V4L2_PIX_FMT_RGB666 v4l2_fourcc('R', 'G', 'B', 'H') /* 18 RGB-6-6-6 */
#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B', 'G', 'R', '3') /* 24 BGR-8-8-8 */
#define V4L2_PIX_FMT_RGB24 v4l2_fourcc('R', 'G', 'B', '3') /* 24 RGB-8-8-8 */
#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B', 'G', 'R', '4') /* 32 BGR-8-8-8-8 */
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 02/10] imx-drm: Add RGB666 support for parallel display.
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
@ 2014-06-10 10:25 ` Denis Carikli
2014-06-10 10:25 ` [PATCH v13 03/10] imx-drm: Correct BGR666 and the board's dts that use them Denis Carikli
` (7 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
---
ChangeLog v9->v13:
- Rebased
ChangeLog v8->v9:
- Rebased.
- Added Philipp Zabel's ack.
- Shortened the patch title.
ChangeLog v8->v9:
- Removed the Cc. They are now set in git-send-email directly.
- Rebased.
ChangeLog v7->v8:
- Shrinked even more the Cc list.
ChangeLog v6->v7:
- Shrinked even more the Cc list.
ChangeLog v5->v6:
- Remove people not concerned by this patch from the Cc list.
ChangeLog v3->v5:
- Use the correct RGB order.
ChangeLog v2->v3:
- Added some interested people in the Cc list.
- Removed the commit message long desciption that was just a copy of the short
description.
- Rebased the patch.
- Fixed a copy-paste error in the ipu_dc_map_clear parameter.
---
.../bindings/staging/imx-drm/fsl-imx-drm.txt | 4 ++--
drivers/staging/imx-drm/ipu-v3/ipu-dc.c | 9 +++++++++
drivers/staging/imx-drm/parallel-display.c | 2 ++
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt b/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt
index e75f0e5..c0eb95a 100644
--- a/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt
+++ b/Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt
@@ -60,8 +60,8 @@ Required properties:
- compatible: Should be "fsl,imx-parallel-display"
Optional properties:
- interface_pix_fmt: How this display is connected to the
- display interface. Currently supported types: "rgb24", "rgb565", "bgr666"
- and "lvds666".
+ display interface. Currently supported types: "rgb24", "rgb565", "bgr666",
+ "rgb666" and "lvds666".
- edid: verbatim EDID data block describing attached display.
- ddc: phandle describing the i2c bus handling the display data
channel
diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-dc.c b/drivers/staging/imx-drm/ipu-v3/ipu-dc.c
index 784a4a1..9d0324d 100644
--- a/drivers/staging/imx-drm/ipu-v3/ipu-dc.c
+++ b/drivers/staging/imx-drm/ipu-v3/ipu-dc.c
@@ -94,6 +94,7 @@ enum ipu_dc_map {
IPU_DC_MAP_BGR666,
IPU_DC_MAP_LVDS666,
IPU_DC_MAP_BGR24,
+ IPU_DC_MAP_RGB666,
};
struct ipu_dc {
@@ -162,6 +163,8 @@ static int ipu_pixfmt_to_map(u32 fmt)
return IPU_DC_MAP_LVDS666;
case V4L2_PIX_FMT_BGR24:
return IPU_DC_MAP_BGR24;
+ case V4L2_PIX_FMT_RGB666:
+ return IPU_DC_MAP_RGB666;
default:
return -EINVAL;
}
@@ -453,6 +456,12 @@ int ipu_dc_init(struct ipu_soc *ipu, struct device *dev,
ipu_dc_map_config(priv, IPU_DC_MAP_BGR24, 1, 15, 0xff); /* green */
ipu_dc_map_config(priv, IPU_DC_MAP_BGR24, 0, 23, 0xff); /* blue */
+ /* rgb666 */
+ ipu_dc_map_clear(priv, IPU_DC_MAP_RGB666);
+ ipu_dc_map_config(priv, IPU_DC_MAP_RGB666, 0, 5, 0xfc); /* blue */
+ ipu_dc_map_config(priv, IPU_DC_MAP_RGB666, 1, 11, 0xfc); /* green */
+ ipu_dc_map_config(priv, IPU_DC_MAP_RGB666, 2, 17, 0xfc); /* red */
+
return 0;
}
diff --git a/drivers/staging/imx-drm/parallel-display.c b/drivers/staging/imx-drm/parallel-display.c
index b567832..64b34336 100644
--- a/drivers/staging/imx-drm/parallel-display.c
+++ b/drivers/staging/imx-drm/parallel-display.c
@@ -218,6 +218,8 @@ static int imx_pd_bind(struct device *dev, struct device *master, void *data)
imxpd->interface_pix_fmt = V4L2_PIX_FMT_RGB565;
else if (!strcmp(fmt, "bgr666"))
imxpd->interface_pix_fmt = V4L2_PIX_FMT_BGR666;
+ else if (!strcmp(fmt, "rgb666"))
+ imxpd->interface_pix_fmt = V4L2_PIX_FMT_RGB666;
else if (!strcmp(fmt, "lvds666"))
imxpd->interface_pix_fmt = v4l2_fourcc('L', 'V', 'D', '6');
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 03/10] imx-drm: Correct BGR666 and the board's dts that use them.
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
2014-06-10 10:25 ` [PATCH v13 02/10] imx-drm: Add RGB666 support for parallel display Denis Carikli
@ 2014-06-10 10:25 ` Denis Carikli
2014-06-10 10:25 ` [PATCH v13 04/10] imx-drm: use defines for clock polarity settings Denis Carikli
` (6 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
The current BGR666 is not consistent with the other color mapings like BGR24.
BGR666 should be in the same byte order than BGR24.
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
---
ChangeLog v10->v13:
- Rebased
ChangeLog v9->v10:
- Rebased.
- Added Philipp Zabel's Ack.
- Included Lothar Waßmann's suggestion about imx-ldb.c.
- Shortened the patch title
ChangeLog v8->v9:
- Removed the Cc. They are now set in git-send-email directly.
ChangeLog v7->v8:
- Shrinked even more the Cc list.
ChangeLog v6->v7:
- Shrinked even more the Cc list.
ChangeLog v5->v6:
- Remove people not concerned by this patch from the Cc list.
- Added a better explanation of the change.
ChangeLog v5:
- New patch.
---
arch/arm/boot/dts/imx51-apf51dev.dts | 2 +-
arch/arm/boot/dts/imx53-m53evk.dts | 2 +-
drivers/staging/imx-drm/imx-ldb.c | 4 ++--
drivers/staging/imx-drm/ipu-v3/ipu-dc.c | 4 ++--
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/imx51-apf51dev.dts b/arch/arm/boot/dts/imx51-apf51dev.dts
index c5a9a24..7b3851d 100644
--- a/arch/arm/boot/dts/imx51-apf51dev.dts
+++ b/arch/arm/boot/dts/imx51-apf51dev.dts
@@ -18,7 +18,7 @@
display@di1 {
compatible = "fsl,imx-parallel-display";
- interface-pix-fmt = "bgr666";
+ interface-pix-fmt = "rgb666";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1>;
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index d5d146a..4b036b4 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -24,7 +24,7 @@
soc {
display1: display@di1 {
compatible = "fsl,imx-parallel-display";
- interface-pix-fmt = "bgr666";
+ interface-pix-fmt = "rgb666";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1>;
diff --git a/drivers/staging/imx-drm/imx-ldb.c b/drivers/staging/imx-drm/imx-ldb.c
index 7e3f019..5d22e40 100644
--- a/drivers/staging/imx-drm/imx-ldb.c
+++ b/drivers/staging/imx-drm/imx-ldb.c
@@ -188,11 +188,11 @@ static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
switch (imx_ldb_ch->chno) {
case 0:
pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH0_24) ?
- V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
+ V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_RGB666;
break;
case 1:
pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH1_24) ?
- V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
+ V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_RGB666;
break;
default:
dev_err(ldb->dev, "unable to config di%d panel format\n",
diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-dc.c b/drivers/staging/imx-drm/ipu-v3/ipu-dc.c
index 9d0324d..cd250d5 100644
--- a/drivers/staging/imx-drm/ipu-v3/ipu-dc.c
+++ b/drivers/staging/imx-drm/ipu-v3/ipu-dc.c
@@ -440,9 +440,9 @@ int ipu_dc_init(struct ipu_soc *ipu, struct device *dev,
/* bgr666 */
ipu_dc_map_clear(priv, IPU_DC_MAP_BGR666);
- ipu_dc_map_config(priv, IPU_DC_MAP_BGR666, 0, 5, 0xfc); /* blue */
+ ipu_dc_map_config(priv, IPU_DC_MAP_BGR666, 0, 17, 0xfc); /* blue */
ipu_dc_map_config(priv, IPU_DC_MAP_BGR666, 1, 11, 0xfc); /* green */
- ipu_dc_map_config(priv, IPU_DC_MAP_BGR666, 2, 17, 0xfc); /* red */
+ ipu_dc_map_config(priv, IPU_DC_MAP_BGR666, 2, 5, 0xfc); /* red */
/* lvds666 */
ipu_dc_map_clear(priv, IPU_DC_MAP_LVDS666);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 04/10] imx-drm: use defines for clock polarity settings
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
2014-06-10 10:25 ` [PATCH v13 02/10] imx-drm: Add RGB666 support for parallel display Denis Carikli
2014-06-10 10:25 ` [PATCH v13 03/10] imx-drm: Correct BGR666 and the board's dts that use them Denis Carikli
@ 2014-06-10 10:25 ` Denis Carikli
2014-06-10 10:25 ` [PATCH v13 05/10] ARM: dts: imx5*, imx6*: correct display-timings nodes Denis Carikli
` (5 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
Signed-off-by: Denis Carikli <denis@eukrea.com>
---
ChangeLog 12->v13:
- No changes
ChangeLog 11->v12:
- Improved the define names to match the hardware:
ENABLE_POL is not a clock signal but instead an enable signal.
ChangeLog v9->v10:
- New patch which was splitted out from:
"staging: imx-drm: Use de-active and pixelclk-active display-timings.".
- Fixes many issues in "staging: imx-drm: Use de-active and pixelclk-active
display-timings.":
- More clear meaning of the polarity settings.
- The SET_CLK_POL and SET_DE_POL masks are not
needed anymore.
---
drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h | 8 +++++++-
drivers/staging/imx-drm/ipu-v3/ipu-di.c | 4 ++--
drivers/staging/imx-drm/ipuv3-crtc.c | 4 ++--
3 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h
index c2c6fab..015e3bf 100644
--- a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h
+++ b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h
@@ -27,6 +27,12 @@ enum ipuv3_type {
#define IPU_PIX_FMT_GBR24 v4l2_fourcc('G', 'B', 'R', '3')
+#define CLK_POL_NEGEDGE 0
+#define CLK_POL_POSEDGE 1
+
+#define ENABLE_POL_LOW 0
+#define ENABLE_POL_HIGH 1
+
/*
* Bitfield of Display Interface signal polarities.
*/
@@ -37,7 +43,7 @@ struct ipu_di_signal_cfg {
unsigned clksel_en:1;
unsigned clkidle_en:1;
unsigned data_pol:1; /* true = inverted */
- unsigned clk_pol:1; /* true = rising edge */
+ unsigned clk_pol:1;
unsigned enable_pol:1;
unsigned Hsync_pol:1; /* true = active high */
unsigned Vsync_pol:1;
diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-di.c b/drivers/staging/imx-drm/ipu-v3/ipu-di.c
index 849b3e1..0ce3f52 100644
--- a/drivers/staging/imx-drm/ipu-v3/ipu-di.c
+++ b/drivers/staging/imx-drm/ipu-v3/ipu-di.c
@@ -595,7 +595,7 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig)
}
}
- if (sig->clk_pol)
+ if (sig->clk_pol == CLK_POL_POSEDGE)
di_gen |= DI_GEN_POLARITY_DISP_CLK;
ipu_di_write(di, di_gen, DI_GENERAL);
@@ -606,7 +606,7 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig)
reg = ipu_di_read(di, DI_POL);
reg &= ~(DI_POL_DRDY_DATA_POLARITY | DI_POL_DRDY_POLARITY_15);
- if (sig->enable_pol)
+ if (sig->enable_pol == ENABLE_POL_HIGH)
reg |= DI_POL_DRDY_POLARITY_15;
if (sig->data_pol)
reg |= DI_POL_DRDY_DATA_POLARITY;
diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c
index 47bec5e..ba9eea3 100644
--- a/drivers/staging/imx-drm/ipuv3-crtc.c
+++ b/drivers/staging/imx-drm/ipuv3-crtc.c
@@ -165,8 +165,8 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc,
if (mode->flags & DRM_MODE_FLAG_PVSYNC)
sig_cfg.Vsync_pol = 1;
- sig_cfg.enable_pol = 1;
- sig_cfg.clk_pol = 0;
+ sig_cfg.enable_pol = ENABLE_POL_HIGH;
+ sig_cfg.clk_pol = CLK_POL_NEGEDGE;
sig_cfg.width = mode->hdisplay;
sig_cfg.height = mode->vdisplay;
sig_cfg.pixel_fmt = out_pixel_fmt;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 05/10] ARM: dts: imx5*, imx6*: correct display-timings nodes.
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
` (2 preceding siblings ...)
2014-06-10 10:25 ` [PATCH v13 04/10] imx-drm: use defines for clock polarity settings Denis Carikli
@ 2014-06-10 10:25 ` Denis Carikli
2014-06-10 10:25 ` [PATCH v13 06/10] drm: drm_display_mode: add signal polarity flags Denis Carikli
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
The imx-drm driver can't use the de-active and
pixelclk-active display-timings properties yet.
Instead the data-enable and the pixel data clock
polarity are hardcoded in the imx-drm driver.
So theses properties are now set to keep
the same behaviour when imx-drm will start
using them.
Signed-off-by: Denis Carikli <denis@eukrea.com>
---
ChangeLog v10->v11:
- imx53-tx53-x03x.dts change was removed because it
already had the correct setting.
ChangeLog v9->v10:
- New patch that was splitted out of:
"staging imx-drm: Use de-active and pixelclk-active
display-timings."
---
arch/arm/boot/dts/imx51-babbage.dts | 2 ++
arch/arm/boot/dts/imx53-m53evk.dts | 2 ++
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 2 ++
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 2 ++
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi | 2 ++
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 ++
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 2 ++
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 2 ++
8 files changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index ee51a10..b64a9e3 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -56,6 +56,8 @@
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <0>;
};
};
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index 4b036b4..d03ced7 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -41,6 +41,8 @@
vfront-porch = <9>;
vsync-len = <3>;
vsync-active = <1>;
+ de-active = <1>;
+ pixelclk-active = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index d3125f0..7f993d6 100644
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -512,6 +512,8 @@
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index 532347f..e06cf9e 100644
--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -534,6 +534,8 @@
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 4c4b175..bcf5178 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -353,6 +353,8 @@
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 009abd6..230bbc6 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -405,6 +405,8 @@
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 6df6127..9f6b406 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -353,6 +353,8 @@
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index e446192..3297779 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -494,6 +494,8 @@
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <0>;
};
};
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 06/10] drm: drm_display_mode: add signal polarity flags
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
` (3 preceding siblings ...)
2014-06-10 10:25 ` [PATCH v13 05/10] ARM: dts: imx5*, imx6*: correct display-timings nodes Denis Carikli
@ 2014-06-10 10:25 ` Denis Carikli
2014-06-12 23:46 ` Laurent Pinchart
2014-06-10 10:25 ` [PATCH v13 07/10] imx-drm: Use drm_display_mode timings flags Denis Carikli
` (3 subsequent siblings)
8 siblings, 1 reply; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
We need a way to pass signal polarity informations
between DRM panels, and the display drivers.
To do that, a pol_flags field was added to drm_display_mode.
Signed-off-by: Denis Carikli <denis@eukrea.com>
---
ChangeLog v12->v13:
- Added Docbook documentation for pol_flags the struct field.
- Removed the _PRESERVE defines: it was used by patches
against the imx_drm driver. Now theses patches have been
adapted not to require that defines.
ChangeLog v11->v12:
- Rebased: This patch now applies against drm_modes.h
- Rebased: It now uses the new DRM_MODE_FLAG_POL_DE flags defines names
ChangeLog v10->v11:
- Since the imx-drm won't be able to retrive its regulators
from the device tree when using display-timings nodes,
and that I was told that the drm simple-panel driver
already supported that, I then, instead, added what was
lacking to make the eukrea displays work with the
drm-simple-panel driver.
That required a way to get back the display polarity
informations from the imx-drm driver without affecting
userspace.
---
Documentation/DocBook/drm.tmpl | 30 ++++++++++++++++++++++++++++++
include/drm/drm_modes.h | 6 ++++++
2 files changed, 36 insertions(+)
diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
index c526d81..29c0e5a 100644
--- a/Documentation/DocBook/drm.tmpl
+++ b/Documentation/DocBook/drm.tmpl
@@ -2292,6 +2292,36 @@ void intel_crt_init(struct drm_device *dev)
and <structfield>height_mm</structfield> fields are only used internally
during EDID parsing and should not be set when creating modes manually.
</para>
+ <para>
+ The <structfield>pol_flags</structfield> value represents the display
+ signal polarity flags, it can be a combination of
+ <variablelist>
+ <varlistentry>
+ <term>DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE</term>
+ <listitem><para>
+ drive pixel data on falling edge, sample data on rising edge.
+ </para></listitem>
+ </varlistentry>
+ <varlistentry>
+ <term>DRM_MODE_FLAG_POL_PIXDATA_POSEDGE</term>
+ <listitem><para>
+ Drive pixel data on rising edge, sample data on falling edge.
+ </para></listitem>
+ </varlistentry>
+ <varlistentry>
+ <term>DRM_MODE_FLAG_POL_DE_LOW</term>
+ <listitem><para>
+ data-enable pulse is active low
+ </para></listitem>
+ </varlistentry>
+ <varlistentry>
+ <term>DRM_MODE_FLAG_POL_DE_HIGH</term>
+ <listitem><para>
+ data-enable pulse is active low
+ </para></listitem>
+ </varlistentry>
+ </variablelist>
+ </para>
</listitem>
<listitem>
<synopsis>int (*mode_valid)(struct drm_connector *connector,
diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
index 91d0582..c5cbe31 100644
--- a/include/drm/drm_modes.h
+++ b/include/drm/drm_modes.h
@@ -93,6 +93,11 @@ enum drm_mode_status {
#define DRM_MODE_FLAG_3D_MAX DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
+#define DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE BIT(1)
+#define DRM_MODE_FLAG_POL_PIXDATA_POSEDGE BIT(2)
+#define DRM_MODE_FLAG_POL_DE_LOW BIT(3)
+#define DRM_MODE_FLAG_POL_DE_HIGH BIT(4)
+
struct drm_display_mode {
/* Header */
struct list_head head;
@@ -144,6 +149,7 @@ struct drm_display_mode {
int vrefresh; /* in Hz */
int hsync; /* in kHz */
enum hdmi_picture_aspect picture_aspect_ratio;
+ unsigned int pol_flags;
};
/* mode specified on the command line */
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 07/10] imx-drm: Use drm_display_mode timings flags.
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
` (4 preceding siblings ...)
2014-06-10 10:25 ` [PATCH v13 06/10] drm: drm_display_mode: add signal polarity flags Denis Carikli
@ 2014-06-10 10:25 ` Denis Carikli
2014-06-10 10:25 ` [PATCH v13 08/10] drm/panel: Add Eukrea mbimxsd51 displays Denis Carikli
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
The previous hardware behaviour was kept if the
flags are not set.
Signed-off-by: Denis Carikli <denis@eukrea.com>
---
ChangeLog v12->v13:
- This patch doesn't need the DRM_MODE_FLAG_POL_*_PRESERVE flags anymore.
- code cleanup to improve readability:
- ENABLE_POL_PRESERVE is now gone
- Less modifications in ipu_di_init_sync_panel
- more readable modifications in int ipu_crtc_mode_set
ChangeLog v11->v12:
- Rebased: It now uses the following new flags defines names:
CLK_POL, ENABLE_POL
- The inversions in ipuv3-crtc.c are now fixed.
- ipuv3-crtc.c was still using mode->private_flags
from the previous versions of this patchset, that's now fixed.
ChangeLog v10->v11:
- This patch was splitted-out and adapted from:
"Prepare imx-drm for extra display-timings retrival."
- The display-timings dt specific part was removed.
- The flags names were changed to use the DRM ones from:
"drm: drm_display_mode: add signal polarity flags"
---
drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h | 4 ++--
drivers/staging/imx-drm/ipu-v3/ipu-di.c | 2 ++
drivers/staging/imx-drm/ipuv3-crtc.c | 18 ++++++++++++++++--
3 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h
index 015e3bf..94b0d8e 100644
--- a/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h
+++ b/drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h
@@ -43,10 +43,10 @@ struct ipu_di_signal_cfg {
unsigned clksel_en:1;
unsigned clkidle_en:1;
unsigned data_pol:1; /* true = inverted */
- unsigned clk_pol:1;
- unsigned enable_pol:1;
unsigned Hsync_pol:1; /* true = active high */
unsigned Vsync_pol:1;
+ u8 clk_pol;
+ u8 enable_pol;
u16 width;
u16 height;
diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-di.c b/drivers/staging/imx-drm/ipu-v3/ipu-di.c
index 0ce3f52..faf08e2 100644
--- a/drivers/staging/imx-drm/ipu-v3/ipu-di.c
+++ b/drivers/staging/imx-drm/ipu-v3/ipu-di.c
@@ -597,6 +597,8 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig)
if (sig->clk_pol == CLK_POL_POSEDGE)
di_gen |= DI_GEN_POLARITY_DISP_CLK;
+ else if (sig->clk_pol == CLK_POL_NEGEDGE)
+ di_gen &= ~DI_GEN_POLARITY_DISP_CLK;
ipu_di_write(di, di_gen, DI_GENERAL);
diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c
index ba9eea3..10b46b5 100644
--- a/drivers/staging/imx-drm/ipuv3-crtc.c
+++ b/drivers/staging/imx-drm/ipuv3-crtc.c
@@ -165,8 +165,22 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc,
if (mode->flags & DRM_MODE_FLAG_PVSYNC)
sig_cfg.Vsync_pol = 1;
- sig_cfg.enable_pol = ENABLE_POL_HIGH;
- sig_cfg.clk_pol = CLK_POL_NEGEDGE;
+ if (mode->pol_flags & DRM_MODE_FLAG_POL_PIXDATA_POSEDGE)
+ sig_cfg.clk_pol = CLK_POL_POSEDGE;
+ else if (mode->pol_flags & DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE)
+ sig_cfg.clk_pol = CLK_POL_NEGEDGE;
+ else
+ /* If no PIXDATA flags were set, keep the old behaviour */
+ sig_cfg.clk_pol = CLK_POL_NEGEDGE;
+
+ if (mode->pol_flags & DRM_MODE_FLAG_POL_DE_HIGH)
+ sig_cfg.enable_pol = ENABLE_POL_HIGH;
+ else if (mode->pol_flags & DRM_MODE_FLAG_POL_DE_LOW)
+ sig_cfg.enable_pol = ENABLE_POL_LOW;
+ else
+ /* If no DE flags were set, keep the old behaviour */
+ sig_cfg.enable_pol = ENABLE_POL_HIGH;
+
sig_cfg.width = mode->hdisplay;
sig_cfg.height = mode->vdisplay;
sig_cfg.pixel_fmt = out_pixel_fmt;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 08/10] drm/panel: Add Eukrea mbimxsd51 displays.
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
` (5 preceding siblings ...)
2014-06-10 10:25 ` [PATCH v13 07/10] imx-drm: Use drm_display_mode timings flags Denis Carikli
@ 2014-06-10 10:25 ` Denis Carikli
2014-06-10 10:25 ` [PATCH v13 09/10] ARM: dts: mbimx51sd: Add display support Denis Carikli
2014-06-10 10:25 ` [PATCH v13 10/10] ARM: dts: mbimx51sd: Add CMO-QVGA backlight support Denis Carikli
8 siblings, 0 replies; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
Signed-off-by: Denis Carikli <denis@eukrea.com>
---
ChangeLog v12->v13:
- Added a note explaining why the size is zero in
the eukrea_mbimxsd51_dvi(s)vga structs.
ChangeLog v11->v12:
- Rebased: It now uses the new DRM_MODE_FLAG_POL_DE flags defines names
ChangeLog v10->v11:
- New patch.
---
.../bindings/panel/eukrea,mbimxsd51-cmo-qvga.txt | 7 ++
.../bindings/panel/eukrea,mbimxsd51-dvi-svga.txt | 7 ++
.../bindings/panel/eukrea,mbimxsd51-dvi-vga.txt | 7 ++
drivers/gpu/drm/panel/panel-simple.c | 83 ++++++++++++++++++++
4 files changed, 104 insertions(+)
create mode 100644 Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-cmo-qvga.txt
create mode 100644 Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-dvi-svga.txt
create mode 100644 Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-dvi-vga.txt
diff --git a/Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-cmo-qvga.txt b/Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-cmo-qvga.txt
new file mode 100644
index 0000000..03679d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-cmo-qvga.txt
@@ -0,0 +1,7 @@
+Eukrea CMO-QVGA (320x240 pixels) TFT LCD panel
+
+Required properties:
+- compatible: should be "eukrea,mbimxsd51-cmo-qvga"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-dvi-svga.txt b/Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-dvi-svga.txt
new file mode 100644
index 0000000..f408c9a
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-dvi-svga.txt
@@ -0,0 +1,7 @@
+Eukrea DVI-SVGA (800x600 pixels) DVI output.
+
+Required properties:
+- compatible: should be "eukrea,mbimxsd51-dvi-svga"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-dvi-vga.txt b/Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-dvi-vga.txt
new file mode 100644
index 0000000..8ea90da
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/eukrea,mbimxsd51-dvi-vga.txt
@@ -0,0 +1,7 @@
+Eukrea DVI-VGA (640x480 pixels) DVI output.
+
+Required properties:
+- compatible: should be "eukrea,mbimxsd51-dvi-vga"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index a251361..adc40a7 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -403,6 +403,80 @@ static const struct panel_desc edt_etm0700g0dh6 = {
},
};
+static const struct drm_display_mode eukrea_mbimxsd51_cmoqvga_mode = {
+ .clock = 6500,
+ .hdisplay = 320,
+ .hsync_start = 320 + 38,
+ .hsync_end = 320 + 38 + 20,
+ .htotal = 320 + 38 + 20 + 30,
+ .vdisplay = 240,
+ .vsync_start = 240 + 15,
+ .vsync_end = 240 + 15 + 4,
+ .vtotal = 240 + 15 + 4 + 3,
+ .vrefresh = 60,
+ .pol_flags = DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE |
+ DRM_MODE_FLAG_POL_DE_LOW,
+};
+
+static const struct panel_desc eukrea_mbimxsd51_cmoqvga = {
+ .modes = &eukrea_mbimxsd51_cmoqvga_mode,
+ .num_modes = 1,
+ .size = {
+ .width = 73,
+ .height = 56,
+ },
+};
+
+static const struct drm_display_mode eukrea_mbimxsd51_dvisvga_mode = {
+ .clock = 44333,
+ .hdisplay = 800,
+ .hsync_start = 800 + 112,
+ .hsync_end = 800 + 112 + 32,
+ .htotal = 800 + 112 + 32 + 80,
+ .vdisplay = 600,
+ .vsync_start = 600 + 3,
+ .vsync_end = 600 + 3 + 17,
+ .vtotal = 600 + 3 + 17 + 4,
+ .vrefresh = 60,
+ .pol_flags = DRM_MODE_FLAG_POL_PIXDATA_POSEDGE |
+ DRM_MODE_FLAG_POL_DE_HIGH,
+};
+
+static const struct panel_desc eukrea_mbimxsd51_dvisvga = {
+ .modes = &eukrea_mbimxsd51_dvisvga_mode,
+ .num_modes = 1,
+ /* This is a DVI adapter for external displays */
+ .size = {
+ .width = 0,
+ .height = 0,
+ },
+};
+
+static const struct drm_display_mode eukrea_mbimxsd51_dvivga_mode = {
+ .clock = 23750,
+ .hdisplay = 640,
+ .hsync_start = 640 + 80,
+ .hsync_end = 640 + 80 + 16,
+ .htotal = 640 + 80 + 16 + 64,
+ .vdisplay = 480,
+ .vsync_start = 480 + 3,
+ .vsync_end = 480 + 3 + 13,
+ .vtotal = 480 + 3 + 13 + 4,
+ .vrefresh = 60,
+ .pol_flags = DRM_MODE_FLAG_POL_PIXDATA_POSEDGE |
+ DRM_MODE_FLAG_POL_DE_HIGH,
+};
+
+static const struct panel_desc eukrea_mbimxsd51_dvivga = {
+ .modes = &eukrea_mbimxsd51_dvivga_mode,
+ .num_modes = 1,
+ /* This is a DVI adapter for external displays */
+ .size = {
+ .width = 0,
+ .height = 0,
+ },
+};
+
static const struct drm_display_mode lg_lp129qe_mode = {
.clock = 285250,
.hdisplay = 2560,
@@ -458,6 +532,15 @@ static const struct of_device_id platform_of_match[] = {
.compatible = "chunghwa,claa101wa01a",
.data = &chunghwa_claa101wa01a
}, {
+ .compatible = "eukrea,mbimxsd51-cmo-qvga",
+ .data = &eukrea_mbimxsd51_cmoqvga,
+ }, {
+ .compatible = "eukrea,mbimxsd51-dvi-svga",
+ .data = &eukrea_mbimxsd51_dvisvga,
+ }, {
+ .compatible = "eukrea,mbimxsd51-dvi-vga",
+ .data = &eukrea_mbimxsd51_dvivga,
+ }, {
.compatible = "chunghwa,claa101wb01",
.data = &chunghwa_claa101wb01
}, {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 09/10] ARM: dts: mbimx51sd: Add display support.
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
` (6 preceding siblings ...)
2014-06-10 10:25 ` [PATCH v13 08/10] drm/panel: Add Eukrea mbimxsd51 displays Denis Carikli
@ 2014-06-10 10:25 ` Denis Carikli
2014-06-10 10:25 ` [PATCH v13 10/10] ARM: dts: mbimx51sd: Add CMO-QVGA backlight support Denis Carikli
8 siblings, 0 replies; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
The CMO-QVGA, DVI-SVGA and DVI-VGA are added.
Signed-off-by: Denis Carikli <denis@eukrea.com>
---
ChangeLog v10->v13:
- Rebased
- Removed enable-active-high in reg_lcd_3v3: its GPIO
already has the GPIO_ACTIVE_HIGH flag.
Without this removal, the display was off at boot
and powering it off and on was necessary to get an
image on it after the boot.
ChangeLog v10->v11:
- Now uses the drm-panel instead of the display-timings.
This is to get regulator support, which is lacking in
the imx-drm driver when using the display-timings.
ChangeLog v9->v10:
- Rebased
- Now enables the cmo-qvga regulator at boot.
ChangeLog v8->v9:
- Removed the Cc. They are now set in git-send-email directly.
- updated pixelclk-active after the following patch:
"imx-drm: Match ipu_di_signal_cfg's clk_pol with its description."
ChangeLog v7->v8:
- Rebased the patch: added the now required imx-drm node.
- Adapted the svga clock-frequency value in order to still
be able to display an image after the following commit:
"imx-drm: ipu-v3: more inteligent DI clock selection"
ChangeLog v6->v7:
- Shrinked even more the Cc list.
- Since the pingrp headers were removed, the references
to it where replaced by the actual pins.
- Added the targets to arch/arm/boot/dts/Makefile
ChangeLog v5->v6:
- Reordered the Cc list.
ChangeLog v3->v5:
- Updated to new GPIO defines.
- Updated to new licenses checkpatch requirements.
- one whitespace cleanup.
ChangeLog v2->v3:
- Splitted out from the patch that added support for the cpuimx51/mbimxsd51 boards.
- This patch now only adds display support.
- Added some interested people in the Cc list, and removed some people that
might be annoyed by the receiving of that patch which is unrelated to their
subsystem.
- rebased and reworked the dts displays addition.
- Also rebased and reworked the fsl,pins usage.
---
arch/arm/boot/dts/Makefile | 3 ++
.../imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts | 40 ++++++++++++++++
.../imx51-eukrea-mbimxsd51-baseboard-dvi-svga.dts | 28 +++++++++++
.../imx51-eukrea-mbimxsd51-baseboard-dvi-vga.dts | 28 +++++++++++
.../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts | 49 ++++++++++++++++++++
5 files changed, 148 insertions(+)
create mode 100644 arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts
create mode 100644 arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-dvi-svga.dts
create mode 100644 arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-dvi-vga.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0f1e8be..f0ec7b7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -177,6 +177,9 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx51-babbage.dtb \
imx51-digi-connectcore-jsk.dtb \
imx51-eukrea-mbimxsd51-baseboard.dtb \
+ imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dtb \
+ imx51-eukrea-mbimxsd51-baseboard-dvi-svga.dtb \
+ imx51-eukrea-mbimxsd51-baseboard-dvi-vga.dtb \
imx53-ard.dtb \
imx53-m53evk.dtb \
imx53-mba53.dtb \
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts
new file mode 100644
index 0000000..d273d09
--- /dev/null
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts
@@ -0,0 +1,40 @@
+/*
+ * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "imx51-eukrea-mbimxsd51-baseboard.dts"
+
+/ {
+ model = "Eukrea MBIMXSD51 with the CMO-QVGA Display";
+ compatible = "eukrea,mbimxsd51-baseboard-cmo-qvga", "eukrea,mbimxsd51-baseboard", "eukrea,cpuimx51", "fsl,imx51";
+
+ panel: panel {
+ compatible = "eukrea,mbimxsd51-cmo-qvga", "simple-panel";
+ power-supply = <®_lcd_3v3>;
+ };
+
+ reg_lcd_3v3: lcd-en {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
+ regulator-name = "lcd-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+ regulator-boot-on;
+ };
+};
+
+&display {
+ status = "okay";
+ fsl,panel = <&panel>;
+};
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-dvi-svga.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-dvi-svga.dts
new file mode 100644
index 0000000..323ebf4
--- /dev/null
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-dvi-svga.dts
@@ -0,0 +1,28 @@
+/*
+ * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "imx51-eukrea-mbimxsd51-baseboard.dts"
+
+/ {
+ model = "Eukrea MBIMXSD51 with the DVI-SVGA Display";
+ compatible = "eukrea,mbimxsd51-baseboard-dvi-svga", "eukrea,mbimxsd51-baseboard", "eukrea,cpuimx51", "fsl,imx51";
+
+ panel: panel {
+ compatible = "eukrea,mbimxsd51-dvi-svga", "simple-panel";
+ };
+};
+
+&display {
+ status = "okay";
+ fsl,panel = <&panel>;
+};
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-dvi-vga.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-dvi-vga.dts
new file mode 100644
index 0000000..f065500
--- /dev/null
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-dvi-vga.dts
@@ -0,0 +1,28 @@
+/*
+ * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "imx51-eukrea-mbimxsd51-baseboard.dts"
+
+/ {
+ model = "Eukrea MBIMXSD51 with the DVI-VGA Display";
+ compatible = "eukrea,mbimxsd51-baseboard-dvi-vga", "eukrea,mbimxsd51-baseboard", "eukrea,cpuimx51", "fsl,imx51";
+
+ panel: panel {
+ compatible = "eukrea,mbimxsd51-dvi-vga", "simple-panel";
+ };
+};
+
+&display {
+ status = "okay";
+ fsl,panel = <&panel>;
+};
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
index 75e66c9..02ff24a 100644
--- a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
@@ -32,6 +32,20 @@
};
};
+ display: display@di0 {
+ compatible = "fsl,imx-parallel-display";
+ interface-pix-fmt = "rgb666";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu_disp1>;
+ status = "disabled";
+
+ port {
+ display0_in: endpoint {
+ remote-endpoint = <&ipu_di0_disp0>;
+ };
+ };
+ };
+
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
@@ -222,6 +236,37 @@
>;
};
+ pinctrl_ipu_disp1: ipudisp1grp {
+ fsl,pins = <
+ MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
+ MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
+ MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
+ MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
+ MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
+ MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
+ MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
+ MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
+ MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
+ MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
+ MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
+ MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
+ MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
+ MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
+ MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
+ MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
+ MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
+ MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
+ MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
+ MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
+ MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
+ MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
+ MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
+ MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
+ MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
+ MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
+ >;
+ };
+
pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
fsl,pins = <
MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
@@ -253,6 +298,10 @@
};
};
+&ipu_di0_disp0 {
+ remote-endpoint = <&display0_in>;
+};
+
&ssi2 {
codec-handle = <&tlv320aic23>;
fsl,mode = "i2s-slave";
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v13 10/10] ARM: dts: mbimx51sd: Add CMO-QVGA backlight support.
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
` (7 preceding siblings ...)
2014-06-10 10:25 ` [PATCH v13 09/10] ARM: dts: mbimx51sd: Add display support Denis Carikli
@ 2014-06-10 10:25 ` Denis Carikli
8 siblings, 0 replies; 11+ messages in thread
From: Denis Carikli @ 2014-06-10 10:25 UTC (permalink / raw)
To: Philipp Zabel
Cc: Eric Bénard, Shawn Guo, Sascha Hauer, linux-arm-kernel,
Greg Kroah-Hartman, devel, Mauro Carvalho Chehab, Russell King,
linux-media, Laurent Pinchart, dri-devel, David Airlie,
Denis Carikli
Signed-off-by: Denis Carikli <denis@eukrea.com>
---
ChangeLog v11->v13:
- No changes
ChangeLog v9->v11:
- Now uses the drm-panel instead of the display-timings.
ChangeLog v8->v9:
- Removed the Cc. They are now set in git-send-email directly.
- The backlight is now on at boot.
ChangeLog v6->v7:
- Shrinked even more the Cc list.
ChangeLog v5->v6:
- Reordered the Cc list.
ChangeLog v3->v5:
- Updated to the new GPIO defines.
ChangeLog v2->v3:
- Splitted out from the patch that added support for the cpuimx51/mbimxsd51 boards.
- This patch now only adds backlight support.
- Added some interested people in the Cc list, and removed some people that
might be annoyed by the receiving of that patch which is unrelated to their
subsystem.
---
.../imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts
index d273d09..6e36dae 100644
--- a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard-cmo-qvga.dts
@@ -17,9 +17,19 @@
model = "Eukrea MBIMXSD51 with the CMO-QVGA Display";
compatible = "eukrea,mbimxsd51-baseboard-cmo-qvga", "eukrea,mbimxsd51-baseboard", "eukrea,cpuimx51", "fsl,imx51";
+ backlight: backlight {
+ compatible = "gpio-backlight";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_backlight_1>;
+ gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
+ default-brightness-level = <1>;
+ default-on;
+ };
+
panel: panel {
compatible = "eukrea,mbimxsd51-cmo-qvga", "simple-panel";
power-supply = <®_lcd_3v3>;
+ backlight = <&backlight>;
};
reg_lcd_3v3: lcd-en {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v13 06/10] drm: drm_display_mode: add signal polarity flags
2014-06-10 10:25 ` [PATCH v13 06/10] drm: drm_display_mode: add signal polarity flags Denis Carikli
@ 2014-06-12 23:46 ` Laurent Pinchart
0 siblings, 0 replies; 11+ messages in thread
From: Laurent Pinchart @ 2014-06-12 23:46 UTC (permalink / raw)
To: Denis Carikli
Cc: Philipp Zabel, Eric Bénard, Shawn Guo, Sascha Hauer,
linux-arm-kernel, Greg Kroah-Hartman, devel,
Mauro Carvalho Chehab, Russell King, linux-media, dri-devel,
David Airlie
Hi Denis,
Thank you for the patch.
On Tuesday 10 June 2014 12:25:47 Denis Carikli wrote:
> We need a way to pass signal polarity informations
> between DRM panels, and the display drivers.
>
> To do that, a pol_flags field was added to drm_display_mode.
>
> Signed-off-by: Denis Carikli <denis@eukrea.com>
> ---
> ChangeLog v12->v13:
> - Added Docbook documentation for pol_flags the struct field.
> - Removed the _PRESERVE defines: it was used by patches
> against the imx_drm driver. Now theses patches have been
> adapted not to require that defines.
> ChangeLog v11->v12:
> - Rebased: This patch now applies against drm_modes.h
> - Rebased: It now uses the new DRM_MODE_FLAG_POL_DE flags defines names
>
> ChangeLog v10->v11:
> - Since the imx-drm won't be able to retrive its regulators
> from the device tree when using display-timings nodes,
> and that I was told that the drm simple-panel driver
> already supported that, I then, instead, added what was
> lacking to make the eukrea displays work with the
> drm-simple-panel driver.
>
> That required a way to get back the display polarity
> informations from the imx-drm driver without affecting
> userspace.
> ---
> Documentation/DocBook/drm.tmpl | 30 ++++++++++++++++++++++++++++++
> include/drm/drm_modes.h | 6 ++++++
> 2 files changed, 36 insertions(+)
>
> diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
> index c526d81..29c0e5a 100644
> --- a/Documentation/DocBook/drm.tmpl
> +++ b/Documentation/DocBook/drm.tmpl
> @@ -2292,6 +2292,36 @@ void intel_crt_init(struct drm_device *dev)
> and <structfield>height_mm</structfield> fields are only used
> internally during EDID parsing and should not be set when creating modes
> manually. </para>
> + <para>
> + The <structfield>pol_flags</structfield> value represents the
> display
> + signal polarity flags, it can be a combination of
> + <variablelist>
> + <varlistentry>
> + <term>DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE</term>
> + <listitem><para>
> + drive pixel data on falling edge, sample data on
> rising edge.
> + </para></listitem>
> + </varlistentry>
> + <varlistentry>
> + <term>DRM_MODE_FLAG_POL_PIXDATA_POSEDGE</term>
> + <listitem><para>
> + Drive pixel data on rising edge, sample data on falling
> edge.
> + </para></listitem>
> + </varlistentry>
> + <varlistentry>
> + <term>DRM_MODE_FLAG_POL_DE_LOW</term>
> + <listitem><para>
> + data-enable pulse is active low
> + </para></listitem>
> + </varlistentry>
> + <varlistentry>
> + <term>DRM_MODE_FLAG_POL_DE_HIGH</term>
> + <listitem><para>
> + data-enable pulse is active low
I assume you mean active high here.
> + </para></listitem>
> + </varlistentry>
> + </variablelist>
> + </para>
> </listitem>
> <listitem>
> <synopsis>int (*mode_valid)(struct drm_connector *connector,
> diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
> index 91d0582..c5cbe31 100644
> --- a/include/drm/drm_modes.h
> +++ b/include/drm/drm_modes.h
> @@ -93,6 +93,11 @@ enum drm_mode_status {
>
> #define DRM_MODE_FLAG_3D_MAX DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
>
> +#define DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE BIT(1)
> +#define DRM_MODE_FLAG_POL_PIXDATA_POSEDGE BIT(2)
> +#define DRM_MODE_FLAG_POL_DE_LOW BIT(3)
> +#define DRM_MODE_FLAG_POL_DE_HIGH BIT(4)
> +
> struct drm_display_mode {
> /* Header */
> struct list_head head;
> @@ -144,6 +149,7 @@ struct drm_display_mode {
> int vrefresh; /* in Hz */
> int hsync; /* in kHz */
> enum hdmi_picture_aspect picture_aspect_ratio;
> + unsigned int pol_flags;
> };
>
> /* mode specified on the command line */
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2014-06-12 23:45 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-06-10 10:25 [PATCH v13 01/10] [media] v4l2: add new V4L2_PIX_FMT_RGB666 pixel format Denis Carikli
2014-06-10 10:25 ` [PATCH v13 02/10] imx-drm: Add RGB666 support for parallel display Denis Carikli
2014-06-10 10:25 ` [PATCH v13 03/10] imx-drm: Correct BGR666 and the board's dts that use them Denis Carikli
2014-06-10 10:25 ` [PATCH v13 04/10] imx-drm: use defines for clock polarity settings Denis Carikli
2014-06-10 10:25 ` [PATCH v13 05/10] ARM: dts: imx5*, imx6*: correct display-timings nodes Denis Carikli
2014-06-10 10:25 ` [PATCH v13 06/10] drm: drm_display_mode: add signal polarity flags Denis Carikli
2014-06-12 23:46 ` Laurent Pinchart
2014-06-10 10:25 ` [PATCH v13 07/10] imx-drm: Use drm_display_mode timings flags Denis Carikli
2014-06-10 10:25 ` [PATCH v13 08/10] drm/panel: Add Eukrea mbimxsd51 displays Denis Carikli
2014-06-10 10:25 ` [PATCH v13 09/10] ARM: dts: mbimx51sd: Add display support Denis Carikli
2014-06-10 10:25 ` [PATCH v13 10/10] ARM: dts: mbimx51sd: Add CMO-QVGA backlight support Denis Carikli
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