* [PATCH 1/4] dt-bindings: media: sun6i: Add A31 and H3 compatibles
2018-03-05 10:04 [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller Maxime Ripard
@ 2018-03-05 10:04 ` Maxime Ripard
2018-03-07 21:59 ` Rob Herring
2018-03-05 10:04 ` [PATCH 2/4] media: sun6i: Add A31 compatible Maxime Ripard
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Maxime Ripard @ 2018-03-05 10:04 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Yong Deng
Cc: Mark Rutland, Rob Herring, devicetree, linux-media,
Thomas Petazzoni, Mylene Josserand, Hans Verkuil, Sakari Ailus,
linux-arm-kernel, Chen-Yu Tsai, Maxime Ripard
The H3 has a slightly different CSI controller (no BT656, no CCI) which
looks a lot like the original A31 controller. Add a compatible for the A31,
and more specific compatible the for the H3 to be used in combination for
the A31.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
Documentation/devicetree/bindings/media/sun6i-csi.txt | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/sun6i-csi.txt b/Documentation/devicetree/bindings/media/sun6i-csi.txt
index 2ff47a9507a6..18a5b3068b25 100644
--- a/Documentation/devicetree/bindings/media/sun6i-csi.txt
+++ b/Documentation/devicetree/bindings/media/sun6i-csi.txt
@@ -5,7 +5,10 @@ Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
interface and CSI1 is used for parallel interface.
Required properties:
- - compatible: value must be "allwinner,sun8i-v3s-csi"
+ - compatible: value must be one of:
+ * "allwinner,sun6i-a31-csi", along with, optionally:
+ + "allwinner,sun8i-h3-csi"
+ * "allwinner,sun8i-v3s-csi"
- reg: base address and size of the memory-mapped region.
- interrupts: interrupt associated to this IP
- clocks: phandles to the clocks feeding the CSI
--
2.14.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/4] dt-bindings: media: sun6i: Add A31 and H3 compatibles
2018-03-05 10:04 ` [PATCH 1/4] dt-bindings: media: sun6i: Add A31 and H3 compatibles Maxime Ripard
@ 2018-03-07 21:59 ` Rob Herring
0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2018-03-07 21:59 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mauro Carvalho Chehab, Yong Deng, Mark Rutland, devicetree,
linux-media, Thomas Petazzoni, Mylene Josserand, Hans Verkuil,
Sakari Ailus, linux-arm-kernel, Chen-Yu Tsai
On Mon, Mar 05, 2018 at 11:04:29AM +0100, Maxime Ripard wrote:
> The H3 has a slightly different CSI controller (no BT656, no CCI) which
> looks a lot like the original A31 controller. Add a compatible for the A31,
> and more specific compatible the for the H3 to be used in combination for
> the A31.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
> ---
> Documentation/devicetree/bindings/media/sun6i-csi.txt | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 2/4] media: sun6i: Add A31 compatible
2018-03-05 10:04 [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller Maxime Ripard
2018-03-05 10:04 ` [PATCH 1/4] dt-bindings: media: sun6i: Add A31 and H3 compatibles Maxime Ripard
@ 2018-03-05 10:04 ` Maxime Ripard
2018-03-05 10:04 ` [PATCH 3/4] ARM: dts: sun8i: Add the H3/H5 CSI controller Maxime Ripard
` (2 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Maxime Ripard @ 2018-03-05 10:04 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Yong Deng
Cc: Mark Rutland, Rob Herring, devicetree, linux-media,
Thomas Petazzoni, Mylene Josserand, Hans Verkuil, Sakari Ailus,
linux-arm-kernel, Chen-Yu Tsai, Maxime Ripard
The first device that used that IP was the A31. Add it to our list of
compatibles.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
index 26d57e6053df..b05265f8edb5 100644
--- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
+++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
@@ -916,6 +916,7 @@ static int sun6i_csi_remove(struct platform_device *pdev)
}
static const struct of_device_id sun6i_csi_of_match[] = {
+ { .compatible = "allwinner,sun6i-a31-csi", },
{ .compatible = "allwinner,sun8i-v3s-csi", },
{},
};
--
2.14.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/4] ARM: dts: sun8i: Add the H3/H5 CSI controller
2018-03-05 10:04 [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller Maxime Ripard
2018-03-05 10:04 ` [PATCH 1/4] dt-bindings: media: sun6i: Add A31 and H3 compatibles Maxime Ripard
2018-03-05 10:04 ` [PATCH 2/4] media: sun6i: Add A31 compatible Maxime Ripard
@ 2018-03-05 10:04 ` Maxime Ripard
2018-03-05 10:04 ` [PATCH 4/4] [DO NOT MERGE] ARM: dts: sun8i: Add CAM500B camera module to the Nano Pi M1+ Maxime Ripard
2018-06-26 6:11 ` [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller Jagan Teki
4 siblings, 0 replies; 10+ messages in thread
From: Maxime Ripard @ 2018-03-05 10:04 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Yong Deng
Cc: Mark Rutland, Rob Herring, devicetree, linux-media,
Thomas Petazzoni, Mylene Josserand, Hans Verkuil, Sakari Ailus,
linux-arm-kernel, Chen-Yu Tsai, Maxime Ripard
From: Mylène Josserand <mylene.josserand@bootlin.com>
The H3 and H5 features the same CSI controller that was initially found on
the A31.
Add a DT node for it.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 7a83b15225c7..fc538fd8282a 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -325,6 +325,13 @@
interrupt-controller;
#interrupt-cells = <3>;
+ csi_pins: csi {
+ pins = "PE0", "PE1", "PE2", "PE3", "PE4",
+ "PE5", "PE6", "PE7", "PE8", "PE9",
+ "PE10", "PE11";
+ function = "csi";
+ };
+
emac_rgmii_pins: emac0 {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
@@ -684,6 +691,21 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ csi: camera@1cb0000 {
+ compatible = "allwinner,sun8i-h3-csi",
+ "allwinner,sun6i-a31-csi";
+ reg = <0x01cb0000 0x1000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CSI>,
+ <&ccu CLK_CSI_SCLK>,
+ <&ccu CLK_DRAM_CSI>;
+ clock-names = "bus", "mod", "ram";
+ resets = <&ccu RST_BUS_CSI>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&csi_pins>;
+ status = "disabled";
+ };
+
rtc: rtc@1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
--
2.14.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/4] [DO NOT MERGE] ARM: dts: sun8i: Add CAM500B camera module to the Nano Pi M1+
2018-03-05 10:04 [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller Maxime Ripard
` (2 preceding siblings ...)
2018-03-05 10:04 ` [PATCH 3/4] ARM: dts: sun8i: Add the H3/H5 CSI controller Maxime Ripard
@ 2018-03-05 10:04 ` Maxime Ripard
2018-06-26 6:11 ` [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller Jagan Teki
4 siblings, 0 replies; 10+ messages in thread
From: Maxime Ripard @ 2018-03-05 10:04 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Yong Deng
Cc: Mark Rutland, Rob Herring, devicetree, linux-media,
Thomas Petazzoni, Mylene Josserand, Hans Verkuil, Sakari Ailus,
linux-arm-kernel, Chen-Yu Tsai, Maxime Ripard
From: Mylène Josserand <mylene.josserand@bootlin.com>
The Nano Pi M1+ comes with an optional sensor based on the ov5640 from
Omnivision. Enable the support for it in the DT.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 85 +++++++++++++++++++++++++++
1 file changed, 85 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index d7b6e1ac541a..a2d1c6bb8406 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -52,6 +52,37 @@
ethernet1 = &sdio_wifi;
};
+ cam_xclk: cam-xclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "cam-xclk";
+ };
+
+ reg_cam_avdd: cam-avdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-avdd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ vin-supply = <®_vcc3v3>;
+ };
+
+ reg_cam_dovdd: cam-dovdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-dovdd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <®_vcc3v3>;
+ };
+
+ reg_cam_dvdd: cam-dvdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-dvdd";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ vin-supply = <®_vcc3v3>;
+ };
+
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
@@ -69,6 +100,26 @@
};
};
+&csi {
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Parallel bus endpoint */
+ csi_from_ov5640: endpoint {
+ remote-endpoint = <&ov5640_to_csi>;
+ bus-width = <8>;
+ data-shift = <2>;
+ hsync-active = <1>; /* Active high */
+ vsync-active = <0>; /* Active low */
+ data-active = <1>; /* Active high */
+ pclk-sample = <1>; /* Rising */
+ };
+ };
+};
+
&ehci1 {
status = "okay";
};
@@ -94,6 +145,40 @@
};
};
+&i2c2 {
+ status = "okay";
+
+ ov5640: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&cam_xclk>;
+ clock-names = "xclk";
+
+ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>;
+ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
+ AVDD-supply = <®_cam_avdd>;
+ DOVDD-supply = <®_cam_dovdd>;
+ DVDD-supply = <®_cam_dvdd>;
+
+ port {
+ ov5640_to_csi: endpoint {
+ remote-endpoint = <&csi_from_ov5640>;
+ bus-width = <8>;
+ data-shift = <2>;
+ hsync-active = <1>; /* Active high */
+ vsync-active = <0>; /* Active low */
+ data-active = <1>; /* Active high */
+ pclk-sample = <1>; /* Rising */
+ };
+ };
+ };
+
+};
+
+&i2c2_pins {
+ bias-pull-up;
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
--
2.14.3
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller
2018-03-05 10:04 [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller Maxime Ripard
` (3 preceding siblings ...)
2018-03-05 10:04 ` [PATCH 4/4] [DO NOT MERGE] ARM: dts: sun8i: Add CAM500B camera module to the Nano Pi M1+ Maxime Ripard
@ 2018-06-26 6:11 ` Jagan Teki
2018-06-26 8:23 ` Maxime Ripard
4 siblings, 1 reply; 10+ messages in thread
From: Jagan Teki @ 2018-06-26 6:11 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mauro Carvalho Chehab, Yong Deng, Mark Rutland, Rob Herring,
devicetree, linux-media, Thomas Petazzoni, Mylene Josserand,
Hans Verkuil, Sakari Ailus, linux-arm-kernel, Chen-Yu Tsai
On Mon, Mar 5, 2018 at 3:34 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> Hi,
>
> The H3 and H5 have a CSI controller based on the one previously found
> in the A31, that is currently supported by the sun6i-csi driver.
>
> Add the compatibles to the device tree bindings and to the driver to
> make it work properly.
>
> This obviously depends on the serie "Initial Allwinner V3s CSI
> Support" by Yong Deng.
>
> Let me know what you think,
> Maxime
>
> Maxime Ripard (2):
> dt-bindings: media: sun6i: Add A31 and H3 compatibles
> media: sun6i: Add A31 compatible
>
> Mylène Josserand (2):
> ARM: dts: sun8i: Add the H3/H5 CSI controller
> [DO NOT MERGE] ARM: dts: sun8i: Add CAM500B camera module to the Nano
> Pi M1+
Just trying to understand what interface has been tested with npi-m1+,
is it DVP (parallel) interface? I've Bananapi 5MP[1] and trying to
test on top, and look like its MIPI CSI2. I guess Yong patch[2]
doesn't support CSI2 yet, am I correct?
[1] https://www.amazon.in/Generic-V3-0-BPI-M3-camera-chipset/dp/B0727N5CD1
[2] https://patchwork.kernel.org/patch/10380067/
Jagan.
--
Jagan Teki
Senior Linux Kernel Engineer | Amarula Solutions
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller
2018-06-26 6:11 ` [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller Jagan Teki
@ 2018-06-26 8:23 ` Maxime Ripard
2018-06-26 9:12 ` Jagan Teki
0 siblings, 1 reply; 10+ messages in thread
From: Maxime Ripard @ 2018-06-26 8:23 UTC (permalink / raw)
To: Jagan Teki
Cc: Mauro Carvalho Chehab, Yong Deng, Mark Rutland, Rob Herring,
devicetree, linux-media, Thomas Petazzoni, Mylene Josserand,
Hans Verkuil, Sakari Ailus, linux-arm-kernel, Chen-Yu Tsai
Hi,
On Tue, Jun 26, 2018 at 11:41:56AM +0530, Jagan Teki wrote:
> On Mon, Mar 5, 2018 at 3:34 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > The H3 and H5 have a CSI controller based on the one previously found
> > in the A31, that is currently supported by the sun6i-csi driver.
> >
> > Add the compatibles to the device tree bindings and to the driver to
> > make it work properly.
> >
> > This obviously depends on the serie "Initial Allwinner V3s CSI
> > Support" by Yong Deng.
> >
> > Let me know what you think,
> > Maxime
> >
> > Maxime Ripard (2):
> > dt-bindings: media: sun6i: Add A31 and H3 compatibles
> > media: sun6i: Add A31 compatible
> >
> > Mylène Josserand (2):
> > ARM: dts: sun8i: Add the H3/H5 CSI controller
> > [DO NOT MERGE] ARM: dts: sun8i: Add CAM500B camera module to the Nano
> > Pi M1+
>
> Just trying to understand what interface has been tested with npi-m1+,
> is it DVP (parallel) interface?
Yes
> I've Bananapi 5MP[1] and trying to test on top, and look like its
> MIPI CSI2. I guess Yong patch[2] doesn't support CSI2 yet, am I
> correct?
This is what Yong's cover letter is saying yes :)
The name Allwinner chose for this IP is very unfortunate...
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller
2018-06-26 8:23 ` Maxime Ripard
@ 2018-06-26 9:12 ` Jagan Teki
2018-06-26 11:08 ` Maxime Ripard
0 siblings, 1 reply; 10+ messages in thread
From: Jagan Teki @ 2018-06-26 9:12 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mauro Carvalho Chehab, Yong Deng, Mark Rutland, Rob Herring,
devicetree, linux-media, Thomas Petazzoni, Mylene Josserand,
Hans Verkuil, Sakari Ailus, linux-arm-kernel, Chen-Yu Tsai
On Tue, Jun 26, 2018 at 1:53 PM, Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
> Hi,
>
> On Tue, Jun 26, 2018 at 11:41:56AM +0530, Jagan Teki wrote:
>> On Mon, Mar 5, 2018 at 3:34 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>> > The H3 and H5 have a CSI controller based on the one previously found
>> > in the A31, that is currently supported by the sun6i-csi driver.
>> >
>> > Add the compatibles to the device tree bindings and to the driver to
>> > make it work properly.
>> >
>> > This obviously depends on the serie "Initial Allwinner V3s CSI
>> > Support" by Yong Deng.
>> >
>> > Let me know what you think,
>> > Maxime
>> >
>> > Maxime Ripard (2):
>> > dt-bindings: media: sun6i: Add A31 and H3 compatibles
>> > media: sun6i: Add A31 compatible
>> >
>> > Mylène Josserand (2):
>> > ARM: dts: sun8i: Add the H3/H5 CSI controller
>> > [DO NOT MERGE] ARM: dts: sun8i: Add CAM500B camera module to the Nano
>> > Pi M1+
>>
>> Just trying to understand what interface has been tested with npi-m1+,
>> is it DVP (parallel) interface?
>
> Yes
>
>> I've Bananapi 5MP[1] and trying to test on top, and look like its
>> MIPI CSI2. I guess Yong patch[2] doesn't support CSI2 yet, am I
>> correct?
>
> This is what Yong's cover letter is saying yes :)
Thanks, and this ov5640 tested on -next or any specific code? please
provide if you have different code base.
Jagan.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/4] media: sun6i: Add support for the H3 CSI controller
2018-06-26 9:12 ` Jagan Teki
@ 2018-06-26 11:08 ` Maxime Ripard
0 siblings, 0 replies; 10+ messages in thread
From: Maxime Ripard @ 2018-06-26 11:08 UTC (permalink / raw)
To: Jagan Teki
Cc: Mauro Carvalho Chehab, Yong Deng, Mark Rutland, Rob Herring,
devicetree, linux-media, Thomas Petazzoni, Mylene Josserand,
Hans Verkuil, Sakari Ailus, linux-arm-kernel, Chen-Yu Tsai
On Tue, Jun 26, 2018 at 02:42:11PM +0530, Jagan Teki wrote:
> On Tue, Jun 26, 2018 at 1:53 PM, Maxime Ripard
> <maxime.ripard@bootlin.com> wrote:
> > Hi,
> >
> > On Tue, Jun 26, 2018 at 11:41:56AM +0530, Jagan Teki wrote:
> >> On Mon, Mar 5, 2018 at 3:34 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> >> > The H3 and H5 have a CSI controller based on the one previously found
> >> > in the A31, that is currently supported by the sun6i-csi driver.
> >> >
> >> > Add the compatibles to the device tree bindings and to the driver to
> >> > make it work properly.
> >> >
> >> > This obviously depends on the serie "Initial Allwinner V3s CSI
> >> > Support" by Yong Deng.
> >> >
> >> > Let me know what you think,
> >> > Maxime
> >> >
> >> > Maxime Ripard (2):
> >> > dt-bindings: media: sun6i: Add A31 and H3 compatibles
> >> > media: sun6i: Add A31 compatible
> >> >
> >> > Mylène Josserand (2):
> >> > ARM: dts: sun8i: Add the H3/H5 CSI controller
> >> > [DO NOT MERGE] ARM: dts: sun8i: Add CAM500B camera module to the Nano
> >> > Pi M1+
> >>
> >> Just trying to understand what interface has been tested with npi-m1+,
> >> is it DVP (parallel) interface?
> >
> > Yes
> >
> >> I've Bananapi 5MP[1] and trying to test on top, and look like its
> >> MIPI CSI2. I guess Yong patch[2] doesn't support CSI2 yet, am I
> >> correct?
> >
> > This is what Yong's cover letter is saying yes :)
>
> Thanks, and this ov5640 tested on -next or any specific code? please
> provide if you have different code base.
It should work with the current ov5640 driver.
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 10+ messages in thread