From: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
To: linux-media@vger.kernel.org, dafna.hirschfeld@collabora.com,
helen.koike@collabora.com, ezequiel@collabora.com,
hverkuil@xs4all.nl, kernel@collabora.com, dafna3@gmail.com,
sakari.ailus@linux.intel.com, linux-rockchip@lists.infradead.org,
mchehab@kernel.org, laurent.pinchart@ideasonboard.com
Subject: [PATCH 2/4] media: staging: rkisp1: cap: support uv swap only for semiplanar formats
Date: Thu, 26 Mar 2020 21:16:08 +0100 [thread overview]
Message-ID: <20200326201610.31762-3-dafna.hirschfeld@collabora.com> (raw)
In-Reply-To: <20200326201610.31762-1-dafna.hirschfeld@collabora.com>
The register RKISP1_CIF_MI_XTD_FORMAT_CTRL is relevant only
for semiplanar formats, therefore the uv swap can be supported
through this register only for semiplanar formats.
Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
---
drivers/staging/media/rkisp1/rkisp1-capture.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/media/rkisp1/rkisp1-capture.c b/drivers/staging/media/rkisp1/rkisp1-capture.c
index 84a3cf565106..fa2849209433 100644
--- a/drivers/staging/media/rkisp1/rkisp1-capture.c
+++ b/drivers/staging/media/rkisp1/rkisp1-capture.c
@@ -37,6 +37,10 @@
#define RKISP1_MIN_BUFFERS_NEEDED 3
+#define RKISP1_IS_SEMI_PLANAR(write_format) \
+ (((write_format) == RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA) || \
+ ((write_format) == RKISP1_MI_CTRL_SP_WRITE_SPLA))
+
enum rkisp1_plane {
RKISP1_PLANE_Y = 0,
RKISP1_PLANE_CB = 1,
@@ -429,7 +433,8 @@ static void rkisp1_mp_config(struct rkisp1_capture *cap)
cap->config->mi.cr_size_init);
rkisp1_irq_frame_end_enable(cap);
- if (cap->pix.cfg->uv_swap) {
+ if (RKISP1_IS_SEMI_PLANAR(cap->pix.cfg->write_format) &&
+ cap->pix.cfg->uv_swap) {
reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL);
reg = reg | RKISP1_CIF_MI_XTD_FMT_CTRL_MP_CB_CR_SWAP;
@@ -466,7 +471,8 @@ static void rkisp1_sp_config(struct rkisp1_capture *cap)
rkisp1_write(rkisp1, cap->sp_y_stride, RKISP1_CIF_MI_SP_Y_LLENGTH);
rkisp1_irq_frame_end_enable(cap);
- if (cap->pix.cfg->uv_swap) {
+ if (RKISP1_IS_SEMI_PLANAR(cap->pix.cfg->write_format) &&
+ cap->pix.cfg->uv_swap) {
u32 reg = rkisp1_read(rkisp1, RKISP1_CIF_MI_XTD_FORMAT_CTRL);
reg = reg | RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP;
--
2.17.1
next prev parent reply other threads:[~2020-03-26 20:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-26 20:16 [PATCH 0/4] media: staging: rkisp1: cap: various fixes for capture formats Dafna Hirschfeld
2020-03-26 20:16 ` [PATCH 1/4] media: staging: rkisp1: cap: fix issues when writing to uv swap register Dafna Hirschfeld
2020-03-30 19:11 ` Helen Koike
2020-03-26 20:16 ` Dafna Hirschfeld [this message]
2020-03-30 19:12 ` [PATCH 2/4] media: staging: rkisp1: cap: support uv swap only for semiplanar formats Helen Koike
2020-03-26 20:16 ` [PATCH 3/4] media: staging: rkisp1: cap: support uv swapped plane formats Dafna Hirschfeld
2020-03-30 19:13 ` Helen Koike
2020-03-26 20:16 ` [PATCH 4/4] media: staging: rkisp1: cap: remove unsupported formats Dafna Hirschfeld
2020-03-30 19:20 ` Helen Koike
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