From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: linux-media@vger.kernel.org
Cc: Rui Miguel Silva <rmfrfs@gmail.com>,
Steve Longerbeam <slongerbeam@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Ezequiel Garcia <ezequiel@collabora.com>,
Fabio Estevam <festevam@gmail.com>
Subject: [PATCH v2.1 75/77] media: imx: imx7_mipi_csis: Rename register macros to match datasheet
Date: Mon, 1 Mar 2021 18:41:23 +0200 [thread overview]
Message-ID: <20210301164123.13146-1-laurent.pinchart@ideasonboard.com> (raw)
In-Reply-To: <20210215042741.28850-76-laurent.pinchart@ideasonboard.com>
Rename several register macros to match the names from the
documentation.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rui Miguel Silva <rmfrfs@gmail.com>
---
Changes since v2:
- Fix indentation
- Address SCLKS_MASK and SCLKS_OFFSET
---
drivers/staging/media/imx/imx7-mipi-csis.c | 172 ++++++++++-----------
1 file changed, 86 insertions(+), 86 deletions(-)
diff --git a/drivers/staging/media/imx/imx7-mipi-csis.c b/drivers/staging/media/imx/imx7-mipi-csis.c
index de1bc0146e59..f57268fad99c 100644
--- a/drivers/staging/media/imx/imx7-mipi-csis.c
+++ b/drivers/staging/media/imx/imx7-mipi-csis.c
@@ -63,61 +63,61 @@
#define MIPI_CSIS_CLK_CTRL_WCLK_SRC BIT(0)
/* CSIS Interrupt mask */
-#define MIPI_CSIS_INTMSK 0x10
-#define MIPI_CSIS_INTMSK_EVEN_BEFORE BIT(31)
-#define MIPI_CSIS_INTMSK_EVEN_AFTER BIT(30)
-#define MIPI_CSIS_INTMSK_ODD_BEFORE BIT(29)
-#define MIPI_CSIS_INTMSK_ODD_AFTER BIT(28)
-#define MIPI_CSIS_INTMSK_FRAME_START BIT(24)
-#define MIPI_CSIS_INTMSK_FRAME_END BIT(20)
-#define MIPI_CSIS_INTMSK_ERR_SOT_HS BIT(16)
-#define MIPI_CSIS_INTMSK_ERR_LOST_FS BIT(12)
-#define MIPI_CSIS_INTMSK_ERR_LOST_FE BIT(8)
-#define MIPI_CSIS_INTMSK_ERR_OVER BIT(4)
-#define MIPI_CSIS_INTMSK_ERR_WRONG_CFG BIT(3)
-#define MIPI_CSIS_INTMSK_ERR_ECC BIT(2)
-#define MIPI_CSIS_INTMSK_ERR_CRC BIT(1)
-#define MIPI_CSIS_INTMSK_ERR_UNKNOWN BIT(0)
+#define MIPI_CSIS_INT_MSK 0x10
+#define MIPI_CSIS_INT_MSK_EVEN_BEFORE BIT(31)
+#define MIPI_CSIS_INT_MSK_EVEN_AFTER BIT(30)
+#define MIPI_CSIS_INT_MSK_ODD_BEFORE BIT(29)
+#define MIPI_CSIS_INT_MSK_ODD_AFTER BIT(28)
+#define MIPI_CSIS_INT_MSK_FRAME_START BIT(24)
+#define MIPI_CSIS_INT_MSK_FRAME_END BIT(20)
+#define MIPI_CSIS_INT_MSK_ERR_SOT_HS BIT(16)
+#define MIPI_CSIS_INT_MSK_ERR_LOST_FS BIT(12)
+#define MIPI_CSIS_INT_MSK_ERR_LOST_FE BIT(8)
+#define MIPI_CSIS_INT_MSK_ERR_OVER BIT(4)
+#define MIPI_CSIS_INT_MSK_ERR_WRONG_CFG BIT(3)
+#define MIPI_CSIS_INT_MSK_ERR_ECC BIT(2)
+#define MIPI_CSIS_INT_MSK_ERR_CRC BIT(1)
+#define MIPI_CSIS_INT_MSK_ERR_UNKNOWN BIT(0)
/* CSIS Interrupt source */
-#define MIPI_CSIS_INTSRC 0x14
-#define MIPI_CSIS_INTSRC_EVEN_BEFORE BIT(31)
-#define MIPI_CSIS_INTSRC_EVEN_AFTER BIT(30)
-#define MIPI_CSIS_INTSRC_EVEN BIT(30)
-#define MIPI_CSIS_INTSRC_ODD_BEFORE BIT(29)
-#define MIPI_CSIS_INTSRC_ODD_AFTER BIT(28)
-#define MIPI_CSIS_INTSRC_ODD (0x3 << 28)
-#define MIPI_CSIS_INTSRC_NON_IMAGE_DATA (0xf << 28)
-#define MIPI_CSIS_INTSRC_FRAME_START BIT(24)
-#define MIPI_CSIS_INTSRC_FRAME_END BIT(20)
-#define MIPI_CSIS_INTSRC_ERR_SOT_HS BIT(16)
-#define MIPI_CSIS_INTSRC_ERR_LOST_FS BIT(12)
-#define MIPI_CSIS_INTSRC_ERR_LOST_FE BIT(8)
-#define MIPI_CSIS_INTSRC_ERR_OVER BIT(4)
-#define MIPI_CSIS_INTSRC_ERR_WRONG_CFG BIT(3)
-#define MIPI_CSIS_INTSRC_ERR_ECC BIT(2)
-#define MIPI_CSIS_INTSRC_ERR_CRC BIT(1)
-#define MIPI_CSIS_INTSRC_ERR_UNKNOWN BIT(0)
-#define MIPI_CSIS_INTSRC_ERRORS 0xfffff
+#define MIPI_CSIS_INT_SRC 0x14
+#define MIPI_CSIS_INT_SRC_EVEN_BEFORE BIT(31)
+#define MIPI_CSIS_INT_SRC_EVEN_AFTER BIT(30)
+#define MIPI_CSIS_INT_SRC_EVEN BIT(30)
+#define MIPI_CSIS_INT_SRC_ODD_BEFORE BIT(29)
+#define MIPI_CSIS_INT_SRC_ODD_AFTER BIT(28)
+#define MIPI_CSIS_INT_SRC_ODD (0x3 << 28)
+#define MIPI_CSIS_INT_SRC_NON_IMAGE_DATA (0xf << 28)
+#define MIPI_CSIS_INT_SRC_FRAME_START BIT(24)
+#define MIPI_CSIS_INT_SRC_FRAME_END BIT(20)
+#define MIPI_CSIS_INT_SRC_ERR_SOT_HS BIT(16)
+#define MIPI_CSIS_INT_SRC_ERR_LOST_FS BIT(12)
+#define MIPI_CSIS_INT_SRC_ERR_LOST_FE BIT(8)
+#define MIPI_CSIS_INT_SRC_ERR_OVER BIT(4)
+#define MIPI_CSIS_INT_SRC_ERR_WRONG_CFG BIT(3)
+#define MIPI_CSIS_INT_SRC_ERR_ECC BIT(2)
+#define MIPI_CSIS_INT_SRC_ERR_CRC BIT(1)
+#define MIPI_CSIS_INT_SRC_ERR_UNKNOWN BIT(0)
+#define MIPI_CSIS_INT_SRC_ERRORS 0xfffff
/* D-PHY status control */
-#define MIPI_CSIS_DPHYSTATUS 0x20
-#define MIPI_CSIS_DPHYSTATUS_ULPS_DAT BIT(8)
-#define MIPI_CSIS_DPHYSTATUS_STOPSTATE_DAT BIT(4)
-#define MIPI_CSIS_DPHYSTATUS_ULPS_CLK BIT(1)
-#define MIPI_CSIS_DPHYSTATUS_STOPSTATE_CLK BIT(0)
+#define MIPI_CSIS_DPHY_STATUS 0x20
+#define MIPI_CSIS_DPHY_STATUS_ULPS_DAT BIT(8)
+#define MIPI_CSIS_DPHY_STATUS_STOPSTATE_DAT BIT(4)
+#define MIPI_CSIS_DPHY_STATUS_ULPS_CLK BIT(1)
+#define MIPI_CSIS_DPHY_STATUS_STOPSTATE_CLK BIT(0)
/* D-PHY common control */
-#define MIPI_CSIS_DPHYCTRL 0x24
-#define MIPI_CSIS_DPHYCTRL_HSSETTLE(n) ((n) << 24)
-#define MIPI_CSIS_DPHYCTRL_HSSETTLE_MASK GENMASK(31, 24)
-#define MIPI_CSIS_DPHYCTRL_SCLKS_MASK (0x3 << 22)
-#define MIPI_CSIS_DPHYCTRL_SCLKS_OFFSET 22
-#define MIPI_CSIS_DPHYCTRL_DPDN_SWAP_CLK BIT(6)
-#define MIPI_CSIS_DPHYCTRL_DPDN_SWAP_DAT BIT(5)
-#define MIPI_CSIS_DPHYCTRL_ENABLE_DAT BIT(1)
-#define MIPI_CSIS_DPHYCTRL_ENABLE_CLK BIT(0)
-#define MIPI_CSIS_DPHYCTRL_ENABLE (0x1f << 0)
+#define MIPI_CSIS_DPHY_CMN_CTRL 0x24
+#define MIPI_CSIS_DPHY_CMN_CTRL_HSSETTLE(n) ((n) << 24)
+#define MIPI_CSIS_DPHY_CMN_CTRL_HSSETTLE_MASK GENMASK(31, 24)
+#define MIPI_CSIS_DPHY_CMN_CTRL_CLKSETTLE(n) ((n) << 22)
+#define MIPI_CSIS_DPHY_CMN_CTRL_CLKSETTLE_MASK GENMASK(23, 22)
+#define MIPI_CSIS_DPHY_CMN_CTRL_DPDN_SWAP_CLK BIT(6)
+#define MIPI_CSIS_DPHY_CMN_CTRL_DPDN_SWAP_DAT BIT(5)
+#define MIPI_CSIS_DPHY_CMN_CTRL_ENABLE_DAT BIT(1)
+#define MIPI_CSIS_DPHY_CMN_CTRL_ENABLE_CLK BIT(0)
+#define MIPI_CSIS_DPHY_CMN_CTRL_ENABLE (0x1f << 0)
/* D-PHY Master and Slave Control register Low */
#define MIPI_CSIS_DPHY_BCTRL_L 0x30
@@ -163,7 +163,7 @@
#define MIPI_CSIS_DPHY_SCTRL_H 0x3c
/* ISP Configuration register */
-#define MIPI_CSIS_ISPCONFIG_CH(n) (0x40 + (n) * 0x10)
+#define MIPI_CSIS_ISP_CONFIG_CH(n) (0x40 + (n) * 0x10)
#define MIPI_CSIS_ISPCFG_MEM_FULL_GAP_MSK (0xff << 24)
#define MIPI_CSIS_ISPCFG_MEM_FULL_GAP(x) ((x) << 24)
#define MIPI_CSIS_ISPCFG_DOUBLE_CMPNT BIT(12)
@@ -178,15 +178,15 @@
#define MIPI_CSIS_ISPCFG_FMT_MASK (0x3f << 2)
/* ISP Image Resolution register */
-#define MIPI_CSIS_ISPRESOL_CH(n) (0x44 + (n) * 0x10)
+#define MIPI_CSIS_ISP_RESOL_CH(n) (0x44 + (n) * 0x10)
#define CSIS_MAX_PIX_WIDTH 0xffff
#define CSIS_MAX_PIX_HEIGHT 0xffff
/* ISP SYNC register */
-#define MIPI_CSIS_ISPSYNC_CH(n) (0x48 + (n) * 0x10)
-#define MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET 18
-#define MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET 12
-#define MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET 0
+#define MIPI_CSIS_ISP_SYNC_CH(n) (0x48 + (n) * 0x10)
+#define MIPI_CSIS_ISP_SYNC_HSYNC_LINTV_OFFSET 18
+#define MIPI_CSIS_ISP_SYNC_VSYNC_SINTV_OFFSET 12
+#define MIPI_CSIS_ISP_SYNC_VSYNC_EINTV_OFFSET 0
/* Non-image packet data buffers */
#define MIPI_CSIS_PKTDATA_ODD 0x2000
@@ -209,22 +209,22 @@ struct mipi_csis_event {
static const struct mipi_csis_event mipi_csis_events[] = {
/* Errors */
- { MIPI_CSIS_INTSRC_ERR_SOT_HS, "SOT Error" },
- { MIPI_CSIS_INTSRC_ERR_LOST_FS, "Lost Frame Start Error" },
- { MIPI_CSIS_INTSRC_ERR_LOST_FE, "Lost Frame End Error" },
- { MIPI_CSIS_INTSRC_ERR_OVER, "FIFO Overflow Error" },
- { MIPI_CSIS_INTSRC_ERR_WRONG_CFG, "Wrong Configuration Error" },
- { MIPI_CSIS_INTSRC_ERR_ECC, "ECC Error" },
- { MIPI_CSIS_INTSRC_ERR_CRC, "CRC Error" },
- { MIPI_CSIS_INTSRC_ERR_UNKNOWN, "Unknown Error" },
+ { MIPI_CSIS_INT_SRC_ERR_SOT_HS, "SOT Error" },
+ { MIPI_CSIS_INT_SRC_ERR_LOST_FS, "Lost Frame Start Error" },
+ { MIPI_CSIS_INT_SRC_ERR_LOST_FE, "Lost Frame End Error" },
+ { MIPI_CSIS_INT_SRC_ERR_OVER, "FIFO Overflow Error" },
+ { MIPI_CSIS_INT_SRC_ERR_WRONG_CFG, "Wrong Configuration Error" },
+ { MIPI_CSIS_INT_SRC_ERR_ECC, "ECC Error" },
+ { MIPI_CSIS_INT_SRC_ERR_CRC, "CRC Error" },
+ { MIPI_CSIS_INT_SRC_ERR_UNKNOWN, "Unknown Error" },
/* Non-image data receive events */
- { MIPI_CSIS_INTSRC_EVEN_BEFORE, "Non-image data before even frame" },
- { MIPI_CSIS_INTSRC_EVEN_AFTER, "Non-image data after even frame" },
- { MIPI_CSIS_INTSRC_ODD_BEFORE, "Non-image data before odd frame" },
- { MIPI_CSIS_INTSRC_ODD_AFTER, "Non-image data after odd frame" },
+ { MIPI_CSIS_INT_SRC_EVEN_BEFORE, "Non-image data before even frame" },
+ { MIPI_CSIS_INT_SRC_EVEN_AFTER, "Non-image data after even frame" },
+ { MIPI_CSIS_INT_SRC_ODD_BEFORE, "Non-image data before odd frame" },
+ { MIPI_CSIS_INT_SRC_ODD_AFTER, "Non-image data after odd frame" },
/* Frame start/end */
- { MIPI_CSIS_INTSRC_FRAME_START, "Frame Start" },
- { MIPI_CSIS_INTSRC_FRAME_END, "Frame End" },
+ { MIPI_CSIS_INT_SRC_FRAME_START, "Frame Start" },
+ { MIPI_CSIS_INT_SRC_FRAME_END, "Frame End" },
};
#define MIPI_CSIS_NUM_EVENTS ARRAY_SIZE(mipi_csis_events)
@@ -444,7 +444,7 @@ static const struct csis_pix_format *find_csis_format(u32 code)
static void mipi_csis_enable_interrupts(struct csi_state *state, bool on)
{
- mipi_csis_write(state, MIPI_CSIS_INTMSK, on ? 0xffffffff : 0);
+ mipi_csis_write(state, MIPI_CSIS_INT_MSK, on ? 0xffffffff : 0);
}
static void mipi_csis_sw_reset(struct csi_state *state)
@@ -486,13 +486,13 @@ static void mipi_csis_system_enable(struct csi_state *state, int on)
val &= ~MIPI_CSIS_CMN_CTRL_ENABLE;
mipi_csis_write(state, MIPI_CSIS_CMN_CTRL, val);
- val = mipi_csis_read(state, MIPI_CSIS_DPHYCTRL);
- val &= ~MIPI_CSIS_DPHYCTRL_ENABLE;
+ val = mipi_csis_read(state, MIPI_CSIS_DPHY_CMN_CTRL);
+ val &= ~MIPI_CSIS_DPHY_CMN_CTRL_ENABLE;
if (on) {
mask = (1 << (state->bus.num_data_lanes + 1)) - 1;
- val |= (mask & MIPI_CSIS_DPHYCTRL_ENABLE);
+ val |= (mask & MIPI_CSIS_DPHY_CMN_CTRL_ENABLE);
}
- mipi_csis_write(state, MIPI_CSIS_DPHYCTRL, val);
+ mipi_csis_write(state, MIPI_CSIS_DPHY_CMN_CTRL, val);
}
/* Called with the state.lock mutex held */
@@ -502,14 +502,14 @@ static void __mipi_csis_set_format(struct csi_state *state)
u32 val;
/* Color format */
- val = mipi_csis_read(state, MIPI_CSIS_ISPCONFIG_CH(0));
+ val = mipi_csis_read(state, MIPI_CSIS_ISP_CONFIG_CH(0));
val &= ~(MIPI_CSIS_ISPCFG_ALIGN_32BIT | MIPI_CSIS_ISPCFG_FMT_MASK);
val |= state->csis_fmt->fmt_reg;
- mipi_csis_write(state, MIPI_CSIS_ISPCONFIG_CH(0), val);
+ mipi_csis_write(state, MIPI_CSIS_ISP_CONFIG_CH(0), val);
/* Pixel resolution */
val = mf->width | (mf->height << 16);
- mipi_csis_write(state, MIPI_CSIS_ISPRESOL_CH(0), val);
+ mipi_csis_write(state, MIPI_CSIS_ISP_RESOL_CH(0), val);
}
static int mipi_csis_calculate_params(struct csi_state *state)
@@ -558,13 +558,13 @@ static void mipi_csis_set_params(struct csi_state *state)
__mipi_csis_set_format(state);
- mipi_csis_write(state, MIPI_CSIS_DPHYCTRL,
- MIPI_CSIS_DPHYCTRL_HSSETTLE(state->hs_settle));
+ mipi_csis_write(state, MIPI_CSIS_DPHY_CMN_CTRL,
+ MIPI_CSIS_DPHY_CMN_CTRL_HSSETTLE(state->hs_settle));
- val = (0 << MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET) |
- (0 << MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET) |
- (0 << MIPI_CSIS_ISPSYNC_VSYNC_EINTV_OFFSET);
- mipi_csis_write(state, MIPI_CSIS_ISPSYNC_CH(0), val);
+ val = (0 << MIPI_CSIS_ISP_SYNC_HSYNC_LINTV_OFFSET)
+ | (0 << MIPI_CSIS_ISP_SYNC_VSYNC_SINTV_OFFSET)
+ | (0 << MIPI_CSIS_ISP_SYNC_VSYNC_EINTV_OFFSET);
+ mipi_csis_write(state, MIPI_CSIS_ISP_SYNC_CH(0), val);
val = mipi_csis_read(state, MIPI_CSIS_CLK_CTRL);
val |= MIPI_CSIS_CLK_CTRL_WCLK_SRC;
@@ -955,12 +955,12 @@ static irqreturn_t mipi_csis_irq_handler(int irq, void *dev_id)
unsigned int i;
u32 status;
- status = mipi_csis_read(state, MIPI_CSIS_INTSRC);
+ status = mipi_csis_read(state, MIPI_CSIS_INT_SRC);
spin_lock_irqsave(&state->slock, flags);
/* Update the event/error counters */
- if ((status & MIPI_CSIS_INTSRC_ERRORS) || state->debug) {
+ if ((status & MIPI_CSIS_INT_SRC_ERRORS) || state->debug) {
for (i = 0; i < MIPI_CSIS_NUM_EVENTS; i++) {
if (!(status & state->events[i].mask))
continue;
@@ -969,7 +969,7 @@ static irqreturn_t mipi_csis_irq_handler(int irq, void *dev_id)
}
spin_unlock_irqrestore(&state->slock, flags);
- mipi_csis_write(state, MIPI_CSIS_INTSRC, status);
+ mipi_csis_write(state, MIPI_CSIS_INT_SRC, status);
return IRQ_HANDLED;
}
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2021-03-01 16:47 UTC|newest]
Thread overview: 100+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-15 4:26 [PATCH v2 00/77] media: imx: Miscellaneous fixes and cleanups for i.MX7 Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 01/77] media: imx: Drop dependency on I2C Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 02/77] media: imx: Move dependency on VIDEO_DEV to common Kconfig symbol Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 03/77] media: imx: Drop manual dependency on VIDEO_IMX_MEDIA Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 04/77] media: imx: Compile imx6-media-objs only for CONFIG_VIDEO_IMX_CSI Laurent Pinchart
2021-02-26 15:45 ` Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 05/77] media: imx: Set default sizes through macros in all drivers Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 06/77] media: imx: utils: Add ability to filter pixel formats by mbus code Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 07/77] media: imx: capture: Use dev_* instead of v4l2_* to log messages Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 08/77] media: imx: capture: Use device name to construct bus_info Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 09/77] media: imx: capture: Remove forward declaration of capture_qops Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 10/77] media: imx: capture: Handle errors from v4l2_fh_open() Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 11/77] media: imx: capture: Clean up capture_priv structure Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 12/77] media: imx: capture: Remove capture_priv stop field Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 13/77] media: imx: capture: Move queue and ctrl handler init to init function Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 14/77] media: imx: capture: Initialize video_device programmatically Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 15/77] media: imx: capture: Register the video device after completing init Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 16/77] media: imx: capture: Store v4l2_pix_format in imx_media_video_dev Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 17/77] media: imx: capture: Move default format init to a separate function Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 18/77] media: imx: capture: Rename querycap handler to capture_querycap Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 19/77] media: imx: capture: Rename ioctl operations with legacy prefix Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 20/77] media: imx: capture: Add a mechanism to disable control inheritance Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 21/77] media: imx: capture: Remove unneeded variable in __capture_legacy_try_fmt Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 22/77] media: imx: capture: Pass v4l2_pix_format to __capture_legacy_try_fmt() Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 23/77] media: imx: capture: Return -EPIPE from __capture_legacy_try_fmt() Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 24/77] media: imx: capture: Extract format lookup from __capture_legacy_try_fmt Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 25/77] media: imx: capture: Simplify capture_validate_fmt() implementation Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 26/77] media: imx: capture: Simplify __capture_legacy_try_fmt() Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 27/77] media: imx: capture: Decouple video node from source with MC-centric API Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 28/77] media: imx: capture: Expose V4L2_CAP_IO_MC for the " Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 29/77] media: imx: imx7-media-csi: Disable legacy video node API Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 30/77] media: imx: capture: Support creating immutable link to capture device Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 31/77] media: imx: imx7-media-csi: Remove control handler Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 32/77] media: imx: imx7-media-csi: Move (de)init from link setup to .s_stream() Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 33/77] media: imx: imx7-media-csi: Create immutable link to capture device Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 34/77] media: imx: imx7-media-csi: Replace CSICR*_RESET_VAL with values Laurent Pinchart
2021-02-15 4:26 ` [PATCH v2 35/77] media: imx: imx7-media-csi: Tidy up register fields macros Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 36/77] media: imx: imx7-media-csi: Reorganize code in sections Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 37/77] media: imx: imx7-media-csi: Validate capture format in .link_validate() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 38/77] media: imx: imx7-media-csi: Fix source type identification Laurent Pinchart
2021-03-01 9:30 ` Rui Miguel Silva
2021-02-15 4:27 ` [PATCH v2 39/77] media: imx: imx7-media-csi: Don't lock access to is_csi2 Laurent Pinchart
2021-03-01 9:31 ` Rui Miguel Silva
2021-02-15 4:27 ` [PATCH v2 40/77] media: imx: imx7-media-csi: Rename imx7_csi_dma_start() to *_setup() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 41/77] media: imx: imx7-media-csi: Split imx7_csi_dma_stop() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 42/77] media: imx: imx7-media-csi: Move CSI configuration before source start Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 43/77] media: imx: imx7-media-csi: Merge streaming_start() with csi_enable() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 44/77] media: imx: imx7-media-csi: Merge hw_reset() with init_interface() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 45/77] media: imx: imx7-media-csi: Set the MIPI data type based on the bus code Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 46/77] media: imx: imx7-media-csi: Don't set the buffer stride when disabling Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 47/77] media: imx: imx7-media-csi: Merge all config in imx7_csi_configure() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 48/77] media: imx: imx7-media-csi: Clear all configurable CSICR18 fields Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 49/77] media: imx: imx7-media-csi: Set RFF burst type in imx7_csi_configure() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 50/77] media: imx: imx7-media-csi: Simplify imx7_csi_rx_fifo_clear() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 51/77] media: imx: imx7-media-csi: Don't double-enable the CSI Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 52/77] media: imx: imx7-media-csi: Don't double-enable the RxFIFO Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 53/77] media: imx: imx7-media-csi: Remove double reflash of DMA controller Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 54/77] media: imx: imx7-media-csi: Don't enable SOF and EOF interrupts Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 55/77] media: imx: imx7_media-csi: Add support for additional Bayer patterns Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 56/77] media: v4l2-mc: Add link flags to v4l2_create_fwnode_links_to_pad() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 57/77] media: imx: imx7_media-csi: Create immutable link to source device Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 58/77] dt-bindings: media: nxp,imx7-mipi-csi2: Drop the reset-names property Laurent Pinchart
2021-03-05 21:41 ` Rob Herring
2021-02-15 4:27 ` [PATCH v2 59/77] dt-bindings: media: nxp,imx7-mipi-csi2: Drop fsl,csis-hs-settle property Laurent Pinchart
2021-03-05 21:42 ` Rob Herring
2021-02-15 4:27 ` [PATCH v2 60/77] dt-bindings: media: nxp,imx7-mipi-csi2: Indent example with 4 spaces Laurent Pinchart
2021-03-01 9:33 ` Rui Miguel Silva
2021-03-05 21:42 ` Rob Herring
2021-02-15 4:27 ` [PATCH v2 61/77] dt-bindings: media: nxp,imx7-mipi-csi2: Expand descriptions Laurent Pinchart
2021-03-01 9:35 ` Rui Miguel Silva
2021-03-05 21:43 ` Rob Herring
2021-02-15 4:27 ` [PATCH v2 62/77] media: imx: imx7_mipi_csis: Acquire reset control without naming it Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 63/77] media: imx: imx7_mipi_csis: Fix input size alignment Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 64/77] media: imx: imx7_mipi_csis: Make source .s_power() optional Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 65/77] media: imx: imx7_mipi_csis: Avoid double get of wrap clock Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 66/77] media: imx: imx7_mipi_csis: Drop 10-bit YUV support Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 67/77] media: imx: imx7_mipi_csis: Fix UYVY8 media bus format Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 68/77] media: imx: imx7_mipi_csis: Inline mipi_csis_set_hsync_settle() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 69/77] media: imx: imx7_mipi_csis: Move link setup check out of locked section Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 70/77] media: imx: imx7_mipi_csis: Calculate Ths_settle from source lane rate Laurent Pinchart
2021-03-01 16:40 ` [PATCH v2.1 " Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 71/77] media: imx: imx7_mipi_csis: Turn register access macros into functions Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 72/77] media: imx: imx7_mipi_csis: Fully initialize MIPI_CSIS_DPHYCTRL register Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 73/77] media: imx: imx7_mipi_csis: Define macros for DPHY_BCTRL_L fields Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 74/77] media: imx: imx7_mipi_csis: Make ISP registers macros take channel ID Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 75/77] media: imx: imx7_mipi_csis: Rename register macros to match datasheet Laurent Pinchart
2021-03-01 16:41 ` Laurent Pinchart [this message]
2021-02-15 4:27 ` [PATCH v2 76/77] media: imx: imx7_mipi_csis: Use register macros in mipi_csis_dump_regs() Laurent Pinchart
2021-02-15 4:27 ` [PATCH v2 77/77] media: imx: imx7_mipi_csis: Print shadow registers " Laurent Pinchart
2021-03-16 11:56 ` [PATCH] imx7-media-csi: csi2 only Martin Kepplinger
2021-03-16 18:05 ` Laurent Pinchart
2021-03-17 10:08 ` Martin Kepplinger
2021-03-17 10:19 ` Laurent Pinchart
2021-03-28 14:25 ` Martin Kepplinger
2021-03-28 16:43 ` Laurent Pinchart
2021-03-17 18:04 ` [PATCH v2 00/77] media: imx: Miscellaneous fixes and cleanups for i.MX7 Frieder Schrempf
2021-03-19 1:27 ` Laurent Pinchart
2021-04-15 9:00 ` Frieder Schrempf
2021-04-15 16:04 ` Frieder Schrempf
2021-04-26 8:06 ` Frieder Schrempf
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