From: Philipp Zabel <pza@pengutronix.de>
To: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Cc: ezequiel@collabora.com, mchehab@kernel.org, robh+dt@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com,
lee.jones@linaro.org, gregkh@linuxfoundation.org,
mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org,
jernej.skrabec@siol.net, hverkuil-cisco@xs4all.nl,
emil.l.velikov@gmail.com, kernel@pengutronix.de,
linux-imx@nxp.com, linux-media@vger.kernel.org,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org,
kernel@collabora.com
Subject: Re: [PATCH v6 03/13] media: hantro: Use syscon instead of 'ctrl' register
Date: Fri, 26 Mar 2021 15:13:51 +0100 [thread overview]
Message-ID: <20210326141351.GB8441@pengutronix.de> (raw)
In-Reply-To: <20210318082046.51546-4-benjamin.gaignard@collabora.com>
On Thu, Mar 18, 2021 at 09:20:36AM +0100, Benjamin Gaignard wrote:
> In order to be able to share the control hardware block between
> VPUs use a syscon instead a ioremap it in the driver.
> To keep the compatibility with older DT if 'nxp,imx8mq-vpu-ctrl'
> phandle is not found look at 'ctrl' reg-name.
> With the method it becomes useless to provide a list of register
> names so remove it.
>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
> version 5:
> - use syscon instead of VPU reset driver.
> - if DT doesn't provide syscon keep backward compatibilty by using
> 'ctrl' reg-name.
>
> drivers/staging/media/hantro/hantro.h | 5 +-
> drivers/staging/media/hantro/imx8m_vpu_hw.c | 52 ++++++++++++---------
> 2 files changed, 34 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h
> index 65f9f7ea7dcf..a99a96b84b5e 100644
> --- a/drivers/staging/media/hantro/hantro.h
> +++ b/drivers/staging/media/hantro/hantro.h
> @@ -13,6 +13,7 @@
> #define HANTRO_H_
>
> #include <linux/platform_device.h>
> +#include <linux/regmap.h>
> #include <linux/videodev2.h>
> #include <linux/wait.h>
> #include <linux/clk.h>
> @@ -167,7 +168,7 @@ hantro_vdev_to_func(struct video_device *vdev)
> * @reg_bases: Mapped addresses of VPU registers.
> * @enc_base: Mapped address of VPU encoder register for convenience.
> * @dec_base: Mapped address of VPU decoder register for convenience.
> - * @ctrl_base: Mapped address of VPU control block.
> + * @ctrl_base: Regmap of VPU control block.
> * @vpu_mutex: Mutex to synchronize V4L2 calls.
> * @irqlock: Spinlock to synchronize access to data structures
> * shared with interrupt handlers.
> @@ -186,7 +187,7 @@ struct hantro_dev {
> void __iomem **reg_bases;
> void __iomem *enc_base;
> void __iomem *dec_base;
> - void __iomem *ctrl_base;
> + struct regmap *ctrl_base;
>
> struct mutex vpu_mutex; /* video_device lock */
> spinlock_t irqlock;
> diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
> index c222de075ef4..bd9d135dd440 100644
> --- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
> +++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
> @@ -7,6 +7,7 @@
>
> #include <linux/clk.h>
> #include <linux/delay.h>
> +#include <linux/mfd/syscon.h>
>
> #include "hantro.h"
> #include "hantro_jpeg.h"
> @@ -24,30 +25,28 @@
> #define CTRL_G1_PP_FUSE 0x0c
> #define CTRL_G2_DEC_FUSE 0x10
>
> +static const struct regmap_config ctrl_regmap_ctrl = {
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 0x14,
> +};
> +
> static void imx8m_soft_reset(struct hantro_dev *vpu, u32 reset_bits)
> {
> - u32 val;
> -
> /* Assert */
> - val = readl(vpu->ctrl_base + CTRL_SOFT_RESET);
> - val &= ~reset_bits;
> - writel(val, vpu->ctrl_base + CTRL_SOFT_RESET);
> + regmap_update_bits(vpu->ctrl_base, CTRL_SOFT_RESET, reset_bits, 0);
>
> udelay(2);
>
> /* Release */
> - val = readl(vpu->ctrl_base + CTRL_SOFT_RESET);
> - val |= reset_bits;
> - writel(val, vpu->ctrl_base + CTRL_SOFT_RESET);
> + regmap_update_bits(vpu->ctrl_base, CTRL_SOFT_RESET,
> + reset_bits, reset_bits);
> }
>
> static void imx8m_clk_enable(struct hantro_dev *vpu, u32 clock_bits)
> {
> - u32 val;
> -
> - val = readl(vpu->ctrl_base + CTRL_CLOCK_ENABLE);
> - val |= clock_bits;
> - writel(val, vpu->ctrl_base + CTRL_CLOCK_ENABLE);
> + regmap_update_bits(vpu->ctrl_base, CTRL_CLOCK_ENABLE,
> + clock_bits, clock_bits);
> }
>
> static int imx8mq_runtime_resume(struct hantro_dev *vpu)
> @@ -64,9 +63,9 @@ static int imx8mq_runtime_resume(struct hantro_dev *vpu)
> imx8m_clk_enable(vpu, CLOCK_G1 | CLOCK_G2);
>
> /* Set values of the fuse registers */
> - writel(0xffffffff, vpu->ctrl_base + CTRL_G1_DEC_FUSE);
> - writel(0xffffffff, vpu->ctrl_base + CTRL_G1_PP_FUSE);
> - writel(0xffffffff, vpu->ctrl_base + CTRL_G2_DEC_FUSE);
> + regmap_write(vpu->ctrl_base, CTRL_G1_DEC_FUSE, 0xffffffff);
> + regmap_write(vpu->ctrl_base, CTRL_G1_PP_FUSE, 0xffffffff);
> + regmap_write(vpu->ctrl_base, CTRL_G2_DEC_FUSE, 0xffffffff);
>
> clk_bulk_disable_unprepare(vpu->variant->num_clocks, vpu->clocks);
>
> @@ -150,8 +149,22 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
>
> static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
> {
> - vpu->dec_base = vpu->reg_bases[0];
> - vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
> + struct device_node *np = vpu->dev->of_node;
> +
> + vpu->ctrl_base = syscon_regmap_lookup_by_phandle(np, "nxp,imx8mq-vpu-ctrl");
I think calling this nxp,imx8m-vpu-ctrl would allow to share this with
i.MX8MM later. Otherwise,
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
thanks
Philipp
next prev parent reply other threads:[~2021-03-26 14:14 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-18 8:20 [PATCH v6 00/13] Add HANTRO G2/HEVC decoder support for IMX8MQ Benjamin Gaignard
2021-03-18 8:20 ` [PATCH v6 01/13] dt-bindings: mfd: Add 'nxp,imx8mq-vpu-ctrl' to syscon list Benjamin Gaignard
2021-03-23 22:33 ` [PATCH v6 01/13] dt-bindings: mfd: Add 'nxp, imx8mq-vpu-ctrl' " Rob Herring
2021-03-18 8:20 ` [PATCH v6 02/13] dt-bindings: media: nxp,imx8mq-vpu: Update the bindings for G2 support Benjamin Gaignard
2021-03-23 22:35 ` [PATCH v6 02/13] dt-bindings: media: nxp, imx8mq-vpu: " Rob Herring
2021-03-26 14:11 ` [PATCH v6 02/13] dt-bindings: media: nxp,imx8mq-vpu: " Philipp Zabel
2021-03-26 14:26 ` Benjamin Gaignard
2021-03-26 14:37 ` Philipp Zabel
2021-03-18 8:20 ` [PATCH v6 03/13] media: hantro: Use syscon instead of 'ctrl' register Benjamin Gaignard
2021-03-26 14:13 ` Philipp Zabel [this message]
2021-03-18 8:20 ` [PATCH v6 04/13] media: hevc: Add fields and flags for hevc PPS Benjamin Gaignard
2021-03-18 8:20 ` [PATCH v6 05/13] media: hevc: Add decode params control Benjamin Gaignard
2021-03-18 8:20 ` [PATCH v6 06/13] media: hantro: change hantro_codec_ops run prototype to return errors Benjamin Gaignard
2021-03-18 8:20 ` [PATCH v6 07/13] media: hantro: Define HEVC codec profiles and supported features Benjamin Gaignard
2021-03-18 8:20 ` [PATCH v6 08/13] media: hantro: Only use postproc when post processed formats are defined Benjamin Gaignard
2021-03-18 8:20 ` [PATCH v6 09/13] media: uapi: Add a control for HANTRO driver Benjamin Gaignard
2021-03-18 8:20 ` [PATCH v6 10/13] media: hantro: handle V4L2_PIX_FMT_HEVC_SLICE control Benjamin Gaignard
2021-03-18 8:20 ` [PATCH v6 11/13] media: hantro: Introduce G2/HEVC decoder Benjamin Gaignard
2021-03-18 8:20 ` [PATCH v6 12/13] media: hantro: IMX8M: add variant for G2/HEVC codec Benjamin Gaignard
2021-03-26 14:18 ` Philipp Zabel
2021-03-18 8:20 ` [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware Benjamin Gaignard
2021-03-26 14:24 ` Philipp Zabel
2021-03-26 14:33 ` Benjamin Gaignard
2021-03-26 15:28 ` Ezequiel Garcia
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210326141351.GB8441@pengutronix.de \
--to=pza@pengutronix.de \
--cc=benjamin.gaignard@collabora.com \
--cc=devel@driverdev.osuosl.org \
--cc=devicetree@vger.kernel.org \
--cc=emil.l.velikov@gmail.com \
--cc=ezequiel@collabora.com \
--cc=festevam@gmail.com \
--cc=gregkh@linuxfoundation.org \
--cc=hverkuil-cisco@xs4all.nl \
--cc=jernej.skrabec@siol.net \
--cc=kernel@collabora.com \
--cc=kernel@pengutronix.de \
--cc=lee.jones@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=mchehab@kernel.org \
--cc=mripard@kernel.org \
--cc=paul.kocialkowski@bootlin.com \
--cc=robh+dt@kernel.org \
--cc=s.hauer@pengutronix.de \
--cc=shawnguo@kernel.org \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).