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From: Philipp Zabel <pza@pengutronix.de>
To: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Cc: ezequiel@collabora.com, mchehab@kernel.org, robh+dt@kernel.org,
	shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com,
	lee.jones@linaro.org, gregkh@linuxfoundation.org,
	mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org,
	jernej.skrabec@siol.net, hverkuil-cisco@xs4all.nl,
	emil.l.velikov@gmail.com, kernel@pengutronix.de,
	linux-imx@nxp.com, linux-media@vger.kernel.org,
	linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org,
	kernel@collabora.com
Subject: Re: [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware
Date: Fri, 26 Mar 2021 15:24:40 +0100	[thread overview]
Message-ID: <20210326142440.GD8441@pengutronix.de> (raw)
In-Reply-To: <20210318082046.51546-14-benjamin.gaignard@collabora.com>

On Thu, Mar 18, 2021 at 09:20:46AM +0100, Benjamin Gaignard wrote:
> Split VPU node in two: one for G1 and one for G2 since they are
> different hardware blocks.
> Add syscon for hardware control block.
> Remove reg-names property that is useless.
> Each VPU node only need one interrupt.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
> ---
> version 5:
>  - use syscon instead of VPU reset
> 
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 ++++++++++++++++++-----
>  1 file changed, 34 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 17c449e12c2e..b537d153ebbd 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -1329,15 +1329,16 @@ usb3_phy1: usb-phy@382f0040 {
>  			status = "disabled";
>  		};
>  
> -		vpu: video-codec@38300000 {
> +		vpu_ctrl: syscon@38320000 {
> +			compatible = "nxp,imx8mq-vpu-ctrl", "syscon";
> +			reg = <0x38320000 0x10000>;
> +		};
> +
> +		vpu_g1: video-codec@38300000 {
>  			compatible = "nxp,imx8mq-vpu";
> -			reg = <0x38300000 0x10000>,
> -			      <0x38310000 0x10000>,
> -			      <0x38320000 0x10000>;
> -			reg-names = "g1", "g2", "ctrl";
> -			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> -				     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "g1", "g2";
> +			reg = <0x38300000 0x10000>;
> +			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "g1";
>  			clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
>  				 <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
>  				 <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> @@ -1350,9 +1351,33 @@ vpu: video-codec@38300000 {
>  						 <&clk IMX8MQ_VPU_PLL_OUT>,
>  						 <&clk IMX8MQ_SYS1_PLL_800M>,
>  						 <&clk IMX8MQ_VPU_PLL>;
> -			assigned-clock-rates = <600000000>, <600000000>,
> +			assigned-clock-rates = <600000000>, <300000000>,

I'd like to see this mentioned in the commit message.

> +					       <800000000>, <0>;
> +			power-domains = <&pgc_vpu>;
> +			nxp,imx8mq-vpu-ctrl = <&vpu_ctrl>;
> +		};
> +
> +		vpu_g2: video-codec@38310000 {
> +			compatible = "nxp,imx8mq-vpu-g2";
> +			reg = <0x38310000 0x10000>;
> +			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "g2";
> +			clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
> +				 <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
> +				 <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
> +			clock-names = "g1", "g2",  "bus";
> +			assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>,

Can the G1 clock configuration be dropped from the G2 device node and
the G2 clock configuration from the G1 device node? It looks weird that
these devices configure each other's clocks.

regards
Philipp

  reply	other threads:[~2021-03-26 14:25 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-18  8:20 [PATCH v6 00/13] Add HANTRO G2/HEVC decoder support for IMX8MQ Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 01/13] dt-bindings: mfd: Add 'nxp,imx8mq-vpu-ctrl' to syscon list Benjamin Gaignard
2021-03-23 22:33   ` [PATCH v6 01/13] dt-bindings: mfd: Add 'nxp, imx8mq-vpu-ctrl' " Rob Herring
2021-03-18  8:20 ` [PATCH v6 02/13] dt-bindings: media: nxp,imx8mq-vpu: Update the bindings for G2 support Benjamin Gaignard
2021-03-23 22:35   ` [PATCH v6 02/13] dt-bindings: media: nxp, imx8mq-vpu: " Rob Herring
2021-03-26 14:11   ` [PATCH v6 02/13] dt-bindings: media: nxp,imx8mq-vpu: " Philipp Zabel
2021-03-26 14:26     ` Benjamin Gaignard
2021-03-26 14:37       ` Philipp Zabel
2021-03-18  8:20 ` [PATCH v6 03/13] media: hantro: Use syscon instead of 'ctrl' register Benjamin Gaignard
2021-03-26 14:13   ` Philipp Zabel
2021-03-18  8:20 ` [PATCH v6 04/13] media: hevc: Add fields and flags for hevc PPS Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 05/13] media: hevc: Add decode params control Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 06/13] media: hantro: change hantro_codec_ops run prototype to return errors Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 07/13] media: hantro: Define HEVC codec profiles and supported features Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 08/13] media: hantro: Only use postproc when post processed formats are defined Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 09/13] media: uapi: Add a control for HANTRO driver Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 10/13] media: hantro: handle V4L2_PIX_FMT_HEVC_SLICE control Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 11/13] media: hantro: Introduce G2/HEVC decoder Benjamin Gaignard
2021-03-18  8:20 ` [PATCH v6 12/13] media: hantro: IMX8M: add variant for G2/HEVC codec Benjamin Gaignard
2021-03-26 14:18   ` Philipp Zabel
2021-03-18  8:20 ` [PATCH v6 13/13] arm64: dts: imx8mq: Add node to G2 hardware Benjamin Gaignard
2021-03-26 14:24   ` Philipp Zabel [this message]
2021-03-26 14:33     ` Benjamin Gaignard
2021-03-26 15:28       ` Ezequiel Garcia

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