[RFC v2 00/10] Exynos5 FIMC-IS driver

[RFC v2 00/10] Exynos5 FIMC-IS driver

[Arun Kumar K]

Changes from v1
---------------
- Addressed all review comments from Sylwester
- Made sensor subdevs as independent i2c devices
- Lots of cleanup
- Debugfs support added
- Removed PMU global register access

Description
-----------
This patchset adds a new driver for the FIMC-IS IP available in
Samsung Exynos5 SoC onwards. The camera subsystem in Exynos5 is significantly
different from that of Exynos4 and before.
In Exynos4, the FIMC-IS is a sub component of the camera subsystem which
takes input from fimc-lite and does post processing of the image and passes
it to the fimc-capture which writes to the output DMA.

But in case of Exynos5, the fimc-capture IP is removed and instead a more
powerful fimc-is takes the role of giving scaled image output via DMA.
FIMC-IS internally has two scalers for this in addition to other
post-processing components like dynamic range compression,
optical distortion correction, digital image stabilization, 3D noise reduction
and face detection.

FIMC-IS firmware can directly control certain sensors and the
sensors compatible with the fimc-is will be termed as fimc-is sensors.
This patchset adds support for two such fimc-is sensors - s5k4e5 and s5k6a3.
These sensors are controlled exclusively by the fimc-is firmware at present.
They provide only SRGB unscaled output which will reach fimc-is
via mipi-csis and fimc-lite. The color space conversion, scaling and all other
post processing will be then done by the fimc-is IP components.

The fimc-is driver operates in the following manner:
The sensor subdevice created by this driver will be used by the exynos5
media-device's pipeline0 which connects it with mipi-csis and fimc-lite.

|fimc-is-sensor|--->|mipi-csis|--->|fimc-lite|--->|Memory|

The output bayer image dumped by the fimc-lite subdev into memory is fed
into the ISP subdev of fimc-is driver. For that the pipeline1 of exynos5
media-device will look like this:

|Memory|--->|fimc-is-isp|--->|fimc-is-scaler-codec|--->|fimc-is-scaler-preview|

The isp subdev accepts bayer input buffer at its OUTPUT_MPLANE. It will
do a set of post processing operations and passes it on-the-fly to the
scalers. The two scalers can give two different scaled outputs which can
be used for recording and preview simultaneously. Both scaler-codec and
scaler-preview dumps DMA data out through its CAPTURE_MPLANE.

This patchset adds basic version of the driver which accepts
bayer input data and provides 2 different scaled outputs with most of
the post processing blocks disabled.


Arun Kumar K (10):
  exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings
    documentation
  exynos5-fimc-is: Adds fimc-is driver core files
  exynos5-fimc-is: Adds common driver header files
  exynos5-fimc-is: Adds the register definition and context header
  exynos5-fimc-is: Adds the sensor subdev
  exynos5-fimc-is: Adds isp subdev
  exynos5-fimc-is: Adds scaler subdev
  exynos5-fimc-is: Adds the hardware pipeline control
  exynos5-fimc-is: Adds the hardware interface module
  exynos5-fimc-is: Adds the Kconfig and Makefile

 .../devicetree/bindings/media/exynos5-fimc-is.txt  |   41 +
 drivers/media/platform/exynos5-is/Kconfig          |   12 +
 drivers/media/platform/exynos5-is/Makefile         |    3 +
 drivers/media/platform/exynos5-is/fimc-is-cmd.h    |  201 ++
 drivers/media/platform/exynos5-is/fimc-is-core.c   |  304 +++
 drivers/media/platform/exynos5-is/fimc-is-core.h   |  126 ++
 drivers/media/platform/exynos5-is/fimc-is-err.h    |  261 +++
 .../media/platform/exynos5-is/fimc-is-interface.c  | 1025 ++++++++++
 .../media/platform/exynos5-is/fimc-is-interface.h  |  131 ++
 drivers/media/platform/exynos5-is/fimc-is-isp.c    |  438 +++++
 drivers/media/platform/exynos5-is/fimc-is-isp.h    |   89 +
 .../media/platform/exynos5-is/fimc-is-metadata.h   |  771 ++++++++
 drivers/media/platform/exynos5-is/fimc-is-param.h  | 1259 +++++++++++++
 .../media/platform/exynos5-is/fimc-is-pipeline.c   | 1959 ++++++++++++++++++++
 .../media/platform/exynos5-is/fimc-is-pipeline.h   |  129 ++
 drivers/media/platform/exynos5-is/fimc-is-regs.h   |  107 ++
 drivers/media/platform/exynos5-is/fimc-is-scaler.c |  492 +++++
 drivers/media/platform/exynos5-is/fimc-is-scaler.h |  107 ++
 drivers/media/platform/exynos5-is/fimc-is-sensor.c |  463 +++++
 drivers/media/platform/exynos5-is/fimc-is-sensor.h |  168 ++
 drivers/media/platform/exynos5-is/fimc-is.h        |  151 ++
 21 files changed, 8237 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-cmd.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-err.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-metadata.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-param.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-pipeline.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-pipeline.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-regs.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is.h

-- 
1.7.9.5

[RFC v2 01/10] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation

[Arun Kumar K]

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
---
 .../devicetree/bindings/media/exynos5-fimc-is.txt  |   41 ++++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/exynos5-fimc-is.txt

diff --git a/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
new file mode 100644
index 0000000..9fd4646
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
@@ -0,0 +1,41 @@
+Samsung EXYNOS SoC Camera Subsystem
+-----------------------------------
+
+The camera subsystem on Samsung Exynos5 SoC has some changes relative
+to previous SoC versions. Exynos5 has almost similar MIPI-CSIS and
+FIMC-LITE IPs but has a much improved version of FIMC-IS which can
+handle sensor controls and camera post-processing operations. The
+Exynos5 FIMC-IS has a dedicated ARM Cortex A5 processor, many
+post-processing blocks (ISP, DRC, FD, ODC, DIS, 3DNR) and two
+dedicated scalers (SCC and SCP).
+
+fimc-is node
+------------
+
+Required properties:
+
+- compatible        : must be "samsung,exynos5250-fimc-is"
+- reg               : physical base address and size of the memory mapped
+                      registers
+- interrupt-parent  : Parent interrupt controller
+- interrupts        : fimc-is interrupt to the parent combiner
+- clocks            : list of clock specifiers, corresponding to entries in
+                      clock-names property;
+- clock-names       : must contain "isp", "mcu_isp", "isp_div0", "isp_div1",
+                      "isp_divmpwm", "mcu_isp_div0", "mcu_isp_div1" entries,
+                      matching entries in the clocks property.
+
+
+Board specific properties:
+
+- pinctrl-names    : pinctrl names for camera port pinmux control, at least
+		     "default" needs to be specified.
+- pinctrl-0...N	   : pinctrl properties corresponding to pinctrl-names
+
+pmu subnode
+-----------
+
+Required properties:
+ - reg : should contain PMU physical base address and size of the memory
+         mapped registers.
+
-- 
1.7.9.5

[RFC v2 02/10] exynos5-fimc-is: Adds fimc-is driver core files

[Arun Kumar K]

This driver is for the FIMC-IS IP available in Samsung Exynos5
SoC onwards. This patch adds the core files for the new driver.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
---
 drivers/media/platform/exynos5-is/fimc-is-core.c |  304 ++++++++++++++++++++++
 drivers/media/platform/exynos5-is/fimc-is-core.h |  126 +++++++++
 2 files changed, 430 insertions(+)
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.h

diff --git a/drivers/media/platform/exynos5-is/fimc-is-core.c b/drivers/media/platform/exynos5-is/fimc-is-core.c
new file mode 100644
index 0000000..d24b634
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-core.c
@@ -0,0 +1,304 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+*
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/bug.h>
+#include <linux/ctype.h>
+#include <linux/device.h>
+#include <linux/debugfs.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/firmware.h>
+#include <linux/fs.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+#include <linux/videodev2.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/of_irq.h>
+#include <linux/pinctrl/consumer.h>
+
+#include <media/v4l2-device.h>
+#include <media/v4l2-ioctl.h>
+#include <media/v4l2-mem2mem.h>
+#include <media/v4l2-of.h>
+#include <media/videobuf2-core.h>
+#include <media/videobuf2-dma-contig.h>
+
+#include "fimc-is.h"
+
+static char *fimc_is_clock_name[] = {
+	[IS_CLK_ISP]		= "isp",
+	[IS_CLK_MCU_ISP]	= "mcu_isp",
+	[IS_CLK_ISP_DIV0]	= "isp_div0",
+	[IS_CLK_ISP_DIV1]	= "isp_div1",
+	[IS_CLK_ISP_DIVMPWM]	= "isp_divmpwm",
+	[IS_CLK_MCU_ISP_DIV0]	= "mcu_isp_div0",
+	[IS_CLK_MCU_ISP_DIV1]	= "mcu_isp_div1",
+};
+
+static void fimc_is_clk_put(struct fimc_is *is)
+{
+	int i;
+
+	for (i = 0; i < IS_CLK_MAX_NUM; i++) {
+		if (IS_ERR_OR_NULL(is->clock[i]))
+			continue;
+		clk_unprepare(is->clock[i]);
+		clk_put(is->clock[i]);
+		is->clock[i] = NULL;
+	}
+}
+
+static int fimc_is_clk_get(struct fimc_is *is)
+{
+	struct device *dev = &is->pdev->dev;
+	int i, ret;
+
+	for (i = 0; i < IS_CLK_MAX_NUM; i++) {
+		is->clock[i] = clk_get(dev, fimc_is_clock_name[i]);
+		if (IS_ERR(is->clock[i]))
+			goto err;
+		ret = clk_prepare(is->clock[i]);
+		if (ret < 0) {
+			clk_put(is->clock[i]);
+			is->clock[i] = NULL;
+			goto err;
+		}
+	}
+	return 0;
+err:
+	fimc_is_clk_put(is);
+	pr_err("Failed to get clock: %s\n", fimc_is_clock_name[i]);
+	return -ENXIO;
+}
+
+static int fimc_is_clk_cfg(struct fimc_is *is)
+{
+	int ret;
+
+	ret = fimc_is_clk_get(is);
+	if (ret)
+		return ret;
+
+	/* Set rates */
+	ret = clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV0], 200 * 1000000);
+	ret |= clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV1], 100 * 1000000);
+	ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV0], 134 * 1000000);
+	ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV1], 68 * 1000000);
+	ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIVMPWM], 34 * 1000000);
+
+	if (ret)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int fimc_is_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct resource res;
+	struct fimc_is *is;
+	struct pinctrl *pctrl;
+	void __iomem *regs;
+	struct device_node *node;
+	int irq, ret;
+
+	pr_debug("FIMC-IS Probe Enter\n");
+
+	if (!pdev->dev.of_node)
+		return -ENODEV;
+
+	is = devm_kzalloc(&pdev->dev, sizeof(*is), GFP_KERNEL);
+	if (!is)
+		return -ENOMEM;
+
+	is->pdev = pdev;
+
+	ret = of_address_to_resource(dev->of_node, 0, &res);
+	if (ret < 0)
+		return ret;
+
+	regs = devm_ioremap_resource(dev, &res);
+	if (regs == NULL) {
+		dev_err(dev, "Failed to obtain io memory\n");
+		return -ENOENT;
+	}
+
+	/* Get the PMU base */
+	node = of_get_child_by_name(dev->of_node, "pmu");
+	if (!node)
+		return -ENODEV;
+	is->pmu_regs = of_iomap(node, 0);
+	if (!is->pmu_regs)
+		return -ENOMEM;
+
+	irq = irq_of_parse_and_map(dev->of_node, 0);
+	if (irq < 0) {
+		dev_err(dev, "Failed to get IRQ\n");
+		return irq;
+	}
+
+	ret = fimc_is_clk_cfg(is);
+	if (ret < 0) {
+		dev_err(dev, "Clock config failed\n");
+		goto err_clk;
+	}
+
+	platform_set_drvdata(pdev, is);
+	pm_runtime_enable(dev);
+
+	ret = pm_runtime_get_sync(dev);
+	if (ret < 0)
+		goto err_clk;
+
+	is->alloc_ctx = vb2_dma_contig_init_ctx(dev);
+	if (IS_ERR(is->alloc_ctx)) {
+		ret = PTR_ERR(is->alloc_ctx);
+		goto err_pm;
+	}
+
+	/* Init FIMC Pipeline */
+	ret = fimc_is_pipeline_init(&is->pipeline, 0, is);
+	if (ret < 0)
+		goto err_sd;
+
+	/* Init FIMC Interface */
+	ret = fimc_is_interface_init(&is->interface, regs, irq);
+	if (ret < 0)
+		goto err_sd;
+
+	pm_runtime_put(dev);
+
+	dev_dbg(dev, "FIMC-IS registered successfully\n");
+
+	return 0;
+
+err_sd:
+	fimc_is_pipeline_destroy(&is->pipeline);
+err_vb:
+	vb2_dma_contig_cleanup_ctx(is->alloc_ctx);
+err_pm:
+	pm_runtime_put(dev);
+err_clk:
+	fimc_is_clk_put(is);
+
+	return ret;
+}
+
+int fimc_is_clk_enable(struct fimc_is *is)
+{
+	int ret;
+
+	ret = clk_enable(is->clock[IS_CLK_ISP]);
+	ret |= clk_enable(is->clock[IS_CLK_MCU_ISP]);
+	return ret;
+}
+
+void fimc_is_clk_disable(struct fimc_is *is)
+{
+	clk_disable(is->clock[IS_CLK_ISP]);
+	clk_disable(is->clock[IS_CLK_MCU_ISP]);
+}
+
+static int fimc_is_pm_resume(struct device *dev)
+{
+	struct fimc_is *is = dev_get_drvdata(dev);
+	int ret;
+
+	ret = fimc_is_clk_enable(is);
+	if (ret < 0)
+		dev_err(dev, "Could not enable clocks\n");
+
+	return 0;
+}
+
+static int fimc_is_pm_suspend(struct device *dev)
+{
+	struct fimc_is *is = dev_get_drvdata(dev);
+
+	fimc_is_clk_disable(is);
+	return 0;
+}
+
+static int fimc_is_runtime_resume(struct device *dev)
+{
+	return fimc_is_pm_resume(dev);
+}
+
+static int fimc_is_runtime_suspend(struct device *dev)
+{
+	return fimc_is_pm_suspend(dev);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int fimc_is_resume(struct device *dev)
+{
+	return fimc_is_pm_resume(dev);
+}
+
+static int fimc_is_suspend(struct device *dev)
+{
+	return fimc_is_pm_suspend(dev);
+}
+#endif /* CONFIG_PM_SLEEP */
+
+static int fimc_is_remove(struct platform_device *pdev)
+{
+	struct fimc_is *is = platform_get_drvdata(pdev);
+	struct device *dev = &pdev->dev;
+
+	pm_runtime_disable(dev);
+	pm_runtime_set_suspended(dev);
+	fimc_is_pipeline_destroy(&is->pipeline);
+	vb2_dma_contig_cleanup_ctx(is->alloc_ctx);
+	fimc_is_clk_put(is);
+
+	return 0;
+}
+
+static const struct dev_pm_ops fimc_is_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(fimc_is_suspend, fimc_is_resume)
+	SET_RUNTIME_PM_OPS(fimc_is_runtime_suspend, fimc_is_runtime_resume,
+			   NULL)
+};
+
+static const struct of_device_id exynos5_fimc_is_match[] = {
+	{
+		.compatible = "samsung,exynos5250-fimc-is",
+	},
+	{},
+};
+MODULE_DEVICE_TABLE(of, exynos5_fimc_is_match);
+
+static struct platform_driver fimc_is_driver = {
+	.probe		= fimc_is_probe,
+	.remove		= fimc_is_remove,
+	.driver = {
+		.name	= FIMC_IS_DRV_NAME,
+		.owner	= THIS_MODULE,
+		.pm	= &fimc_is_pm_ops,
+		.of_match_table = exynos5_fimc_is_match,
+	}
+};
+module_platform_driver(fimc_is_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Arun Kumar K <arun.kk@samsung.com>");
+MODULE_DESCRIPTION("Samsung Exynos5 (FIMC-IS) Imaging Subsystem driver");
diff --git a/drivers/media/platform/exynos5-is/fimc-is-core.h b/drivers/media/platform/exynos5-is/fimc-is-core.h
new file mode 100644
index 0000000..0512280
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-core.h
@@ -0,0 +1,126 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ *  Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef FIMC_IS_CORE_H_
+#define FIMC_IS_CORE_H_
+
+#include <linux/bug.h>
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+#include <linux/firmware.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+#include <linux/videodev2.h>
+
+#include <asm/barrier.h>
+#include <linux/sizes.h>
+#include <linux/io.h>
+#include <linux/irqreturn.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+
+#include <media/media-entity.h>
+#include <media/videobuf2-core.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-mem2mem.h>
+#include <media/v4l2-mediabus.h>
+#include <media/s5p_fimc.h>
+
+#define FIMC_IS_DRV_NAME		"exynos5-fimc-is"
+#define FIMC_IS_CLK_NAME		"fimc_is"
+
+#define FIMC_IS_DEBUG_MSG		0x3f
+#define FIMC_IS_DEBUG_LEVEL		3
+
+#define FIMC_IS_COMMAND_TIMEOUT		(3*HZ)
+#define FIMC_IS_STARTUP_TIMEOUT		(3*HZ)
+#define FIMC_IS_SHUTDOWN_TIMEOUT	(10*HZ)
+
+#define FW_SHARED_OFFSET		(0x8C0000)
+#define DEBUG_CNT			(500*1024)
+#define DEBUG_OFFSET			(0x840000)
+#define DEBUGCTL_OFFSET			(0x8BD000)
+#define DEBUG_FCOUNT			(0x8C64C0)
+
+#define FIMC_IS_MAX_INSTANCES		1
+
+#define FIMC_IS_MAX_GPIOS		32
+#define FIMC_IS_NUM_SENSORS		2
+
+#define FIMC_IS_MAX_PLANES		3
+#define FIMC_IS_NUM_SCALERS		2
+
+enum fimc_is_clks {
+	IS_CLK_ISP,
+	IS_CLK_MCU_ISP,
+	IS_CLK_ISP_DIV0,
+	IS_CLK_ISP_DIV1,
+	IS_CLK_ISP_DIVMPWM,
+	IS_CLK_MCU_ISP_DIV0,
+	IS_CLK_MCU_ISP_DIV1,
+	IS_CLK_MAX_NUM
+};
+
+/* Video capture states */
+enum fimc_is_video_state {
+	STATE_INIT,
+	STATE_BUFS_ALLOCATED,
+	STATE_RUNNING,
+};
+
+enum fimc_is_scaler_id {
+	SCALER_SCC,
+	SCALER_SCP
+};
+
+enum fimc_is_sensor_pos {
+	SENSOR_CAM0,
+	SENSOR_CAM1
+};
+
+struct fimc_is_buf {
+	struct list_head list;
+	struct vb2_buffer *vb;
+	unsigned int paddr[FIMC_IS_MAX_PLANES];
+};
+
+struct fimc_is_meminfo {
+	unsigned int fw_paddr;
+	unsigned int fw_vaddr;
+	unsigned int region_paddr;
+	unsigned int region_vaddr;
+	unsigned int shared_paddr;
+	unsigned int shared_vaddr;
+};
+
+/**
+ * struct fimc_is_fmt - the driver's internal color format data
+ * @name: format description
+ * @fourcc: the fourcc code for this format
+ * @depth: number of bytes per pixel
+ * @num_planes: number of planes for this color format
+ */
+struct fimc_is_fmt {
+	char		*name;
+	unsigned int	fourcc;
+	unsigned int	depth[FIMC_IS_MAX_PLANES];
+	unsigned int	num_planes;
+};
+
+#endif
-- 
1.7.9.5

[RFC v2 03/10] exynos5-fimc-is: Adds common driver header files

[Arun Kumar K]

This patch adds all the common header files used by the fimc-is
driver. It includes the commands for interfacing with the firmware
and error codes from IS firmware, metadata and command parameter
definitions.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
---
 drivers/media/platform/exynos5-is/fimc-is-cmd.h    |  201 ++++
 drivers/media/platform/exynos5-is/fimc-is-err.h    |  261 ++++
 .../media/platform/exynos5-is/fimc-is-metadata.h   |  771 ++++++++++++
 drivers/media/platform/exynos5-is/fimc-is-param.h  | 1259 ++++++++++++++++++++
 4 files changed, 2492 insertions(+)
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-cmd.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-err.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-metadata.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-param.h

diff --git a/drivers/media/platform/exynos5-is/fimc-is-cmd.h b/drivers/media/platform/exynos5-is/fimc-is-cmd.h
new file mode 100644
index 0000000..4adf832
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-cmd.h
@@ -0,0 +1,201 @@
+/*
+ * Samsung Exynos5 SoC series FIMC-IS driver
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd
+ * Kil-yeon Lim <kilyeon.im@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef FIMC_IS_CMD_H
+#define FIMC_IS_CMD_H
+
+#define IS_COMMAND_VER 122 /* IS COMMAND VERSION 1.22 */
+
+enum is_cmd {
+	/* HOST -> IS */
+	HIC_PREVIEW_STILL = 0x1,
+	HIC_PREVIEW_VIDEO,
+	HIC_CAPTURE_STILL,
+	HIC_CAPTURE_VIDEO,
+	HIC_PROCESS_START,
+	HIC_PROCESS_STOP,
+	HIC_STREAM_ON,
+	HIC_STREAM_OFF,
+	HIC_SHOT,
+	HIC_GET_STATIC_METADATA,
+	HIC_SET_CAM_CONTROL,
+	HIC_GET_CAM_CONTROL,
+	HIC_SET_PARAMETER,
+	HIC_GET_PARAMETER,
+	HIC_SET_A5_MEM_ACCESS,
+	RESERVED2,
+	HIC_GET_STATUS,
+	/* SENSOR PART*/
+	HIC_OPEN_SENSOR,
+	HIC_CLOSE_SENSOR,
+	HIC_SIMMIAN_INIT,
+	HIC_SIMMIAN_WRITE,
+	HIC_SIMMIAN_READ,
+	HIC_POWER_DOWN,
+	HIC_GET_SET_FILE_ADDR,
+	HIC_LOAD_SET_FILE,
+	HIC_MSG_CONFIG,
+	HIC_MSG_TEST,
+	/* IS -> HOST */
+	IHC_GET_SENSOR_NUMBER = 0x1000,
+	/* Parameter1 : Address of space to copy a setfile */
+	/* Parameter2 : Space szie */
+	IHC_SET_SHOT_MARK,
+	/* PARAM1 : a frame number */
+	/* PARAM2 : confidence level(smile 0~100) */
+	/* PARMA3 : confidence level(blink 0~100) */
+	IHC_SET_FACE_MARK,
+	/* PARAM1 : coordinate count */
+	/* PARAM2 : coordinate buffer address */
+	IHC_FRAME_DONE,
+	/* PARAM1 : frame start number */
+	/* PARAM2 : frame count */
+	IHC_AA_DONE,
+	IHC_NOT_READY,
+	IHC_FLASH_READY
+};
+
+enum is_reply {
+	ISR_DONE	= 0x2000,
+	ISR_NDONE
+};
+
+enum is_scenario_id {
+	ISS_PREVIEW_STILL,
+	ISS_PREVIEW_VIDEO,
+	ISS_CAPTURE_STILL,
+	ISS_CAPTURE_VIDEO,
+	ISS_END
+};
+
+enum is_subscenario_id {
+	ISS_SUB_SCENARIO_STILL,
+	ISS_SUB_SCENARIO_VIDEO,
+	ISS_SUB_SCENARIO_SCENE1,
+	ISS_SUB_SCENARIO_SCENE2,
+	ISS_SUB_SCENARIO_SCENE3,
+	ISS_SUB_END
+};
+
+struct is_setfile_header_element {
+	u32 binary_addr;
+	u32 binary_size;
+};
+
+struct is_setfile_header {
+	struct is_setfile_header_element isp[ISS_END];
+	struct is_setfile_header_element drc[ISS_END];
+	struct is_setfile_header_element fd[ISS_END];
+};
+
+struct is_common_reg {
+	u32 hicmd;
+	u32 hic_sensorid;
+	u32 hic_param1;
+	u32 hic_param2;
+	u32 hic_param3;
+	u32 hic_param4;
+
+	u32 reserved1[3];
+
+	u32 ihcmd_iflag;
+	u32 ihcmd;
+	u32 ihc_sensorid;
+	u32 ihc_param1;
+	u32 ihc_param2;
+	u32 ihc_param3;
+	u32 ihc_param4;
+
+	u32 reserved2[3];
+
+	u32 isp_bayer_iflag;
+	u32 isp_bayer_sensor_id;
+	u32 isp_bayer_param1;
+	u32 isp_bayer_param2;
+
+	u32 reserved3[4];
+
+	u32 scc_iflag;
+	u32 scc_sensor_id;
+	u32 scc_param1;
+	u32 scc_param2;
+	u32 scc_param3;
+
+	u32 reserved4[3];
+
+	u32 dnr_iflag;
+	u32 dnr_sensor_id;
+	u32 dnr_param1;
+	u32 dnr_param2;
+
+	u32 reserved5[4];
+
+	u32 scp_iflag;
+	u32 scp_sensor_id;
+	u32 scp_param1;
+	u32 scp_param2;
+	u32 scp_param3;
+
+	u32 reserved6[1];
+
+	u32 isp_yuv_iflag;
+	u32 isp_yuv_sensor_id;
+	u32 isp_yuv_param1;
+	u32 isp_yuv_param2;
+
+	u32 reserved7[1];
+
+	u32 shot_iflag;
+	u32 shot_sensor_id;
+	u32 shot_param1;
+	u32 shot_param2;
+
+	u32 reserved8[1];
+
+	u32 meta_iflag;
+	u32 meta_sensor_id;
+	u32 meta_param1;
+
+	u32 reserved9[1];
+
+	u32 fcount;
+};
+
+struct is_mcuctl_reg {
+	u32 mcuctl;
+	u32 bboar;
+
+	u32 intgr0;
+	u32 intcr0;
+	u32 intmr0;
+	u32 intsr0;
+	u32 intmsr0;
+
+	u32 intgr1;
+	u32 intcr1;
+	u32 intmr1;
+	u32 intsr1;
+	u32 intmsr1;
+
+	u32 intcr2;
+	u32 intmr2;
+	u32 intsr2;
+	u32 intmsr2;
+
+	u32 gpoctrl;
+	u32 cpoenctlr;
+	u32 gpictlr;
+
+	u32 pad[0xD];
+
+	struct is_common_reg common_reg;
+};
+#endif
diff --git a/drivers/media/platform/exynos5-is/fimc-is-err.h b/drivers/media/platform/exynos5-is/fimc-is-err.h
new file mode 100644
index 0000000..49d7cf5
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-err.h
@@ -0,0 +1,261 @@
+/*
+ * Samsung Exynos5 SoC series FIMC-IS driver
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd
+ * Arun Kumar K <arun.kk@samsung.com>
+ * Kil-yeon Lim <kilyeon.im@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef FIMC_IS_ERR_H
+#define FIMC_IS_ERR_H
+
+#define IS_ERROR_VER 012 /* IS ERROR VERSION 0.07 */
+
+/* IS error enum */
+enum is_error {
+
+	IS_ERROR_SUCCESS = 0,
+
+	/* General 1 ~ 100 */
+	IS_ERROR_INVALID_COMMAND = 1,
+	IS_ERROR_REQUEST_FAIL,
+	IS_ERROR_INVALID_SCENARIO,
+	IS_ERROR_INVALID_SENSORID,
+	IS_ERROR_INVALID_MODE_CHANGE,
+	IS_ERROR_INVALID_MAGIC_NUMBER,
+	IS_ERROR_INVALID_SETFILE_HDR,
+	IS_ERROR_ISP_SETFILE_VERSION_MISMATCH,
+	IS_ERROR_ISP_SETFILE_REVISION_MISMATCH,
+	IS_ERROR_BUSY,
+	IS_ERROR_SET_PARAMETER,
+	IS_ERROR_INVALID_PATH,
+	IS_ERROR_OPEN_SENSOR_FAIL,
+	IS_ERROR_ENTRY_MSG_THREAD_DOWN,
+	IS_ERROR_ISP_FRAME_END_NOT_DONE,
+	IS_ERROR_DRC_FRAME_END_NOT_DONE,
+	IS_ERROR_SCALERC_FRAME_END_NOT_DONE,
+	IS_ERROR_ODC_FRAME_END_NOT_DONE,
+	IS_ERROR_DIS_FRAME_END_NOT_DONE,
+	IS_ERROR_TDNR_FRAME_END_NOT_DONE,
+	IS_ERROR_SCALERP_FRAME_END_NOT_DONE,
+	IS_ERROR_WAIT_STREAM_OFF_NOT_DONE,
+	IS_ERROR_NO_MSG_IS_RECEIVED,
+	IS_ERROR_SENSOR_MSG_FAIL,
+	IS_ERROR_ISP_MSG_FAIL,
+	IS_ERROR_DRC_MSG_FAIL,
+	IS_ERROR_SCALERC_MSG_FAIL,
+	IS_ERROR_ODC_MSG_FAIL,
+	IS_ERROR_DIS_MSG_FAIL,
+	IS_ERROR_TDNR_MSG_FAIL,
+	IS_ERROR_SCALERP_MSG_FAIL,
+	IS_ERROR_LHFD_MSG_FAIL,
+	IS_ERROR_INTERNAL_STOP,
+	IS_ERROR_UNKNOWN,
+	IS_ERROR_TIME_OUT_FLAG,
+
+	/* Sensor 100 ~ 200 */
+	IS_ERROR_SENSOR_PWRDN_FAIL = 100,
+	IS_ERROR_SENSOR_STREAM_ON_FAIL,
+	IS_ERROR_SENSOR_STREAM_OFF_FAIL,
+
+	/* ISP 200 ~ 300 */
+	IS_ERROR_ISP_PWRDN_FAIL = 200,
+	IS_ERROR_ISP_MULTIPLE_INPUT,
+	IS_ERROR_ISP_ABSENT_INPUT,
+	IS_ERROR_ISP_ABSENT_OUTPUT,
+	IS_ERROR_ISP_NONADJACENT_OUTPUT,
+	IS_ERROR_ISP_FORMAT_MISMATCH,
+	IS_ERROR_ISP_WIDTH_MISMATCH,
+	IS_ERROR_ISP_HEIGHT_MISMATCH,
+	IS_ERROR_ISP_BITWIDTH_MISMATCH,
+	IS_ERROR_ISP_FRAME_END_TIME_OUT,
+
+	/* DRC 300 ~ 400 */
+	IS_ERROR_DRC_PWRDN_FAIL = 300,
+	IS_ERROR_DRC_MULTIPLE_INPUT,
+	IS_ERROR_DRC_ABSENT_INPUT,
+	IS_ERROR_DRC_NONADJACENT_INTPUT,
+	IS_ERROR_DRC_ABSENT_OUTPUT,
+	IS_ERROR_DRC_NONADJACENT_OUTPUT,
+	IS_ERROR_DRC_FORMAT_MISMATCH,
+	IS_ERROR_DRC_WIDTH_MISMATCH,
+	IS_ERROR_DRC_HEIGHT_MISMATCH,
+	IS_ERROR_DRC_BITWIDTH_MISMATCH,
+	IS_ERROR_DRC_FRAME_END_TIME_OUT,
+
+	/*SCALERC(400~500)*/
+	IS_ERROR_SCALERC_PWRDN_FAIL = 400,
+
+	/*ODC(500~600)*/
+	IS_ERROR_ODC_PWRDN_FAIL = 500,
+
+	/*DIS(600~700)*/
+	IS_ERROR_DIS_PWRDN_FAIL = 600,
+
+	/*TDNR(700~800)*/
+	IS_ERROR_TDNR_PWRDN_FAIL = 700,
+
+	/*SCALERP(800~900)*/
+	IS_ERROR_SCALERP_PWRDN_FAIL = 800,
+
+	/*FD(900~1000)*/
+	IS_ERROR_FD_PWRDN_FAIL = 900,
+	IS_ERROR_FD_MULTIPLE_INPUT,
+	IS_ERROR_FD_ABSENT_INPUT,
+	IS_ERROR_FD_NONADJACENT_INPUT,
+	IS_ERROR_LHFD_FRAME_END_TIME_OUT,
+};
+
+/* Set parameter error enum */
+enum error {
+	/* Common error (0~99) */
+	ERROR_COMMON_NO			= 0,
+	ERROR_COMMON_CMD		= 1,	/* Invalid command*/
+	ERROR_COMMON_PARAMETER		= 2,	/* Invalid parameter*/
+	/* setfile is not loaded before adjusting */
+	ERROR_COMMON_SETFILE_LOAD	= 3,
+	/* setfile is not Adjusted before runnng. */
+	ERROR_COMMON_SETFILE_ADJUST	= 4,
+	/* index of setfile is not valid. */
+	ERROR_COMMON_SETFILE_INDEX = 5,
+	/* Input path can be changed in ready state(stop) */
+	ERROR_COMMON_INPUT_PATH		= 6,
+	/* IP can not start if input path is not set */
+	ERROR_COMMON_INPUT_INIT		= 7,
+	/* Output path can be changed in ready state(stop) */
+	ERROR_COMMON_OUTPUT_PATH	= 8,
+	/* IP can not start if output path is not set */
+	ERROR_COMMON_OUTPUT_INIT	= 9,
+
+	ERROR_CONTROL_NO		= ERROR_COMMON_NO,
+	ERROR_CONTROL_BYPASS		= 11,	/* Enable or Disable */
+	ERROR_CONTROL_BUF		= 12,	/* invalid buffer info */
+
+	ERROR_OTF_INPUT_NO		= ERROR_COMMON_NO,
+	/* invalid command */
+	ERROR_OTF_INPUT_CMD		= 21,
+	/* invalid format  (DRC: YUV444, FD: YUV444, 422, 420) */
+	ERROR_OTF_INPUT_FORMAT		= 22,
+	/* invalid width (DRC: 128~8192, FD: 32~8190) */
+	ERROR_OTF_INPUT_WIDTH		= 23,
+	/* invalid height (DRC: 64~8192, FD: 16~8190) */
+	ERROR_OTF_INPUT_HEIGHT		= 24,
+	/* invalid bit-width (DRC: 8~12bits, FD: 8bit) */
+	ERROR_OTF_INPUT_BIT_WIDTH	= 25,
+	/* invalid frame time for ISP */
+	ERROR_OTF_INPUT_USER_FRAMETILE = 26,
+
+	ERROR_DMA_INPUT_NO		= ERROR_COMMON_NO,
+	/* invalid width (DRC: 128~8192, FD: 32~8190) */
+	ERROR_DMA_INPUT_WIDTH		= 31,
+	/* invalid height (DRC: 64~8192, FD: 16~8190) */
+	ERROR_DMA_INPUT_HEIGHT		= 32,
+	/* invalid format (DRC: YUV444 or YUV422, FD: YUV444, 422, 420) */
+	ERROR_DMA_INPUT_FORMAT		= 33,
+	/* invalid bit-width (DRC: 8~12bit, FD: 8bit) */
+	ERROR_DMA_INPUT_BIT_WIDTH	= 34,
+	/* invalid order(DRC: YYCbCrorYCbYCr, FD:NO,YYCbCr,YCbYCr,CbCr,CrCb) */
+	ERROR_DMA_INPUT_ORDER		= 35,
+	/* invalid palne (DRC: 3, FD: 1, 2, 3) */
+	ERROR_DMA_INPUT_PLANE		= 36,
+
+	ERROR_OTF_OUTPUT_NO		= ERROR_COMMON_NO,
+	/* invalid width (DRC: 128~8192) */
+	ERROR_OTF_OUTPUT_WIDTH		= 41,
+	/* invalid height (DRC: 64~8192) */
+	ERROR_OTF_OUTPUT_HEIGHT		= 42,
+	/* invalid format (DRC: YUV444) */
+	ERROR_OTF_OUTPUT_FORMAT		= 43,
+	/* invalid bit-width (DRC: 8~12bits) */
+	ERROR_OTF_OUTPUT_BIT_WIDTH	= 44,
+	/* invalid crop size (ODC: left>2, right>10) */
+	ERROR_OTF_OUTPUT_CROP		= 45,
+
+	ERROR_DMA_OUTPUT_NO		= ERROR_COMMON_NO,
+	ERROR_DMA_OUTPUT_WIDTH		= 51,	/* invalid width */
+	ERROR_DMA_OUTPUT_HEIGHT		= 52,	/* invalid height */
+	ERROR_DMA_OUTPUT_FORMAT		= 53,	/* invalid format */
+	ERROR_DMA_OUTPUT_BIT_WIDTH	= 54,	/* invalid bit-width */
+	ERROR_DMA_OUTPUT_PLANE		= 55,	/* invalid plane */
+	ERROR_DMA_OUTPUT_ORDER		= 56,	/* invalid order */
+	ERROR_DMA_OUTPUT_BUF		= 57,	/* invalid buffer info */
+
+	ERROR_GLOBAL_SHOTMODE_NO	= ERROR_COMMON_NO,
+
+	/* SENSOR Error(100~199) */
+	ERROR_SENSOR_NO			= ERROR_COMMON_NO,
+	ERROR_SENSOR_I2C_FAIL		= 101,
+	ERROR_SENSOR_INVALID_FRAMERATE,
+	ERROR_SENSOR_INVALID_EXPOSURETIME,
+	ERROR_SENSOR_INVALID_SIZE,
+	ERROR_SENSOR_ACTURATOR_INIT_FAIL,
+	ERROR_SENSOR_INVALID_AF_POS,
+	ERROR_SENSOR_UNSUPPORT_FUNC,
+	ERROR_SENSOR_UNSUPPORT_PERI,
+	ERROR_SENSOR_UNSUPPORT_AF,
+	ERROR_SENSOR_FLASH_FAIL,
+	ERROR_SENSOR_START_FAIL,
+	ERROR_SENSOR_STOP_FAIL,
+
+	/* ISP Error (200~299) */
+	ERROR_ISP_AF_NO			= ERROR_COMMON_NO,
+	ERROR_ISP_AF_BUSY		= 201,
+	ERROR_ISP_AF_INVALID_COMMAND	= 202,
+	ERROR_ISP_AF_INVALID_MODE	= 203,
+	ERROR_ISP_FLASH_NO		= ERROR_COMMON_NO,
+	ERROR_ISP_AWB_NO		= ERROR_COMMON_NO,
+	ERROR_ISP_IMAGE_EFFECT_NO	= ERROR_COMMON_NO,
+	ERROR_ISP_IMAGE_EFFECT_INVALID	= 231,
+	ERROR_ISP_ISO_NO		= ERROR_COMMON_NO,
+	ERROR_ISP_ADJUST_NO		= ERROR_COMMON_NO,
+	ERROR_ISP_METERING_NO		= ERROR_COMMON_NO,
+	ERROR_ISP_AFC_NO		= ERROR_COMMON_NO,
+
+	/* DRC Error (300~399) */
+
+	/* FD Error  (400~499) */
+	ERROR_FD_NO					= ERROR_COMMON_NO,
+	/* Invalid max number (1~16) */
+	ERROR_FD_CONFIG_MAX_NUMBER_STATE		= 401,
+	ERROR_FD_CONFIG_MAX_NUMBER_INVALID		= 402,
+	ERROR_FD_CONFIG_YAW_ANGLE_STATE			= 403,
+	ERROR_FD_CONFIG_YAW_ANGLE_INVALID		= 404,
+	ERROR_FD_CONFIG_ROLL_ANGLE_STATE		= 405,
+	ERROR_FD_CONFIG_ROLL_ANGLE_INVALID		= 406,
+	ERROR_FD_CONFIG_SMILE_MODE_INVALID		= 407,
+	ERROR_FD_CONFIG_BLINK_MODE_INVALID		= 408,
+	ERROR_FD_CONFIG_EYES_DETECT_INVALID		= 409,
+	ERROR_FD_CONFIG_MOUTH_DETECT_INVALID		= 410,
+	ERROR_FD_CONFIG_ORIENTATION_STATE		= 411,
+	ERROR_FD_CONFIG_ORIENTATION_INVALID		= 412,
+	ERROR_FD_CONFIG_ORIENTATION_VALUE_INVALID	= 413,
+	/* PARAM_FdResultStr can be only applied
+	 * in ready-state or stream off */
+	ERROR_FD_RESULT				= 414,
+	/* PARAM_FdModeStr can be only applied
+	 * in ready-state or stream off */
+	ERROR_FD_MODE					= 415,
+
+	/*SCALER ERR(500~599)*/
+	ERROR_SCALER_NO			= ERROR_COMMON_NO,
+	ERROR_SCALER_DMA_OUTSEL		= 501,
+	ERROR_SCALER_H_RATIO			= 502,
+	ERROR_SCALER_V_RATIO			= 503,
+	ERROR_SCALER_FRAME_BUFFER_SEQ		= 504,
+
+	ERROR_SCALER_IMAGE_EFFECT		= 510,
+
+	ERROR_SCALER_ROTATE			= 520,
+	ERROR_SCALER_FLIP			= 521,
+
+};
+
+#define ENOBASE_IS		0x10000
+#define	ENOSHOT			(ENOBASE_IS + 1) /* shot error */
+#define ENOMDONE		(ENOBASE_IS + 2) /* meta done error */
+
+#endif
diff --git a/drivers/media/platform/exynos5-is/fimc-is-metadata.h b/drivers/media/platform/exynos5-is/fimc-is-metadata.h
new file mode 100644
index 0000000..9738d7d
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-metadata.h
@@ -0,0 +1,771 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Kil-yeon Lim <kilyeon.im@samsung.com>
+ * Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef FIMC_IS_METADATA_H_
+#define FIMC_IS_METADATA_H_
+
+struct rational {
+	uint32_t num;
+	uint32_t den;
+};
+
+#define CAMERA2_MAX_AVAILABLE_MODE	21
+#define CAMERA2_MAX_FACES		16
+
+/*
+ *controls/dynamic metadata
+*/
+
+enum metadata_mode {
+	METADATA_MODE_NONE,
+	METADATA_MODE_FULL
+};
+
+struct camera2_request_ctl {
+	uint32_t		id;
+	enum metadata_mode	metadatamode;
+	uint8_t			outputstreams[16];
+	uint32_t		framecount;
+};
+
+struct camera2_request_dm {
+	uint32_t		id;
+	enum metadata_mode	metadatamode;
+	uint32_t		framecount;
+};
+
+
+
+enum optical_stabilization_mode {
+	OPTICAL_STABILIZATION_MODE_OFF,
+	OPTICAL_STABILIZATION_MODE_ON
+};
+
+enum lens_facing {
+	LENS_FACING_BACK,
+	LENS_FACING_FRONT
+};
+
+struct camera2_lens_ctl {
+	uint32_t				focusdistance;
+	float					aperture;
+	float					focallength;
+	float					filterdensity;
+	enum optical_stabilization_mode		opticalstabilizationmode;
+
+};
+
+struct camera2_lens_dm {
+	uint32_t				focusdistance;
+	float					aperture;
+	float					focalilength;
+	float					filterdensity;
+	enum optical_stabilization_mode		opticalstabilizationmode;
+	float					focusrange[2];
+};
+
+struct camera2_lens_sm {
+	float				minimumfocusdistance;
+	float				hyperfocaldistance;
+	float				availablefocalLength[2];
+	float				availableapertures;
+	/*assuming 1 aperture*/
+	float				availablefilterdensities;
+	/*assuming 1 ND filter value*/
+	enum optical_stabilization_mode	availableopticalstabilization;
+	/*assuming 1*/
+	uint32_t			shadingmapsize;
+	float				shadingmap[3][40][30];
+	uint32_t			geometriccorrectionmapsize;
+	float				geometriccorrectionmap[2][3][40][30];
+	enum lens_facing		facing;
+	float				position[2];
+};
+
+enum sensor_colorfilterarrangement {
+	SENSOR_COLORFILTERARRANGEMENT_RGGB,
+	SENSOR_COLORFILTERARRANGEMENT_GRBG,
+	SENSOR_COLORFILTERARRANGEMENT_GBRG,
+	SENSOR_COLORFILTERARRANGEMENT_BGGR,
+	SENSOR_COLORFILTERARRANGEMENT_RGB
+};
+
+enum sensor_ref_illuminant {
+	SENSOR_ILLUMINANT_DAYLIGHT = 1,
+	SENSOR_ILLUMINANT_FLUORESCENT = 2,
+	SENSOR_ILLUMINANT_TUNGSTEN = 3,
+	SENSOR_ILLUMINANT_FLASH = 4,
+	SENSOR_ILLUMINANT_FINE_WEATHER = 9,
+	SENSOR_ILLUMINANT_CLOUDY_WEATHER = 10,
+	SENSOR_ILLUMINANT_SHADE = 11,
+	SENSOR_ILLUMINANT_DAYLIGHT_FLUORESCENT = 12,
+	SENSOR_ILLUMINANT_DAY_WHITE_FLUORESCENT = 13,
+	SENSOR_ILLUMINANT_COOL_WHITE_FLUORESCENT = 14,
+	SENSOR_ILLUMINANT_WHITE_FLUORESCENT = 15,
+	SENSOR_ILLUMINANT_STANDARD_A = 17,
+	SENSOR_ILLUMINANT_STANDARD_B = 18,
+	SENSOR_ILLUMINANT_STANDARD_C = 19,
+	SENSOR_ILLUMINANT_D55 = 20,
+	SENSOR_ILLUMINANT_D65 = 21,
+	SENSOR_ILLUMINANT_D75 = 22,
+	SENSOR_ILLUMINANT_D50 = 23,
+	SENSOR_ILLUMINANT_ISO_STUDIO_TUNGSTEN = 24
+};
+
+struct camera2_sensor_ctl {
+	/* unit : nano */
+	uint64_t	exposuretime;
+	/* unit : nano(It's min frame duration */
+	uint64_t	frameduration;
+	/* unit : percent(need to change ISO value?) */
+	uint32_t	sensitivity;
+};
+
+struct camera2_sensor_dm {
+	uint64_t	exposuretime;
+	uint64_t	frameduration;
+	uint32_t	sensitivity;
+	uint64_t	timestamp;
+};
+
+struct camera2_sensor_sm {
+	uint32_t	exposuretimerange[2];
+	uint32_t	maxframeduration;
+	/* list of available sensitivities. */
+	uint32_t	availablesensitivities[10];
+	enum sensor_colorfilterarrangement colorfilterarrangement;
+	float		physicalsize[2];
+	uint32_t	pixelarraysize[2];
+	uint32_t	activearraysize[4];
+	uint32_t	whitelevel;
+	uint32_t	blacklevelpattern[4];
+	struct rational	colortransform1[9];
+	struct rational	colortransform2[9];
+	enum sensor_ref_illuminant	referenceilluminant1;
+	enum sensor_ref_illuminant	referenceilluminant2;
+	struct rational	forwardmatrix1[9];
+	struct rational	forwardmatrix2[9];
+	struct rational	calibrationtransform1[9];
+	struct rational	calibrationtransform2[9];
+	struct rational	basegainfactor;
+	uint32_t	maxanalogsensitivity;
+	float		noisemodelcoefficients[2];
+	uint32_t	orientation;
+};
+
+
+
+enum flash_mode {
+	CAM2_FLASH_MODE_OFF = 1,
+	CAM2_FLASH_MODE_SINGLE,
+	CAM2_FLASH_MODE_TORCH,
+	CAM2_FLASH_MODE_BEST
+};
+
+struct camera2_flash_ctl {
+	enum flash_mode		flashmode;
+	uint32_t		firingpower;
+	uint64_t		firingtime;
+};
+
+struct camera2_flash_dm {
+	enum flash_mode		flashmode;
+	/*10 is max power*/
+	uint32_t		firingpower;
+	/*unit : microseconds*/
+	uint64_t		firingtime;
+	/*1 : stable, 0 : unstable*/
+	uint32_t		firingstable;
+	/*1 : success, 0 : fail*/
+	uint32_t		decision;
+};
+
+struct camera2_flash_sm {
+	uint32_t	available;
+	uint64_t	chargeduration;
+};
+
+enum processing_mode {
+	PROCESSING_MODE_OFF = 1,
+	PROCESSING_MODE_FAST,
+	PROCESSING_MODE_HIGH_QUALITY
+};
+
+
+struct camera2_hotpixel_ctl {
+	enum processing_mode	mode;
+};
+
+struct camera2_hotpixel_dm {
+	enum processing_mode	mode;
+};
+
+struct camera2_demosaic_ctl {
+	enum processing_mode	mode;
+};
+
+struct camera2_demosaic_dm {
+	enum processing_mode	mode;
+};
+
+struct camera2_noisereduction_ctl {
+	enum processing_mode	mode;
+	uint32_t		strength;
+};
+
+struct camera2_noisereduction_dm {
+	enum processing_mode	mode;
+	uint32_t		strength;
+};
+
+struct camera2_shading_ctl {
+	enum processing_mode	mode;
+};
+
+struct camera2_shading_dm {
+	enum processing_mode	mode;
+};
+
+struct camera2_geometric_ctl {
+	enum processing_mode	mode;
+};
+
+struct camera2_geometric_dm {
+	enum processing_mode	mode;
+};
+
+enum colorcorrection_mode {
+	COLORCORRECTION_MODE_FAST = 1,
+	COLORCORRECTION_MODE_HIGH_QUALITY,
+	COLORCORRECTION_MODE_TRANSFORM_MATRIX,
+	COLORCORRECTION_MODE_EFFECT_MONO,
+	COLORCORRECTION_MODE_EFFECT_NEGATIVE,
+	COLORCORRECTION_MODE_EFFECT_SOLARIZE,
+	COLORCORRECTION_MODE_EFFECT_SEPIA,
+	COLORCORRECTION_MODE_EFFECT_POSTERIZE,
+	COLORCORRECTION_MODE_EFFECT_WHITEBOARD,
+	COLORCORRECTION_MODE_EFFECT_BLACKBOARD,
+	COLORCORRECTION_MODE_EFFECT_AQUA
+};
+
+
+struct camera2_colorcorrection_ctl {
+	enum colorcorrection_mode	mode;
+	float				transform[9];
+	uint32_t			hue;
+	uint32_t			saturation;
+	uint32_t			brightness;
+};
+
+struct camera2_colorcorrection_dm {
+	enum colorcorrection_mode	mode;
+	float				transform[9];
+	uint32_t			hue;
+	uint32_t			saturation;
+	uint32_t			brightness;
+};
+
+struct camera2_colorcorrection_sm {
+	/*assuming 10 supported modes*/
+	uint8_t			availablemodes[CAMERA2_MAX_AVAILABLE_MODE];
+	uint32_t		huerange[2];
+	uint32_t		saturationrange[2];
+	uint32_t		brightnessrange[2];
+};
+
+enum tonemap_mode {
+	TONEMAP_MODE_FAST = 1,
+	TONEMAP_MODE_HIGH_QUALITY,
+	TONEMAP_MODE_CONTRAST_CURVE
+};
+
+struct camera2_tonemap_ctl {
+	enum tonemap_mode		mode;
+	/* assuming maxCurvePoints = 64 */
+	float				curvered[64];
+	float				curvegreen[64];
+	float				curveblue[64];
+};
+
+struct camera2_tonemap_dm {
+	enum tonemap_mode		mode;
+	/* assuming maxCurvePoints = 64 */
+	float				curvered[64];
+	float				curvegreen[64];
+	float				curveblue[64];
+};
+
+struct camera2_tonemap_sm {
+	uint32_t	maxcurvepoints;
+};
+
+struct camera2_edge_ctl {
+	enum processing_mode	mode;
+	uint32_t		strength;
+};
+
+struct camera2_edge_dm {
+	enum processing_mode	mode;
+	uint32_t		strength;
+};
+
+enum scaler_availableformats {
+	SCALER_FORMAT_BAYER_RAW,
+	SCALER_FORMAT_YV12,
+	SCALER_FORMAT_NV21,
+	SCALER_FORMAT_JPEG,
+	SCALER_FORMAT_UNKNOWN
+};
+
+struct camera2_scaler_ctl {
+	uint32_t	cropregion[3];
+};
+
+struct camera2_scaler_dm {
+	uint32_t	cropregion[3];
+};
+
+struct camera2_scaler_sm {
+	enum scaler_availableformats availableformats[4];
+	/*assuming # of availableFormats = 4*/
+	uint32_t	availablerawsizes;
+	uint64_t	availablerawmindurations;
+	/* needs check */
+	uint32_t	availableprocessedsizes[8];
+	uint64_t	availableprocessedmindurations[8];
+	uint32_t	availablejpegsizes[8][2];
+	uint64_t	availablejpegmindurations[8];
+	uint32_t	availablemaxdigitalzoom[8];
+};
+
+struct camera2_jpeg_ctl {
+	uint32_t	quality;
+	uint32_t	thumbnailsize[2];
+	uint32_t	thumbnailquality;
+	double		gpscoordinates[3];
+	uint32_t	gpsprocessingcethod;
+	uint64_t	gpstimestamp;
+	uint32_t	orientation;
+};
+
+struct camera2_jpeg_dm {
+	uint32_t	quality;
+	uint32_t	thumbnailsize[2];
+	uint32_t	thumbnailquality;
+	double		gpscoordinates[3];
+	uint32_t	gpsprocessingmethod;
+	uint64_t	gpstimestamp;
+	uint32_t	orientation;
+};
+
+struct camera2_jpeg_sm {
+	uint32_t	availablethumbnailsizes[8][2];
+	uint32_t	maxsize;
+	/*assuming supported size=8*/
+};
+
+enum facedetect_mode {
+	FACEDETECT_MODE_OFF = 1,
+	FACEDETECT_MODE_SIMPLE,
+	FACEDETECT_MODE_FULL
+};
+
+enum stats_mode {
+	STATS_MODE_OFF = 1,
+	STATS_MODE_ON
+};
+
+struct camera2_stats_ctl {
+	enum facedetect_mode	facedetectmode;
+	enum stats_mode		histogrammode;
+	enum stats_mode		sharpnessmapmode;
+};
+
+
+struct camera2_stats_dm {
+	enum facedetect_mode	facedetectmode;
+	uint32_t		facerectangles[CAMERA2_MAX_FACES][4];
+	uint8_t			facescores[CAMERA2_MAX_FACES];
+	uint32_t		facelandmarks[CAMERA2_MAX_FACES][6];
+	uint32_t		faceids[CAMERA2_MAX_FACES];
+	enum stats_mode		histogrammode;
+	uint32_t		histogram[3 * 256];
+	enum stats_mode		sharpnessmapmode;
+};
+
+
+struct camera2_stats_sm {
+	uint8_t		availablefacedetectmodes[CAMERA2_MAX_AVAILABLE_MODE];
+	/*assuming supported modes = 3;*/
+	uint32_t	maxfacecount;
+	uint32_t	histogrambucketcount;
+	uint32_t	maxhistogramcount;
+	uint32_t	sharpnessmapsize[2];
+	uint32_t	maxsharpnessmapvalue;
+};
+
+enum aa_capture_intent {
+	AA_CAPTURE_INTENT_CUSTOM = 0,
+	AA_CAPTURE_INTENT_PREVIEW,
+	AA_CAPTURE_INTENT_STILL_CAPTURE,
+	AA_CAPTURE_INTENT_VIDEO_RECORD,
+	AA_CAPTURE_INTENT_VIDEO_SNAPSHOT,
+	AA_CAPTURE_INTENT_ZERO_SHUTTER_LAG
+};
+
+enum aa_mode {
+	AA_CONTROL_OFF = 1,
+	AA_CONTROL_AUTO,
+	AA_CONTROL_USE_SCENE_MODE
+};
+
+enum aa_scene_mode {
+	AA_SCENE_MODE_UNSUPPORTED = 1,
+	AA_SCENE_MODE_FACE_PRIORITY,
+	AA_SCENE_MODE_ACTION,
+	AA_SCENE_MODE_PORTRAIT,
+	AA_SCENE_MODE_LANDSCAPE,
+	AA_SCENE_MODE_NIGHT,
+	AA_SCENE_MODE_NIGHT_PORTRAIT,
+	AA_SCENE_MODE_THEATRE,
+	AA_SCENE_MODE_BEACH,
+	AA_SCENE_MODE_SNOW,
+	AA_SCENE_MODE_SUNSET,
+	AA_SCENE_MODE_STEADYPHOTO,
+	AA_SCENE_MODE_FIREWORKS,
+	AA_SCENE_MODE_SPORTS,
+	AA_SCENE_MODE_PARTY,
+	AA_SCENE_MODE_CANDLELIGHT,
+	AA_SCENE_MODE_BARCODE,
+	AA_SCENE_MODE_NIGHT_CAPTURE
+};
+
+enum aa_effect_mode {
+	AA_EFFECT_OFF = 1,
+	AA_EFFECT_MONO,
+	AA_EFFECT_NEGATIVE,
+	AA_EFFECT_SOLARIZE,
+	AA_EFFECT_SEPIA,
+	AA_EFFECT_POSTERIZE,
+	AA_EFFECT_WHITEBOARD,
+	AA_EFFECT_BLACKBOARD,
+	AA_EFFECT_AQUA
+};
+
+enum aa_aemode {
+	AA_AEMODE_OFF = 1,
+	AA_AEMODE_LOCKED,
+	AA_AEMODE_ON,
+	AA_AEMODE_ON_AUTO_FLASH,
+	AA_AEMODE_ON_ALWAYS_FLASH,
+	AA_AEMODE_ON_AUTO_FLASH_REDEYE
+};
+
+enum aa_ae_flashmode {
+	/*all flash control stop*/
+	AA_FLASHMODE_OFF = 1,
+	/*internal 3A can control flash*/
+	AA_FLASHMODE_ON,
+	/*internal 3A can do auto flash algorithm*/
+	AA_FLASHMODE_AUTO,
+	/*internal 3A can fire flash by auto result*/
+	AA_FLASHMODE_CAPTURE,
+	/*internal 3A can control flash forced*/
+	AA_FLASHMODE_ON_ALWAYS
+
+};
+
+enum aa_ae_antibanding_mode {
+	AA_AE_ANTIBANDING_OFF = 1,
+	AA_AE_ANTIBANDING_50HZ,
+	AA_AE_ANTIBANDING_60HZ,
+	AA_AE_ANTIBANDING_AUTO
+};
+
+enum aa_awbmode {
+	AA_AWBMODE_OFF = 1,
+	AA_AWBMODE_LOCKED,
+	AA_AWBMODE_WB_AUTO,
+	AA_AWBMODE_WB_INCANDESCENT,
+	AA_AWBMODE_WB_FLUORESCENT,
+	AA_AWBMODE_WB_WARM_FLUORESCENT,
+	AA_AWBMODE_WB_DAYLIGHT,
+	AA_AWBMODE_WB_CLOUDY_DAYLIGHT,
+	AA_AWBMODE_WB_TWILIGHT,
+	AA_AWBMODE_WB_SHADE
+};
+
+enum aa_afmode {
+	AA_AFMODE_OFF = 1,
+	AA_AFMODE_AUTO,
+	AA_AFMODE_MACRO,
+	AA_AFMODE_CONTINUOUS_VIDEO,
+	AA_AFMODE_CONTINUOUS_PICTURE,
+	AA_AFMODE_EDOF
+};
+
+enum aa_afstate {
+	AA_AFSTATE_INACTIVE = 1,
+	AA_AFSTATE_PASSIVE_SCAN,
+	AA_AFSTATE_ACTIVE_SCAN,
+	AA_AFSTATE_AF_ACQUIRED_FOCUS,
+	AA_AFSTATE_AF_FAILED_FOCUS
+};
+
+enum ae_state {
+	AE_STATE_INACTIVE = 1,
+	AE_STATE_SEARCHING,
+	AE_STATE_CONVERGED,
+	AE_STATE_LOCKED,
+	AE_STATE_FLASH_REQUIRED,
+	AE_STATE_PRECAPTURE
+};
+
+enum awb_state {
+	AWB_STATE_INACTIVE = 1,
+	AWB_STATE_SEARCHING,
+	AWB_STATE_CONVERGED,
+	AWB_STATE_LOCKED
+};
+
+enum aa_isomode {
+	AA_ISOMODE_AUTO = 1,
+	AA_ISOMODE_MANUAL,
+};
+
+struct camera2_aa_ctl {
+	enum aa_capture_intent		captureintent;
+	enum aa_mode			mode;
+	/*enum aa_effect_mode		effectMode;*/
+	enum aa_scene_mode		scenemode;
+	uint32_t			videostabilizationmode;
+	enum aa_aemode			aemode;
+	uint32_t			aeregions[5];
+	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
+	int32_t				aeexpcompensation;
+	uint32_t			aetargetfpsrange[2];
+	enum aa_ae_antibanding_mode	aeantibandingmode;
+	enum aa_ae_flashmode		aeflashmode;
+	enum aa_awbmode			awbmode;
+	uint32_t			awbregions[5];
+	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
+	enum aa_afmode			afmode;
+	uint32_t			afregions[5];
+	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
+	uint32_t			aftrigger;
+	enum aa_isomode			isomode;
+	uint32_t			isovalue;
+
+};
+
+struct camera2_aa_dm {
+	enum aa_mode				mode;
+	enum aa_effect_mode			effectmode;
+	enum aa_scene_mode			scenemode;
+	uint32_t				videostabilizationmode;
+	enum aa_aemode				aemode;
+	/*needs check*/
+	uint32_t				aeregions[5];
+	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
+	enum ae_state				aestate;
+	enum aa_ae_flashmode			aeflashmode;
+	/*needs check*/
+	enum aa_awbmode				awbmode;
+	uint32_t				awbregions[5];
+	enum awb_state				awbstate;
+	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
+	enum aa_afmode				afmode;
+	uint32_t				afregions[5];
+	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region*/
+	enum aa_afstate				afstate;
+	enum aa_isomode				isomode;
+	uint32_t				isovalue;
+};
+
+struct camera2_aa_sm {
+	uint8_t		availablescenemodes[CAMERA2_MAX_AVAILABLE_MODE];
+	uint8_t		availableeffects[CAMERA2_MAX_AVAILABLE_MODE];
+	/*assuming # of available scene modes = 10*/
+	uint32_t	maxregions;
+	uint8_t		aeavailablemodes[CAMERA2_MAX_AVAILABLE_MODE];
+	/*assuming # of available ae modes = 8*/
+	struct rational	aecompensationstep;
+	int32_t		aecompensationrange[2];
+	uint32_t aeavailabletargetfpsranges[CAMERA2_MAX_AVAILABLE_MODE][2];
+	uint8_t		aeavailableantibandingmodes[CAMERA2_MAX_AVAILABLE_MODE];
+	uint8_t		awbavailablemodes[CAMERA2_MAX_AVAILABLE_MODE];
+	/*assuming # of awbAvailableModes = 10*/
+	uint8_t		afavailablemodes[CAMERA2_MAX_AVAILABLE_MODE];
+	/*assuming # of afAvailableModes = 4*/
+	uint8_t availablevideostabilizationmodes[4];
+	/*assuming # of availableVideoStabilizationModes = 4*/
+	uint32_t	isorange[2];
+};
+
+struct camera2_lens_usm {
+	/** Frame delay between sending command and applying frame data */
+	uint32_t	focusdistanceframedelay;
+};
+
+struct camera2_sensor_usm {
+	/** Frame delay between sending command and applying frame data */
+	uint32_t	exposuretimeframedelay;
+	uint32_t	framedurationframedelay;
+	uint32_t	sensitivityframedelay;
+};
+
+struct camera2_flash_usm {
+	/** Frame delay between sending command and applying frame data */
+	uint32_t	flashmodeframedelay;
+	uint32_t	firingpowerframedelay;
+	uint64_t	firingtimeframedelay;
+};
+
+struct camera2_ctl {
+	struct camera2_request_ctl		request;
+	struct camera2_lens_ctl			lens;
+	struct camera2_sensor_ctl		sensor;
+	struct camera2_flash_ctl		flash;
+	struct camera2_hotpixel_ctl		hotpixel;
+	struct camera2_demosaic_ctl		demosaic;
+	struct camera2_noisereduction_ctl	noise;
+	struct camera2_shading_ctl		shading;
+	struct camera2_geometric_ctl		geometric;
+	struct camera2_colorcorrection_ctl	color;
+	struct camera2_tonemap_ctl		tonemap;
+	struct camera2_edge_ctl			edge;
+	struct camera2_scaler_ctl		scaler;
+	struct camera2_jpeg_ctl			jpeg;
+	struct camera2_stats_ctl		stats;
+	struct camera2_aa_ctl			aa;
+};
+
+struct camera2_dm {
+	struct camera2_request_dm		request;
+	struct camera2_lens_dm			lens;
+	struct camera2_sensor_dm		sensor;
+	struct camera2_flash_dm			flash;
+	struct camera2_hotpixel_dm		hotpixel;
+	struct camera2_demosaic_dm		demosaic;
+	struct camera2_noisereduction_dm	noise;
+	struct camera2_shading_dm		shading;
+	struct camera2_geometric_dm		geometric;
+	struct camera2_colorcorrection_dm	color;
+	struct camera2_tonemap_dm		tonemap;
+	struct camera2_edge_dm			edge;
+	struct camera2_scaler_dm		scaler;
+	struct camera2_jpeg_dm			jpeg;
+	struct camera2_stats_dm			stats;
+	struct camera2_aa_dm			aa;
+};
+
+struct camera2_sm {
+	struct camera2_lens_sm			lens;
+	struct camera2_sensor_sm		sensor;
+	struct camera2_flash_sm			flash;
+	struct camera2_colorcorrection_sm	color;
+	struct camera2_tonemap_sm		tonemap;
+	struct camera2_scaler_sm		scaler;
+	struct camera2_jpeg_sm			jpeg;
+	struct camera2_stats_sm			stats;
+	struct camera2_aa_sm			aa;
+
+	/** User-defined(ispfw specific) static metadata. */
+	struct camera2_lens_usm			lensud;
+	struct camera2_sensor_usm		sensorud;
+	struct camera2_flash_usm		flashud;
+};
+
+/**
+	User-defined control for lens.
+*/
+struct camera2_lens_uctl {
+	struct camera2_lens_ctl ctl;
+
+	/** It depends by af algorithm(normally 255 or 1023) */
+	uint32_t        maxpos;
+	/** Some actuator support slew rate control. */
+	uint32_t        slewrate;
+};
+
+/**
+	User-defined metadata for lens.
+*/
+struct camera2_lens_udm {
+	/** It depends by af algorithm(normally 255 or 1023) */
+	uint32_t        maxpos;
+	/** Some actuator support slew rate control. */
+	uint32_t        slewrate;
+};
+
+/**
+	User-defined control for sensor.
+*/
+struct camera2_sensor_uctl {
+	struct camera2_sensor_ctl ctl;
+	/** Dynamic frame duration.
+	This feature is decided to max. value between
+	'sensor.exposureTime'+alpha and 'sensor.frameDuration'.
+	*/
+	uint64_t        dynamicrrameduration;
+};
+
+struct camera2_scaler_uctl {
+	/* target address for next frame.
+	[0] invalid address, stop
+	[others] valid address
+	*/
+	uint32_t scctargetaddress[4];
+	uint32_t scptargetaddress[4];
+};
+
+struct camera2_flash_uctl {
+	struct camera2_flash_ctl ctl;
+};
+
+struct camera2_uctl {
+	/* Set sensor, lens, flash control for next frame.
+	This flag can be combined.
+	[0 bit] lens
+	[1 bit] sensor
+	[2 bit] flash
+	*/
+	uint32_t uupdatebitmap;
+
+	/** For debugging */
+	uint32_t uframenumber;
+
+	/** isp fw specific control(user-defined) of lens. */
+	struct camera2_lens_uctl	lensud;
+	/** isp fw specific control(user-defined) of sensor. */
+	struct camera2_sensor_uctl	sensorud;
+	/** isp fw specific control(user-defined) of flash. */
+	struct camera2_flash_uctl	flashud;
+
+	struct camera2_scaler_uctl	scalerud;
+};
+
+struct camera2_udm {
+	struct camera2_lens_udm		lens;
+};
+
+struct camera2_shot {
+	/*standard area*/
+	struct camera2_ctl	ctl;
+	struct camera2_dm	dm;
+	/*user defined area*/
+	struct camera2_uctl	uctl;
+	struct camera2_udm	udm;
+	/*magic : 23456789*/
+	uint32_t		magicnumber;
+};
+#endif
diff --git a/drivers/media/platform/exynos5-is/fimc-is-param.h b/drivers/media/platform/exynos5-is/fimc-is-param.h
new file mode 100644
index 0000000..8eec772
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-param.h
@@ -0,0 +1,1259 @@
+/*
+ * Samsung Exynos5 SoC series FIMC-IS driver
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd
+ * Kil-yeon Lim <kilyeon.im@samsung.com>
+ * Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef FIMC_IS_PARAM_H
+#define FIMC_IS_PARAM_H
+
+#define IS_REGION_VER 145  /* IS REGION VERSION 1.45 */
+
+/* MACROs */
+#define IS_SET_PARAM_BIT(dev, num) \
+	(num >= 32 ? set_bit((num-32), &dev->p_region_index2) \
+		: set_bit(num, &dev->p_region_index1))
+#define IS_INC_PARAM_NUM(dev)		atomic_inc(&dev->p_region_num)
+
+#define IS_PARAM_GLOBAL(dev)		(dev->is_p_region->parameter.global)
+#define IS_PARAM_ISP(dev)		(dev->is_p_region->parameter.isp)
+#define IS_PARAM_DRC(dev)		(dev->is_p_region->parameter.drc)
+#define IS_PARAM_FD(dev)		(dev->is_p_region->parameter.fd)
+#define IS_HEADER(dev)			(dev->is_p_region->header)
+#define IS_FACE(dev)			(dev->is_p_region->face)
+#define IS_SHARED(dev)			(dev->is_shared_region)
+#define IS_PARAM_SIZE			(FIMC_IS_REGION_SIZE + 1)
+
+#define  INC_BIT(bit) (bit<<1)
+#define  INC_NUM(bit) (bit + 1)
+
+#define MAGIC_NUMBER 0x01020304
+
+#define PARAMETER_MAX_SIZE    128  /* in byte */
+#define PARAMETER_MAX_MEMBER  (PARAMETER_MAX_SIZE/4)
+
+enum is_param_set_bit {
+	PARAM_GLOBAL_SHOTMODE = 0,
+	PARAM_SENSOR_CONTROL,
+	PARAM_SENSOR_OTF_INPUT,
+	PARAM_SENSOR_OTF_OUTPUT,
+	PARAM_SENSOR_FRAME_RATE,
+	PARAM_SENSOR_DMA_OUTPUT,
+	PARAM_BUFFER_CONTROL,
+	PARAM_BUFFER_OTF_INPUT,
+	PARAM_BUFFER_OTF_OUTPUT,
+	PARAM_ISP_CONTROL,
+	PARAM_ISP_OTF_INPUT = 10,
+	PARAM_ISP_DMA1_INPUT,
+	PARAM_ISP_DMA2_INPUT,
+	PARAM_ISP_AA,
+	PARAM_ISP_FLASH,
+	PARAM_ISP_AWB,
+	PARAM_ISP_IMAGE_EFFECT,
+	PARAM_ISP_ISO,
+	PARAM_ISP_ADJUST,
+	PARAM_ISP_METERING,
+	PARAM_ISP_AFC = 20,
+	PARAM_ISP_OTF_OUTPUT,
+	PARAM_ISP_DMA1_OUTPUT,
+	PARAM_ISP_DMA2_OUTPUT,
+	PARAM_DRC_CONTROL,
+	PARAM_DRC_OTF_INPUT,
+	PARAM_DRC_DMA_INPUT,
+	PARAM_DRC_OTF_OUTPUT,
+	PARAM_SCALERC_CONTROL,
+	PARAM_SCALERC_OTF_INPUT,
+	PARAM_SCALERC_IMAGE_EFFECT = 30,
+	PARAM_SCALERC_INPUT_CROP,
+	PARAM_SCALERC_OUTPUT_CROP,
+	PARAM_SCALERC_OTF_OUTPUT,
+	PARAM_SCALERC_DMA_OUTPUT = 34,
+	PARAM_ODC_CONTROL,
+	PARAM_ODC_OTF_INPUT,
+	PARAM_ODC_OTF_OUTPUT,
+	PARAM_DIS_CONTROL,
+	PARAM_DIS_OTF_INPUT,
+	PARAM_DIS_OTF_OUTPUT = 40,
+	PARAM_TDNR_CONTROL,
+	PARAM_TDNR_OTF_INPUT,
+	PARAM_TDNR_1ST_FRAME,
+	PARAM_TDNR_OTF_OUTPUT,
+	PARAM_TDNR_DMA_OUTPUT,
+	PARAM_SCALERP_CONTROL,
+	PARAM_SCALERP_OTF_INPUT,
+	PARAM_SCALERP_IMAGE_EFFECT,
+	PARAM_SCALERP_INPUT_CROP,
+	PARAM_SCALERP_OUTPUT_CROP = 50,
+	PARAM_SCALERP_ROTATION,
+	PARAM_SCALERP_FLIP,
+	PARAM_SCALERP_OTF_OUTPUT,
+	PARAM_SCALERP_DMA_OUTPUT,
+	PARAM_FD_CONTROL,
+	PARAM_FD_OTF_INPUT,
+	PARAM_FD_DMA_INPUT,
+	PARAM_FD_CONFIG = 58,
+	PARAM_END,
+};
+
+#define ADDRESS_TO_OFFSET(start, end)	((uint32)end - (uint32)start)
+#define OFFSET_TO_NUM(offset)		((offset)>>6)
+#define IS_OFFSET_LOWBIT(offset)	(OFFSET_TO_NUM(offset) >= \
+						32 ? false : true)
+#define OFFSET_TO_BIT(offset) \
+		{(IS_OFFSET_LOWBIT(offset) ? (1<<OFFSET_TO_NUM(offset)) \
+			: (1<<(OFFSET_TO_NUM(offset)-32))}
+#define LOWBIT_OF_NUM(num)		(num >= 32 ? 0 : BIT0<<num)
+#define HIGHBIT_OF_NUM(num)		(num >= 32 ? BIT0<<(num-32) : 0)
+
+#define PARAM_LOW_MASK		(0xFFFFFFFF)
+#define PARAM_HIGH_MASK		(0x07FFFFFF)
+
+/* ----------------------  Input  ----------------------------------- */
+enum control_command {
+	CONTROL_COMMAND_STOP	= 0,
+	CONTROL_COMMAND_START	= 1,
+	CONTROL_COMMAND_TEST	= 2
+};
+
+enum bypass_command {
+	CONTROL_BYPASS_DISABLE		= 0,
+	CONTROL_BYPASS_ENABLE		= 1
+};
+
+enum control_error {
+	CONTROL_ERROR_NO		= 0
+};
+
+enum otf_input_command {
+	OTF_INPUT_COMMAND_DISABLE	= 0,
+	OTF_INPUT_COMMAND_ENABLE	= 1
+};
+
+enum otf_input_format {
+	OTF_INPUT_FORMAT_BAYER		= 0, /* 1 Channel */
+	OTF_INPUT_FORMAT_YUV444		= 1, /* 3 Channel */
+	OTF_INPUT_FORMAT_YUV422		= 2, /* 3 Channel */
+	OTF_INPUT_FORMAT_YUV420		= 3, /* 3 Channel */
+	OTF_INPUT_FORMAT_STRGEN_COLORBAR_BAYER = 10,
+	OTF_INPUT_FORMAT_BAYER_DMA	= 11,
+};
+
+enum otf_input_bitwidth {
+	OTF_INPUT_BIT_WIDTH_14BIT	= 14,
+	OTF_INPUT_BIT_WIDTH_12BIT	= 12,
+	OTF_INPUT_BIT_WIDTH_11BIT	= 11,
+	OTF_INPUT_BIT_WIDTH_10BIT	= 10,
+	OTF_INPUT_BIT_WIDTH_9BIT	= 9,
+	OTF_INPUT_BIT_WIDTH_8BIT	= 8
+};
+
+enum otf_input_order {
+	OTF_INPUT_ORDER_BAYER_GR_BG	= 0,
+	OTF_INPUT_ORDER_BAYER_RG_GB	= 1,
+	OTF_INPUT_ORDER_BAYER_BG_GR	= 2,
+	OTF_INPUT_ORDER_BAYER_GB_RG	= 3
+};
+
+enum otf_intput_error {
+	OTF_INPUT_ERROR_NO		= 0 /* Input setting is done */
+};
+
+enum dma_input_command {
+	DMA_INPUT_COMMAND_DISABLE	= 0,
+	DMA_INPUT_COMMAND_ENABLE	= 1,
+	DMA_INPUT_COMMAND_BUF_MNGR	= 2,
+	DMA_INPUT_COMMAND_RUN_SINGLE	= 3,
+};
+
+enum dma_inut_format {
+	DMA_INPUT_FORMAT_BAYER		= 0,
+	DMA_INPUT_FORMAT_YUV444		= 1,
+	DMA_INPUT_FORMAT_YUV422		= 2,
+	DMA_INPUT_FORMAT_YUV420		= 3,
+};
+
+enum dma_input_bitwidth {
+	DMA_INPUT_BIT_WIDTH_14BIT	= 14,
+	DMA_INPUT_BIT_WIDTH_12BIT	= 12,
+	DMA_INPUT_BIT_WIDTH_11BIT	= 11,
+	DMA_INPUT_BIT_WIDTH_10BIT	= 10,
+	DMA_INPUT_BIT_WIDTH_9BIT	= 9,
+	DMA_INPUT_BIT_WIDTH_8BIT	= 8
+};
+
+enum dma_input_plane {
+	DMA_INPUT_PLANE_3	= 3,
+	DMA_INPUT_PLANE_2	= 2,
+	DMA_INPUT_PLANE_1	= 1
+};
+
+enum dma_input_order {
+	/* (for DMA_INPUT_PLANE_3) */
+	DMA_INPUT_ORDER_NO	= 0,
+	/* (only valid at DMA_INPUT_PLANE_2) */
+	DMA_INPUT_ORDER_CBCR	= 1,
+	/* (only valid at DMA_INPUT_PLANE_2) */
+	DMA_INPUT_ORDER_CRCB	= 2,
+	/* (only valid at DMA_INPUT_PLANE_1 & DMA_INPUT_FORMAT_YUV444) */
+	DMA_INPUT_ORDER_YCBCR	= 3,
+	/* (only valid at DMA_INPUT_FORMAT_YUV422 & DMA_INPUT_PLANE_1) */
+	DMA_INPUT_ORDER_YYCBCR	= 4,
+	/* (only valid at DMA_INPUT_FORMAT_YUV422 & DMA_INPUT_PLANE_1) */
+	DMA_INPUT_ORDER_YCBYCR	= 5,
+	/* (only valid at DMA_INPUT_FORMAT_YUV422 & DMA_INPUT_PLANE_1) */
+	DMA_INPUT_ORDER_YCRYCB	= 6,
+	/* (only valid at DMA_INPUT_FORMAT_YUV422 & DMA_INPUT_PLANE_1) */
+	DMA_INPUT_ORDER_CBYCRY	= 7,
+	/* (only valid at DMA_INPUT_FORMAT_YUV422 & DMA_INPUT_PLANE_1) */
+	DMA_INPUT_ORDER_CRYCBY	= 8,
+	/* (only valid at DMA_INPUT_FORMAT_BAYER) */
+	DMA_INPUT_ORDER_GR_BG	= 9
+};
+
+enum dma_input_error {
+	DMA_INPUT_ERROR_NO	= 0 /*  DMA input setting is done */
+};
+
+/* ----------------------  Output  ----------------------------------- */
+enum otf_output_crop {
+	OTF_OUTPUT_CROP_DISABLE		= 0,
+	OTF_OUTPUT_CROP_ENABLE		= 1
+};
+
+enum otf_output_command {
+	OTF_OUTPUT_COMMAND_DISABLE	= 0,
+	OTF_OUTPUT_COMMAND_ENABLE	= 1
+};
+
+enum orf_output_format {
+	OTF_OUTPUT_FORMAT_YUV444	= 1,
+	OTF_OUTPUT_FORMAT_YUV422	= 2,
+	OTF_OUTPUT_FORMAT_YUV420	= 3,
+	OTF_OUTPUT_FORMAT_RGB		= 4
+};
+
+enum otf_output_bitwidth {
+	OTF_OUTPUT_BIT_WIDTH_14BIT	= 14,
+	OTF_OUTPUT_BIT_WIDTH_12BIT	= 12,
+	OTF_OUTPUT_BIT_WIDTH_11BIT	= 11,
+	OTF_OUTPUT_BIT_WIDTH_10BIT	= 10,
+	OTF_OUTPUT_BIT_WIDTH_9BIT	= 9,
+	OTF_OUTPUT_BIT_WIDTH_8BIT	= 8
+};
+
+enum otf_output_order {
+	OTF_OUTPUT_ORDER_BAYER_GR_BG	= 0,
+};
+
+enum otf_output_error {
+	OTF_OUTPUT_ERROR_NO = 0 /* Output Setting is done */
+};
+
+enum dma_output_command {
+	DMA_OUTPUT_COMMAND_DISABLE	= 0,
+	DMA_OUTPUT_COMMAND_ENABLE	= 1,
+	DMA_OUTPUT_COMMAND_BUF_MNGR	= 2,
+	DMA_OUTPUT_UPDATE_MASK_BITS	= 3
+};
+
+enum dma_output_format {
+	DMA_OUTPUT_FORMAT_BAYER		= 0,
+	DMA_OUTPUT_FORMAT_YUV444	= 1,
+	DMA_OUTPUT_FORMAT_YUV422	= 2,
+	DMA_OUTPUT_FORMAT_YUV420	= 3,
+	DMA_OUTPUT_FORMAT_RGB		= 4
+};
+
+enum dma_output_bitwidth {
+	DMA_OUTPUT_BIT_WIDTH_14BIT	= 14,
+	DMA_OUTPUT_BIT_WIDTH_12BIT	= 12,
+	DMA_OUTPUT_BIT_WIDTH_11BIT	= 11,
+	DMA_OUTPUT_BIT_WIDTH_10BIT	= 10,
+	DMA_OUTPUT_BIT_WIDTH_9BIT	= 9,
+	DMA_OUTPUT_BIT_WIDTH_8BIT	= 8
+};
+
+enum dma_output_plane {
+	DMA_OUTPUT_PLANE_3		= 3,
+	DMA_OUTPUT_PLANE_2		= 2,
+	DMA_OUTPUT_PLANE_1		= 1
+};
+
+enum dma_output_order {
+	DMA_OUTPUT_ORDER_NO		= 0,
+	/* (for DMA_OUTPUT_PLANE_3) */
+	DMA_OUTPUT_ORDER_CBCR		= 1,
+	/* (only valid at DMA_INPUT_PLANE_2) */
+	DMA_OUTPUT_ORDER_CRCB		= 2,
+	/* (only valid at DMA_OUTPUT_PLANE_2) */
+	DMA_OUTPUT_ORDER_YYCBCR		= 3,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV422 & DMA_OUTPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_YCBYCR		= 4,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV422 & DMA_OUTPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_YCRYCB		= 5,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV422 & DMA_OUTPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_CBYCRY		= 6,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV422 & DMA_OUTPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_CRYCBY		= 7,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV422 & DMA_OUTPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_YCBCR		= 8,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV444 & DMA_OUPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_CRYCB		= 9,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV444 & DMA_OUPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_CRCBY		= 10,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV444 & DMA_OUPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_CBYCR		= 11,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV444 & DMA_OUPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_YCRCB		= 12,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV444 & DMA_OUPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_CBCRY		= 13,
+	/* (only valid at DMA_OUTPUT_FORMAT_YUV444 & DMA_OUPUT_PLANE_1) */
+	DMA_OUTPUT_ORDER_BGR		= 14,
+	/* (only valid at DMA_OUTPUT_FORMAT_RGB) */
+	DMA_OUTPUT_ORDER_GB_BG		= 15
+	/* (only valid at DMA_OUTPUT_FORMAT_BAYER) */
+};
+
+enum dma_output_notify_dma_done {
+	DMA_OUTPUT_NOTIFY_DMA_DONE_DISABLE	= 0,
+	DMA_OUTPUT_NOTIFY_DMA_DONE_ENBABLE	= 1,
+};
+
+enum dma_output_error {
+	DMA_OUTPUT_ERROR_NO		= 0 /* DMA output setting is done */
+};
+
+/* ----------------------  Global  ----------------------------------- */
+enum global_shotmode_error {
+	GLOBAL_SHOTMODE_ERROR_NO	= 0 /* shot-mode setting is done */
+};
+
+/* -------------------------  AA  ------------------------------------ */
+enum isp_lock_command {
+	ISP_AA_COMMAND_START	= 0,
+	ISP_AA_COMMAND_STOP	= 1
+};
+
+enum isp_lock_target {
+	ISP_AA_TARGET_AF	= 1,
+	ISP_AA_TARGET_AE	= 2,
+	ISP_AA_TARGET_AWB	= 4
+};
+
+enum isp_af_mode {
+	ISP_AF_MANUAL = 0,
+	ISP_AF_SINGLE,
+	ISP_AF_CONTINUOUS,
+	ISP_AF_REGION,
+	ISP_AF_SLEEP,
+	ISP_AF_INIT,
+	ISP_AF_SET_CENTER_WINDOW,
+	ISP_AF_SET_TOUCH_WINDOW,
+	ISP_AF_SET_FACE_WINDOW
+};
+
+enum isp_af_scene {
+	ISP_AF_SCENE_NORMAL		= 0,
+	ISP_AF_SCENE_MACRO		= 1
+};
+
+enum isp_af_touch {
+	ISP_AF_TOUCH_DISABLE = 0,
+	ISP_AF_TOUCH_ENABLE
+};
+
+enum isp_af_face {
+	ISP_AF_FACE_DISABLE = 0,
+	ISP_AF_FACE_ENABLE
+};
+
+enum isp_af_reponse {
+	ISP_AF_RESPONSE_PREVIEW = 0,
+	ISP_AF_RESPONSE_MOVIE
+};
+
+enum isp_af_sleep {
+	ISP_AF_SLEEP_OFF		= 0,
+	ISP_AF_SLEEP_ON			= 1
+};
+
+enum isp_af_continuous {
+	ISP_AF_CONTINUOUS_DISABLE	= 0,
+	ISP_AF_CONTINUOUS_ENABLE	= 1
+};
+
+enum isp_af_error {
+	ISP_AF_ERROR_NO			= 0, /* AF mode change is done */
+	ISP_AF_EROOR_NO_LOCK_DONE	= 1  /* AF lock is done */
+};
+
+/* -------------------------  Flash  ------------------------------------- */
+enum isp_flash_command {
+	ISP_FLASH_COMMAND_DISABLE	= 0,
+	ISP_FLASH_COMMAND_MANUALON	= 1, /* (forced flash) */
+	ISP_FLASH_COMMAND_AUTO		= 2,
+	ISP_FLASH_COMMAND_TORCH		= 3,   /* 3 sec */
+	ISP_FLASH_COMMAND_FLASH_ON	= 4,
+	ISP_FLASH_COMMAND_CAPTURE	= 5,
+	ISP_FLASH_COMMAND_TRIGGER	= 6,
+	ISP_FLASH_COMMAND_CALIBRATION	= 7
+};
+
+enum isp_flash_redeye {
+	ISP_FLASH_REDEYE_DISABLE	= 0,
+	ISP_FLASH_REDEYE_ENABLE		= 1
+};
+
+enum isp_flash_error {
+	ISP_FLASH_ERROR_NO		= 0 /* Flash setting is done */
+};
+
+/* --------------------------  AWB  ------------------------------------ */
+enum isp_awb_command {
+	ISP_AWB_COMMAND_AUTO		= 0,
+	ISP_AWB_COMMAND_ILLUMINATION	= 1,
+	ISP_AWB_COMMAND_MANUAL	= 2
+};
+
+enum isp_awb_illumination {
+	ISP_AWB_ILLUMINATION_DAYLIGHT		= 0,
+	ISP_AWB_ILLUMINATION_CLOUDY		= 1,
+	ISP_AWB_ILLUMINATION_TUNGSTEN		= 2,
+	ISP_AWB_ILLUMINATION_FLUORESCENT	= 3
+};
+
+enum isp_awb_error {
+	ISP_AWB_ERROR_NO		= 0 /* AWB setting is done */
+};
+
+/* --------------------------  Effect  ----------------------------------- */
+enum isp_imageeffect_command {
+	ISP_IMAGE_EFFECT_DISABLE		= 0,
+	ISP_IMAGE_EFFECT_MONOCHROME		= 1,
+	ISP_IMAGE_EFFECT_NEGATIVE_MONO		= 2,
+	ISP_IMAGE_EFFECT_NEGATIVE_COLOR		= 3,
+	ISP_IMAGE_EFFECT_SEPIA			= 4,
+	ISP_IMAGE_EFFECT_AQUA			= 5,
+	ISP_IMAGE_EFFECT_EMBOSS			= 6,
+	ISP_IMAGE_EFFECT_EMBOSS_MONO		= 7,
+	ISP_IMAGE_EFFECT_SKETCH			= 8,
+	ISP_IMAGE_EFFECT_RED_YELLOW_POINT	= 9,
+	ISP_IMAGE_EFFECT_GREEN_POINT		= 10,
+	ISP_IMAGE_EFFECT_BLUE_POINT		= 11,
+	ISP_IMAGE_EFFECT_MAGENTA_POINT		= 12,
+	ISP_IMAGE_EFFECT_WARM_VINTAGE		= 13,
+	ISP_IMAGE_EFFECT_COLD_VINTAGE		= 14,
+	ISP_IMAGE_EFFECT_POSTERIZE		= 15,
+	ISP_IMAGE_EFFECT_SOLARIZE		= 16,
+	ISP_IMAGE_EFFECT_WASHED			= 17,
+	ISP_IMAGE_EFFECT_CCM			= 18,
+};
+
+enum isp_imageeffect_error {
+	ISP_IMAGE_EFFECT_ERROR_NO	= 0 /* Image effect setting is done */
+};
+
+/* ---------------------------  ISO  ------------------------------------ */
+enum isp_iso_command {
+	ISP_ISO_COMMAND_AUTO		= 0,
+	ISP_ISO_COMMAND_MANUAL		= 1
+};
+
+enum iso_error {
+	ISP_ISO_ERROR_NO		= 0 /* ISO setting is done */
+};
+
+/* --------------------------  Adjust  ----------------------------------- */
+enum iso_adjust_command {
+	ISP_ADJUST_COMMAND_AUTO			= 0,
+	ISP_ADJUST_COMMAND_MANUAL_CONTRAST	= (1 << 0),
+	ISP_ADJUST_COMMAND_MANUAL_SATURATION	= (1 << 1),
+	ISP_ADJUST_COMMAND_MANUAL_SHARPNESS	= (1 << 2),
+	ISP_ADJUST_COMMAND_MANUAL_EXPOSURE	= (1 << 3),
+	ISP_ADJUST_COMMAND_MANUAL_BRIGHTNESS	= (1 << 4),
+	ISP_ADJUST_COMMAND_MANUAL_HUE		= (1 << 5),
+	ISP_ADJUST_COMMAND_MANUAL_HOTPIXEL	= (1 << 6),
+	ISP_ADJUST_COMMAND_MANUAL_NOISEREDUCTION = (1 << 7),
+	ISP_ADJUST_COMMAND_MANUAL_SHADING	= (1 << 8),
+	ISP_ADJUST_COMMAND_MANUAL_GAMMA		= (1 << 9),
+	ISP_ADJUST_COMMAND_MANUAL_EDGEENHANCEMENT = (1 << 10),
+	ISP_ADJUST_COMMAND_MANUAL_SCENE		= (1 << 11),
+	ISP_ADJUST_COMMAND_MANUAL_FRAMETIME	= (1 << 12),
+	ISP_ADJUST_COMMAND_MANUAL_ALL		= 0x1FFF
+};
+
+enum isp_adjust_scene_index {
+	ISP_ADJUST_SCENE_NORMAL			= 0,
+	ISP_ADJUST_SCENE_NIGHT_PREVIEW		= 1,
+	ISP_ADJUST_SCENE_NIGHT_CAPTURE		= 2
+};
+
+
+enum isp_adjust_error {
+	ISP_ADJUST_ERROR_NO		= 0 /* Adjust setting is done */
+};
+
+/* -------------------------  Metering  ---------------------------------- */
+enum isp_metering_command {
+	ISP_METERING_COMMAND_AVERAGE		= 0,
+	ISP_METERING_COMMAND_SPOT		= 1,
+	ISP_METERING_COMMAND_MATRIX		= 2,
+	ISP_METERING_COMMAND_CENTER		= 3,
+	ISP_METERING_COMMAND_EXPOSURE_MODE	= (1 << 8)
+};
+
+enum isp_exposure_mode {
+	ISP_EXPOSUREMODE_OFF		= 1,
+	ISP_EXPOSUREMODE_AUTO		= 2
+};
+
+enum isp_metering_error {
+	ISP_METERING_ERROR_NO	= 0 /* Metering setting is done */
+};
+
+/* --------------------------  AFC  ----------------------------------- */
+enum isp_afc_command {
+	ISP_AFC_COMMAND_DISABLE		= 0,
+	ISP_AFC_COMMAND_AUTO		= 1,
+	ISP_AFC_COMMAND_MANUAL		= 2
+};
+
+enum isp_afc_manual {
+	ISP_AFC_MANUAL_50HZ		= 50,
+	ISP_AFC_MANUAL_60HZ		= 60
+};
+
+enum isp_afc_error {
+	ISP_AFC_ERROR_NO	= 0 /* AFC setting is done */
+};
+
+enum isp_scene_command {
+	ISP_SCENE_NONE		= 0,
+	ISP_SCENE_PORTRAIT	= 1,
+	ISP_SCENE_LANDSCAPE     = 2,
+	ISP_SCENE_SPORTS        = 3,
+	ISP_SCENE_PARTYINDOOR	= 4,
+	ISP_SCENE_BEACHSNOW	= 5,
+	ISP_SCENE_SUNSET	= 6,
+	ISP_SCENE_DAWN		= 7,
+	ISP_SCENE_FALL		= 8,
+	ISP_SCENE_NIGHT		= 9,
+	ISP_SCENE_AGAINSTLIGHTWLIGHT	= 10,
+	ISP_SCENE_AGAINSTLIGHTWOLIGHT	= 11,
+	ISP_SCENE_FIRE			= 12,
+	ISP_SCENE_TEXT			= 13,
+	ISP_SCENE_CANDLE		= 14
+};
+
+/* --------------------------  Scaler  --------------------------------- */
+enum scaler_imageeffect_command {
+	SCALER_IMAGE_EFFECT_COMMNAD_DISABLE	= 0,
+	SCALER_IMAGE_EFFECT_COMMNAD_SEPIA_CB	= 1,
+	SCALER_IMAGE_EFFECT_COMMAND_SEPIA_CR	= 2,
+	SCALER_IMAGE_EFFECT_COMMAND_NEGATIVE	= 3,
+	SCALER_IMAGE_EFFECT_COMMAND_ARTFREEZE	= 4,
+	SCALER_IMAGE_EFFECT_COMMAND_EMBOSSING	= 5,
+	SCALER_IMAGE_EFFECT_COMMAND_SILHOUETTE	= 6
+};
+
+enum scaler_imageeffect_error {
+	SCALER_IMAGE_EFFECT_ERROR_NO		= 0
+};
+
+enum scaler_crop_command {
+	SCALER_CROP_COMMAND_DISABLE		= 0,
+	SCALER_CROP_COMMAND_ENABLE		= 1
+};
+
+enum scaler_crop_error {
+	SCALER_CROP_ERROR_NO			= 0 /* crop setting is done */
+};
+
+enum scaler_scaling_command {
+	SCALER_SCALING_COMMNAD_DISABLE		= 0,
+	SCALER_SCALING_COMMAND_UP		= 1,
+	SCALER_SCALING_COMMAND_DOWN		= 2
+};
+
+enum scaler_scaling_error {
+	SCALER_SCALING_ERROR_NO			= 0
+};
+
+enum scaler_rotation_command {
+	SCALER_ROTATION_COMMAND_DISABLE		= 0,
+	SCALER_ROTATION_COMMAND_CLOCKWISE90	= 1
+};
+
+enum scaler_rotation_error {
+	SCALER_ROTATION_ERROR_NO		= 0
+};
+
+enum scaler_flip_command {
+	SCALER_FLIP_COMMAND_NORMAL		= 0,
+	SCALER_FLIP_COMMAND_X_MIRROR		= 1,
+	SCALER_FLIP_COMMAND_Y_MIRROR		= 2,
+	SCALER_FLIP_COMMAND_XY_MIRROR		= 3 /* (180 rotation) */
+};
+
+enum scaler_flip_error {
+	SCALER_FLIP_ERROR_NO			= 0 /* flip setting is done */
+};
+
+/* --------------------------  3DNR  ----------------------------------- */
+enum tdnr_1st_frame_command {
+	TDNR_1ST_FRAME_COMMAND_NOPROCESSING	= 0,
+	TDNR_1ST_FRAME_COMMAND_2DNR		= 1
+};
+
+enum tdnr_1st_frame_error {
+	TDNR_1ST_FRAME_ERROR_NO			= 0
+		/*1st frame setting is done*/
+};
+
+/* ----------------------------  FD  ------------------------------------- */
+enum fd_config_command {
+	FD_CONFIG_COMMAND_MAXIMUM_NUMBER	= 0x1,
+	FD_CONFIG_COMMAND_ROLL_ANGLE		= 0x2,
+	FD_CONFIG_COMMAND_YAW_ANGLE		= 0x4,
+	FD_CONFIG_COMMAND_SMILE_MODE		= 0x8,
+	FD_CONFIG_COMMAND_BLINK_MODE		= 0x10,
+	FD_CONFIG_COMMAND_EYES_DETECT		= 0x20,
+	FD_CONFIG_COMMAND_MOUTH_DETECT		= 0x40,
+	FD_CONFIG_COMMAND_ORIENTATION		= 0x80,
+	FD_CONFIG_COMMAND_ORIENTATION_VALUE	= 0x100
+};
+
+enum fd_config_roll_angle {
+	FD_CONFIG_ROLL_ANGLE_BASIC		= 0,
+	FD_CONFIG_ROLL_ANGLE_PRECISE_BASIC	= 1,
+	FD_CONFIG_ROLL_ANGLE_SIDES		= 2,
+	FD_CONFIG_ROLL_ANGLE_PRECISE_SIDES	= 3,
+	FD_CONFIG_ROLL_ANGLE_FULL		= 4,
+	FD_CONFIG_ROLL_ANGLE_PRECISE_FULL	= 5,
+};
+
+enum fd_config_yaw_angle {
+	FD_CONFIG_YAW_ANGLE_0			= 0,
+	FD_CONFIG_YAW_ANGLE_45			= 1,
+	FD_CONFIG_YAW_ANGLE_90			= 2,
+	FD_CONFIG_YAW_ANGLE_45_90		= 3,
+};
+
+enum fd_config_smile_mode {
+	FD_CONFIG_SMILE_MODE_DISABLE		= 0,
+	FD_CONFIG_SMILE_MODE_ENABLE		= 1
+};
+
+enum fd_config_blink_mode {
+	FD_CONFIG_BLINK_MODE_DISABLE		= 0,
+	FD_CONFIG_BLINK_MODE_ENABLE		= 1
+};
+
+enum fd_config_eye_result {
+	FD_CONFIG_EYES_DETECT_DISABLE		= 0,
+	FD_CONFIG_EYES_DETECT_ENABLE		= 1
+};
+
+enum fd_config_mouth_result {
+	FD_CONFIG_MOUTH_DETECT_DISABLE		= 0,
+	FD_CONFIG_MOUTH_DETECT_ENABLE		= 1
+};
+
+enum fd_config_orientation {
+	FD_CONFIG_ORIENTATION_DISABLE		= 0,
+	FD_CONFIG_ORIENTATION_ENABLE		= 1
+};
+
+struct param_control {
+	u32	cmd;
+	u32	bypass;
+	u32	buffer_address;
+	u32	buffer_number;
+	/* 0: continuous, 1: single */
+	u32	run_mode;
+	u32	reserved[PARAMETER_MAX_MEMBER-6];
+	u32	err;
+};
+
+struct param_otf_input {
+	u32	cmd;
+	u32	width;
+	u32	height;
+	u32	format;
+	u32	bitwidth;
+	u32	order;
+	u32	crop_offset_x;
+	u32	crop_offset_y;
+	u32	crop_width;
+	u32	crop_height;
+	u32	frametime_min;
+	u32	frametime_max;
+	u32	reserved[PARAMETER_MAX_MEMBER-13];
+	u32	err;
+};
+
+struct param_dma_input {
+	u32	cmd;
+	u32	width;
+	u32	height;
+	u32	format;
+	u32	bitwidth;
+	u32	plane;
+	u32	order;
+	u32	buffer_number;
+	u32	buffer_address;
+	u32	bayer_crop_offset_x;
+	u32	bayer_crop_offset_y;
+	u32	bayer_crop_width;
+	u32	bayer_crop_height;
+	u32	dma_crop_offset_x;
+	u32	dma_crop_offset_y;
+	u32	dma_crop_width;
+	u32	dma_crop_height;
+	u32	user_min_frametime;
+	u32	user_max_frametime;
+	u32	wide_frame_gap;
+	u32	frame_gap;
+	u32	line_gap;
+	u32	reserved[PARAMETER_MAX_MEMBER-23];
+	u32	err;
+};
+
+struct param_otf_output {
+	u32	cmd;
+	u32	width;
+	u32	height;
+	u32	format;
+	u32	bitwidth;
+	u32	order;
+	u32	crop_offset_x;
+	u32	crop_offset_y;
+	u32	reserved[PARAMETER_MAX_MEMBER-9];
+	u32	err;
+};
+
+struct param_dma_output {
+	u32	cmd;
+	u32	width;
+	u32	height;
+	u32	format;
+	u32	bitwidth;
+	u32	plane;
+	u32	order;
+	u32	buffer_number;
+	u32	buffer_address;
+	u32	notify_dma_done;
+	u32	dma_out_mask;
+	u32	reserved[PARAMETER_MAX_MEMBER-12];
+	u32	err;
+};
+
+struct param_global_shotmode {
+	u32	cmd;
+	u32	skip_frames;
+	u32	reserved[PARAMETER_MAX_MEMBER-3];
+	u32	err;
+};
+
+struct param_sensor_framerate {
+	u32	frame_rate;
+	u32	reserved[PARAMETER_MAX_MEMBER-2];
+	u32	err;
+};
+
+struct param_isp_aa {
+	u32	cmd;
+	u32	target;
+	u32	mode;
+	u32	scene;
+	u32	af_touch;
+	u32	af_face;
+	u32	af_response;
+	u32	sleep;
+	u32	touch_x;
+	u32	touch_y;
+	u32	manual_af_setting;
+	/*0: Legacy, 1: Camera 2.0*/
+	u32	cam_api2p0;
+	/* For android.control.afRegions in Camera 2.0,
+	Resolution based on YUV output size*/
+	u32	af_region_left;
+	/* For android.control.afRegions in Camera 2.0,
+	Resolution based on YUV output size*/
+	u32	af_region_top;
+	/* For android.control.afRegions in Camera 2.0,
+	Resolution based on YUV output size*/
+	u32	af_region_right;
+	/* For android.control.afRegions in Camera 2.0,
+	Resolution based on YUV output size*/
+	u32	af_region_bottom;
+	u32	reserved[PARAMETER_MAX_MEMBER-17];
+	u32	err;
+};
+
+struct param_isp_flash {
+	u32	cmd;
+	u32	redeye;
+	u32	flash_intensity;
+	u32	reserved[PARAMETER_MAX_MEMBER-4];
+	u32	err;
+};
+
+struct param_isp_awb {
+	u32	cmd;
+	u32	illumination;
+	u32	reserved[PARAMETER_MAX_MEMBER-3];
+	u32	err;
+};
+
+struct param_isp_imageeffect {
+	u32	cmd;
+	u32	reserved[PARAMETER_MAX_MEMBER-2];
+	u32	err;
+};
+
+struct param_isp_iso {
+	u32	cmd;
+	u32	value;
+	u32	reserved[PARAMETER_MAX_MEMBER-3];
+	u32	err;
+};
+
+struct param_isp_adjust {
+	u32	cmd;
+	s32	contrast;
+	s32	saturation;
+	s32	sharpness;
+	s32	exposure;
+	s32	brightness;
+	s32	hue;
+	/* 0 or 1 */
+	u32	hotpixel_enable;
+	/* -127 ~ 127 */
+	s32	noise_reduction_strength;
+	/* 0 or 1 */
+	u32	shading_correction_enable;
+	/* 0 or 1 */
+	u32	user_gamma_enable;
+	/* -127 ~ 127 */
+	s32	edge_enhancement_strength;
+	/* ISP_AdjustSceneIndexEnum */
+	u32	user_scene_mode;
+	u32	min_frametime;
+	u32	max_frametime;
+	u32	reserved[PARAMETER_MAX_MEMBER-16];
+	u32	err;
+};
+
+struct param_isp_metering {
+	u32	cmd;
+	u32	win_pos_x;
+	u32	win_pos_y;
+	u32	win_width;
+	u32	win_height;
+	u32	exposure_mode;
+	/* 0: Legacy, 1: Camera 2.0 */
+	u32	cam_api2p0;
+	u32	reserved[PARAMETER_MAX_MEMBER-8];
+	u32	err;
+};
+
+struct param_isp_afc {
+	u32	cmd;
+	u32	manual;
+	u32	reserved[PARAMETER_MAX_MEMBER-3];
+	u32	err;
+};
+
+struct param_scaler_imageeffect {
+	u32	cmd;
+	u32	reserved[PARAMETER_MAX_MEMBER-2];
+	u32	err;
+};
+
+struct param_scaler_input_crop {
+	u32  cmd;
+	u32  pos_x;
+	u32  pos_y;
+	u32  crop_width;
+	u32  crop_height;
+	u32  in_width;
+	u32  in_height;
+	u32  out_width;
+	u32  out_height;
+	u32  reserved[PARAMETER_MAX_MEMBER-10];
+	u32  err;
+};
+
+struct param_scaler_output_crop {
+	u32  cmd;
+	u32  pos_x;
+	u32  pos_y;
+	u32  crop_width;
+	u32  crop_height;
+	u32  format;
+	u32  reserved[PARAMETER_MAX_MEMBER-7];
+	u32  err;
+};
+
+struct param_scaler_rotation {
+	u32	cmd;
+	u32	reserved[PARAMETER_MAX_MEMBER-2];
+	u32	err;
+};
+
+struct param_scaler_flip {
+	u32	cmd;
+	u32	reserved[PARAMETER_MAX_MEMBER-2];
+	u32	err;
+};
+
+struct param_3dnr_1stframe {
+	u32	cmd;
+	u32	reserved[PARAMETER_MAX_MEMBER-2];
+	u32	err;
+};
+
+struct param_fd_config {
+	u32	cmd;
+	u32	max_number;
+	u32	roll_angle;
+	u32	yaw_angle;
+	s32	smile_mode;
+	s32	blink_mode;
+	u32	eye_detect;
+	u32	mouth_detect;
+	u32	orientation;
+	u32	orientation_value;
+	u32	reserved[PARAMETER_MAX_MEMBER-11];
+	u32	err;
+};
+
+struct global_param {
+	struct param_global_shotmode	shotmode; /* 0 */
+};
+
+/* To be added */
+struct sensor_param {
+	struct param_control		control;
+	struct param_otf_input		otf_input;
+	struct param_otf_output		otf_output;
+	struct param_sensor_framerate	frame_rate;
+	struct param_dma_output		dma_output;
+};
+
+struct buffer_param {
+	struct param_control	control;
+	struct param_otf_input	otf_input;
+	struct param_otf_output	otf_output;
+};
+
+struct isp_param {
+	struct param_control		control;
+	struct param_otf_input		otf_input;
+	struct param_dma_input		dma1_input;
+	struct param_dma_input		dma2_input;
+	struct param_isp_aa		aa;
+	struct param_isp_flash		flash;
+	struct param_isp_awb		awb;
+	struct param_isp_imageeffect	effect;
+	struct param_isp_iso		iso;
+	struct param_isp_adjust		adjust;
+	struct param_isp_metering	metering;
+	struct param_isp_afc		afc;
+	struct param_otf_output		otf_output;
+	struct param_dma_output		dma1_output;
+	struct param_dma_output		dma2_output;
+};
+
+struct drc_param {
+	struct param_control		control;
+	struct param_otf_input		otf_input;
+	struct param_dma_input		dma_input;
+	struct param_otf_output		otf_output;
+};
+
+struct scalerc_param {
+	struct param_control		control;
+	struct param_otf_input		otf_input;
+	struct param_scaler_imageeffect	effect;
+	struct param_scaler_input_crop	input_crop;
+	struct param_scaler_output_crop	 output_crop;
+	struct param_otf_output		otf_output;
+	struct param_dma_output		dma_output;
+};
+
+struct odc_param {
+	struct param_control		control;
+	struct param_otf_input		otf_input;
+	struct param_otf_output		otf_output;
+};
+
+struct dis_param {
+	struct param_control		control;
+	struct param_otf_input		otf_input;
+	struct param_otf_output		otf_output;
+};
+
+struct tdnr_param {
+	struct param_control		control;
+	struct param_otf_input		otf_input;
+	struct param_3dnr_1stframe	frame;
+	struct param_otf_output		otf_output;
+	struct param_dma_output		dma_output;
+};
+
+struct scalerp_param {
+	struct param_control			control;
+	struct param_otf_input			otf_input;
+	struct param_scaler_imageeffect		effect;
+	struct param_scaler_input_crop		input_crop;
+	struct param_scaler_output_crop		output_crop;
+	struct param_scaler_rotation		rotation;
+	struct param_scaler_flip		flip;
+	struct param_otf_output			otf_output;
+	struct param_dma_output			dma_output;
+};
+
+struct fd_param {
+	struct param_control			control;
+	struct param_otf_input			otf_input;
+	struct param_dma_input			dma_input;
+	struct param_fd_config			config;
+};
+
+struct is_param_region {
+	struct global_param	global;
+	struct sensor_param	sensor;
+	struct buffer_param	buf;
+	struct isp_param	isp;
+	struct drc_param	drc;
+	struct scalerc_param	scalerc;
+	struct odc_param	odc;
+	struct dis_param	dis;
+	struct tdnr_param	tdnr;
+	struct scalerp_param	scalerp;
+	struct fd_param		fd;
+};
+
+#define	NUMBER_OF_GAMMA_CURVE_POINTS	32
+
+struct is_sensor_tune {
+	u32 exposure;
+	u32 analog_gain;
+	u32 frame_rate;
+	u32 actuator_pos;
+};
+
+struct is_tune_gammacurve {
+	u32 num_pts_x[NUMBER_OF_GAMMA_CURVE_POINTS];
+	u32 num_pts_y_r[NUMBER_OF_GAMMA_CURVE_POINTS];
+	u32 num_pts_y_g[NUMBER_OF_GAMMA_CURVE_POINTS];
+	u32 num_pts_y_b[NUMBER_OF_GAMMA_CURVE_POINTS];
+};
+
+struct is_isp_tune {
+	/* Brightness level : range 0~100, default : 7 */
+	u32 brightness_level;
+	/* Contrast level : range -127~127, default : 0 */
+	s32 contrast_level;
+	/* Saturation level : range -127~127, default : 0 */
+	s32 saturation_level;
+	s32 gamma_level;
+	struct is_tune_gammacurve gamma_curve[4];
+	/* Hue : range -127~127, default : 0 */
+	s32 hue;
+	/* Sharpness blur : range -127~127, default : 0 */
+	s32 sharpness_blur;
+	/* Despeckle : range -127~127, default : 0 */
+	s32 despeckle;
+	/* Edge color supression : range -127~127, default : 0 */
+	s32 edge_color_supression;
+	/* Noise reduction : range -127~127, default : 0 */
+	s32 noise_reduction;
+	/* (32*4 + 9)*4 = 548 bytes */
+};
+
+struct is_tune_region {
+	struct is_sensor_tune sensor_tune;
+	struct is_isp_tune isp_tune;
+};
+
+struct rational_t {
+	u32 num;
+	u32 den;
+};
+
+struct srational_t {
+	s32 num;
+	s32 den;
+};
+
+#define FLASH_FIRED_SHIFT	0
+#define FLASH_NOT_FIRED		0
+#define FLASH_FIRED		1
+
+#define FLASH_STROBE_SHIFT				1
+#define FLASH_STROBE_NO_DETECTION			0
+#define FLASH_STROBE_RESERVED				1
+#define FLASH_STROBE_RETURN_LIGHT_NOT_DETECTED		2
+#define FLASH_STROBE_RETURN_LIGHT_DETECTED		3
+
+#define FLASH_MODE_SHIFT			3
+#define FLASH_MODE_UNKNOWN			0
+#define FLASH_MODE_COMPULSORY_FLASH_FIRING	1
+#define FLASH_MODE_COMPULSORY_FLASH_SUPPRESSION	2
+#define FLASH_MODE_AUTO_MODE			3
+
+#define FLASH_FUNCTION_SHIFT		5
+#define FLASH_FUNCTION_PRESENT		0
+#define FLASH_FUNCTION_NONE		1
+
+#define FLASH_RED_EYE_SHIFT		6
+#define FLASH_RED_EYE_DISABLED		0
+#define FLASH_RED_EYE_SUPPORTED		1
+
+enum apex_aperture_value {
+	F1_0		= 0,
+	F1_4		= 1,
+	F2_0		= 2,
+	F2_8		= 3,
+	F4_0		= 4,
+	F5_6		= 5,
+	F8_9		= 6,
+	F11_0		= 7,
+	F16_0		= 8,
+	F22_0		= 9,
+	F32_0		= 10,
+};
+
+struct exif_attribute {
+	struct rational_t exposure_time;
+	struct srational_t shutter_speed;
+	u32 iso_speed_rating;
+	u32 flash;
+	struct srational_t brightness;
+};
+
+struct is_frame_header {
+	u32 valid;
+	u32 bad_mark;
+	u32 captured;
+	u32 frame_number;
+	struct exif_attribute	exif;
+};
+
+struct is_fd_rect {
+	u32 offset_x;
+	u32 offset_y;
+	u32 width;
+	u32 height;
+};
+
+struct is_face_marker {
+	u32	frame_number;
+	struct is_fd_rect face;
+	struct is_fd_rect left_eye;
+	struct is_fd_rect right_eye;
+	struct is_fd_rect mouth;
+	u32	roll_angle;
+	u32	yaw_angle;
+	u32	confidence;
+	u32	stracked;
+	u32	tracked_faceid;
+	u32	smile_level;
+	u32	blink_level;
+};
+
+#define MAX_FRAME_COUNT		8
+#define MAX_FRAME_COUNT_PREVIEW	4
+#define MAX_FRAME_COUNT_CAPTURE	1
+#define MAX_FACE_COUNT		16
+
+#define MAX_SHARED_COUNT	500
+
+struct is_region {
+	struct is_param_region	parameter;
+	struct is_tune_region	tune;
+	struct is_frame_header	header[MAX_FRAME_COUNT];
+	struct is_face_marker	face[MAX_FACE_COUNT];
+	u32			shared[MAX_SHARED_COUNT];
+};
+
+struct is_time_measure_us {
+	u32  min_time_us;
+	u32  max_time_us;
+	u32  avrg_time_us;
+	u32  current_time_us;
+};
+
+struct is_debug_frame_descriptor {
+	u32	sensor_frame_time;
+	u32	sensor_exposure_time;
+	u32	sensor_analog_gain;
+	u32	req_lei;
+};
+
+#define MAX_FRAMEDESCRIPTOR_CONTEXT_NUM	(30 * 20)	/* 600 frame */
+#define MAX_VERSION_DISPLAY_BUF		(32)
+
+struct is_share_region {
+	u32	frame_time;
+	u32	exposure_time;
+	u32	analog_gain;
+
+	u32	r_gain;
+	u32	g_gain;
+	u32	b_gain;
+
+	u32	af_position;
+	u32	af_status;
+	u32	af_scene_type;
+
+	u32	frame_descp_onoff_control;
+	u32	frame_descp_update_done;
+	u32	frame_descp_idx;
+	u32	frame_descp_max_idx;
+
+	struct is_debug_frame_descriptor
+		dbg_frame_descp_ctx[MAX_FRAMEDESCRIPTOR_CONTEXT_NUM];
+
+	u32	chip_id;
+	u32	chip_rev_no;
+	u8	ispfw_version_no[MAX_VERSION_DISPLAY_BUF];
+	u8	ispfw_version_date[MAX_VERSION_DISPLAY_BUF];
+	u8	sirc_sdk_version_no[MAX_VERSION_DISPLAY_BUF];
+	u8	sirc_sdk_revsion_no[MAX_VERSION_DISPLAY_BUF];
+	u8	sirc_sdk_version_date[MAX_VERSION_DISPLAY_BUF];
+
+	/*measure timing*/
+	struct is_time_measure_us	isp_sdk_time;
+};
+
+struct is_debug_control {
+	u32 write_point;	/* 0~500KB boundary*/
+	u32 assert_flag;	/* 0:Not Inovked, 1:Invoked*/
+	u32 pabort_flag;	/* 0:Not Inovked, 1:Invoked*/
+	u32 dabort_flag;	/* 0:Not Inovked, 1:Invoked*/
+	u32 pd_ready_flag;	/* 0:Normal, 1:EnterIdle(Ready to power down)*/
+	u32 isp_frameerr;	/* Frame Error Count.*/
+	u32 drc_frame_err;	/* Frame Error Count.*/
+	u32 scc_frame_err;	/* Frame Error Count.*/
+	u32 odc_frame_err;	/* Frame Error Count.*/
+	u32 dis_frame_err;	/* Frame Error Count.*/
+	u32 tdnr_frame_err;	/* Frame Error Count.*/
+	u32 scp_frame_err;	/* Frame Error Count.*/
+	u32 fd_frame_err;	/* Frame Error Count.*/
+	u32 isp_frame_drop;	/* Frame Drop Count.*/
+	u32 drc_frame_drop;	/* Frame Drop Count.*/
+	u32 dis_frame_drop;	/* Frame Drop Count.*/
+	u32 uifdframedrop;
+};
+
+#endif
-- 
1.7.9.5

[RFC v2 04/10] exynos5-fimc-is: Adds the register definition and context header

[Arun Kumar K]

This patch adds the register definition file for the fimc-is driver
and also the header file containing the main context for the driver.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
---
 drivers/media/platform/exynos5-is/fimc-is-regs.h |  107 +++++++++++++++
 drivers/media/platform/exynos5-is/fimc-is.h      |  151 ++++++++++++++++++++++
 2 files changed, 258 insertions(+)
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-regs.h
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is.h

diff --git a/drivers/media/platform/exynos5-is/fimc-is-regs.h b/drivers/media/platform/exynos5-is/fimc-is-regs.h
new file mode 100644
index 0000000..d00df7b
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-regs.h
@@ -0,0 +1,107 @@
+/*
+ * Samsung Exynos5 SoC series FIMC-IS driver
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd
+ * Arun Kumar K <arun.kk@samsung.com>
+ * Kil-yeon Lim <kilyeon.im@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef FIMC_IS_REGS_H
+#define FIMC_IS_REGS_H
+
+#include <mach/map.h>
+
+/* WDT_ISP register */
+#define WDT			0x00170000
+/* MCUCTL register */
+#define MCUCTL			0x00180000
+/* MCU Controller Register */
+#define MCUCTLR				(MCUCTL+0x00)
+#define MCUCTLR_AXI_ISPX_AWCACHE(x)	((x) << 16)
+#define MCUCTLR_AXI_ISPX_ARCACHE(x)	((x) << 12)
+#define MCUCTLR_MSWRST			(1 << 0)
+/* Boot Base OFfset Address Register */
+#define BBOAR				(MCUCTL+0x04)
+#define BBOAR_BBOA(x)			((x) << 0)
+
+/* Interrupt Generation Register 0 from Host CPU to VIC */
+#define INTGR0				(MCUCTL+0x08)
+#define INTGR0_INTGC(n)			(1 << ((n) + 16))
+#define INTGR0_INTGD(n)			(1 << (n))
+
+/* Interrupt Clear Register 0 from Host CPU to VIC */
+#define INTCR0				(MCUCTL+0x0c)
+#define INTCR0_INTCC(n)			(1 << ((n) + 16))
+#define INTCR0_INTCD(n)			(1 << (n))
+
+/* Interrupt Mask Register 0 from Host CPU to VIC */
+#define INTMR0				(MCUCTL+0x10)
+#define INTMR0_INTMC(n)			(1 << ((n) + 16))
+#define INTMR0_INTMD(n)			(1 << (n))
+
+/* Interrupt Status Register 0 from Host CPU to VIC */
+#define INTSR0				(MCUCTL+0x14)
+#define INTSR0_GET_INTSD(n, x)		(((x) >> (n)) & 0x1)
+#define INTSR0_GET_INTSC(n, x)		(((x) >> ((n) + 16)) & 0x1)
+
+/* Interrupt Mask Status Register 0 from Host CPU to VIC */
+#define INTMSR0				(MCUCTL+0x18)
+#define INTMSR0_GET_INTMSD(n, x)	(((x) >> (n)) & 0x1)
+#define INTMSR0_GET_INTMSC(n, x)	(((x) >> ((n) + 16)) & 0x1)
+
+/* Interrupt Generation Register 1 from ISP CPU to Host IC */
+#define INTGR1				(MCUCTL+0x1c)
+#define INTGR1_INTGC(n)			(1 << (n))
+
+/* Interrupt Clear Register 1 from ISP CPU to Host IC */
+#define INTCR1				(MCUCTL+0x20)
+#define INTCR1_INTCC(n)			(1 << (n))
+
+/* Interrupt Mask Register 1 from ISP CPU to Host IC */
+#define INTMR1				(MCUCTL+0x24)
+#define INTMR1_INTMC(n)			(1 << (n))
+
+/* Interrupt Status Register 1 from ISP CPU to Host IC */
+#define INTSR1				(MCUCTL+0x28)
+/* Interrupt Mask Status Register 1 from ISP CPU to Host IC */
+#define INTMSR1				(MCUCTL+0x2c)
+/* Interrupt Clear Register 2 from ISP BLK's interrupts to Host IC */
+#define INTCR2				(MCUCTL+0x30)
+#define INTCR2_INTCC(n)			(1 << (n))
+
+/* Interrupt Mask Register 2 from ISP BLK's interrupts to Host IC */
+#define INTMR2				(MCUCTL+0x34)
+#define INTMR2_INTMCIS(n)		(1 << (n))
+
+/* Interrupt Status Register 2 from ISP BLK's interrupts to Host IC */
+#define INTSR2				(MCUCTL+0x38)
+/* Interrupt Mask Status Register 2 from ISP BLK's interrupts to Host IC */
+#define INTMSR2				(MCUCTL+0x3c)
+/* General Purpose Output Control Register (0~17) */
+#define GPOCTLR				(MCUCTL+0x40)
+#define GPOCTLR_GPOG(n, x)		((x) << (n))
+
+/* General Purpose Pad Output Enable Register (0~17) */
+#define GPOENCTLR			(MCUCTL+0x44)
+#define GPOENCTLR_GPOEN0(n, x)		((x) << (n))
+
+/* General Purpose Input Control Register (0~17) */
+#define GPICTLR				(MCUCTL+0x48)
+
+/* IS Shared Registers between ISP CPU and HOST CPU */
+#define ISSR(n)			(MCUCTL + 0x80 + (n))
+
+/* PMU for FIMC-IS*/
+#define PMUREG_CMU_RESET_ISP_SYS_PWR_REG	0x1584
+#define PMUREG_ISP_ARM_CONFIGURATION		0x2280
+#define PMUREG_ISP_ARM_STATUS			0x2284
+#define PMUREG_ISP_ARM_OPTION			0x2288
+#define PMUREG_ISP_LOW_POWER_OFF		0x0004
+#define PMUREG_ISP_CONFIGURATION		0x4020
+#define PMUREG_ISP_STATUS			0x4024
+
+#endif
diff --git a/drivers/media/platform/exynos5-is/fimc-is.h b/drivers/media/platform/exynos5-is/fimc-is.h
new file mode 100644
index 0000000..0ee8f94
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is.h
@@ -0,0 +1,151 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ *  Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef FIMC_IS_H_
+#define FIMC_IS_H_
+
+#include "fimc-is-err.h"
+#include "fimc-is-core.h"
+#include "fimc-is-param.h"
+#include "fimc-is-pipeline.h"
+#include "fimc-is-interface.h"
+
+#define fimc_pipeline_to_is(p) container_of(p, struct fimc_is, pipeline)
+#define fimc_interface_to_is(p) container_of(p, struct fimc_is, interface)
+#define fimc_sensor_to_is(p) container_of(p, struct fimc_is, sensor)
+#define fimc_isp_to_is(p) container_of(p, struct fimc_is, isp)
+#define fimc_scp_to_is(p) container_of(p, struct fimc_is, scp)
+
+/* Macros used by media dev to get the subdev and vfd */
+/* is --> driver data from pdev
+ * pid --> pipeline index */
+#define fimc_is_isp_get_sd(is, pid) (&is->pipeline.isp.subdev)
+#define fimc_is_isp_get_vfd(is, pid) (&is->pipeline.isp.vfd)
+#define fimc_is_scc_get_sd(is, pid) (&is->pipeline.scaler[SCALER_SCC].subdev)
+#define fimc_is_scc_get_vfd(is, pid) (&is->pipeline.scaler[SCALER_SCC].vfd)
+#define fimc_is_scp_get_sd(is, pid) (&is->pipeline.scaler[SCALER_SCP].subdev)
+#define fimc_is_scp_get_vfd(is, pid) (&is->pipeline.scaler[SCALER_SCP].vfd)
+/* is --> driver data from pdev
+ * sid --> sensor index */
+#define fimc_is_sensor_get_sd(is, sid) (&is->sensor[sid].subdev)
+
+
+/**
+ * struct fimc_is - fimc lite structure
+ * @pdev: pointer to FIMC-IS platform device
+ * @pdata: platform data for FIMC-IS
+ * @alloc_ctx: videobuf2 memory allocator context
+ * @clk: FIMC-IS clocks
+ * @pmu_regs: PMU reg base address
+ * @minfo: internal memory organization info
+ * @sensor: FIMC-IS sensor context
+ * @pipeline: hardware pipeline context
+ * @interface: hardware interface context
+ */
+struct fimc_is {
+	struct platform_device		*pdev;
+
+	struct vb2_alloc_ctx		*alloc_ctx;
+	struct clk			*clock[IS_CLK_MAX_NUM];
+	void __iomem			*pmu_regs;
+
+	struct fimc_is_meminfo		minfo;
+
+	struct fimc_is_sensor		sensor[FIMC_IS_NUM_SENSORS];
+	struct fimc_is_pipeline		pipeline;
+	struct fimc_is_interface	interface;
+};
+
+/* Queue operations for ISP */
+static inline void fimc_is_isp_wait_queue_add(struct fimc_is_isp *isp,
+		struct fimc_is_buf *buf)
+{
+	list_add_tail(&buf->list, &isp->wait_queue);
+	isp->wait_queue_cnt++;
+}
+
+static inline struct fimc_is_buf *fimc_is_isp_wait_queue_get(
+		struct fimc_is_isp *isp)
+{
+	struct fimc_is_buf *buf;
+	buf = list_entry(isp->wait_queue.next,
+			struct fimc_is_buf, list);
+	list_del(&buf->list);
+	isp->wait_queue_cnt--;
+	return buf;
+}
+
+static inline void fimc_is_isp_run_queue_add(struct fimc_is_isp *isp,
+		struct fimc_is_buf *buf)
+{
+	list_add_tail(&buf->list, &isp->run_queue);
+	isp->run_queue_cnt++;
+}
+
+static inline struct fimc_is_buf *fimc_is_isp_run_queue_get(
+		struct fimc_is_isp *isp)
+{
+	struct fimc_is_buf *buf;
+	buf = list_entry(isp->run_queue.next,
+			struct fimc_is_buf, list);
+	list_del(&buf->list);
+	isp->run_queue_cnt--;
+	return buf;
+}
+
+/* Queue operations for SCALER */
+static inline void fimc_is_scaler_wait_queue_add(struct fimc_is_scaler *scp,
+		struct fimc_is_buf *buf)
+{
+	list_add_tail(&buf->list, &scp->wait_queue);
+	scp->wait_queue_cnt++;
+}
+
+static inline struct fimc_is_buf *fimc_is_scaler_wait_queue_get(
+		struct fimc_is_scaler *scp)
+{
+	struct fimc_is_buf *buf;
+	buf = list_entry(scp->wait_queue.next,
+			struct fimc_is_buf, list);
+	list_del(&buf->list);
+	scp->wait_queue_cnt--;
+	return buf;
+}
+
+static inline void fimc_is_scaler_run_queue_add(struct fimc_is_scaler *scp,
+		struct fimc_is_buf *buf)
+{
+	list_add_tail(&buf->list, &scp->run_queue);
+	scp->run_queue_cnt++;
+}
+
+static inline struct fimc_is_buf *fimc_is_scaler_run_queue_get(
+		struct fimc_is_scaler *scp)
+{
+	struct fimc_is_buf *buf;
+	buf = list_entry(scp->run_queue.next,
+			struct fimc_is_buf, list);
+	list_del(&buf->list);
+	scp->run_queue_cnt--;
+	return buf;
+}
+
+static inline void pmu_is_write(u32 v, struct fimc_is *is, unsigned int offset)
+{
+	writel(v, is->pmu_regs + offset);
+}
+
+static inline u32 pmu_is_read(struct fimc_is *is, unsigned int offset)
+{
+	return readl(is->pmu_regs + offset);
+}
+
+#endif
-- 
1.7.9.5

[RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Arun Kumar K]

FIMC-IS uses certain sensors which are exclusively controlled
from the IS firmware. This patch adds the sensor subdev for the
fimc-is sensors.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
---
 drivers/media/platform/exynos5-is/fimc-is-sensor.c |  463 ++++++++++++++++++++
 drivers/media/platform/exynos5-is/fimc-is-sensor.h |  168 +++++++
 2 files changed, 631 insertions(+)
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.h

diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.c b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
new file mode 100644
index 0000000..b8fb834
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
@@ -0,0 +1,463 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K <arun.kk@samsung.com>
+ * Kil-yeon Lim <kilyeon.im@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+#include <linux/i2c.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <media/v4l2-of.h>
+#include "fimc-is-sensor.h"
+#include "fimc-is.h"
+
+#define DRIVER_NAME "fimc-is-sensor"
+
+static char *sensor_clock_name[] = {
+	[SCLK_BAYER]	= "sclk_bayer",
+	[SCLK_CAM0]	= "sclk_cam0",
+	[SCLK_CAM1]	= "sclk_cam1",
+};
+
+/* Sensor supported formats */
+static struct v4l2_mbus_framefmt sensor_formats[FIMC_IS_MAX_SENSORS] = {
+	[SENSOR_S5K4E5] = {
+		.width          = SENSOR_4E5_WIDTH + 16,
+		.height         = SENSOR_4E5_HEIGHT + 10,
+		.code           = V4L2_MBUS_FMT_SGRBG10_1X10,
+		.field          = V4L2_FIELD_NONE,
+		.colorspace     = V4L2_COLORSPACE_SRGB,
+	},
+	[SENSOR_S5K6A3] = {
+		.width          = SENSOR_6A3_WIDTH + 16,
+		.height         = SENSOR_6A3_HEIGHT + 10,
+		.code           = V4L2_MBUS_FMT_SGRBG10_1X10,
+		.field          = V4L2_FIELD_NONE,
+		.colorspace     = V4L2_COLORSPACE_SRGB,
+	},
+};
+
+static struct fimc_is_sensor *sd_to_fimc_is_sensor(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct fimc_is_sensor, subdev);
+}
+
+static void sensor_clk_put(struct fimc_is_sensor *sensor)
+{
+	int i;
+
+	for (i = 0; i < SCLK_MAX_NUM; i++) {
+		if (IS_ERR(sensor->clock[i]))
+			continue;
+		clk_unprepare(sensor->clock[i]);
+		clk_put(sensor->clock[i]);
+		sensor->clock[i] = ERR_PTR(-EINVAL);
+	}
+}
+
+static int sensor_clk_init(struct fimc_is_sensor *sensor)
+{
+	int i, ret;
+
+	/* Get CAM clocks */
+	for (i = 0; i < SCLK_MAX_NUM; i++) {
+		sensor->clock[i] = clk_get(NULL, sensor_clock_name[i]);
+		if (IS_ERR(sensor->clock[i]))
+			goto err;
+		ret = clk_prepare(sensor->clock[i]);
+		if (ret < 0) {
+			clk_put(sensor->clock[i]);
+			sensor->clock[i] = ERR_PTR(-EINVAL);
+			goto err;
+		}
+	}
+
+	/* Set clock rates */
+	ret = clk_set_rate(sensor->clock[SCLK_CAM0], 24 * 1000000);
+	ret |= clk_set_rate(sensor->clock[SCLK_BAYER], 24 * 1000000);
+	if (ret) {
+		pr_err("Failed to set cam clock rates\n");
+		goto err;
+	}
+	return 0;
+err:
+	sensor_clk_put(sensor);
+	pr_err("Failed to init sensor clock\n");
+	return -ENXIO;
+}
+
+static int sensor_clk_enable(struct fimc_is_sensor *sensor)
+{
+	int ret = 0, i;
+
+	for (i = 0; i < SCLK_MAX_NUM; i++) {
+		ret = clk_enable(sensor->clock[i]);
+		if (ret)
+			return ret;
+	}
+	return ret;
+}
+
+static void sensor_clk_disable(struct fimc_is_sensor *sensor)
+{
+	int i;
+
+	for (i = 0; i < SCLK_MAX_NUM; i++)
+		clk_disable(sensor->clock[i]);
+}
+
+static int sensor_enum_mbus_code(struct v4l2_subdev *sd,
+				  struct v4l2_subdev_fh *fh,
+				  struct v4l2_subdev_mbus_code_enum *code)
+{
+	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
+	struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
+
+	if (!code)
+		return -EINVAL;
+
+	code->code = sensor_formats[sdata->sensor_id].code;
+	return 0;
+}
+
+static int sensor_set_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_fh *fh,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
+	struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
+	struct v4l2_mbus_framefmt *sfmt = &fmt->format;
+
+	if ((sfmt->width != sensor_formats[sdata->sensor_id].width) ||
+		(sfmt->height != sensor_formats[sdata->sensor_id].height) ||
+		(sfmt->code != sensor_formats[sdata->sensor_id].code))
+		*sfmt = sensor_formats[sdata->sensor_id];
+
+	return 0;
+}
+
+static int sensor_get_fmt(struct v4l2_subdev *sd,
+			  struct v4l2_subdev_fh *fh,
+			  struct v4l2_subdev_format *fmt)
+{
+	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
+	struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
+
+	fmt->format = sensor_formats[sdata->sensor_id];
+	return 0;
+}
+
+static struct v4l2_subdev_pad_ops sensor_pad_ops = {
+	.enum_mbus_code		= sensor_enum_mbus_code,
+	.get_fmt		= sensor_get_fmt,
+	.set_fmt		= sensor_set_fmt,
+};
+
+static int sensor_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct v4l2_mbus_framefmt *format = v4l2_subdev_get_try_format(fh, 0);
+
+	*format = sensor_formats[0];
+	return 0;
+}
+
+static const struct v4l2_subdev_internal_ops sensor_sd_internal_ops = {
+	.open = sensor_open,
+};
+
+static int sensor_s_power(struct v4l2_subdev *sd, int on)
+{
+	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
+
+	if (on) {
+		/* Power on sensor */
+		sensor_clk_enable(sensor);
+		gpio_set_value(sensor->gpio_reset, 1);
+	} else {
+		/* Power off sensor */
+		gpio_set_value(sensor->gpio_reset, 0);
+		sensor_clk_disable(sensor);
+	}
+	return 0;
+}
+
+static struct v4l2_subdev_core_ops sensor_core_ops = {
+	.s_power = sensor_s_power,
+};
+
+static int sensor_s_stream(struct v4l2_subdev *sd, int enable)
+{
+	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
+	int ret;
+
+	if (enable) {
+		pr_debug("Stream ON\n");
+		/* Open pipeline */
+		ret = fimc_is_pipeline_open(sensor->pipeline, sensor);
+		if (ret < 0) {
+			pr_err("Pipeline already opened.\n");
+			return -EBUSY;
+		}
+
+		/* Start IS pipeline */
+		ret = fimc_is_pipeline_start(sensor->pipeline);
+		if (ret < 0) {
+			pr_err("Pipeline start failed.\n");
+			return -EINVAL;
+		}
+	} else {
+		pr_debug("Stream OFF\n");
+		/* Stop IS pipeline */
+		ret = fimc_is_pipeline_stop(sensor->pipeline);
+		if (ret < 0) {
+			pr_err("Pipeline stop failed.\n");
+			return -EINVAL;
+		}
+
+		/* Close pipeline */
+		ret = fimc_is_pipeline_close(sensor->pipeline);
+		if (ret < 0) {
+			pr_err("Pipeline close failed\n");
+			return -EBUSY;
+		}
+	}
+
+	return 0;
+}
+
+static const struct v4l2_subdev_video_ops sensor_video_ops = {
+	.s_stream       = sensor_s_stream,
+};
+
+static struct v4l2_subdev_ops sensor_subdev_ops = {
+	.core = &sensor_core_ops,
+	.pad = &sensor_pad_ops,
+	.video = &sensor_video_ops,
+};
+
+static int sensor_parse_dt(struct fimc_is_sensor *sensor,
+			struct device_node *sensor_node)
+{
+	struct device_node *port, *ep, *remote, *fimc_is_node, *camera;
+	struct fimc_is *is_data;
+	struct platform_device *pdev_is;
+	struct v4l2_of_endpoint endpoint;
+
+	/* Parse ports */
+	port = sensor_node;
+	while ((port = of_get_next_child(port, NULL))) {
+		if (!of_node_cmp(port->name, "port"))
+			break;
+		of_node_put(port);
+	};
+	if (!port) {
+		pr_err("Sensor port undefined\n");
+		return -EINVAL;
+	}
+
+	ep = of_get_next_child(port, NULL);
+	if (!ep)
+		return -EINVAL;
+
+	port = of_parse_phandle(ep, "remote-endpoint", 0);
+	if (port) {
+		v4l2_of_parse_endpoint(port, &endpoint);
+		sensor->i2c_ch = (endpoint.port >> 2) & 0x1;
+	}
+
+	remote = v4l2_of_get_remote_port_parent(ep);
+	of_node_put(ep);
+
+	if (!remote)
+		return -EINVAL;
+
+	camera = of_get_parent(remote);
+	fimc_is_node = NULL;
+	while ((fimc_is_node = of_get_next_child(camera, fimc_is_node))) {
+		if (!of_node_cmp(fimc_is_node->name, "fimc-is"))
+			break;
+		of_node_put(fimc_is_node);
+	};
+	of_node_put(camera);
+
+	if (!fimc_is_node)
+		return -EINVAL;
+
+	/* Get the IS pipeline context */
+	pdev_is = of_find_device_by_node(fimc_is_node);
+	is_data = dev_get_drvdata(&pdev_is->dev);
+
+	if (!is_data)
+		return -EINVAL;
+
+	sensor->pipeline = &is_data->pipeline;
+
+	return 0;
+}
+
+static const struct of_device_id fimc_is_sensor_of_match[];
+
+static int fimc_is_sensor_probe(struct i2c_client *client,
+				const struct i2c_device_id *id)
+{
+	struct device *dev = &client->dev;
+	struct fimc_is_sensor *sensor;
+	const struct of_device_id *of_id;
+	struct v4l2_subdev *sd;
+	int gpio, ret;
+	unsigned int sensor_id;
+
+	sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
+	if (!sensor)
+		return -ENOMEM;
+
+	sensor->gpio_reset = -EINVAL;
+
+	gpio = of_get_gpio_flags(dev->of_node, 0, NULL);
+	if (gpio_is_valid(gpio)) {
+		ret = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, DRIVER_NAME);
+		if (ret < 0)
+			return ret;
+	}
+	pr_err("GPIO Request success : %d", gpio);
+	sensor->gpio_reset = gpio;
+
+	of_id = of_match_node(fimc_is_sensor_of_match, dev->of_node);
+	if (!of_id) {
+		ret = -ENODEV;
+		goto err_gpio;
+	}
+
+	sensor->drvdata = (struct fimc_is_sensor_drv_data *) of_id->data;
+	sensor->dev = dev;
+
+	/* Get FIMC-IS context */
+	ret = sensor_parse_dt(sensor, dev->of_node);
+	if (ret) {
+		pr_err("Unable to obtain IS context\n");
+		ret = -ENODEV;
+		goto err_gpio;
+	}
+
+	sd = &sensor->subdev;
+	v4l2_i2c_subdev_init(sd, client, &sensor_subdev_ops);
+	snprintf(sd->name, sizeof(sd->name), sensor->drvdata->sensor_name);
+	sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+
+	sensor_id = sensor->drvdata->sensor_id;
+	sensor->format.code = sensor_formats[sensor_id].code;
+	sensor->format.width = sensor_formats[sensor_id].width;
+	sensor->format.height = sensor_formats[sensor_id].height;
+
+	sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
+	ret = media_entity_init(&sd->entity, 1, &sensor->pad, 0);
+	if (ret < 0)
+		goto err_gpio;
+
+	v4l2_set_subdevdata(sd, sensor);
+	i2c_set_clientdata(client, &sensor->subdev);
+
+	pm_runtime_no_callbacks(dev);
+	pm_runtime_enable(dev);
+	sensor_clk_init(sensor);
+
+	return 0;
+err_gpio:
+	if (gpio_is_valid(sensor->gpio_reset))
+		gpio_free(sensor->gpio_reset);
+	return ret;
+}
+
+static int fimc_is_sensor_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
+
+	media_entity_cleanup(&sensor->subdev.entity);
+	sensor_clk_put(sensor);
+
+	return 0;
+}
+
+static const struct i2c_device_id fimc_is_sensor_ids[] = {
+	{ }
+};
+
+static const struct fimc_is_sensor_drv_data s5k4e5_drvdata = {
+	.sensor_id = SENSOR_S5K4E5,
+	.sensor_name = "s5k4e5",
+	.pixel_width = SENSOR_4E5_WIDTH + 16,
+	.pixel_height = SENSOR_4E5_HEIGHT + 10,
+	.active_width = SENSOR_4E5_WIDTH,
+	.active_height = SENSOR_4E5_HEIGHT,
+	.max_framerate = 30,
+	.setfile_name = "setfile_4e5.bin",
+	.ext = {
+		.actuator_con = {
+			.product_name = ACTUATOR_NAME_DWXXXX,
+			.peri_type = SE_I2C,
+			.peri_setting.i2c.channel = SENSOR_CONTROL_I2C0,
+		},
+		.flash_con = {
+			.product_name = FLADRV_NAME_KTD267,
+			.peri_type = SE_GPIO,
+			.peri_setting.gpio.first_gpio_port_no = 1,
+			.peri_setting.gpio.second_gpio_port_no = 2,
+		},
+		.from_con.product_name = FROMDRV_NAME_NOTHING,
+		.mclk = 0,
+		.mipi_lane_num = 0,
+		.mipi_speed = 0,
+		.fast_open_sensor = 0,
+		.self_calibration_mode = 0,
+	},
+};
+
+static const struct fimc_is_sensor_drv_data s5k6a3_drvdata = {
+	.sensor_id = SENSOR_S5K6A3,
+	.sensor_name = "s5k6a3",
+	.pixel_width = SENSOR_6A3_WIDTH + 16,
+	.pixel_height = SENSOR_6A3_HEIGHT + 10,
+	.active_width = SENSOR_6A3_WIDTH,
+	.active_height = SENSOR_6A3_HEIGHT,
+	.max_framerate = 30,
+	.setfile_name = "setfile_6a3.bin",
+};
+
+static const struct of_device_id fimc_is_sensor_of_match[] = {
+	{
+		.compatible	= "samsung,s5k4e5",
+		.data		= &s5k4e5_drvdata,
+	},
+	{
+		.compatible	= "samsung,s5k6a3",
+		.data		= &s5k6a3_drvdata,
+	},
+	{  }
+};
+MODULE_DEVICE_TABLE(of, fimc_is_sensor_of_match);
+
+static struct i2c_driver fimc_is_sensor_driver = {
+	.driver = {
+		.of_match_table	= fimc_is_sensor_of_match,
+		.name		= DRIVER_NAME,
+		.owner		= THIS_MODULE,
+	},
+	.probe		= fimc_is_sensor_probe,
+	.remove		= fimc_is_sensor_remove,
+	.id_table	= fimc_is_sensor_ids,
+};
+
+module_i2c_driver(fimc_is_sensor_driver);
+
+MODULE_AUTHOR("Arun Kumar K <arun.kk@samsung.com>");
+MODULE_DESCRIPTION("Exynos5 FIMC-IS sensor subdev driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.h b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
new file mode 100644
index 0000000..75e5f20
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
@@ -0,0 +1,168 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K <arun.kk@samsung.com>
+ * Kil-yeon Lim <kilyeon.im@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef FIMC_IS_SENSOR_H_
+#define FIMC_IS_SENSOR_H_
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-subdev.h>
+
+#include "fimc-is-pipeline.h"
+
+#define FIMC_IS_MAX_CAMIF_CLIENTS	2
+#define FIMC_IS_MAX_NAME_LEN		32
+#define FIMC_IS_MAX_GPIO_NUM		32
+#define UART_ISP_SEL			0
+#define UART_ISP_RATIO			1
+
+#define FIMC_IS_MAX_SENSORS		4
+
+#define SENSOR_4E5_WIDTH		2560
+#define SENSOR_4E5_HEIGHT		1920
+#define SENSOR_6A3_WIDTH		1392
+#define SENSOR_6A3_HEIGHT		1392
+
+enum sensor_id {
+	SENSOR_S5K3H2	= 1,
+	SENSOR_S5K6A3	= 2,
+	SENSOR_S5K4E5	= 3,
+	SENSOR_S5K3H7	= 4,
+	SENSOR_CUSTOM	= 100,
+	SENSOR_END
+};
+
+enum sensor_channel {
+	SENSOR_CONTROL_I2C0	 = 0,
+	SENSOR_CONTROL_I2C1	 = 1
+};
+
+enum actuator_name {
+	ACTUATOR_NAME_AD5823	= 1,
+	ACTUATOR_NAME_DWXXXX	= 2,
+	ACTUATOR_NAME_AK7343	= 3,
+	ACTUATOR_NAME_HYBRIDVCA	= 4,
+	ACTUATOR_NAME_NOTHING	= 100,
+	ACTUATOR_NAME_END
+};
+
+enum flash_drv_name {
+	FLADRV_NAME_KTD267	= 1,
+	FLADRV_NAME_NOTHING	= 100,
+	FLADRV_NAME_END
+};
+
+enum from_name {
+	FROMDRV_NAME_W25Q80BW	= 1,
+	FROMDRV_NAME_NOTHING
+};
+
+enum sensor_peri_type {
+	SE_I2C,
+	SE_SPI,
+	SE_GPIO,
+	SE_MPWM,
+	SE_ADC,
+	SE_NULL
+};
+
+struct i2c_type {
+	u32 channel;
+	u32 slave_address;
+	u32 speed;
+};
+
+struct spi_type {
+	u32 channel;
+};
+
+struct gpio_type {
+	u32 first_gpio_port_no;
+	u32 second_gpio_port_no;
+};
+
+union sensor_peri_format {
+	struct i2c_type i2c;
+	struct spi_type spi;
+	struct gpio_type gpio;
+};
+
+struct sensor_protocol {
+	unsigned int product_name;
+	enum sensor_peri_type peri_type;
+	union sensor_peri_format peri_setting;
+};
+
+struct fimc_is_sensor_ext {
+	struct sensor_protocol actuator_con;
+	struct sensor_protocol flash_con;
+	struct sensor_protocol from_con;
+
+	unsigned int mclk;
+	unsigned int mipi_lane_num;
+	unsigned int mipi_speed;
+	unsigned int fast_open_sensor;
+	unsigned int self_calibration_mode;
+};
+
+struct fimc_is_sensor_drv_data {
+	unsigned int	sensor_id;
+	char		*sensor_name;
+	unsigned int	pixel_width;
+	unsigned int	pixel_height;
+	unsigned int	active_width;
+	unsigned int	active_height;
+	unsigned int	max_framerate;
+	struct fimc_is_sensor_ext ext;
+	char		*setfile_name;
+};
+
+enum sensor_clks {
+	SCLK_BAYER,
+	SCLK_CAM0,
+	SCLK_CAM1,
+	SCLK_MAX_NUM,
+};
+
+struct sensor_pix_format {
+	enum v4l2_mbus_pixelcode code;
+};
+
+/**
+ * struct fimc_is_sensor - fimc-is sensor context
+ * @pad: media pad
+ * @subdev: sensor subdev
+ * @clock: sensor clocks array
+ * @dev: sensor device ptr
+ * @pipeline: is pipeline context pointer
+ * @drvdata: sensor specific driver data
+ * @format: v4l2 mbus format for the subdev
+ * @gpio_reset: gpio pin to be used for sensor power on/off
+ * @i2c_ch: sensor's i2c channel number
+ */
+struct fimc_is_sensor {
+	struct media_pad		pad;
+	struct v4l2_subdev		subdev;
+	struct clk			*clock[SCLK_MAX_NUM];
+	struct device			*dev;
+
+	struct fimc_is_pipeline		*pipeline;
+	struct fimc_is_sensor_drv_data	*drvdata;
+	struct v4l2_mbus_framefmt	format;
+	int				gpio_reset;
+	unsigned int			i2c_ch;
+};
+
+#endif /* FIMC_IS_SENSOR_H_ */
-- 
1.7.9.5

[RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Arun Kumar K]

fimc-is driver takes video data input from the ISP video node
which is added in this patch. This node accepts Bayer input
buffers which is given from the IS sensors.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
---
 drivers/media/platform/exynos5-is/fimc-is-isp.c |  438 +++++++++++++++++++++++
 drivers/media/platform/exynos5-is/fimc-is-isp.h |   89 +++++
 2 files changed, 527 insertions(+)
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.h

diff --git a/drivers/media/platform/exynos5-is/fimc-is-isp.c b/drivers/media/platform/exynos5-is/fimc-is-isp.c
new file mode 100644
index 0000000..2890f17
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-isp.c
@@ -0,0 +1,438 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ *  Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <media/v4l2-ioctl.h>
+#include <media/videobuf2-dma-contig.h>
+
+#include "fimc-is.h"
+
+#define ISP_DRV_NAME "fimc-is-isp"
+
+static const struct fimc_is_fmt formats[] = {
+	{
+		.name           = "Bayer GR-BG 8bits",
+		.fourcc         = V4L2_PIX_FMT_SGRBG8,
+		.depth		= {8},
+		.num_planes     = 1,
+	},
+	{
+		.name           = "Bayer GR-BG 10bits",
+		.fourcc         = V4L2_PIX_FMT_SGRBG10,
+		.depth		= {10},
+		.num_planes     = 1,
+	},
+	{
+		.name           = "Bayer GR-BG 12bits",
+		.fourcc         = V4L2_PIX_FMT_SGRBG12,
+		.depth		= {12},
+		.num_planes     = 1,
+	},
+};
+#define NUM_FORMATS ARRAY_SIZE(formats)
+
+static struct fimc_is_fmt *find_format(struct v4l2_format *f)
+{
+	unsigned int i;
+
+	for (i = 0; i < NUM_FORMATS; i++) {
+		if (formats[i].fourcc == f->fmt.pix_mp.pixelformat)
+			return (struct fimc_is_fmt *) &formats[i];
+	}
+	return NULL;
+}
+
+static int isp_video_output_start_streaming(struct vb2_queue *vq,
+					unsigned int count)
+{
+	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+
+	/* Set state to RUNNING */
+	set_bit(STATE_RUNNING, &isp->output_state);
+	return 0;
+}
+
+static int isp_video_output_stop_streaming(struct vb2_queue *vq)
+{
+	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+
+	clear_bit(STATE_RUNNING, &isp->output_state);
+	return 0;
+}
+
+static int isp_video_output_queue_setup(struct vb2_queue *vq,
+			const struct v4l2_format *pfmt,
+			unsigned int *num_buffers, unsigned int *num_planes,
+			unsigned int sizes[], void *allocators[])
+{
+	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+	struct fimc_is_fmt *fmt = isp->fmt;
+	unsigned int wh, i;
+
+	if (!fmt)
+		return -EINVAL;
+
+	*num_planes = fmt->num_planes;
+	wh = isp->width * isp->height;
+
+	for (i = 0; i < *num_planes; i++) {
+		allocators[i] = isp->alloc_ctx;
+		sizes[i] = (wh * fmt->depth[i]) / 8;
+	}
+	return 0;
+}
+
+static int isp_video_output_buffer_init(struct vb2_buffer *vb)
+{
+	struct vb2_queue *vq = vb->vb2_queue;
+	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+	struct fimc_is_buf *buf;
+
+	buf = &isp->output_bufs[vb->v4l2_buf.index];
+	/* Initialize buffer */
+	buf->vb = vb;
+	buf->paddr[0] = vb2_dma_contig_plane_dma_addr(vb, 0);
+	isp->out_buf_cnt++;
+	return 0;
+}
+
+static void isp_video_output_buffer_queue(struct vb2_buffer *vb)
+{
+	struct vb2_queue *vq = vb->vb2_queue;
+	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+	struct fimc_is_buf *buf;
+
+	buf = &isp->output_bufs[vb->v4l2_buf.index];
+
+	fimc_is_pipeline_buf_lock(isp->pipeline);
+	fimc_is_isp_wait_queue_add(isp, buf);
+	fimc_is_pipeline_buf_unlock(isp->pipeline);
+
+	/* Call shot command */
+	fimc_is_pipeline_shot(isp->pipeline);
+}
+
+static void isp_lock(struct vb2_queue *vq)
+{
+	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+	mutex_lock(&isp->video_lock);
+}
+
+static void isp_unlock(struct vb2_queue *vq)
+{
+	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+	mutex_unlock(&isp->video_lock);
+}
+
+static const struct vb2_ops isp_video_output_qops = {
+	.queue_setup	 = isp_video_output_queue_setup,
+	.buf_init	 = isp_video_output_buffer_init,
+	.buf_queue	 = isp_video_output_buffer_queue,
+	.wait_prepare	 = isp_unlock,
+	.wait_finish	 = isp_lock,
+	.start_streaming = isp_video_output_start_streaming,
+	.stop_streaming	 = isp_video_output_stop_streaming,
+};
+
+static int isp_video_output_open(struct file *file)
+{
+	struct fimc_is_isp *isp = video_drvdata(file);
+	int ret = 0;
+
+	/* Check if opened before */
+	if (isp->refcount >= FIMC_IS_MAX_INSTANCES) {
+		pr_err("All instances are in use.\n");
+		return -EBUSY;
+	}
+
+	INIT_LIST_HEAD(&isp->wait_queue);
+	isp->wait_queue_cnt = 0;
+	INIT_LIST_HEAD(&isp->run_queue);
+	isp->run_queue_cnt = 0;
+
+	isp->refcount++;
+	return ret;
+}
+
+static int isp_video_output_close(struct file *file)
+{
+	struct fimc_is_isp *isp = video_drvdata(file);
+	int ret = 0;
+
+	isp->refcount--;
+	isp->output_state = 0;
+	vb2_fop_release(file);
+	return ret;
+}
+
+static const struct v4l2_file_operations isp_video_output_fops = {
+	.owner		= THIS_MODULE,
+	.open		= isp_video_output_open,
+	.release	= isp_video_output_close,
+	.poll		= vb2_fop_poll,
+	.unlocked_ioctl	= video_ioctl2,
+	.mmap		= vb2_fop_mmap,
+};
+
+/*
+ * Video node ioctl operations
+ */
+static int isp_querycap_output(struct file *file, void *priv,
+					struct v4l2_capability *cap)
+{
+	strncpy(cap->driver, ISP_DRV_NAME, sizeof(cap->driver) - 1);
+	strncpy(cap->card, ISP_DRV_NAME, sizeof(cap->card) - 1);
+	strncpy(cap->bus_info, ISP_DRV_NAME, sizeof(cap->bus_info) - 1);
+	cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT_MPLANE;
+	cap->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT_MPLANE;
+	return 0;
+}
+
+static int isp_enum_fmt_mplane(struct file *file, void *priv,
+				     struct v4l2_fmtdesc *f)
+{
+	const struct fimc_is_fmt *fmt;
+
+	if (f->index >= NUM_FORMATS)
+		return -EINVAL;
+
+	fmt = &formats[f->index];
+	strlcpy(f->description, fmt->name, sizeof(f->description));
+	f->pixelformat = fmt->fourcc;
+
+	return 0;
+}
+
+static int isp_g_fmt_mplane(struct file *file, void *fh,
+				  struct v4l2_format *f)
+{
+	struct fimc_is_isp *isp = video_drvdata(file);
+	struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
+	struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
+	const struct fimc_is_fmt *fmt = isp->fmt;
+
+	plane_fmt->bytesperline = (isp->width * fmt->depth[0]) / 8;
+	plane_fmt->sizeimage = plane_fmt->bytesperline * isp->height;
+
+	pixm->num_planes = fmt->num_planes;
+	pixm->pixelformat = fmt->fourcc;
+	pixm->width = isp->width;
+	pixm->height = isp->height;
+	pixm->field = V4L2_FIELD_NONE;
+	pixm->colorspace = V4L2_COLORSPACE_JPEG;
+
+	return 0;
+}
+
+static int isp_try_fmt_mplane(struct file *file, void *fh,
+		struct v4l2_format *f)
+{
+	struct fimc_is_fmt *fmt;
+
+	fmt = find_format(f);
+	if (!fmt) {
+		fmt = (struct fimc_is_fmt *) &formats[0];
+		f->fmt.pix_mp.pixelformat = fmt->fourcc;
+	}
+
+	if (fmt->num_planes != f->fmt.pix_mp.num_planes)
+		f->fmt.pix_mp.num_planes = fmt->num_planes;
+
+	return 0;
+}
+
+static int isp_s_fmt_mplane(struct file *file, void *priv,
+		struct v4l2_format *f)
+{
+	struct fimc_is_isp *isp = video_drvdata(file);
+	struct fimc_is_pipeline *p = isp->pipeline;
+	struct fimc_is_fmt *fmt;
+	unsigned int sensor_width, sensor_height;
+	int ret;
+
+	ret = isp_try_fmt_mplane(file, priv, f);
+	if (ret)
+		return ret;
+
+	/* Get format type */
+	fmt = find_format(f);
+	if (!fmt) {
+		fmt = (struct fimc_is_fmt *) &formats[0];
+		f->fmt.pix_mp.pixelformat = fmt->fourcc;
+		f->fmt.pix_mp.num_planes = fmt->num_planes;
+	}
+
+	/* Check if same as sensor width & height */
+	sensor_width = p->sensor->drvdata->pixel_width;
+	sensor_height = p->sensor->drvdata->pixel_height;
+	if ((sensor_width != f->fmt.pix_mp.width) ||
+		(sensor_height != f->fmt.pix_mp.height)) {
+		f->fmt.pix_mp.width = sensor_width;
+		f->fmt.pix_mp.height = sensor_height;
+	}
+
+	isp->fmt = fmt;
+	isp->width = f->fmt.pix_mp.width;
+	isp->height = f->fmt.pix_mp.height;
+	isp->size_image = f->fmt.pix_mp.plane_fmt[0].sizeimage;
+	set_bit(STATE_INIT, &isp->output_state);
+	return 0;
+}
+
+static int isp_reqbufs(struct file *file, void *priv,
+		struct v4l2_requestbuffers *reqbufs)
+{
+	struct fimc_is_isp *isp = video_drvdata(file);
+	int ret;
+
+	ret = vb2_reqbufs(&isp->vbq, reqbufs);
+	if (ret) {
+		pr_err("vb2 req buffers failed\n");
+		return ret;
+	}
+
+	isp->num_buffers = reqbufs->count;
+	isp->out_buf_cnt = 0;
+	set_bit(STATE_BUFS_ALLOCATED, &isp->output_state);
+	return 0;
+}
+
+static const struct v4l2_ioctl_ops isp_video_output_ioctl_ops = {
+	.vidioc_querycap		= isp_querycap_output,
+	.vidioc_enum_fmt_vid_out_mplane	= isp_enum_fmt_mplane,
+	.vidioc_try_fmt_vid_out_mplane	= isp_try_fmt_mplane,
+	.vidioc_s_fmt_vid_out_mplane	= isp_s_fmt_mplane,
+	.vidioc_g_fmt_vid_out_mplane	= isp_g_fmt_mplane,
+	.vidioc_reqbufs			= isp_reqbufs,
+	.vidioc_querybuf		= vb2_ioctl_querybuf,
+	.vidioc_qbuf			= vb2_ioctl_qbuf,
+	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
+	.vidioc_streamon		= vb2_ioctl_streamon,
+	.vidioc_streamoff		= vb2_ioctl_streamoff,
+};
+
+static int isp_subdev_registered(struct v4l2_subdev *sd)
+{
+	struct fimc_is_isp *isp = v4l2_get_subdevdata(sd);
+	struct vb2_queue *q = &isp->vbq;
+	struct video_device *vfd = &isp->vfd;
+	int ret;
+
+	mutex_init(&isp->video_lock);
+
+	memset(vfd, 0, sizeof(*vfd));
+	snprintf(vfd->name, sizeof(vfd->name), "fimc-is-isp.output");
+
+	vfd->fops = &isp_video_output_fops;
+	vfd->ioctl_ops = &isp_video_output_ioctl_ops;
+	vfd->v4l2_dev = sd->v4l2_dev;
+	vfd->minor = -1;
+	vfd->release = video_device_release_empty;
+	vfd->lock = &isp->video_lock;
+	vfd->queue = q;
+	vfd->vfl_dir = VFL_DIR_TX;
+
+	memset(q, 0, sizeof(*q));
+	q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
+	q->io_modes = VB2_MMAP | VB2_DMABUF;
+	q->ops = &isp_video_output_qops;
+	q->mem_ops = &vb2_dma_contig_memops;
+	q->drv_priv = isp;
+
+	ret = vb2_queue_init(q);
+	if (ret < 0)
+		return ret;
+
+	isp->vd_pad.flags = MEDIA_PAD_FL_SINK;
+	ret = media_entity_init(&vfd->entity, 1, &isp->vd_pad, 0);
+	if (ret < 0)
+		return ret;
+
+	video_set_drvdata(vfd, isp);
+
+	ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
+	if (ret < 0) {
+		media_entity_cleanup(&vfd->entity);
+		return ret;
+	}
+
+	v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
+		  vfd->name, video_device_node_name(vfd));
+	return 0;
+}
+
+static void isp_subdev_unregistered(struct v4l2_subdev *sd)
+{
+	struct fimc_is_isp *isp = v4l2_get_subdevdata(sd);
+
+	if (isp && video_is_registered(&isp->vfd))
+		video_unregister_device(&isp->vfd);
+}
+
+static const struct v4l2_subdev_internal_ops isp_subdev_internal_ops = {
+	.registered = isp_subdev_registered,
+	.unregistered = isp_subdev_unregistered,
+};
+
+static struct v4l2_subdev_ops isp_subdev_ops;
+
+int fimc_is_isp_subdev_create(struct fimc_is_isp *isp,
+		struct vb2_alloc_ctx *alloc_ctx,
+		struct fimc_is_pipeline *pipeline)
+{
+	struct v4l2_ctrl_handler *handler = &isp->ctrl_handler;
+	struct v4l2_subdev *sd = &isp->subdev;
+	int ret;
+
+	/* Init context vars */
+	isp->alloc_ctx = alloc_ctx;
+	isp->pipeline = pipeline;
+	isp->refcount = 0;
+	isp->fmt = (struct fimc_is_fmt *) &formats[1];
+
+	v4l2_subdev_init(sd, &isp_subdev_ops);
+	sd->owner = THIS_MODULE;
+	sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
+	snprintf(sd->name, sizeof(sd->name), ISP_DRV_NAME);
+
+	isp->subdev_pads[ISP_SD_PAD_SINK_DMA].flags = MEDIA_PAD_FL_SINK;
+	isp->subdev_pads[ISP_SD_PAD_SINK_OTF].flags = MEDIA_PAD_FL_SINK;
+	isp->subdev_pads[ISP_SD_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE;
+	ret = media_entity_init(&sd->entity, ISP_SD_PADS_NUM,
+			isp->subdev_pads, 0);
+	if (ret < 0)
+		return ret;
+
+	ret = v4l2_ctrl_handler_init(handler, 1);
+	if (handler->error)
+		goto err_ctrl;
+
+	sd->ctrl_handler = handler;
+	sd->internal_ops = &isp_subdev_internal_ops;
+	v4l2_set_subdevdata(sd, isp);
+
+	return 0;
+
+err_ctrl:
+	media_entity_cleanup(&sd->entity);
+	v4l2_ctrl_handler_free(handler);
+	return ret;
+}
+
+void fimc_is_isp_subdev_destroy(struct fimc_is_isp *isp)
+{
+	struct v4l2_subdev *sd = &isp->subdev;
+
+	v4l2_device_unregister_subdev(sd);
+	media_entity_cleanup(&sd->entity);
+	v4l2_ctrl_handler_free(&isp->ctrl_handler);
+	v4l2_set_subdevdata(sd, NULL);
+}
+
diff --git a/drivers/media/platform/exynos5-is/fimc-is-isp.h b/drivers/media/platform/exynos5-is/fimc-is-isp.h
new file mode 100644
index 0000000..f707a8d
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-isp.h
@@ -0,0 +1,89 @@
+/*
+ * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2012 Samsung Electronics Co., Ltd.
+ *  Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef FIMC_IS_ISP_H_
+#define FIMC_IS_ISP_H_
+
+#include "fimc-is-core.h"
+#include "fimc-is-pipeline.h"
+
+#define FIMC_IS_ISP_REQ_BUFS_MIN	2
+
+#define ISP_SD_PAD_SINK_DMA	0
+#define ISP_SD_PAD_SINK_OTF	1
+#define ISP_SD_PAD_SRC		2
+#define ISP_SD_PADS_NUM		3
+
+#define ISP_MAX_BUFS		2
+
+/**
+ * struct fimc_is_isp - ISP context
+ * @vfd: video device node
+ * @fh: v4l2 file handle
+ * @alloc_ctx: videobuf2 memory allocator context
+ * @subdev: fimc-is-isp subdev
+ * @vd_pad: media pad for the output video node
+ * @subdev_pads: the subdev media pads
+ * @ctrl_handler: v4l2 control handler
+ * @video_lock: video lock mutex
+ * @refcount: keeps track of number of instances opened
+ * @pipeline: pipeline instance for this isp context
+ * @vbq: vb2 buffers queue for ISP output video node
+ * @wait_queue: list holding buffers waiting to be queued to HW
+ * @wait_queue_cnt: wait queue number of buffers
+ * @run_queue: list holding buffers queued to HW
+ * @run_queue_cnt: run queue number of buffers
+ * @output_bufs: isp output buffers array
+ * @out_buf_cnt: number of output buffers in use
+ * @fmt: output plane format for isp
+ * @width: user configured input width
+ * @height: user configured input height
+ * @num_buffers: number of output plane buffers in use
+ * @size_image: image size in bytes
+ * @output_state: state of the output video node operations
+ */
+struct fimc_is_isp {
+	struct video_device		vfd;
+	struct v4l2_fh			fh;
+	struct vb2_alloc_ctx		*alloc_ctx;
+	struct v4l2_subdev		subdev;
+	struct media_pad		vd_pad;
+	struct media_pad		subdev_pads[ISP_SD_PADS_NUM];
+	struct v4l2_ctrl_handler	ctrl_handler;
+
+	struct mutex			video_lock;
+
+	unsigned int			refcount;
+
+	struct fimc_is_pipeline		*pipeline;
+
+	struct vb2_queue		vbq;
+	struct list_head		wait_queue;
+	unsigned int			wait_queue_cnt;
+	struct list_head		run_queue;
+	unsigned int			run_queue_cnt;
+
+	struct fimc_is_buf		output_bufs[ISP_MAX_BUFS];
+	unsigned int			out_buf_cnt;
+
+	struct fimc_is_fmt		*fmt;
+	unsigned int			width;
+	unsigned int			height;
+	unsigned int			num_buffers;
+	unsigned int			size_image;
+	unsigned long			output_state;
+};
+
+int fimc_is_isp_subdev_create(struct fimc_is_isp *isp,
+		struct vb2_alloc_ctx *alloc_ctx,
+		struct fimc_is_pipeline *pipeline);
+void fimc_is_isp_subdev_destroy(struct fimc_is_isp *isp);
+
+#endif /* FIMC_IS_ISP_H_ */
-- 
1.7.9.5

[RFC v2 07/10] exynos5-fimc-is: Adds scaler subdev

[Arun Kumar K]

FIMC-IS has two hardware scalers named as scaler-codec and
scaler-preview. This patch adds the common code handling the
video nodes and subdevs of both the scalers.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
---
 drivers/media/platform/exynos5-is/fimc-is-scaler.c |  492 ++++++++++++++++++++
 drivers/media/platform/exynos5-is/fimc-is-scaler.h |  107 +++++
 2 files changed, 599 insertions(+)
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.h

diff --git a/drivers/media/platform/exynos5-is/fimc-is-scaler.c b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
new file mode 100644
index 0000000..b4f3f5c
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
@@ -0,0 +1,492 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ *  Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <media/v4l2-ioctl.h>
+#include <media/videobuf2-dma-contig.h>
+
+#include "fimc-is.h"
+
+#define IS_SCALER_DRV_NAME "fimc-is-scaler"
+
+static const struct fimc_is_fmt formats[] = {
+	{
+		.name           = "YUV 4:2:0 3p MultiPlanar",
+		.fourcc         = V4L2_PIX_FMT_YUV420M,
+		.depth		= {8, 2, 2},
+		.num_planes     = 3,
+	},
+	{
+		.name           = "YUV 4:2:0 2p MultiPlanar",
+		.fourcc         = V4L2_PIX_FMT_NV12M,
+		.depth		= {8, 4},
+		.num_planes     = 2,
+	},
+	{
+		.name           = "YUV 4:2:2 1p MultiPlanar",
+		.fourcc         = V4L2_PIX_FMT_NV16,
+		.depth		= {16},
+		.num_planes     = 1,
+	},
+};
+#define NUM_FORMATS ARRAY_SIZE(formats)
+
+static struct fimc_is_fmt *find_format(struct v4l2_format *f)
+{
+	unsigned int i;
+
+	for (i = 0; i < NUM_FORMATS; i++) {
+		if (formats[i].fourcc == f->fmt.pix_mp.pixelformat)
+			return (struct fimc_is_fmt *) &formats[i];
+	}
+	return NULL;
+}
+
+static int scaler_video_capture_start_streaming(struct vb2_queue *vq,
+					unsigned int count)
+{
+	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+	int ret;
+
+	/* Scaler start */
+	ret = fimc_is_pipeline_scaler_start(ctx->pipeline,
+			ctx->scaler_id,
+			(unsigned int **)ctx->buf_paddr,
+			ctx->num_buffers,
+			ctx->fmt->num_planes);
+	if (ret) {
+		pr_err("Scaler start failed.\n");
+		return -EINVAL;
+	}
+
+	set_bit(STATE_RUNNING, &ctx->capture_state);
+	return 0;
+}
+
+static int scaler_video_capture_stop_streaming(struct vb2_queue *vq)
+{
+	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+	int ret;
+
+	/* Scaler stop */
+	ret = fimc_is_pipeline_scaler_stop(ctx->pipeline, ctx->scaler_id);
+	if (ret)
+		pr_debug("Scaler already stopped.\n");
+
+	clear_bit(STATE_RUNNING, &ctx->capture_state);
+	return 0;
+}
+
+static int scaler_video_capture_queue_setup(struct vb2_queue *vq,
+			const struct v4l2_format *pfmt,
+			unsigned int *num_buffers, unsigned int *num_planes,
+			unsigned int sizes[], void *allocators[])
+{
+	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+	struct fimc_is_fmt *fmt = ctx->fmt;
+	unsigned int wh;
+	int i;
+
+	if (!fmt)
+		return -EINVAL;
+
+	*num_planes = fmt->num_planes;
+	wh = ctx->width * ctx->height;
+
+	for (i = 0; i < *num_planes; i++) {
+		allocators[i] = ctx->alloc_ctx;
+		sizes[i] = (wh * fmt->depth[i]) / 8;
+	}
+	return 0;
+}
+
+static int scaler_video_capture_buffer_init(struct vb2_buffer *vb)
+{
+	struct vb2_queue *vq = vb->vb2_queue;
+	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+	struct fimc_is_buf *buf;
+	struct fimc_is_fmt *fmt;
+	int i;
+
+	buf = &ctx->capture_bufs[vb->v4l2_buf.index];
+	/* Initialize buffer */
+	buf->vb = vb;
+	fmt = ctx->fmt;
+	for (i = 0; i < fmt->num_planes; i++)
+		buf->paddr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
+
+	ctx->cap_buf_cnt++;
+	return 0;
+}
+
+static void scaler_video_capture_buffer_queue(struct vb2_buffer *vb)
+{
+	struct vb2_queue *vq = vb->vb2_queue;
+	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+	struct fimc_is_buf *buf;
+
+	buf = &ctx->capture_bufs[vb->v4l2_buf.index];
+
+	/* Add buffer to the wait queue */
+	pr_debug("Add buffer %d in Scaler %d\n",
+			vb->v4l2_buf.index, ctx->scaler_id);
+	fimc_is_pipeline_buf_lock(ctx->pipeline);
+	fimc_is_scaler_wait_queue_add(ctx, buf);
+	fimc_is_pipeline_buf_unlock(ctx->pipeline);
+}
+
+static void scaler_lock(struct vb2_queue *vq)
+{
+	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+	mutex_lock(&ctx->video_lock);
+}
+
+static void scaler_unlock(struct vb2_queue *vq)
+{
+	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+	mutex_unlock(&ctx->video_lock);
+}
+
+static const struct vb2_ops scaler_video_capture_qops = {
+	.queue_setup		= scaler_video_capture_queue_setup,
+	.buf_init		= scaler_video_capture_buffer_init,
+	.buf_queue		= scaler_video_capture_buffer_queue,
+	.wait_prepare		= scaler_unlock,
+	.wait_finish		= scaler_lock,
+	.start_streaming	= scaler_video_capture_start_streaming,
+	.stop_streaming		= scaler_video_capture_stop_streaming,
+};
+
+static int scaler_video_capture_open(struct file *file)
+{
+	struct fimc_is_scaler *ctx = video_drvdata(file);
+	int ret = 0;
+
+	/* Check if opened before */
+	if (ctx->refcount >= FIMC_IS_MAX_INSTANCES) {
+		pr_err("All instances are in use.\n");
+		return -EBUSY;
+	}
+
+	INIT_LIST_HEAD(&ctx->wait_queue);
+	ctx->wait_queue_cnt = 0;
+	INIT_LIST_HEAD(&ctx->run_queue);
+	ctx->run_queue_cnt = 0;
+
+	ctx->fmt = NULL;
+	ctx->refcount++;
+
+	return ret;
+}
+
+static int scaler_video_capture_close(struct file *file)
+{
+	struct fimc_is_scaler *ctx = video_drvdata(file);
+	int ret = 0;
+
+	ctx->refcount--;
+	ctx->capture_state = 0;
+	vb2_fop_release(file);
+
+	return ret;
+}
+
+static const struct v4l2_file_operations scaler_video_capture_fops = {
+	.owner		= THIS_MODULE,
+	.open		= scaler_video_capture_open,
+	.release	= scaler_video_capture_close,
+	.poll		= vb2_fop_poll,
+	.unlocked_ioctl	= video_ioctl2,
+	.mmap		= vb2_fop_mmap,
+};
+
+/*
+ * Video node ioctl operations
+ */
+static int scaler_querycap_capture(struct file *file, void *priv,
+					struct v4l2_capability *cap)
+{
+	strncpy(cap->driver, IS_SCALER_DRV_NAME, sizeof(cap->driver) - 1);
+	strncpy(cap->card, IS_SCALER_DRV_NAME, sizeof(cap->card) - 1);
+	strncpy(cap->bus_info, IS_SCALER_DRV_NAME, sizeof(cap->bus_info) - 1);
+	cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
+	cap->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
+	return 0;
+}
+
+static int scaler_enum_fmt_mplane(struct file *file, void *priv,
+				     struct v4l2_fmtdesc *f)
+{
+	const struct fimc_is_fmt *fmt;
+
+	if (f->index >= NUM_FORMATS)
+		return -EINVAL;
+
+	fmt = &formats[f->index];
+	strlcpy(f->description, fmt->name, sizeof(f->description));
+	f->pixelformat = fmt->fourcc;
+	return 0;
+}
+
+static int scaler_g_fmt_mplane(struct file *file, void *priv,
+				  struct v4l2_format *f)
+{
+	struct fimc_is_scaler *ctx = video_drvdata(file);
+	struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
+	struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
+	const struct fimc_is_fmt *fmt = ctx->fmt;
+
+	plane_fmt->bytesperline = (ctx->width * fmt->depth[0]) / 8;
+	plane_fmt->sizeimage = plane_fmt->bytesperline * ctx->height;
+
+	pixm->num_planes = fmt->num_planes;
+	pixm->pixelformat = fmt->fourcc;
+	pixm->width = ctx->width;
+	pixm->height = ctx->height;
+	pixm->field = V4L2_FIELD_NONE;
+	pixm->colorspace = V4L2_COLORSPACE_JPEG;
+
+	return 0;
+}
+
+static int scaler_try_fmt_mplane(struct file *file, void *priv,
+				  struct v4l2_format *f)
+{
+	struct fimc_is_fmt *fmt;
+
+	if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
+		return -EINVAL;
+
+	fmt = find_format(f);
+	if (!fmt) {
+		fmt = (struct fimc_is_fmt *) &formats[0];
+		f->fmt.pix_mp.pixelformat = fmt->fourcc;
+	}
+
+	if (fmt->num_planes != f->fmt.pix_mp.num_planes)
+		f->fmt.pix_mp.num_planes = fmt->num_planes;
+
+	return 0;
+}
+
+static int scaler_s_fmt_mplane(struct file *file, void *priv,
+				struct v4l2_format *f)
+{
+	struct fimc_is_scaler *ctx = video_drvdata(file);
+	struct fimc_is_fmt *fmt;
+	int ret;
+
+	ret = scaler_try_fmt_mplane(file, priv, f);
+	if (ret)
+		return ret;
+
+	/* Get format type */
+	fmt = find_format(f);
+	if (!fmt) {
+		fmt = (struct fimc_is_fmt *) &formats[0];
+		f->fmt.pix_mp.pixelformat = fmt->fourcc;
+		f->fmt.pix_mp.num_planes = fmt->num_planes;
+	}
+
+	/* Check width & height */
+	if (f->fmt.pix_mp.width > ctx->pipeline->sensor_width ||
+		f->fmt.pix_mp.height > ctx->pipeline->sensor_height) {
+		f->fmt.pix_mp.width = ctx->pipeline->sensor_width;
+		f->fmt.pix_mp.height = ctx->pipeline->sensor_height;
+	}
+
+	/* Save values to context */
+	ctx->fmt = fmt;
+	ctx->width = f->fmt.pix_mp.width;
+	ctx->height = f->fmt.pix_mp.height;
+	ctx->pipeline->scaler_width[ctx->scaler_id] = ctx->width;
+	ctx->pipeline->scaler_height[ctx->scaler_id] = ctx->height;
+	set_bit(STATE_INIT, &ctx->capture_state);
+	return 0;
+}
+
+static int scaler_reqbufs(struct file *file, void *priv,
+		struct v4l2_requestbuffers *reqbufs)
+{
+	struct fimc_is_scaler *ctx = video_drvdata(file);
+	int ret;
+
+	if (reqbufs->memory != V4L2_MEMORY_MMAP &&
+			reqbufs->memory != V4L2_MEMORY_DMABUF) {
+		pr_err("Memory type not supported\n");
+		return -EINVAL;
+	}
+
+	if (!ctx->fmt) {
+		pr_err("Set format not done\n");
+		return -EINVAL;
+	}
+
+	/* Check whether buffers are already allocated */
+	if (test_bit(STATE_BUFS_ALLOCATED, &ctx->capture_state)) {
+		pr_err("Buffers already allocated\n");
+		return -EINVAL;
+	}
+
+	ret = vb2_reqbufs(&ctx->vbq, reqbufs);
+	if (ret) {
+		pr_err("vb2 req buffers failed\n");
+		return ret;
+	}
+
+	ctx->num_buffers = reqbufs->count;
+	ctx->cap_buf_cnt = 0;
+	set_bit(STATE_BUFS_ALLOCATED, &ctx->capture_state);
+	return 0;
+}
+
+static const struct v4l2_ioctl_ops scaler_video_capture_ioctl_ops = {
+	.vidioc_querycap		= scaler_querycap_capture,
+	.vidioc_enum_fmt_vid_cap_mplane	= scaler_enum_fmt_mplane,
+	.vidioc_try_fmt_vid_cap_mplane	= scaler_try_fmt_mplane,
+	.vidioc_s_fmt_vid_cap_mplane	= scaler_s_fmt_mplane,
+	.vidioc_g_fmt_vid_cap_mplane	= scaler_g_fmt_mplane,
+	.vidioc_reqbufs			= scaler_reqbufs,
+	.vidioc_querybuf		= vb2_ioctl_querybuf,
+	.vidioc_qbuf			= vb2_ioctl_qbuf,
+	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
+	.vidioc_expbuf			= vb2_ioctl_expbuf,
+	.vidioc_streamon		= vb2_ioctl_streamon,
+	.vidioc_streamoff		= vb2_ioctl_streamoff,
+};
+
+static int scaler_subdev_registered(struct v4l2_subdev *sd)
+{
+	struct fimc_is_scaler *ctx = v4l2_get_subdevdata(sd);
+	struct vb2_queue *q = &ctx->vbq;
+	struct video_device *vfd = &ctx->vfd;
+	int ret;
+
+	mutex_init(&ctx->video_lock);
+
+	memset(vfd, 0, sizeof(*vfd));
+	if (ctx->scaler_id == SCALER_SCC)
+		snprintf(vfd->name, sizeof(vfd->name), "fimc-is-scaler.codec");
+	else
+		snprintf(vfd->name, sizeof(vfd->name),
+				"fimc-is-scaler.preview");
+
+	vfd->fops = &scaler_video_capture_fops;
+	vfd->ioctl_ops = &scaler_video_capture_ioctl_ops;
+	vfd->v4l2_dev = sd->v4l2_dev;
+	vfd->minor = -1;
+	vfd->release = video_device_release_empty;
+	vfd->lock = &ctx->video_lock;
+	vfd->queue = q;
+	vfd->vfl_dir = VFL_DIR_RX;
+
+	memset(q, 0, sizeof(*q));
+	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
+	q->io_modes = VB2_MMAP | VB2_DMABUF;
+	q->ops = &scaler_video_capture_qops;
+	q->mem_ops = &vb2_dma_contig_memops;
+	q->drv_priv = ctx;
+
+	ret = vb2_queue_init(q);
+	if (ret < 0)
+		return ret;
+
+	ctx->vd_pad.flags = MEDIA_PAD_FL_SINK;
+	ret = media_entity_init(&vfd->entity, 1, &ctx->vd_pad, 0);
+	if (ret < 0)
+		return ret;
+
+	video_set_drvdata(vfd, ctx);
+
+	ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
+	if (ret < 0) {
+		media_entity_cleanup(&vfd->entity);
+		return ret;
+	}
+
+	v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
+		  vfd->name, video_device_node_name(vfd));
+	return 0;
+}
+
+static void scaler_subdev_unregistered(struct v4l2_subdev *sd)
+{
+	struct fimc_is_scaler *ctx = v4l2_get_subdevdata(sd);
+
+	if (ctx && video_is_registered(&ctx->vfd))
+		video_unregister_device(&ctx->vfd);
+}
+
+static const struct v4l2_subdev_internal_ops scaler_subdev_internal_ops = {
+	.registered = scaler_subdev_registered,
+	.unregistered = scaler_subdev_unregistered,
+};
+
+static struct v4l2_subdev_ops scaler_subdev_ops;
+
+int fimc_is_scaler_subdev_create(struct fimc_is_scaler *ctx,
+		enum fimc_is_scaler_id scaler_id,
+		struct vb2_alloc_ctx *alloc_ctx,
+		struct fimc_is_pipeline *pipeline)
+{
+	struct v4l2_ctrl_handler *handler = &ctx->ctrl_handler;
+	struct v4l2_subdev *sd = &ctx->subdev;
+	int ret;
+
+	/* Set context data */
+	ctx->scaler_id = scaler_id;
+	ctx->alloc_ctx = alloc_ctx;
+	ctx->pipeline = pipeline;
+	ctx->fmt = (struct fimc_is_fmt *) &formats[0];
+	ctx->refcount = 0;
+	init_waitqueue_head(&ctx->event_q);
+
+	/* Initialize scaler subdev */
+	v4l2_subdev_init(sd, &scaler_subdev_ops);
+	sd->owner = THIS_MODULE;
+	sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
+	if (scaler_id == SCALER_SCC)
+		snprintf(sd->name, sizeof(sd->name), "fimc-is-scc");
+	else
+		snprintf(sd->name, sizeof(sd->name), "fimc-is-scp");
+
+	ctx->subdev_pads[SCALER_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
+	ctx->subdev_pads[SCALER_SD_PAD_SRC_FIFO].flags = MEDIA_PAD_FL_SOURCE;
+	ctx->subdev_pads[SCALER_SD_PAD_SRC_DMA].flags = MEDIA_PAD_FL_SOURCE;
+	ret = media_entity_init(&sd->entity, ISP_SD_PADS_NUM,
+			ctx->subdev_pads, 0);
+	if (ret < 0)
+		return ret;
+
+	ret = v4l2_ctrl_handler_init(handler, 1);
+	if (handler->error)
+		goto err_ctrl;
+
+	sd->ctrl_handler = handler;
+	sd->internal_ops = &scaler_subdev_internal_ops;
+	v4l2_set_subdevdata(sd, ctx);
+
+	return 0;
+err_ctrl:
+	media_entity_cleanup(&sd->entity);
+	v4l2_ctrl_handler_free(handler);
+	return ret;
+}
+
+void fimc_is_scaler_subdev_destroy(struct fimc_is_scaler *ctx)
+{
+	struct v4l2_subdev *sd = &ctx->subdev;
+
+	v4l2_device_unregister_subdev(sd);
+	media_entity_cleanup(&sd->entity);
+	v4l2_ctrl_handler_free(&ctx->ctrl_handler);
+	v4l2_set_subdevdata(sd, NULL);
+}
+
diff --git a/drivers/media/platform/exynos5-is/fimc-is-scaler.h b/drivers/media/platform/exynos5-is/fimc-is-scaler.h
new file mode 100644
index 0000000..115e00a
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-scaler.h
@@ -0,0 +1,107 @@
+/*
+ * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ *  Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef FIMC_IS_SCALER_H_
+#define FIMC_IS_SCALER_H_
+
+#include <linux/sizes.h>
+#include <linux/io.h>
+#include <linux/irqreturn.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <linux/videodev2.h>
+
+#include <media/media-entity.h>
+#include <media/videobuf2-core.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-mediabus.h>
+#include <media/s5p_fimc.h>
+
+#include "fimc-is-core.h"
+
+#define SCALER_SD_PAD_SINK	0
+#define SCALER_SD_PAD_SRC_FIFO	1
+#define SCALER_SD_PAD_SRC_DMA	2
+#define SCALER_SD_PADS_NUM	3
+
+#define SCALER_MAX_BUFS		32
+#define SCALER_MAX_PLANES	3
+
+/**
+ * struct fimc_is_scaler - fimc-is scaler structure
+ * @vfd: video device node
+ * @fh: v4l2 file handle
+ * @alloc_ctx: videobuf2 memory allocator context
+ * @subdev: fimc-is-scaler subdev
+ * @vd_pad: media pad for the output video node
+ * @subdev_pads: the subdev media pads
+ * @ctrl_handler: v4l2 control handler
+ * @video_lock: video lock mutex
+ * @refcount: keeps track of number of instances opened
+ * @event_q: notifies scaler events
+ * @pipeline: pipeline instance for this scaler context
+ * @scaler_id: distinguishes scaler preview or scaler codec
+ * @vbq: vb2 buffers queue for ISP output video node
+ * @wait_queue: list holding buffers waiting to be queued to HW
+ * @wait_queue_cnt: wait queue number of buffers
+ * @run_queue: list holding buffers queued to HW
+ * @run_queue_cnt: run queue number of buffers
+ * @capture_bufs: scaler capture buffers array
+ * @cap_buf_cnt: number of capture buffers in use
+ * @fmt: capture plane format for scaler
+ * @width: user configured output width
+ * @height: user configured output height
+ * @num_buffers: number of capture plane buffers in use
+ * @capture_state: state of the capture video node operations
+ * @buf_paddr: holds the physical address of capture buffers
+ */
+struct fimc_is_scaler {
+	struct video_device		vfd;
+	struct v4l2_fh			fh;
+	struct vb2_alloc_ctx		*alloc_ctx;
+	struct v4l2_subdev		subdev;
+	struct media_pad		vd_pad;
+	struct media_pad		subdev_pads[SCALER_SD_PADS_NUM];
+	struct v4l2_mbus_framefmt	subdev_fmt;
+	struct v4l2_ctrl_handler	ctrl_handler;
+
+	struct mutex		video_lock;
+	unsigned int		refcount;
+	wait_queue_head_t	event_q;
+
+	struct fimc_is_pipeline	*pipeline;
+	enum fimc_is_scaler_id	scaler_id;
+
+	struct vb2_queue	vbq;
+	struct list_head	wait_queue;
+	unsigned int		wait_queue_cnt;
+	struct list_head	run_queue;
+	unsigned int		run_queue_cnt;
+
+	struct fimc_is_buf	capture_bufs[SCALER_MAX_BUFS];
+	unsigned int		cap_buf_cnt;
+
+	struct fimc_is_fmt	*fmt;
+	unsigned int		width;
+	unsigned int		height;
+	unsigned int		num_buffers;
+	unsigned long		capture_state;
+	unsigned int		buf_paddr[SCALER_MAX_BUFS][SCALER_MAX_PLANES];
+};
+
+int fimc_is_scaler_subdev_create(struct fimc_is_scaler *ctx,
+		enum fimc_is_scaler_id scaler_id,
+		struct vb2_alloc_ctx *alloc_ctx,
+		struct fimc_is_pipeline *pipeline);
+void fimc_is_scaler_subdev_destroy(struct fimc_is_scaler *scaler);
+
+#endif /* FIMC_IS_SCALER_H_ */
-- 
1.7.9.5

[RFC v2 08/10] exynos5-fimc-is: Adds the hardware pipeline control

[Arun Kumar K]

This patch adds the crucial hardware pipeline control for the
fimc-is driver. All the subdev nodes will call this pipeline
interfaces to reach the hardware. Responsibilities of this module
involves configuring and maintaining the hardware pipeline involving
multiple sub-ips like ISP, DRC, Scalers, ODC, 3DNR, FD etc.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
---
 .../media/platform/exynos5-is/fimc-is-pipeline.c   | 1959 ++++++++++++++++++++
 .../media/platform/exynos5-is/fimc-is-pipeline.h   |  129 ++
 2 files changed, 2088 insertions(+)
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-pipeline.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-pipeline.h

diff --git a/drivers/media/platform/exynos5-is/fimc-is-pipeline.c b/drivers/media/platform/exynos5-is/fimc-is-pipeline.c
new file mode 100644
index 0000000..71ee943
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-pipeline.c
@@ -0,0 +1,1959 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+*
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K <arun.kk@samsung.com>
+ * Kil-yeon Lim <kilyeon.im@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "fimc-is.h"
+#include "fimc-is-pipeline.h"
+#include "fimc-is-metadata.h"
+#include "fimc-is-regs.h"
+#include "fimc-is-cmd.h"
+#include <media/videobuf2-dma-contig.h>
+#include <linux/delay.h>
+
+/* Default setting values */
+#define DEFAULT_PREVIEW_STILL_WIDTH		(1280) /* sensor margin : 16 */
+#define DEFAULT_PREVIEW_STILL_HEIGHT		(720) /* sensor margin : 12 */
+#define DEFAULT_CAPTURE_VIDEO_WIDTH		(1920)
+#define DEFAULT_CAPTURE_VIDEO_HEIGHT		(1080)
+#define DEFAULT_CAPTURE_STILL_WIDTH		(2560)
+#define DEFAULT_CAPTURE_STILL_HEIGHT		(1920)
+#define DEFAULT_CAPTURE_STILL_CROP_WIDTH	(2560)
+#define DEFAULT_CAPTURE_STILL_CROP_HEIGHT	(1440)
+#define DEFAULT_PREVIEW_VIDEO_WIDTH		(640)
+#define DEFAULT_PREVIEW_VIDEO_HEIGHT		(480)
+
+static void *fw_cookie;
+static void *shot_cookie;
+
+/* Init params for pipeline devices */
+static const struct sensor_param init_sensor_param = {
+	.frame_rate = {
+		.frame_rate = 30,
+	},
+};
+
+static const struct isp_param init_isp_param = {
+	.control = {
+		.cmd = CONTROL_COMMAND_START,
+		.bypass = CONTROL_BYPASS_DISABLE,
+		.err = CONTROL_ERROR_NO,
+	},
+	.otf_input = {
+		.cmd = OTF_INPUT_COMMAND_DISABLE,
+		.width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = OTF_INPUT_FORMAT_BAYER,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_10BIT,
+		.order = OTF_INPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.crop_width = 0,
+		.crop_height = 0,
+		.frametime_min = 0,
+		.frametime_max = 33333,
+		.err = OTF_INPUT_ERROR_NO,
+	},
+	.dma1_input = {
+		.cmd = DMA_INPUT_COMMAND_DISABLE,
+		.width = 0,
+		.height = 0,
+		.format = 0,
+		.bitwidth = 0,
+		.plane = 0,
+		.order = 0,
+		.buffer_number = 0,
+		.buffer_address = 0,
+		.err = 0,
+	},
+	.dma2_input = {
+		.cmd = DMA_INPUT_COMMAND_DISABLE,
+		.width = 0, .height = 0,
+		.format = 0, .bitwidth = 0, .plane = 0,
+		.order = 0, .buffer_number = 0, .buffer_address = 0,
+		.err = 0,
+	},
+	.aa = {
+		.cmd = ISP_AA_COMMAND_START,
+		.target = ISP_AA_TARGET_AF | ISP_AA_TARGET_AE |
+						ISP_AA_TARGET_AWB,
+		.mode = ISP_AF_CONTINUOUS,
+		.scene = 0,
+		.sleep = 0,
+		.af_face = 0,
+		.touch_x = 0, .touch_y = 0,
+		.manual_af_setting = 0,
+		.err = ISP_AF_ERROR_NO,
+	},
+	.flash = {
+		.cmd = ISP_FLASH_COMMAND_DISABLE,
+		.redeye = ISP_FLASH_REDEYE_DISABLE,
+		.err = ISP_FLASH_ERROR_NO,
+	},
+	.awb = {
+		.cmd = ISP_AWB_COMMAND_AUTO,
+		.illumination = 0,
+		.err = ISP_AWB_ERROR_NO,
+	},
+	.effect = {
+		.cmd = ISP_IMAGE_EFFECT_DISABLE,
+		.err = ISP_IMAGE_EFFECT_ERROR_NO,
+	},
+	.iso = {
+		.cmd = ISP_ISO_COMMAND_AUTO,
+		.value = 0,
+		.err = ISP_ISO_ERROR_NO,
+	},
+	.adjust = {
+		.cmd = ISP_ADJUST_COMMAND_AUTO,
+		.contrast = 0,
+		.saturation = 0,
+		.sharpness = 0,
+		.exposure = 0,
+		.brightness = 0,
+		.hue = 0,
+		.err = ISP_ADJUST_ERROR_NO,
+	},
+	.metering = {
+		.cmd = ISP_METERING_COMMAND_CENTER,
+		.win_pos_x = 0, .win_pos_y = 0,
+		.win_width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.win_height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.err = ISP_METERING_ERROR_NO,
+	},
+	.afc = {
+		.cmd = ISP_AFC_COMMAND_AUTO,
+		.manual = 0, .err = ISP_AFC_ERROR_NO,
+	},
+	.otf_output = {
+		.cmd = OTF_OUTPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = OTF_OUTPUT_FORMAT_YUV444,
+		.bitwidth = OTF_OUTPUT_BIT_WIDTH_12BIT,
+		.order = OTF_OUTPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.err = OTF_OUTPUT_ERROR_NO,
+	},
+	.dma1_output = {
+		.cmd = DMA_OUTPUT_COMMAND_DISABLE,
+		.dma_out_mask = 0,
+		.width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = DMA_INPUT_FORMAT_YUV444,
+		.bitwidth = DMA_INPUT_BIT_WIDTH_8BIT,
+		.plane = DMA_INPUT_PLANE_1,
+		.order = DMA_INPUT_ORDER_YCBCR,
+		.buffer_number = 0,
+		.buffer_address = 0,
+		.err = DMA_OUTPUT_ERROR_NO,
+	},
+	.dma2_output = {
+		.cmd = DMA_OUTPUT_COMMAND_DISABLE,
+		.width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = DMA_OUTPUT_FORMAT_BAYER,
+		.bitwidth = DMA_OUTPUT_BIT_WIDTH_12BIT,
+		.plane = DMA_OUTPUT_PLANE_1,
+		.order = DMA_OUTPUT_ORDER_GB_BG,
+		.buffer_number = 0,
+		.buffer_address = 0,
+		.dma_out_mask = 0xFFFFFFFF,
+		.err = DMA_OUTPUT_ERROR_NO,
+	},
+};
+
+static const struct drc_param init_drc_param = {
+	.control = {
+		.cmd = CONTROL_COMMAND_START,
+		.bypass = CONTROL_BYPASS_ENABLE,
+		.err = CONTROL_ERROR_NO,
+	},
+	.otf_input = {
+		.cmd = OTF_INPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = OTF_INPUT_FORMAT_YUV444,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_12BIT,
+		.order = OTF_INPUT_ORDER_BAYER_GR_BG,
+		.err = OTF_INPUT_ERROR_NO,
+	},
+	.dma_input = {
+		.cmd = DMA_INPUT_COMMAND_DISABLE,
+		.width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = DMA_INPUT_FORMAT_YUV444,
+		.bitwidth = DMA_INPUT_BIT_WIDTH_8BIT,
+		.plane = DMA_INPUT_PLANE_1,
+		.order = DMA_INPUT_ORDER_YCBCR,
+		.buffer_number = 0,
+		.buffer_address = 0,
+		.err = 0,
+	},
+	.otf_output = {
+		.cmd = OTF_OUTPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = OTF_OUTPUT_FORMAT_YUV444,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_8BIT,
+		.order = OTF_OUTPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.err = OTF_OUTPUT_ERROR_NO,
+	},
+};
+
+static const struct scalerc_param init_scalerc_param = {
+	.control = {
+		.cmd = CONTROL_COMMAND_START,
+		.bypass = CONTROL_BYPASS_ENABLE,
+		.err = CONTROL_ERROR_NO,
+	},
+	.otf_input = {
+		.cmd = OTF_INPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = OTF_INPUT_FORMAT_YUV444,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_12BIT,
+		.order = OTF_INPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.crop_width = 0,
+		.crop_height = 0,
+		.err = OTF_INPUT_ERROR_NO,
+	},
+	.effect = {
+		.cmd = 0,
+		.err = 0,
+	},
+	.input_crop = {
+		.cmd = OTF_INPUT_COMMAND_ENABLE,
+		.pos_x = 0,
+		.pos_y = 0,
+		.crop_width = DEFAULT_CAPTURE_STILL_CROP_WIDTH,
+		.crop_height = DEFAULT_CAPTURE_STILL_CROP_HEIGHT,
+		.in_width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.in_height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.out_width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.out_height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.err = 0,
+	},
+	.output_crop = {
+		.cmd = SCALER_CROP_COMMAND_DISABLE,
+		.pos_x = 0,
+		.pos_y = 0,
+		.crop_width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.crop_height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = DMA_OUTPUT_FORMAT_YUV420,
+		.err = 0,
+	},
+	.otf_output = {
+		.cmd = OTF_OUTPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.format = OTF_OUTPUT_FORMAT_YUV444,
+		.bitwidth = OTF_OUTPUT_BIT_WIDTH_8BIT,
+		.order = OTF_OUTPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.err = OTF_OUTPUT_ERROR_NO,
+	},
+	.dma_output = {
+		.cmd = DMA_OUTPUT_COMMAND_DISABLE,
+		.width = DEFAULT_CAPTURE_STILL_WIDTH,
+		.height = DEFAULT_CAPTURE_STILL_HEIGHT,
+		.format = DMA_OUTPUT_FORMAT_YUV420,
+		.bitwidth = DMA_OUTPUT_BIT_WIDTH_8BIT,
+		.plane = DMA_OUTPUT_PLANE_3,
+		.order = DMA_OUTPUT_ORDER_NO,
+		.buffer_number = 0,
+		.buffer_address = 0,
+		.dma_out_mask = 0xffff,
+		.err = DMA_OUTPUT_ERROR_NO,
+	},
+};
+
+static const struct odc_param init_odc_param = {
+	.control = {
+		.cmd = CONTROL_COMMAND_START,
+		.bypass = CONTROL_BYPASS_ENABLE,
+		.err = CONTROL_ERROR_NO,
+	},
+	.otf_input = {
+		.cmd = OTF_INPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.format = OTF_INPUT_FORMAT_YUV444,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_8BIT,
+		.order = OTF_INPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.crop_width = 0,
+		.crop_height = 0,
+		.err = OTF_INPUT_ERROR_NO,
+	},
+	.otf_output = {
+		.cmd = OTF_OUTPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.format = OTF_OUTPUT_FORMAT_YUV422,
+		.bitwidth = OTF_OUTPUT_BIT_WIDTH_8BIT,
+		.order = OTF_OUTPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.err = OTF_OUTPUT_ERROR_NO,
+	},
+};
+
+static const struct dis_param init_dis_param = {
+	.control = {
+		.cmd = CONTROL_COMMAND_START,
+		.bypass = CONTROL_BYPASS_ENABLE,
+		.err = CONTROL_ERROR_NO,
+	},
+	.otf_input = {
+		.cmd = OTF_INPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.format = OTF_INPUT_FORMAT_YUV422,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_8BIT,
+		.order = OTF_INPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.crop_width = 0,
+		.crop_height = 0,
+		.err = OTF_INPUT_ERROR_NO,
+	},
+	.otf_output = {
+		.cmd = OTF_OUTPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.format = OTF_OUTPUT_FORMAT_YUV422,
+		.bitwidth = OTF_OUTPUT_BIT_WIDTH_8BIT,
+		.order = OTF_OUTPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.err = OTF_OUTPUT_ERROR_NO,
+	},
+};
+static const struct tdnr_param init_tdnr_param = {
+	.control = {
+		.cmd = CONTROL_COMMAND_START,
+		.bypass = CONTROL_BYPASS_ENABLE,
+		.err = CONTROL_ERROR_NO,
+	},
+	.otf_input = {
+		.cmd = OTF_INPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.format = OTF_INPUT_FORMAT_YUV422,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_8BIT,
+		.order = OTF_INPUT_ORDER_BAYER_GR_BG,
+		.err = OTF_INPUT_ERROR_NO,
+	},
+	.frame = {
+		.cmd = 0,
+		.err = 0,
+	},
+	.otf_output = {
+		.cmd = OTF_OUTPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.format = OTF_OUTPUT_FORMAT_YUV444,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_8BIT,
+		.order = OTF_OUTPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.err = OTF_OUTPUT_ERROR_NO,
+	},
+	.dma_output = {
+		.cmd = DMA_OUTPUT_COMMAND_DISABLE,
+		.width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.format = DMA_OUTPUT_FORMAT_YUV420,
+		.bitwidth = DMA_OUTPUT_BIT_WIDTH_8BIT,
+		.plane = DMA_OUTPUT_PLANE_2,
+		.order = DMA_OUTPUT_ORDER_CBCR,
+		.buffer_number = 0,
+		.buffer_address = 0,
+		.dma_out_mask = 0xffff,
+		.err = DMA_OUTPUT_ERROR_NO,
+	},
+};
+
+static const struct scalerp_param init_scalerp_param = {
+	.control = {
+		.cmd = CONTROL_COMMAND_START,
+		.bypass = CONTROL_BYPASS_ENABLE,
+		.err = CONTROL_ERROR_NO,
+	},
+	.otf_input = {
+		.cmd = OTF_INPUT_COMMAND_ENABLE,
+		.width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.format = OTF_INPUT_FORMAT_YUV444,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_8BIT,
+		.order = OTF_INPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.crop_width = 0,
+		.crop_height = 0,
+		.err = OTF_INPUT_ERROR_NO,
+	},
+	.effect = {
+		.cmd = 0,
+		.err = 0,
+	},
+	.input_crop = {
+		.cmd = OTF_INPUT_COMMAND_ENABLE,
+		.pos_x = 0,
+		.pos_y = 0,
+		.crop_width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.crop_height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.in_width = DEFAULT_CAPTURE_VIDEO_WIDTH,
+		.in_height = DEFAULT_CAPTURE_VIDEO_HEIGHT,
+		.out_width = DEFAULT_PREVIEW_STILL_WIDTH,
+		.out_height = DEFAULT_PREVIEW_STILL_HEIGHT,
+		.err = 0,
+	},
+	.output_crop = {
+		.cmd = SCALER_CROP_COMMAND_DISABLE,
+		.pos_x = 0,
+		.pos_y = 0,
+		.crop_width = DEFAULT_PREVIEW_STILL_WIDTH,
+		.crop_height = DEFAULT_PREVIEW_STILL_HEIGHT,
+		.format = OTF_OUTPUT_FORMAT_YUV420,
+		.err = 0,
+	},
+	.rotation = {
+		.cmd = 0,
+		.err = 0,
+	},
+	.flip = {
+		.cmd = 0,
+		.err = 0,
+	},
+	.otf_output = {
+		.cmd = OTF_OUTPUT_COMMAND_ENABLE,
+		.width = DEFAULT_PREVIEW_STILL_WIDTH,
+		.height = DEFAULT_PREVIEW_STILL_HEIGHT,
+		.format = OTF_INPUT_FORMAT_YUV444,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_8BIT,
+		.order = OTF_OUTPUT_ORDER_BAYER_GR_BG,
+		.crop_offset_x = 0,
+		.crop_offset_y = 0,
+		.err = OTF_OUTPUT_ERROR_NO,
+	},
+	.dma_output = {
+		.cmd = DMA_OUTPUT_COMMAND_DISABLE,
+		.width = DEFAULT_PREVIEW_STILL_WIDTH,
+		.height = DEFAULT_PREVIEW_STILL_HEIGHT,
+		.format = OTF_OUTPUT_FORMAT_YUV420,
+		.bitwidth = DMA_OUTPUT_BIT_WIDTH_8BIT,
+		.plane = DMA_OUTPUT_PLANE_3,
+		.order = DMA_OUTPUT_ORDER_NO,
+		.buffer_number = 0,
+		.buffer_address = 0,
+		.dma_out_mask = 0xffff,
+		.err = DMA_OUTPUT_ERROR_NO,
+	},
+};
+
+static const struct fd_param init_fd_param = {
+	.control = {
+		.cmd = CONTROL_COMMAND_STOP,
+		.bypass = CONTROL_BYPASS_DISABLE,
+		.err = CONTROL_ERROR_NO,
+	},
+	.otf_input = {
+		.cmd = OTF_INPUT_COMMAND_ENABLE,
+		.width = DEFAULT_PREVIEW_STILL_WIDTH,
+		.height = DEFAULT_PREVIEW_STILL_HEIGHT,
+		.format = OTF_INPUT_FORMAT_YUV444,
+		.bitwidth = OTF_INPUT_BIT_WIDTH_8BIT,
+		.order = OTF_INPUT_ORDER_BAYER_GR_BG,
+		.err = OTF_INPUT_ERROR_NO,
+	},
+	.dma_input = {
+		.cmd = DMA_INPUT_COMMAND_DISABLE,
+		.width = 0, .height = 0,
+		.format = 0, .bitwidth = 0, .plane = 0,
+		.order = 0, .buffer_number = 0, .buffer_address = 0,
+		.err = 0,
+	},
+	.config = {
+		.cmd = FD_CONFIG_COMMAND_MAXIMUM_NUMBER |
+			FD_CONFIG_COMMAND_ROLL_ANGLE |
+			FD_CONFIG_COMMAND_YAW_ANGLE |
+			FD_CONFIG_COMMAND_SMILE_MODE |
+			FD_CONFIG_COMMAND_BLINK_MODE |
+			FD_CONFIG_COMMAND_EYES_DETECT |
+			FD_CONFIG_COMMAND_MOUTH_DETECT |
+			FD_CONFIG_COMMAND_ORIENTATION |
+			FD_CONFIG_COMMAND_ORIENTATION_VALUE,
+		.max_number = CAMERA2_MAX_FACES,
+		.roll_angle = FD_CONFIG_ROLL_ANGLE_FULL,
+		.yaw_angle = FD_CONFIG_YAW_ANGLE_45_90,
+		.smile_mode = FD_CONFIG_SMILE_MODE_DISABLE,
+		.blink_mode = FD_CONFIG_BLINK_MODE_DISABLE,
+		.eye_detect = FD_CONFIG_EYES_DETECT_ENABLE,
+		.mouth_detect = FD_CONFIG_MOUTH_DETECT_DISABLE,
+		.orientation = FD_CONFIG_ORIENTATION_DISABLE,
+		.orientation_value = 0,
+		.err = ERROR_FD_NO,
+	},
+};
+
+static int fimc_is_pipeline_create_subdevs(struct fimc_is_pipeline *pipeline)
+{
+	struct fimc_is *is = pipeline->is;
+	int ret;
+
+	/* ISP */
+	ret = fimc_is_isp_subdev_create(&pipeline->isp,
+			is->alloc_ctx, pipeline);
+	if (ret < 0)
+		return ret;
+
+	/* SCC scaler */
+	ret = fimc_is_scaler_subdev_create(&pipeline->scaler[SCALER_SCC],
+			SCALER_SCC, is->alloc_ctx, pipeline);
+	if (ret < 0)
+		return ret;
+
+	/* SCP scaler */
+	ret = fimc_is_scaler_subdev_create(&pipeline->scaler[SCALER_SCP],
+			SCALER_SCP, is->alloc_ctx, pipeline);
+	if (ret < 0)
+		return ret;
+
+	return ret;
+}
+
+static int fimc_is_pipeline_unregister_subdevs(struct fimc_is_pipeline *p)
+{
+	fimc_is_isp_subdev_destroy(&p->isp);
+	fimc_is_scaler_subdev_destroy(&p->scaler[SCALER_SCC]);
+	fimc_is_scaler_subdev_destroy(&p->scaler[SCALER_SCP]);
+
+	return 0;
+}
+
+int fimc_is_pipeline_init(struct fimc_is_pipeline *pipeline,
+			unsigned int instance, void *is_ctx)
+{
+	struct fimc_is *is = is_ctx;
+	unsigned int i;
+	int ret;
+
+	if (test_bit(PIPELINE_INIT, &pipeline->state)) {
+		pr_debug("Pipeline init already done.\n");
+		return -EINVAL;
+	}
+
+	/* Initialize context variables */
+	pipeline->instance = instance;
+	pipeline->is = is;
+	pipeline->minfo = &is->minfo;
+	pipeline->state = 0;
+	pipeline->force_down = false;
+	for (i = 0; i < FIMC_IS_NUM_COMPS; i++)
+		pipeline->comp_state[i] = 0;
+
+	spin_lock_init(&pipeline->slock_buf);
+	init_waitqueue_head(&pipeline->wait_q);
+	mutex_init(&pipeline->pipe_lock);
+	mutex_init(&pipeline->pipe_scl_lock);
+
+	ret = fimc_is_pipeline_create_subdevs(pipeline);
+	if (ret) {
+		pr_err("Subdev creation failed\n");
+		return -EINVAL;
+	}
+
+	/* Setting default width & height for scc & scp */
+	pipeline->scaler_width[SCALER_SCC] = DEFAULT_CAPTURE_VIDEO_WIDTH;
+	pipeline->scaler_height[SCALER_SCC] = DEFAULT_CAPTURE_VIDEO_HEIGHT;
+	pipeline->scaler_width[SCALER_SCP] = DEFAULT_PREVIEW_VIDEO_WIDTH;
+	pipeline->scaler_height[SCALER_SCP] = DEFAULT_PREVIEW_VIDEO_HEIGHT;
+
+	set_bit(PIPELINE_INIT, &pipeline->state);
+	return 0;
+}
+
+int fimc_is_pipeline_destroy(struct fimc_is_pipeline *pipeline)
+{
+	if (!test_bit(PIPELINE_INIT, &pipeline->state)) {
+		pr_debug("Pipeline not inited.\n");
+		return -EINVAL;
+	}
+	return fimc_is_pipeline_unregister_subdevs(pipeline);
+}
+
+static int fimc_is_pipeline_initmem(struct fimc_is_pipeline *pipeline,
+		struct vb2_alloc_ctx *alloc_ctx)
+{
+	struct fimc_is_meminfo *minfo = pipeline->minfo;
+	dma_addr_t *fw_phy_addr;
+	unsigned int offset;
+
+	/* Allocate memory */
+	pr_debug("Allocating memory : %d\n",
+			FIMC_IS_A5_MEM_SIZE + FIMC_IS_A5_SEN_SIZE);
+	fw_cookie = vb2_dma_contig_memops.alloc(alloc_ctx,
+			FIMC_IS_A5_MEM_SIZE + FIMC_IS_A5_SEN_SIZE);
+
+	if (IS_ERR(fw_cookie)) {
+		pr_err("Error in allocating FW memory.\n");
+		return -ENOMEM;
+	}
+
+	fw_phy_addr = vb2_dma_contig_memops.cookie(fw_cookie);
+	/* FW memory should be 64MB aligned */
+	if (*fw_phy_addr & FIMC_IS_FW_BASE_MASK) {
+		pr_err("FW memory not 64MB aligned.\n");
+		vb2_dma_contig_memops.put(fw_cookie);
+		return -EIO;
+	}
+	minfo->fw_paddr = *fw_phy_addr;
+
+	minfo->fw_vaddr =
+		(unsigned int) vb2_dma_contig_memops.vaddr(fw_cookie);
+
+	pr_debug("FW |Phy Addr : 0x%08x, Virt Addr : 0x%08x\n",
+			minfo->fw_paddr, minfo->fw_vaddr);
+
+	/* Assigning memory regions */
+	offset = FIMC_IS_A5_MEM_SIZE - FIMC_IS_REGION_SIZE;
+	minfo->region_paddr = minfo->fw_paddr + offset;
+	minfo->region_vaddr = minfo->fw_vaddr + offset;
+	pipeline->is_region = (struct is_region *)minfo->region_vaddr;
+
+	minfo->shared_paddr = minfo->fw_paddr +
+		((unsigned int)&pipeline->is_region->shared[0] -
+		 minfo->fw_vaddr);
+	minfo->shared_vaddr = minfo->fw_vaddr +
+		((unsigned int)&pipeline->is_region->shared[0] -
+		 minfo->fw_vaddr);
+
+	/* Allocate shot buffer */
+	shot_cookie = vb2_dma_contig_memops.alloc(alloc_ctx,
+			sizeof(struct camera2_shot));
+	if (IS_ERR(shot_cookie)) {
+		pr_err("Error in allocating temp memory.\n");
+		return -ENOMEM;
+	}
+	fw_phy_addr = vb2_dma_contig_memops.cookie(shot_cookie);
+	pipeline->shot_paddr = *fw_phy_addr;
+	pipeline->shot_vaddr =
+		(unsigned int) vb2_dma_contig_memops.vaddr(shot_cookie);
+
+	return 0;
+}
+
+static void fimc_is_pipeline_freemem(struct fimc_is_pipeline *pipeline)
+{
+	if (fw_cookie)
+		vb2_dma_contig_memops.put(fw_cookie);
+	if (shot_cookie)
+		vb2_dma_contig_memops.put(shot_cookie);
+}
+
+static int fimc_is_pipeline_load_firmware(struct fimc_is_pipeline *pipeline)
+{
+	struct firmware *fw_blob;
+	struct fimc_is *is = pipeline->is;
+	int ret;
+
+	ret = request_firmware((const struct firmware **)&fw_blob,
+			"fimc-is-fw.bin", &is->pdev->dev);
+	if (ret != 0) {
+		pr_err("Firmware file not found\n");
+		return -EINVAL;
+	}
+	pr_debug("Firmware size : %d\n", fw_blob->size);
+	if (fw_blob->size > FIMC_IS_A5_MEM_SIZE + FIMC_IS_A5_SEN_SIZE) {
+		pr_err("Firmware file too big.\n");
+		release_firmware(fw_blob);
+		return -ENOMEM;
+	}
+
+	memcpy((void *)pipeline->minfo->fw_vaddr, fw_blob->data, fw_blob->size);
+	wmb();
+	release_firmware(fw_blob);
+
+	return 0;
+}
+
+static void fimc_is_pipeline_forcedown(struct fimc_is_pipeline *pipeline,
+		bool on)
+{
+	struct fimc_is *is = pipeline->is;
+	if (on) {
+		pr_debug("Set low poweroff mode\n");
+		pmu_is_write(0x0, is, PMUREG_ISP_ARM_OPTION);
+		pmu_is_write(0x1CF82000, is, PMUREG_ISP_LOW_POWER_OFF);
+		pipeline->force_down = true;
+	} else {
+		pr_debug("Clear low poweroff mode\n");
+		pmu_is_write(0xFFFFFFFF, is, PMUREG_ISP_ARM_OPTION);
+		pmu_is_write(0x8, is, PMUREG_ISP_LOW_POWER_OFF);
+		pipeline->force_down = false;
+	}
+}
+
+static int fimc_is_pipeline_power(struct fimc_is_pipeline *pipeline, int on)
+{
+	int ret = 0;
+	u32 timeout;
+	struct fimc_is *is = pipeline->is;
+	struct device *dev = &is->pdev->dev;
+
+	if (on) {
+		/* force poweroff setting */
+		if (pipeline->force_down)
+			fimc_is_pipeline_forcedown(pipeline, false);
+
+		/* FIMC-IS local power enable */
+		ret = pm_runtime_get_sync(dev);
+
+		/* A5 start address setting */
+		writel(pipeline->minfo->fw_paddr, is->interface.regs + BBOAR);
+
+		/* A5 power on*/
+		pmu_is_write(0x1, is, PMUREG_ISP_ARM_CONFIGURATION);
+
+		/* enable A5 */
+		pmu_is_write(0x00018000, is, PMUREG_ISP_ARM_OPTION);
+		timeout = 1000;
+		while ((pmu_is_read(is, PMUREG_ISP_ARM_STATUS) & 0x1) != 0x1) {
+			if (timeout == 0)
+				pr_err("A5 power on failed\n");
+			timeout--;
+			udelay(1);
+		}
+	} else {
+		/* disable A5 */
+		pmu_is_write(0x10000, is, PMUREG_ISP_ARM_OPTION);
+		/* A5 power off*/
+		pmu_is_write(0x0, is, PMUREG_ISP_ARM_CONFIGURATION);
+
+		/* Check A5 power off status register */
+		timeout = 1000;
+		while (pmu_is_read(is, PMUREG_ISP_ARM_STATUS) & 0x1) {
+			if (timeout == 0) {
+				pr_err("A5 power off failed\n");
+				fimc_is_pipeline_forcedown(pipeline, true);
+			}
+			timeout--;
+			udelay(1);
+		}
+
+		pmu_is_write(0x0, is, PMUREG_CMU_RESET_ISP_SYS_PWR_REG);
+
+		/* FIMC-IS local power down */
+		pm_runtime_put_sync(dev);
+	}
+
+	return ret;
+}
+
+static int fimc_is_pipeline_load_setfile(struct fimc_is_pipeline *pipeline,
+		unsigned int setfile_addr,
+		unsigned char *setfile_name)
+{
+	struct fimc_is *is = pipeline->is;
+	struct firmware *fw_blob;
+	int ret;
+
+	ret = request_firmware((const struct firmware **)&fw_blob,
+			setfile_name, &is->pdev->dev);
+	if (ret != 0) {
+		pr_err("Setfile %s not found\n", setfile_name);
+		return -EINVAL;
+	}
+
+	memcpy((void *)pipeline->minfo->fw_vaddr + setfile_addr,
+			fw_blob->data, fw_blob->size);
+	wmb();
+	release_firmware(fw_blob);
+
+	return 0;
+}
+
+static int fimc_is_pipeline_setfile(struct fimc_is_pipeline *pipeline)
+{
+	struct fimc_is *is = pipeline->is;
+	struct fimc_is_sensor *sensor = pipeline->sensor;
+	int ret;
+	unsigned int setfile_addr;
+
+	/* Get setfile addr from HW */
+	ret = fimc_is_itf_get_setfile_addr(&is->interface,
+			pipeline->instance, &setfile_addr);
+	if (ret < 0) {
+		pr_err("Get setfile addr failed.\n");
+		return ret;
+	}
+
+	/* Load setfile */
+	ret = fimc_is_pipeline_load_setfile(pipeline, setfile_addr,
+			sensor->drvdata->setfile_name);
+	if (ret < 0) {
+		pr_err("Load setfile failed.\n");
+		return ret;
+	}
+
+	/* Send HW command */
+	ret = fimc_is_itf_load_setfile(&is->interface, pipeline->instance);
+	if (ret < 0) {
+		pr_err("HW Load setfile failed.\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int fimc_is_pipeline_isp_setparams(struct fimc_is_pipeline *pipeline,
+		unsigned int enable)
+{
+	struct isp_param *isp_param = &pipeline->is_region->parameter.isp;
+	struct fimc_is *is = pipeline->is;
+	unsigned int indexes, lindex, hindex;
+	unsigned int sensor_width, sensor_height, scc_width, scc_height;
+	unsigned int crop_x, crop_y, isp_width, isp_height;
+	unsigned int sensor_ratio, output_ratio;
+	int ret;
+
+	/* Crop calculation */
+	sensor_width = pipeline->sensor_width;
+	sensor_height = pipeline->sensor_height;
+	scc_width = pipeline->scaler_width[SCALER_SCC];
+	scc_height = pipeline->scaler_height[SCALER_SCC];
+	isp_width = sensor_width;
+	isp_height = sensor_height;
+	crop_x = crop_y = 0;
+
+	sensor_ratio = sensor_width * 1000 / sensor_height;
+	output_ratio = scc_width * 1000 / scc_height;
+
+	if (sensor_ratio == output_ratio) {
+		isp_width = sensor_width;
+		isp_height = sensor_height;
+	} else if (sensor_ratio < output_ratio) {
+		isp_height = (sensor_width * scc_height) / scc_width;
+		isp_height = ALIGN(isp_height, 2);
+		crop_y = ((sensor_height - isp_height) >> 1) & 0xFFFFFFFE;
+	} else {
+		isp_width = (sensor_height * scc_width) / scc_height;
+		isp_width = ALIGN(isp_width, 4);
+		crop_x =  ((sensor_width - isp_width) >> 1) & 0xFFFFFFFE;
+	}
+	pipeline->isp_width = isp_width;
+	pipeline->isp_height = isp_height;
+
+	indexes = hindex = lindex = 0;
+
+	isp_param->otf_output.cmd = OTF_OUTPUT_COMMAND_ENABLE;
+	isp_param->otf_output.width = pipeline->sensor_width;
+	isp_param->otf_output.height = pipeline->sensor_height;
+	isp_param->otf_output.format = OTF_OUTPUT_FORMAT_YUV444;
+	isp_param->otf_output.bitwidth = OTF_OUTPUT_BIT_WIDTH_12BIT;
+	isp_param->otf_output.order = OTF_INPUT_ORDER_BAYER_GR_BG;
+	lindex |= LOWBIT_OF(PARAM_ISP_OTF_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_ISP_OTF_OUTPUT);
+	indexes++;
+
+	isp_param->dma1_output.cmd = DMA_OUTPUT_COMMAND_DISABLE;
+	lindex |= LOWBIT_OF(PARAM_ISP_DMA1_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_ISP_DMA1_OUTPUT);
+	indexes++;
+
+	isp_param->dma2_output.cmd = DMA_OUTPUT_COMMAND_DISABLE;
+	lindex |= LOWBIT_OF(PARAM_ISP_DMA2_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_ISP_DMA2_OUTPUT);
+	indexes++;
+
+	if (enable)
+		isp_param->control.bypass = CONTROL_BYPASS_DISABLE;
+	else
+		isp_param->control.bypass = CONTROL_BYPASS_ENABLE;
+	isp_param->control.cmd = CONTROL_COMMAND_START;
+	isp_param->control.run_mode = 1;
+	lindex |= LOWBIT_OF(PARAM_ISP_CONTROL);
+	hindex |= HIGHBIT_OF(PARAM_ISP_CONTROL);
+	indexes++;
+
+	isp_param->dma1_input.cmd = DMA_INPUT_COMMAND_BUF_MNGR;
+	isp_param->dma1_input.width = sensor_width;
+	isp_param->dma1_input.height = sensor_height;
+	isp_param->dma1_input.dma_crop_offset_x = crop_x;
+	isp_param->dma1_input.dma_crop_offset_y = crop_y;
+	isp_param->dma1_input.dma_crop_width = isp_width;
+	isp_param->dma1_input.dma_crop_height = isp_height;
+	isp_param->dma1_input.bayer_crop_offset_x = 0;
+	isp_param->dma1_input.bayer_crop_offset_y = 0;
+	isp_param->dma1_input.bayer_crop_width = 0;
+	isp_param->dma1_input.bayer_crop_height = 0;
+	isp_param->dma1_input.user_min_frametime = 0;
+	isp_param->dma1_input.user_max_frametime = 66666;
+	isp_param->dma1_input.wide_frame_gap = 1;
+	isp_param->dma1_input.frame_gap = 4096;
+	isp_param->dma1_input.line_gap = 45;
+	isp_param->dma1_input.order = DMA_INPUT_ORDER_GR_BG;
+	isp_param->dma1_input.plane = 1;
+	isp_param->dma1_input.buffer_number = 1;
+	isp_param->dma1_input.buffer_address = 0;
+	isp_param->dma1_input.reserved[1] = 0;
+	isp_param->dma1_input.reserved[2] = 0;
+	if (pipeline->isp.fmt->fourcc == V4L2_PIX_FMT_SGRBG8)
+		isp_param->dma1_input.bitwidth = DMA_INPUT_BIT_WIDTH_8BIT;
+	else if (pipeline->isp.fmt->fourcc == V4L2_PIX_FMT_SGRBG10)
+		isp_param->dma1_input.bitwidth = DMA_INPUT_BIT_WIDTH_10BIT;
+	else
+		isp_param->dma1_input.bitwidth = DMA_INPUT_BIT_WIDTH_12BIT;
+	lindex |= LOWBIT_OF(PARAM_ISP_DMA1_INPUT);
+	hindex |= HIGHBIT_OF(PARAM_ISP_DMA1_INPUT);
+	indexes++;
+
+	lindex = 0xFFFFFFFF;
+	hindex = 0xFFFFFFFF;
+
+	wmb();
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret) {
+		pr_err("fimc_is_itf_set_param failed\n");
+		return -EINVAL;
+	}
+
+	set_bit(COMP_ENABLE, &pipeline->comp_state[IS_ISP]);
+
+	return 0;
+}
+
+static int fimc_is_pipeline_drc_setparams(struct fimc_is_pipeline *pipeline,
+		unsigned int enable)
+{
+	struct drc_param *drc_param = &pipeline->is_region->parameter.drc;
+	struct fimc_is *is = pipeline->is;
+	int ret;
+	unsigned int indexes, lindex, hindex;
+
+	indexes = hindex = lindex = 0;
+	if (enable)
+		drc_param->control.bypass = CONTROL_BYPASS_DISABLE;
+	else
+		drc_param->control.bypass = CONTROL_BYPASS_ENABLE;
+	lindex |= LOWBIT_OF(PARAM_DRC_CONTROL);
+	hindex |= HIGHBIT_OF(PARAM_DRC_CONTROL);
+	indexes++;
+
+	drc_param->otf_input.cmd = OTF_INPUT_COMMAND_ENABLE;
+	drc_param->otf_input.width = pipeline->isp_width;
+	drc_param->otf_input.height = pipeline->isp_height;
+	lindex |= LOWBIT_OF(PARAM_DRC_OTF_INPUT);
+	hindex |= HIGHBIT_OF(PARAM_DRC_OTF_INPUT);
+	indexes++;
+
+	drc_param->otf_output.cmd = OTF_OUTPUT_COMMAND_ENABLE;
+	drc_param->otf_output.width = pipeline->isp_width;
+	drc_param->otf_output.height = pipeline->isp_height;
+	lindex |= LOWBIT_OF(PARAM_DRC_OTF_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_DRC_OTF_OUTPUT);
+	indexes++;
+
+	wmb();
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret) {
+		pr_err("fimc_is_itf_set_param failed\n");
+		return -EINVAL;
+	}
+	if (enable)
+		set_bit(COMP_ENABLE, &pipeline->comp_state[IS_DRC]);
+	else
+		clear_bit(COMP_ENABLE, &pipeline->comp_state[IS_DRC]);
+
+	return 0;
+}
+
+static int fimc_is_pipeline_scc_setparams(struct fimc_is_pipeline *pipeline,
+		unsigned int enable)
+{
+	struct scalerc_param *scc_param =
+		&pipeline->is_region->parameter.scalerc;
+	struct fimc_is *is = pipeline->is;
+	int ret;
+	unsigned int indexes, lindex, hindex;
+	unsigned int scc_width, scc_height;
+
+	scc_width = pipeline->scaler_width[SCALER_SCC];
+	scc_height = pipeline->scaler_height[SCALER_SCC];
+
+	indexes = hindex = lindex = 0;
+	if (enable)
+		scc_param->control.bypass = CONTROL_BYPASS_DISABLE;
+	else
+		scc_param->control.bypass = CONTROL_BYPASS_ENABLE;
+	lindex |= LOWBIT_OF(PARAM_SCALERC_CONTROL);
+	hindex |= HIGHBIT_OF(PARAM_SCALERC_CONTROL);
+	indexes++;
+
+	scc_param->otf_input.cmd = OTF_INPUT_COMMAND_ENABLE;
+	scc_param->otf_input.width = pipeline->isp_width;
+	scc_param->otf_input.height = pipeline->isp_height;
+	lindex |= LOWBIT_OF(PARAM_SCALERC_OTF_INPUT);
+	hindex |= HIGHBIT_OF(PARAM_SCALERC_OTF_INPUT);
+	indexes++;
+
+	/* SCC OUTPUT */
+	scc_param->input_crop.cmd = SCALER_CROP_COMMAND_ENABLE;
+	scc_param->input_crop.pos_x = 0;
+	scc_param->input_crop.pos_y = 0;
+	scc_param->input_crop.crop_width = pipeline->isp_width;
+	scc_param->input_crop.crop_height = pipeline->isp_height;
+	scc_param->input_crop.in_width = pipeline->isp_width;
+	scc_param->input_crop.in_height = pipeline->isp_height;
+	scc_param->input_crop.out_width = scc_width;
+	scc_param->input_crop.out_height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_SCALERC_INPUT_CROP);
+	hindex |= HIGHBIT_OF(PARAM_SCALERC_INPUT_CROP);
+	indexes++;
+
+	scc_param->output_crop.cmd = SCALER_CROP_COMMAND_DISABLE;
+	scc_param->output_crop.pos_x = 0;
+	scc_param->output_crop.pos_y = 0;
+	scc_param->output_crop.crop_width = scc_width;
+	scc_param->output_crop.crop_height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_SCALERC_OUTPUT_CROP);
+	hindex |= HIGHBIT_OF(PARAM_SCALERC_OUTPUT_CROP);
+	indexes++;
+
+	scc_param->otf_output.cmd = OTF_OUTPUT_COMMAND_ENABLE;
+	scc_param->otf_output.width = scc_width;
+	scc_param->otf_output.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_SCALERC_OTF_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_SCALERC_OTF_OUTPUT);
+	indexes++;
+
+	scc_param->dma_output.width = scc_width;
+	scc_param->dma_output.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_SCALERC_DMA_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_SCALERC_DMA_OUTPUT);
+	indexes++;
+
+	wmb();
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret) {
+		pr_err("fimc_is_itf_set_param failed\n");
+		return -EINVAL;
+	}
+	set_bit(COMP_ENABLE, &pipeline->comp_state[IS_SCC]);
+	return 0;
+}
+
+static int fimc_is_pipeline_odc_setparams(struct fimc_is_pipeline *pipeline,
+		unsigned int enable)
+{
+	struct odc_param *odc_param = &pipeline->is_region->parameter.odc;
+	struct fimc_is *is = pipeline->is;
+	int ret;
+	unsigned int indexes, lindex, hindex;
+	unsigned int scc_width, scc_height;
+
+	scc_width = pipeline->scaler_width[SCALER_SCC];
+	scc_height = pipeline->scaler_height[SCALER_SCC];
+
+	indexes = hindex = lindex = 0;
+	if (enable)
+		odc_param->control.bypass = CONTROL_BYPASS_DISABLE;
+	else
+		odc_param->control.bypass = CONTROL_BYPASS_ENABLE;
+	lindex |= LOWBIT_OF(PARAM_ODC_CONTROL);
+	hindex |= HIGHBIT_OF(PARAM_ODC_CONTROL);
+	indexes++;
+
+	odc_param->otf_input.width = scc_width;
+	odc_param->otf_input.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_ODC_OTF_INPUT);
+	hindex |= HIGHBIT_OF(PARAM_ODC_OTF_INPUT);
+	indexes++;
+
+	odc_param->otf_output.width = scc_width;
+	odc_param->otf_output.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_ODC_OTF_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_ODC_OTF_OUTPUT);
+	indexes++;
+
+	wmb();
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret) {
+		pr_err("fimc_is_itf_set_param failed\n");
+		return -EINVAL;
+	}
+	if (enable)
+		set_bit(COMP_ENABLE, &pipeline->comp_state[IS_ODC]);
+	else
+		clear_bit(COMP_ENABLE, &pipeline->comp_state[IS_ODC]);
+
+	return 0;
+}
+
+static int fimc_is_pipeline_dis_setparams(struct fimc_is_pipeline *pipeline,
+		unsigned int enable)
+{
+	struct dis_param *dis_param = &pipeline->is_region->parameter.dis;
+	struct fimc_is *is = pipeline->is;
+	int ret;
+	unsigned int indexes, lindex, hindex;
+	unsigned int scc_width, scc_height;
+
+	scc_width = pipeline->scaler_width[SCALER_SCC];
+	scc_height = pipeline->scaler_height[SCALER_SCC];
+
+	indexes = hindex = lindex = 0;
+	if (enable)
+		dis_param->control.bypass = CONTROL_BYPASS_DISABLE;
+	else
+		dis_param->control.bypass = CONTROL_BYPASS_ENABLE;
+	lindex |= LOWBIT_OF(PARAM_DIS_CONTROL);
+	hindex |= HIGHBIT_OF(PARAM_DIS_CONTROL);
+	indexes++;
+
+	/* DIS INPUT */
+	dis_param->otf_input.width = scc_width;
+	dis_param->otf_input.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_DIS_OTF_INPUT);
+	hindex |= HIGHBIT_OF(PARAM_DIS_OTF_INPUT);
+	indexes++;
+
+	/* DIS OUTPUT */
+	dis_param->otf_output.width = scc_width;
+	dis_param->otf_output.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_DIS_OTF_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_DIS_OTF_OUTPUT);
+	indexes++;
+
+	wmb();
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret) {
+		pr_err("fimc_is_itf_set_param failed\n");
+		return -EINVAL;
+	}
+	if (enable)
+		set_bit(COMP_ENABLE, &pipeline->comp_state[IS_DIS]);
+	else
+		clear_bit(COMP_ENABLE, &pipeline->comp_state[IS_DIS]);
+
+	return 0;
+}
+
+static int fimc_is_pipeline_3dnr_setparams(struct fimc_is_pipeline *pipeline,
+		unsigned int enable)
+{
+	struct tdnr_param *tdnr_param = &pipeline->is_region->parameter.tdnr;
+	struct fimc_is *is = pipeline->is;
+	int ret;
+	unsigned int indexes, lindex, hindex;
+	unsigned int scc_width, scc_height;
+
+	scc_width = pipeline->scaler_width[SCALER_SCC];
+	scc_height = pipeline->scaler_height[SCALER_SCC];
+
+	indexes = hindex = lindex = 0;
+	if (enable)
+		tdnr_param->control.bypass = CONTROL_BYPASS_DISABLE;
+	else
+		tdnr_param->control.bypass = CONTROL_BYPASS_ENABLE;
+	lindex |= LOWBIT_OF(PARAM_TDNR_CONTROL);
+	hindex |= HIGHBIT_OF(PARAM_TDNR_CONTROL);
+	indexes++;
+
+	tdnr_param->otf_input.width = scc_width;
+	tdnr_param->otf_input.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_TDNR_OTF_INPUT);
+	hindex |= HIGHBIT_OF(PARAM_TDNR_OTF_INPUT);
+	indexes++;
+
+	tdnr_param->dma_output.width = scc_width;
+	tdnr_param->dma_output.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_TDNR_DMA_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_TDNR_DMA_OUTPUT);
+	indexes++;
+
+	tdnr_param->otf_output.width = scc_width;
+	tdnr_param->otf_output.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_TDNR_OTF_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_TDNR_OTF_OUTPUT);
+	indexes++;
+
+	wmb();
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret) {
+		pr_err("fimc_is_itf_set_param failed\n");
+		return -EINVAL;
+	}
+	if (enable)
+		set_bit(COMP_ENABLE, &pipeline->comp_state[IS_TDNR]);
+	else
+		clear_bit(COMP_ENABLE, &pipeline->comp_state[IS_TDNR]);
+
+	return 0;
+}
+
+static int fimc_is_pipeline_scp_setparams(struct fimc_is_pipeline *pipeline,
+		unsigned int enable)
+{
+	struct scalerp_param *scp_param =
+		&pipeline->is_region->parameter.scalerp;
+	struct fimc_is *is = pipeline->is;
+	int ret;
+	unsigned int indexes, lindex, hindex;
+	unsigned int scc_width, scc_height;
+	unsigned int scp_width, scp_height;
+
+	scc_width = pipeline->scaler_width[SCALER_SCC];
+	scc_height = pipeline->scaler_height[SCALER_SCC];
+	scp_width = pipeline->scaler_width[SCALER_SCP];
+	scp_height = pipeline->scaler_height[SCALER_SCP];
+
+	indexes = hindex = lindex = 0;
+	if (enable)
+		scp_param->control.bypass = CONTROL_BYPASS_DISABLE;
+	else
+		scp_param->control.bypass = CONTROL_BYPASS_ENABLE;
+	lindex |= LOWBIT_OF(PARAM_SCALERP_CONTROL);
+	hindex |= HIGHBIT_OF(PARAM_SCALERP_CONTROL);
+	indexes++;
+
+	/* SCP Input */
+	scp_param->otf_input.width = scc_width;
+	scp_param->otf_input.height = scc_height;
+	lindex |= LOWBIT_OF(PARAM_SCALERP_OTF_INPUT);
+	hindex |= HIGHBIT_OF(PARAM_SCALERP_OTF_INPUT);
+	indexes++;
+
+	/* SCP Output */
+	scp_param->input_crop.cmd = SCALER_CROP_COMMAND_ENABLE;
+	scp_param->input_crop.pos_x = 0;
+	scp_param->input_crop.pos_y = 0;
+	scp_param->input_crop.crop_width = scc_width;
+	scp_param->input_crop.crop_height = scc_height;
+	scp_param->input_crop.in_width = scc_width;
+	scp_param->input_crop.in_height = scc_height;
+	scp_param->input_crop.out_width = scp_width;
+	scp_param->input_crop.out_height = scp_height;
+	lindex |= LOWBIT_OF(PARAM_SCALERP_INPUT_CROP);
+	hindex |= HIGHBIT_OF(PARAM_SCALERP_INPUT_CROP);
+	indexes++;
+
+	scp_param->output_crop.cmd = SCALER_CROP_COMMAND_DISABLE;
+	lindex |= LOWBIT_OF(PARAM_SCALERP_OUTPUT_CROP);
+	hindex |= HIGHBIT_OF(PARAM_SCALERP_OUTPUT_CROP);
+	indexes++;
+
+	scp_param->otf_output.width = scp_width;
+	scp_param->otf_output.height = scp_height;
+	lindex |= LOWBIT_OF(PARAM_SCALERP_OTF_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_SCALERP_OTF_OUTPUT);
+	indexes++;
+
+	scp_param->dma_output.width = scp_width;
+	scp_param->dma_output.height = scp_height;
+	lindex |= LOWBIT_OF(PARAM_SCALERP_DMA_OUTPUT);
+	hindex |= HIGHBIT_OF(PARAM_SCALERP_DMA_OUTPUT);
+	indexes++;
+
+	wmb();
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret) {
+		pr_err("fimc_is_itf_set_param failed\n");
+		return -EINVAL;
+	}
+	set_bit(COMP_ENABLE, &pipeline->comp_state[IS_SCP]);
+
+	return 0;
+}
+
+static int fimc_is_pipeline_fd_setparams(struct fimc_is_pipeline *pipeline,
+		unsigned int enable)
+{
+	struct fd_param *fd_param = &pipeline->is_region->parameter.fd;
+	struct fimc_is *is = pipeline->is;
+	int ret;
+	unsigned int indexes, lindex, hindex;
+
+	indexes = hindex = lindex = 0;
+	if (enable)
+		fd_param->control.bypass = CONTROL_BYPASS_DISABLE;
+	else
+		fd_param->control.bypass = CONTROL_BYPASS_ENABLE;
+	lindex |= LOWBIT_OF(PARAM_FD_CONTROL);
+	hindex |= HIGHBIT_OF(PARAM_FD_CONTROL);
+	indexes++;
+
+	fd_param->otf_input.width = pipeline->scaler_width[SCALER_SCP];
+	fd_param->otf_input.height = pipeline->scaler_height[SCALER_SCP];
+	lindex |= LOWBIT_OF(PARAM_FD_OTF_INPUT);
+	hindex |= HIGHBIT_OF(PARAM_FD_OTF_INPUT);
+	indexes++;
+
+	wmb();
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret) {
+		pr_err("fimc_is_itf_set_param failed\n");
+		return -EINVAL;
+	}
+	if (enable)
+		set_bit(COMP_ENABLE, &pipeline->comp_state[IS_FD]);
+	else
+		clear_bit(COMP_ENABLE, &pipeline->comp_state[IS_FD]);
+
+	return 0;
+}
+
+void fimc_is_pipeline_buf_lock(struct fimc_is_pipeline *pipeline)
+{
+	spin_lock_irqsave(&pipeline->slock_buf, pipeline->slock_flags);
+}
+
+void fimc_is_pipeline_buf_unlock(struct fimc_is_pipeline *pipeline)
+{
+	spin_unlock_irqrestore(&pipeline->slock_buf, pipeline->slock_flags);
+}
+
+int fimc_is_pipeline_setparams(struct fimc_is_pipeline *pipeline)
+{
+	int ret;
+
+	/* Enabling basic components in pipeline */
+	ret = fimc_is_pipeline_isp_setparams(pipeline, true);
+	ret |= fimc_is_pipeline_drc_setparams(pipeline, false);
+	ret |= fimc_is_pipeline_scc_setparams(pipeline, true);
+	ret |= fimc_is_pipeline_odc_setparams(pipeline, false);
+	ret |= fimc_is_pipeline_dis_setparams(pipeline, false);
+	ret |= fimc_is_pipeline_3dnr_setparams(pipeline, false);
+	ret |= fimc_is_pipeline_scp_setparams(pipeline, true);
+	ret |= fimc_is_pipeline_fd_setparams(pipeline, false);
+	if (ret < 0)
+		pr_err("Pipeline setparam failed.\n");
+
+	return ret;
+}
+
+int fimc_is_pipeline_scaler_start(struct fimc_is_pipeline *pipeline,
+		enum fimc_is_scaler_id scaler_id,
+		unsigned int **buf_paddr,
+		unsigned int num_bufs,
+		unsigned int num_planes)
+{
+	struct fimc_is *is = pipeline->is;
+	struct scalerp_param *scp_param =
+		&pipeline->is_region->parameter.scalerp;
+	struct scalerc_param *scc_param =
+		&pipeline->is_region->parameter.scalerc;
+	struct param_dma_output *dma_output;
+	struct fimc_is_fmt *fmt;
+	unsigned int region_index;
+	unsigned long *comp_state;
+	int ret;
+	unsigned int pipe_start_flag = 0;
+	unsigned int i, j, buf_index, buf_mask = 0;
+	unsigned int indexes, lindex, hindex;
+
+	if (!test_bit(PIPELINE_OPEN, &pipeline->state)) {
+		pr_err("Pipeline not opened.\n");
+		return -EINVAL;
+	}
+
+	mutex_lock(&pipeline->pipe_scl_lock);
+
+	if (test_bit(PIPELINE_START, &pipeline->state)) {
+		/* Pipeline is started.
+		 * Stop it now to set params and start again */
+		ret = fimc_is_pipeline_stop(pipeline);
+		if (ret) {
+			pr_err("Not able to stop pipeline\n");
+			goto exit;
+		}
+		pipe_start_flag = 1;
+	}
+
+	indexes = lindex = hindex = 0;
+
+	if (scaler_id == SCALER_SCC) {
+		dma_output = &scc_param->dma_output;
+		region_index = FIMC_IS_SCC_REGION_INDEX;
+		comp_state = &pipeline->comp_state[IS_SCC];
+		fmt = pipeline->scaler[SCALER_SCC].fmt;
+		lindex |= LOWBIT_OF(PARAM_SCALERC_DMA_OUTPUT);
+		hindex |= HIGHBIT_OF(PARAM_SCALERC_DMA_OUTPUT);
+	} else {
+		dma_output = &scp_param->dma_output;
+		comp_state = &pipeline->comp_state[IS_SCP];
+		fmt = pipeline->scaler[SCALER_SCC].fmt;
+		region_index = FIMC_IS_SCP_REGION_INDEX;
+		lindex |= LOWBIT_OF(PARAM_SCALERP_DMA_OUTPUT);
+		hindex |= HIGHBIT_OF(PARAM_SCALERP_DMA_OUTPUT);
+	}
+	indexes++;
+
+	for (i = 0; i < num_bufs; i++) {
+		for (j = 0; j < num_planes; j++) {
+			buf_index = i * num_planes + j;
+			pipeline->is_region->shared[region_index + buf_index] =
+				(unsigned int) &buf_paddr[i][j];
+		}
+		buf_mask |= (1 << i);
+	}
+
+	dma_output->cmd = DMA_OUTPUT_COMMAND_ENABLE;
+	dma_output->dma_out_mask = buf_mask;
+	dma_output->buffer_number = num_bufs;
+	dma_output->plane = num_planes;
+	if ((fmt->fourcc == V4L2_PIX_FMT_YUV420M) ||
+			(fmt->fourcc == V4L2_PIX_FMT_NV12M))
+		dma_output->format = DMA_OUTPUT_FORMAT_YUV420;
+	else if (fmt->fourcc == V4L2_PIX_FMT_NV16)
+		dma_output->format = DMA_OUTPUT_FORMAT_YUV422;
+
+	dma_output->buffer_address = pipeline->minfo->shared_paddr +
+				region_index * sizeof(unsigned int);
+
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret)
+		pr_err("fimc_is_itf_set_param is fail\n");
+	else
+		set_bit(COMP_START, comp_state);
+
+	if (pipe_start_flag) {
+		ret = fimc_is_pipeline_start(pipeline);
+		if (ret) {
+			pr_err("Not able to start pipeline back\n");
+			goto exit;
+		}
+	}
+
+exit:
+	mutex_unlock(&pipeline->pipe_scl_lock);
+	return ret;
+}
+
+int fimc_is_pipeline_scaler_stop(struct fimc_is_pipeline *pipeline,
+		enum fimc_is_scaler_id scaler_id)
+{
+	struct fimc_is *is = pipeline->is;
+	struct scalerp_param *scp_param =
+		&pipeline->is_region->parameter.scalerp;
+	struct scalerc_param *scc_param =
+		&pipeline->is_region->parameter.scalerc;
+	struct param_dma_output *dma_output;
+	unsigned int pipe_start_flag = 0;
+	unsigned int indexes, lindex, hindex;
+	unsigned long *comp_state;
+	int ret;
+
+	if (!test_bit(PIPELINE_OPEN, &pipeline->state))
+		return -EINVAL;
+
+	mutex_lock(&pipeline->pipe_scl_lock);
+
+	if (test_bit(PIPELINE_START, &pipeline->state)) {
+		/* Pipeline is started.
+		 * Stop it now to set params and start again */
+		ret = fimc_is_pipeline_stop(pipeline);
+		if (ret) {
+			pr_err("Not able to stop pipeline\n");
+			goto exit;
+		}
+		pipe_start_flag = 1;
+	}
+
+	comp_state = (scaler_id == SCALER_SCC) ?
+		&pipeline->comp_state[IS_SCC] : &pipeline->comp_state[IS_SCP];
+
+	if (!test_bit(COMP_START, comp_state)) {
+		pr_debug("Scaler not started\n");
+		ret = 0;
+		goto exit;
+	}
+
+	if (!test_bit(PIPELINE_START, &pipeline->state)) {
+		pr_err("Pipeline not started.\n");
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	indexes = lindex = hindex = 0;
+
+	if (scaler_id == SCALER_SCC) {
+		dma_output = &scc_param->dma_output;
+		lindex |= LOWBIT_OF(PARAM_SCALERC_DMA_OUTPUT);
+		hindex |= HIGHBIT_OF(PARAM_SCALERC_DMA_OUTPUT);
+	} else {
+		dma_output = &scp_param->dma_output;
+		lindex |= LOWBIT_OF(PARAM_SCALERP_DMA_OUTPUT);
+		hindex |= HIGHBIT_OF(PARAM_SCALERP_DMA_OUTPUT);
+	}
+	indexes++;
+	dma_output->cmd = DMA_OUTPUT_COMMAND_DISABLE;
+
+	ret = fimc_is_itf_set_param(&is->interface, pipeline->instance,
+			indexes, lindex, hindex);
+	if (ret < 0)
+		pr_err("fimc_is_itf_set_param is fail\n");
+	else
+		clear_bit(COMP_START, comp_state);
+
+	if (pipe_start_flag) {
+		ret = fimc_is_pipeline_start(pipeline);
+		if (ret) {
+			pr_err("Not able to start pipeline back\n");
+			return -EINVAL;
+		}
+	}
+
+exit:
+	mutex_unlock(&pipeline->pipe_scl_lock);
+	return ret;
+}
+
+void fimc_is_pipeline_config_shot(struct fimc_is_pipeline *pipeline)
+{
+	struct camera2_shot *shot =
+		(struct camera2_shot *)pipeline->shot_vaddr;
+
+	shot->magicnumber = 0x23456789;
+
+	shot->ctl.aa.mode = AA_CONTROL_AUTO;
+	shot->ctl.aa.aemode = AA_AEMODE_ON;
+}
+
+int fimc_is_pipeline_shot(struct fimc_is_pipeline *pipeline)
+{
+	struct fimc_is *is = pipeline->is;
+	int ret;
+	unsigned int rcount;
+	struct camera2_shot *shot =
+		(struct camera2_shot *)pipeline->shot_vaddr;
+	struct fimc_is_buf *scc_buf, *scp_buf, *bayer_buf;
+
+	if (!test_bit(PIPELINE_START, &pipeline->state)) {
+		/* Pipeline not started yet */
+		return -EINVAL;
+	}
+
+	if (test_bit(PIPELINE_RUN, &pipeline->state)) {
+		/* Pipeline busy. Caller need to wait */
+		return -EBUSY;
+	}
+
+	fimc_is_pipeline_buf_lock(pipeline);
+
+	if (list_empty(&pipeline->isp.wait_queue)) {
+		/* No more bayer buffers */
+		wake_up(&pipeline->wait_q);
+		fimc_is_pipeline_buf_unlock(pipeline);
+		return 0;
+	}
+
+	/* Set the state as RUN */
+	set_bit(PIPELINE_RUN, &pipeline->state);
+
+	/* Get bayer input buffer */
+	bayer_buf = fimc_is_isp_wait_queue_get(&pipeline->isp);
+	if (!bayer_buf) {
+		fimc_is_pipeline_buf_unlock(pipeline);
+		goto err_exit;
+	}
+	fimc_is_isp_run_queue_add(&pipeline->isp, bayer_buf);
+
+	/* Get SCC buffer */
+	if (test_bit(COMP_START, &pipeline->comp_state[IS_SCC]) &&
+		!list_empty(&pipeline->scaler[SCALER_SCC].wait_queue)) {
+		scc_buf = fimc_is_scaler_wait_queue_get(
+				&pipeline->scaler[SCALER_SCC]);
+		if (scc_buf) {
+			fimc_is_scaler_run_queue_add(
+					&pipeline->scaler[SCALER_SCC],
+					scc_buf);
+			shot->uctl.scalerud.scctargetaddress[0] =
+							scc_buf->paddr[0];
+			shot->uctl.scalerud.scctargetaddress[1] =
+							scc_buf->paddr[1];
+			shot->uctl.scalerud.scctargetaddress[2] =
+							scc_buf->paddr[2];
+			set_bit(COMP_RUN, &pipeline->comp_state[IS_SCC]);
+		}
+	} else {
+		pr_debug("No SCC buffer available\n");
+		shot->uctl.scalerud.scctargetaddress[0] = 0;
+		shot->uctl.scalerud.scctargetaddress[1] = 0;
+		shot->uctl.scalerud.scctargetaddress[2] = 0;
+	}
+
+	/* Get SCP buffer */
+	if (test_bit(COMP_START, &pipeline->comp_state[IS_SCP]) &&
+		!list_empty(&pipeline->scaler[SCALER_SCP].wait_queue)) {
+		scp_buf = fimc_is_scaler_wait_queue_get(
+				&pipeline->scaler[SCALER_SCP]);
+		if (scp_buf) {
+			fimc_is_scaler_run_queue_add(
+					&pipeline->scaler[SCALER_SCP],
+					scp_buf);
+			shot->uctl.scalerud.scptargetaddress[0] =
+							scp_buf->paddr[0];
+			shot->uctl.scalerud.scptargetaddress[1] =
+							scp_buf->paddr[1];
+			shot->uctl.scalerud.scptargetaddress[2] =
+							scp_buf->paddr[2];
+			set_bit(COMP_RUN, &pipeline->comp_state[IS_SCP]);
+		}
+	} else {
+		pr_debug("No SCP buffer available\n");
+		shot->uctl.scalerud.scptargetaddress[0] = 0;
+		shot->uctl.scalerud.scptargetaddress[1] = 0;
+		shot->uctl.scalerud.scptargetaddress[2] = 0;
+	}
+	fimc_is_pipeline_buf_unlock(pipeline);
+
+	/* Send shot command */
+	pipeline->fcount++;
+	rcount = pipeline->fcount;
+	shot->ctl.request.framecount = pipeline->fcount;
+	pr_debug("Shot command fcount : %d, Bayer addr : 0x%08x\n",
+			pipeline->fcount, bayer_buf->paddr[0]);
+	ret = fimc_is_itf_shot_nblk(&is->interface, pipeline->instance,
+			bayer_buf->paddr[0],
+			pipeline->shot_paddr,
+			pipeline->fcount,
+			rcount);
+	if (ret < 0) {
+		pr_err("Shot command failed.\n");
+		goto err_exit;
+	}
+	return 0;
+
+err_exit:
+	clear_bit(PIPELINE_RUN, &pipeline->state);
+	clear_bit(COMP_RUN, &pipeline->comp_state[IS_SCC]);
+	clear_bit(COMP_RUN, &pipeline->comp_state[IS_SCP]);
+	return -EINVAL;
+}
+
+int fimc_is_pipeline_start(struct fimc_is_pipeline *pipeline)
+{
+	int ret;
+	struct fimc_is *is = pipeline->is;
+
+	/* Check if open or not */
+	if (!test_bit(PIPELINE_OPEN, &pipeline->state)) {
+		pr_err("Pipeline not open.\n");
+		return -EINVAL;
+	}
+
+	mutex_lock(&pipeline->pipe_lock);
+
+	/* Check if already started */
+	if (test_bit(PIPELINE_START, &pipeline->state)) {
+		pr_debug("Pipeline already started.\n");
+		mutex_unlock(&pipeline->pipe_lock);
+		return 0;
+	}
+
+	/* Set pipeline component params */
+	ret = fimc_is_pipeline_setparams(pipeline);
+	if (ret < 0) {
+		pr_err("Set params failed\n");
+		goto err_exit;
+	}
+
+	/* Send preview still command */
+	ret = fimc_is_itf_preview_still(&is->interface, pipeline->instance);
+	if (ret) {
+		pr_err("Preview still command failed\n");
+		goto err_exit;
+	}
+
+	/* Confiture shot memory to A5 */
+	ret = fimc_is_itf_cfg_mem(&is->interface, pipeline->instance,
+			pipeline->shot_paddr, sizeof(struct camera2_shot));
+	if (ret < 0) {
+		pr_err("Config A5 mem failed.\n");
+		goto err_exit;
+	}
+
+	/* Set shot params */
+	fimc_is_pipeline_config_shot(pipeline);
+
+	/* Process ON command */
+	ret = fimc_is_itf_process_on(&is->interface, pipeline->instance);
+	if (ret) {
+		pr_err("Process on failed\n");
+		goto err_exit;
+	}
+
+	/* Stream ON */
+	ret = fimc_is_itf_stream_on(&is->interface, pipeline->instance);
+	if (ret < 0) {
+		pr_err("Stream On failed.\n");
+		goto err_exit;
+	}
+
+	/* Set state to START */
+	set_bit(PIPELINE_START, &pipeline->state);
+
+	mutex_unlock(&pipeline->pipe_lock);
+	return 0;
+
+err_exit:
+	mutex_unlock(&pipeline->pipe_lock);
+	return ret;
+}
+
+int fimc_is_pipeline_stop(struct fimc_is_pipeline *pipeline)
+{
+	int ret;
+	struct fimc_is *is = pipeline->is;
+
+	mutex_lock(&pipeline->pipe_lock);
+
+	/* Check if started */
+	if (!test_bit(PIPELINE_OPEN, &pipeline->state) ||
+		!test_bit(PIPELINE_START, &pipeline->state)) {
+		pr_debug("Pipeline not open/started.\n");
+		ret = -EINVAL;
+		goto err_exit;
+	}
+
+	/* Wait if any operation is in progress */
+	ret = wait_event_timeout(pipeline->wait_q,
+			!test_bit(PIPELINE_RUN, &pipeline->state),
+			FIMC_IS_COMMAND_TIMEOUT);
+	if (!ret) {
+		pr_err("Pipeline timeout");
+		ret = -EBUSY;
+		goto err_exit;
+	}
+
+	/* Wait for scaler operations if any to complete */
+	ret = wait_event_timeout(pipeline->scaler[SCALER_SCC].event_q,
+			!test_bit(COMP_RUN, &pipeline->comp_state[IS_SCC]),
+			FIMC_IS_COMMAND_TIMEOUT);
+	if (!ret) {
+		pr_err("SCC timeout");
+		ret = -EBUSY;
+		goto err_exit;
+	}
+	ret = wait_event_timeout(pipeline->scaler[SCALER_SCP].event_q,
+			!test_bit(COMP_RUN, &pipeline->comp_state[IS_SCP]),
+			FIMC_IS_COMMAND_TIMEOUT);
+	if (!ret) {
+		pr_err("SCP timeout");
+		ret = -EBUSY;
+		goto err_exit;
+	}
+
+
+	/* Process OFF */
+	ret = fimc_is_itf_process_off(&is->interface, pipeline->instance);
+	if (ret) {
+		pr_err("Process off failed\n");
+		ret = -EINVAL;
+		goto err_exit;
+	}
+
+	/* Stream OFF */
+	ret = fimc_is_itf_stream_off(&is->interface, pipeline->instance);
+	if (ret < 0) {
+		pr_err("Stream Off failed.\n");
+		ret = -EINVAL;
+		goto err_exit;
+	}
+
+	/* Clear state */
+	clear_bit(PIPELINE_START, &pipeline->state);
+
+	mutex_unlock(&pipeline->pipe_lock);
+	return 0;
+
+err_exit:
+	mutex_unlock(&pipeline->pipe_lock);
+	return ret;
+}
+
+int fimc_is_pipeline_open(struct fimc_is_pipeline *pipeline,
+		struct fimc_is_sensor *sensor)
+{
+	struct fimc_is *is = pipeline->is;
+	struct is_region *region;
+	int ret;
+
+	pr_debug("Pipeline open, instance : %d\n", pipeline->instance);
+
+	mutex_lock(&pipeline->pipe_lock);
+
+	/* Check if already open */
+	if (test_bit(PIPELINE_OPEN, &pipeline->state)) {
+		pr_err("Pipeline already open.\n");
+		ret = -EINVAL;
+		goto err_exit;
+	}
+
+	/* Init pipeline params */
+	pipeline->fcount = 0;
+	pipeline->sensor = sensor;
+	pipeline->sensor_width = sensor->drvdata->active_width;
+	pipeline->sensor_height = sensor->drvdata->active_height;
+
+	/* Init memory */
+	ret = fimc_is_pipeline_initmem(pipeline, is->alloc_ctx);
+	if (ret < 0) {
+		pr_err("Pipeline memory init failed.\n");
+		goto err_exit;
+	}
+
+	/* Load firmware */
+	ret = fimc_is_pipeline_load_firmware(pipeline);
+	if (ret < 0) {
+		pr_err("Firmware load failed.\n");
+		goto err_fw;
+	}
+
+	/* Power ON */
+	ret = fimc_is_pipeline_power(pipeline, 1);
+	if (ret < 0) {
+		pr_err("A5 power on failed.\n");
+		goto err_fw;
+	}
+
+	/* Wait for FW Init to complete */
+	ret = fimc_is_itf_wait_init_state(&is->interface);
+	if (ret < 0) {
+		pr_err("FW init failed.\n");
+		goto err_fw;
+	}
+
+	/* Open Sensor */
+	region = pipeline->is_region;
+	memcpy(&region->shared[0], &sensor->drvdata->ext,
+			sizeof(struct fimc_is_sensor_ext));
+	ret = fimc_is_itf_open_sensor(&is->interface,
+			pipeline->instance,
+			sensor->drvdata->sensor_id,
+			sensor->i2c_ch,
+			pipeline->minfo->shared_paddr);
+	if (ret < 0) {
+		pr_err("Open sensor failed\n");
+		goto err_exit;
+	}
+
+	pr_debug("Magic Number : %x\n",
+			pipeline->is_region->shared[MAX_SHARED_COUNT-1]);
+
+	/* Copy init params to FW region */
+	memset(&region->parameter, 0x0, sizeof(struct is_param_region));
+
+	memcpy(&region->parameter.sensor, &init_sensor_param,
+			sizeof(struct sensor_param));
+	memcpy(&region->parameter.isp, &init_isp_param,
+			sizeof(struct isp_param));
+	memcpy(&region->parameter.drc, &init_drc_param,
+			sizeof(struct drc_param));
+	memcpy(&region->parameter.scalerc, &init_scalerc_param,
+			sizeof(struct scalerc_param));
+	memcpy(&region->parameter.odc, &init_odc_param,
+			sizeof(struct odc_param));
+	memcpy(&region->parameter.dis, &init_dis_param,
+			sizeof(struct dis_param));
+	memcpy(&region->parameter.tdnr, &init_tdnr_param,
+			sizeof(struct tdnr_param));
+	memcpy(&region->parameter.scalerp, &init_scalerp_param,
+			sizeof(struct scalerp_param));
+	memcpy(&region->parameter.fd, &init_fd_param,
+			sizeof(struct fd_param));
+
+	/* Load setfile */
+	ret = fimc_is_pipeline_setfile(pipeline);
+	if (ret < 0)
+		goto err_exit;
+
+	/* Stream off */
+	ret = fimc_is_itf_stream_off(&is->interface, pipeline->instance);
+	if (ret < 0)
+		goto err_exit;
+
+	/* Process off */
+	ret = fimc_is_itf_process_off(&is->interface, pipeline->instance);
+	if (ret < 0)
+		goto err_exit;
+
+	/* Set state to OPEN */
+	set_bit(PIPELINE_OPEN, &pipeline->state);
+
+	mutex_unlock(&pipeline->pipe_lock);
+	return 0;
+
+err_fw:
+	fimc_is_pipeline_freemem(pipeline);
+err_exit:
+	mutex_unlock(&pipeline->pipe_lock);
+	return ret;
+}
+
+int fimc_is_pipeline_close(struct fimc_is_pipeline *pipeline)
+{
+	int ret;
+	struct fimc_is *is = pipeline->is;
+
+	mutex_lock(&pipeline->pipe_lock);
+
+	/* Check if opened */
+	if (!test_bit(PIPELINE_OPEN, &pipeline->state)) {
+		pr_err("Pipeline not opened\n");
+		ret = -EINVAL;
+		goto err_exit;
+	}
+
+	/* Stop pipeline */
+	if (test_bit(PIPELINE_START, &pipeline->state)) {
+		pr_err("Cannot close pipeline when its started\n");
+		ret = -EINVAL;
+		goto err_exit;
+	}
+
+	/* FW power off command */
+	ret = fimc_is_itf_power_down(&is->interface, pipeline->instance);
+	if (ret)
+		pr_err("FW power down error\n");
+
+	/* Pipeline power off*/
+	fimc_is_pipeline_power(pipeline, 0);
+
+	/* Free memory */
+	fimc_is_pipeline_freemem(pipeline);
+
+	clear_bit(PIPELINE_OPEN, &pipeline->state);
+	mutex_unlock(&pipeline->pipe_lock);
+	return 0;
+
+err_exit:
+	mutex_unlock(&pipeline->pipe_lock);
+	return ret;
+}
diff --git a/drivers/media/platform/exynos5-is/fimc-is-pipeline.h b/drivers/media/platform/exynos5-is/fimc-is-pipeline.h
new file mode 100644
index 0000000..0b0682f
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-pipeline.h
@@ -0,0 +1,129 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ *  Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef FIMC_IS_PIPELINE_H_
+#define FIMC_IS_PIPELINE_H_
+
+#include "fimc-is-core.h"
+#include "fimc-is-sensor.h"
+#include "fimc-is-isp.h"
+#include "fimc-is-scaler.h"
+
+#define FIMC_IS_A5_MEM_SIZE		(0x00A00000)
+#define FIMC_IS_A5_SEN_SIZE		(0x00100000)
+#define FIMC_IS_REGION_SIZE		(0x5000)
+#define FIMC_IS_SETFILE_SIZE		(0xc0d8)
+#define FIMC_IS_TDNR_MEM_SIZE		(1920*1080*4)
+#define FIMC_IS_DEBUG_REGION_ADDR	(0x00840000)
+#define FIMC_IS_SHARED_REGION_ADDR	(0x008C0000)
+
+#define FIMC_IS_SCP_REGION_INDEX	400
+#define FIMC_IS_SCC_REGION_INDEX	447
+
+#define MAX_ODC_INTERNAL_BUF_WIDTH	(2560)  /* 4808 in HW */
+#define MAX_ODC_INTERNAL_BUF_HEIGHT	(1920)  /* 3356 in HW */
+#define SIZE_ODC_INTERNAL_BUF \
+	(MAX_ODC_INTERNAL_BUF_WIDTH * MAX_ODC_INTERNAL_BUF_HEIGHT * 3)
+
+#define MAX_DIS_INTERNAL_BUF_WIDTH	(2400)
+#define MAX_DIS_INTERNAL_BUF_HEIGHT	(1360)
+#define SIZE_DIS_INTERNAL_BUF \
+	(MAX_DIS_INTERNAL_BUF_WIDTH * MAX_DIS_INTERNAL_BUF_HEIGHT * 2)
+
+#define MAX_3DNR_INTERNAL_BUF_WIDTH	(1920)
+#define MAX_3DNR_INTERNAL_BUF_HEIGHT	(1088)
+#define SIZE_DNR_INTERNAL_BUF \
+	(MAX_3DNR_INTERNAL_BUF_WIDTH * MAX_3DNR_INTERNAL_BUF_HEIGHT * 2)
+
+#define NUM_ODC_INTERNAL_BUF		(2)
+#define NUM_DIS_INTERNAL_BUF		(5)
+#define NUM_DNR_INTERNAL_BUF		(2)
+
+#define FIMC_IS_FW_BASE_MASK		((1 << 26) - 1)
+
+#define FIMC_IS_NUM_COMPS		8
+
+enum pipeline_state {
+	PIPELINE_INIT,
+	PIPELINE_OPEN,
+	PIPELINE_START,
+	PIPELINE_RUN,
+};
+
+enum is_components {
+	IS_ISP,
+	IS_DRC,
+	IS_SCC,
+	IS_ODC,
+	IS_DIS,
+	IS_TDNR,
+	IS_SCP,
+	IS_FD
+};
+
+enum component_state {
+	COMP_ENABLE,
+	COMP_START,
+	COMP_RUN
+};
+
+struct fimc_is_pipeline {
+	unsigned long		state;
+	unsigned long		comp_state[FIMC_IS_NUM_COMPS];
+	bool			force_down;
+	unsigned int		instance;
+	spinlock_t		slock_buf;
+	unsigned long		slock_flags;
+	wait_queue_head_t	wait_q;
+	struct mutex		pipe_lock;
+	struct mutex		pipe_scl_lock;
+
+	struct fimc_is_meminfo	*minfo;
+	struct is_region	*is_region;
+
+	void			*is;
+	struct fimc_is_sensor	*sensor;
+	struct fimc_is_isp	isp;
+	struct fimc_is_scaler	scaler[FIMC_IS_NUM_SCALERS];
+
+	unsigned int		fcount;
+	unsigned int		sensor_width;
+	unsigned int		sensor_height;
+	unsigned int		isp_width;
+	unsigned int		isp_height;
+	unsigned int		scaler_width[FIMC_IS_NUM_SCALERS];
+	unsigned int		scaler_height[FIMC_IS_NUM_SCALERS];
+
+	unsigned int		shot_paddr;
+	unsigned int		shot_vaddr;
+};
+
+void fimc_is_pipeline_buf_lock(struct fimc_is_pipeline *pipeline);
+void fimc_is_pipeline_buf_unlock(struct fimc_is_pipeline *pipeline);
+int fimc_is_pipeline_setparams(struct fimc_is_pipeline *pipeline);
+int fimc_is_pipeline_scaler_start(struct fimc_is_pipeline *pipeline,
+		enum fimc_is_scaler_id scaler_id,
+		unsigned int **buf_paddr,
+		unsigned int num_bufs,
+		unsigned int num_planes);
+int fimc_is_pipeline_scaler_stop(struct fimc_is_pipeline *pipeline,
+		enum fimc_is_scaler_id scaler_id);
+void fimc_is_pipeline_config_shot(struct fimc_is_pipeline *pipeline);
+int fimc_is_pipeline_shot(struct fimc_is_pipeline *pipeline);
+int fimc_is_pipeline_start(struct fimc_is_pipeline *pipeline);
+int fimc_is_pipeline_stop(struct fimc_is_pipeline *pipeline);
+int fimc_is_pipeline_init(struct fimc_is_pipeline *pipeline,
+			unsigned int instance, void *is_ctx);
+int fimc_is_pipeline_destroy(struct fimc_is_pipeline *pipeline);
+int fimc_is_pipeline_open(struct fimc_is_pipeline *pipeline,
+		struct fimc_is_sensor *sensor);
+int fimc_is_pipeline_close(struct fimc_is_pipeline *pipeline);
+
+#endif
-- 
1.7.9.5

[RFC v2 09/10] exynos5-fimc-is: Adds the hardware interface module

[Arun Kumar K]

The hardware interface module finally sends the commands to the
FIMC-IS firmware and runs the interrupt handler for getting the
responses.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
---
 .../media/platform/exynos5-is/fimc-is-interface.c  | 1025 ++++++++++++++++++++
 .../media/platform/exynos5-is/fimc-is-interface.h  |  131 +++
 2 files changed, 1156 insertions(+)
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.c
 create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.h

diff --git a/drivers/media/platform/exynos5-is/fimc-is-interface.c b/drivers/media/platform/exynos5-is/fimc-is-interface.c
new file mode 100644
index 0000000..63176fa
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-interface.c
@@ -0,0 +1,1025 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+*
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Kil-yeon Lim <kilyeon.im@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include "fimc-is.h"
+#include "fimc-is-cmd.h"
+#include "fimc-is-regs.h"
+
+#define init_request_barrier(itf) mutex_init(&itf->request_barrier)
+#define enter_request_barrier(itf) mutex_lock(&itf->request_barrier)
+#define exit_request_barrier(itf) mutex_unlock(&itf->request_barrier)
+
+static inline void itf_get_cmd(struct fimc_is_interface *itf,
+	struct fimc_is_msg *msg, unsigned int index)
+{
+	struct is_common_reg __iomem *com_regs = itf->com_regs;
+
+	switch (index) {
+	case INTR_GENERAL:
+		msg->id = 0;
+		msg->command = com_regs->ihcmd;
+		msg->instance = com_regs->ihc_sensorid;
+		msg->parameter1 = com_regs->ihc_param1;
+		msg->parameter2 = com_regs->ihc_param2;
+		msg->parameter3 = com_regs->ihc_param3;
+		msg->parameter4 = com_regs->ihc_param4;
+		break;
+	case INTR_SCC_FDONE:
+		msg->id = 0;
+		msg->command = IHC_FRAME_DONE;
+		msg->instance = com_regs->scc_sensor_id;
+		msg->parameter1 = com_regs->scc_param1;
+		msg->parameter2 = com_regs->scc_param2;
+		msg->parameter3 = com_regs->scc_param3;
+		msg->parameter4 = 0;
+		break;
+	case INTR_SCP_FDONE:
+		msg->id = 0;
+		msg->command = IHC_FRAME_DONE;
+		msg->instance = com_regs->scp_sensor_id;
+		msg->parameter1 = com_regs->scp_param1;
+		msg->parameter2 = com_regs->scp_param2;
+		msg->parameter3 = com_regs->scp_param3;
+		msg->parameter4 = 0;
+		break;
+	case INTR_META_DONE:
+		msg->id = 0;
+		msg->command = IHC_FRAME_DONE;
+		msg->instance = com_regs->meta_sensor_id;
+		msg->parameter1 = com_regs->meta_param1;
+		msg->parameter2 = 0;
+		msg->parameter3 = 0;
+		msg->parameter4 = 0;
+		break;
+	case INTR_SHOT_DONE:
+		msg->id = 0;
+		msg->command = IHC_FRAME_DONE;
+		msg->instance = com_regs->shot_sensor_id;
+		msg->parameter1 = com_regs->shot_param1;
+		msg->parameter2 = com_regs->shot_param2;
+		msg->parameter3 = 0;
+		msg->parameter4 = 0;
+		break;
+	default:
+		msg->id = 0;
+		msg->command = 0;
+		msg->instance = 0;
+		msg->parameter1 = 0;
+		msg->parameter2 = 0;
+		msg->parameter3 = 0;
+		msg->parameter4 = 0;
+		pr_err("unknown command getting\n");
+		break;
+	}
+}
+
+static inline unsigned int itf_get_intr(struct fimc_is_interface *itf)
+{
+	unsigned int status;
+	struct is_common_reg __iomem *com_regs = itf->com_regs;
+
+	status = readl(itf->regs + INTMSR1) | com_regs->ihcmd_iflag |
+		com_regs->scc_iflag |
+		com_regs->scp_iflag |
+		com_regs->meta_iflag |
+		com_regs->shot_iflag;
+
+	return status;
+}
+
+static void itf_set_state(struct fimc_is_interface *itf,
+		unsigned long state)
+{
+	unsigned long flags;
+	spin_lock_irqsave(&itf->slock_state, flags);
+	__set_bit(state, &itf->state);
+	spin_unlock_irqrestore(&itf->slock_state, flags);
+}
+
+static void itf_clr_state(struct fimc_is_interface *itf,
+		unsigned long state)
+{
+	unsigned long flags;
+	spin_lock_irqsave(&itf->slock_state, flags);
+	__clear_bit(state, &itf->state);
+	spin_unlock_irqrestore(&itf->slock_state, flags);
+}
+
+static int itf_get_state(struct fimc_is_interface *itf,
+		unsigned long state)
+{
+	int ret = 0;
+	unsigned long flags;
+
+	spin_lock_irqsave(&itf->slock_state, flags);
+	ret = test_bit(state, &itf->state);
+	spin_unlock_irqrestore(&itf->slock_state, flags);
+	return ret;
+}
+
+static void itf_init_wakeup(struct fimc_is_interface *itf)
+{
+	itf_set_state(itf, IS_IF_STATE_INIT);
+	wake_up(&itf->irq_queue);
+}
+
+void itf_busy_wakeup(struct fimc_is_interface *itf)
+{
+	itf_clr_state(itf, IS_IF_STATE_BUSY);
+	wake_up(&itf->irq_queue);
+}
+
+static int itf_wait_hw_ready(struct fimc_is_interface *itf)
+{
+	int ret = 0;
+	unsigned int try_count = TRY_RECV_AWARE_COUNT;
+	unsigned int cfg = readl(itf->regs + INTMSR0);
+	unsigned int status = INTMSR0_GET_INTMSD(0, cfg);
+
+	while (status) {
+		cfg = readl(itf->regs + INTMSR0);
+		status = INTMSR0_GET_INTMSD(0, cfg);
+
+		if (try_count-- == 0) {
+			try_count = TRY_RECV_AWARE_COUNT;
+			pr_err("INTMSR0's 0 bit is not cleared.\n");
+			ret = -EINVAL;
+			break;
+		}
+	}
+	return ret;
+}
+
+static int itf_wait_idlestate(struct fimc_is_interface *itf)
+{
+	int ret = 0;
+
+	ret = wait_event_timeout(itf->irq_queue,
+			!itf_get_state(itf, IS_IF_STATE_BUSY),
+			FIMC_IS_COMMAND_TIMEOUT);
+	if (!ret) {
+		pr_err("timeout");
+		return -ETIME;
+	}
+	return 0;
+}
+
+int fimc_is_itf_wait_init_state(struct fimc_is_interface *itf)
+{
+	int ret = 0;
+
+	ret = wait_event_timeout(itf->irq_queue,
+		itf_get_state(itf, IS_IF_STATE_INIT),
+		FIMC_IS_STARTUP_TIMEOUT);
+
+	if (!ret) {
+		pr_err("timeout\n");
+		return -ETIME;
+	}
+	return 0;
+}
+
+static inline void itf_clr_intr(struct fimc_is_interface *itf,
+		unsigned int index)
+{
+	struct is_common_reg __iomem *com_regs = itf->com_regs;
+
+	switch (index) {
+	case INTR_GENERAL:
+		writel((1<<INTR_GENERAL), itf->regs + INTCR1);
+		com_regs->ihcmd_iflag = 0;
+		break;
+	case INTR_SCC_FDONE:
+		writel((1<<INTR_SCC_FDONE), itf->regs + INTCR1);
+		com_regs->scc_iflag = 0;
+		break;
+	case INTR_SCP_FDONE:
+		writel((1<<INTR_SCP_FDONE), itf->regs + INTCR1);
+		com_regs->scp_iflag = 0;
+		break;
+	case INTR_META_DONE:
+		writel((1<<INTR_META_DONE), itf->regs + INTCR1);
+		com_regs->meta_iflag = 0;
+		break;
+	case INTR_SHOT_DONE:
+		writel((1<<INTR_SHOT_DONE), itf->regs + INTCR1);
+		com_regs->shot_iflag = 0;
+		break;
+	default:
+		pr_err("Unknown command clear\n");
+		break;
+	}
+}
+
+/* Send Host to IS command interrupt */
+static void itf_hic_interrupt(struct fimc_is_interface *itf)
+{
+	writel(INTGR0_INTGD(0), itf->regs + INTGR0);
+}
+
+static int itf_send_sensor_number(struct fimc_is_interface *itf)
+{
+	struct fimc_is_msg msg;
+	unsigned long flags;
+
+	msg.id = 0;
+	msg.command = ISR_DONE;
+	msg.instance = 0;
+	msg.parameter1 = IHC_GET_SENSOR_NUMBER;
+
+	msg.parameter2 = 1;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	spin_lock_irqsave(&itf->slock, flags);
+	itf->com_regs->hicmd = msg.command;
+	itf->com_regs->hic_sensorid = msg.instance;
+	itf->com_regs->hic_param1 = msg.parameter1;
+	itf->com_regs->hic_param2 = msg.parameter2;
+	itf->com_regs->hic_param3 = msg.parameter3;
+	itf->com_regs->hic_param4 = msg.parameter4;
+	itf_hic_interrupt(itf);
+	spin_unlock_irqrestore(&itf->slock, flags);
+
+	return 0;
+}
+
+static int fimc_is_itf_set_cmd(struct fimc_is_interface *itf,
+	struct fimc_is_msg *msg)
+{
+	int ret = 0;
+	bool block_io, send_cmd;
+	unsigned long flags;
+
+	enter_request_barrier(itf);
+
+	switch (msg->command) {
+	case HIC_STREAM_ON:
+		if (itf->streaming == IS_IF_STREAMING_ON) {
+			send_cmd = false;
+		} else {
+			send_cmd = true;
+			block_io = true;
+		}
+		break;
+	case HIC_STREAM_OFF:
+		if (itf->streaming == IS_IF_STREAMING_OFF) {
+			send_cmd = false;
+		} else {
+			send_cmd = true;
+			block_io = true;
+		}
+		break;
+	case HIC_PROCESS_START:
+		if (itf->processing == IS_IF_PROCESSING_ON) {
+			send_cmd = false;
+		} else {
+			send_cmd = true;
+			block_io = true;
+		}
+		break;
+	case HIC_PROCESS_STOP:
+		if (itf->processing == IS_IF_PROCESSING_OFF) {
+			send_cmd = false;
+		} else {
+			send_cmd = true;
+			block_io = true;
+		}
+		break;
+	case HIC_POWER_DOWN:
+		if (itf->pdown_ready == IS_IF_POWER_DOWN_READY) {
+			send_cmd = false;
+		} else {
+			send_cmd = true;
+			block_io = true;
+		}
+		break;
+	case HIC_OPEN_SENSOR:
+	case HIC_GET_SET_FILE_ADDR:
+	case HIC_SET_PARAMETER:
+	case HIC_PREVIEW_STILL:
+	case HIC_GET_STATIC_METADATA:
+	case HIC_SET_A5_MEM_ACCESS:
+	case HIC_SET_CAM_CONTROL:
+		send_cmd = true;
+		block_io = true;
+		break;
+	case HIC_SHOT:
+	case ISR_DONE:
+		send_cmd = true;
+		block_io = false;
+		break;
+	default:
+		send_cmd = true;
+		block_io = true;
+		break;
+	}
+
+	if (!send_cmd) {
+		pr_debug("skipped\n");
+		goto exit;
+	}
+
+	ret = itf_wait_hw_ready(itf);
+	if (ret) {
+		pr_err("waiting for ready is fail");
+		ret = -EBUSY;
+		goto exit;
+	}
+
+	spin_lock_irqsave(&itf->slock, flags);
+	itf_set_state(itf, IS_IF_STATE_BUSY);
+	itf->com_regs->hicmd = msg->command;
+	itf->com_regs->hic_sensorid = msg->instance;
+	itf->com_regs->hic_param1 = msg->parameter1;
+	itf->com_regs->hic_param2 = msg->parameter2;
+	itf->com_regs->hic_param3 = msg->parameter3;
+	itf->com_regs->hic_param4 = msg->parameter4;
+	itf_hic_interrupt(itf);
+	spin_unlock_irqrestore(&itf->slock, flags);
+
+	if (!block_io)
+		goto exit;
+
+	ret = itf_wait_idlestate(itf);
+	if (ret) {
+		pr_err("%d command is timeout\n", msg->command);
+		itf_clr_state(itf, IS_IF_STATE_BUSY);
+		ret = -ETIME;
+		goto exit;
+	}
+
+	if (itf->reply.command == ISR_DONE) {
+		switch (msg->command) {
+		case HIC_STREAM_ON:
+			itf->streaming = IS_IF_STREAMING_ON;
+			break;
+		case HIC_STREAM_OFF:
+			itf->streaming = IS_IF_STREAMING_OFF;
+			break;
+		case HIC_PROCESS_START:
+			itf->processing = IS_IF_PROCESSING_ON;
+			break;
+		case HIC_PROCESS_STOP:
+			itf->processing = IS_IF_PROCESSING_OFF;
+			break;
+		case HIC_POWER_DOWN:
+			itf->pdown_ready = IS_IF_POWER_DOWN_READY;
+			break;
+		case HIC_OPEN_SENSOR:
+			if (itf->reply.parameter1 == HIC_POWER_DOWN) {
+				pr_err("firmware power down");
+				itf->pdown_ready = IS_IF_POWER_DOWN_READY;
+				ret = -ECANCELED;
+				goto exit;
+			} else
+				itf->pdown_ready = IS_IF_POWER_DOWN_NREADY;
+			break;
+		default:
+			break;
+		}
+	} else {
+		pr_err("ISR_NDONE is occured");
+		ret = -EINVAL;
+	}
+
+exit:
+	exit_request_barrier(itf);
+
+	if (ret)
+		pr_err("Error returned from FW. See debugfs for error log\n");
+
+
+	return ret;
+}
+
+static int fimc_is_itf_set_cmd_shot(struct fimc_is_interface *itf,
+		struct fimc_is_msg *msg)
+{
+	int ret = 0;
+	unsigned long flags;
+
+	spin_lock_irqsave(&itf->slock, flags);
+	itf->com_regs->hicmd = msg->command;
+	itf->com_regs->hic_sensorid = msg->instance;
+	itf->com_regs->hic_param1 = msg->parameter1;
+	itf->com_regs->hic_param2 = msg->parameter2;
+	itf->com_regs->hic_param3 = msg->parameter3;
+	itf->com_regs->hic_param4 = msg->parameter4;
+	itf->com_regs->fcount = msg->parameter3;
+	itf_hic_interrupt(itf);
+	spin_unlock_irqrestore(&itf->slock, flags);
+
+	return ret;
+}
+
+static void itf_handle_general(struct fimc_is_interface *itf,
+		struct fimc_is_msg *msg)
+{
+	switch (msg->command) {
+
+	case IHC_GET_SENSOR_NUMBER:
+		pr_debug("IS version : %d.%d\n",
+			ISDRV_VERSION, msg->parameter1);
+		/* Respond with sensor number */
+		itf_send_sensor_number(itf);
+		itf_init_wakeup(itf);
+		break;
+	case ISR_DONE:
+		switch (msg->parameter1) {
+		case HIC_OPEN_SENSOR:
+			pr_debug("open done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_GET_SET_FILE_ADDR:
+			pr_debug("saddr(%p) done\n",
+				(void *)msg->parameter2);
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_LOAD_SET_FILE:
+			pr_debug("setfile done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_SET_A5_MEM_ACCESS:
+			pr_debug("cfgmem done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_PROCESS_START:
+			pr_debug("process_on done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_PROCESS_STOP:
+			pr_debug("process_off done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_STREAM_ON:
+			pr_debug("stream_on done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_STREAM_OFF:
+			pr_debug("stream_off done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_SET_PARAMETER:
+			pr_debug("s_param done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_GET_STATIC_METADATA:
+			pr_debug("g_capability done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_PREVIEW_STILL:
+			pr_debug("a_param(%dx%d) done\n",
+				msg->parameter2,
+				msg->parameter3);
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		case HIC_POWER_DOWN:
+			pr_debug("powerdown done\n");
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		/*non-blocking command*/
+		case HIC_SHOT:
+			pr_err("shot done is not acceptable\n");
+			break;
+		case HIC_SET_CAM_CONTROL:
+			pr_err("camctrl is not acceptable\n");
+			break;
+		default:
+			pr_err("unknown done is invokded\n");
+			break;
+		}
+		break;
+	case ISR_NDONE:
+		switch (msg->parameter1) {
+		case HIC_SHOT:
+			pr_err("shot NOT done is not acceptable\n");
+			break;
+		case HIC_SET_CAM_CONTROL:
+			pr_debug("camctrl NOT done\n");
+			break;
+		case HIC_SET_PARAMETER:
+			pr_err("s_param NOT done\n");
+			pr_err("param2 : 0x%08X\n", msg->parameter2);
+			pr_err("param3 : 0x%08X\n", msg->parameter3);
+			pr_err("param4 : 0x%08X\n", msg->parameter4);
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		default:
+			pr_err("a command(%d) not done", msg->parameter1);
+			memcpy(&itf->reply, msg,
+				sizeof(struct fimc_is_msg));
+			itf_busy_wakeup(itf);
+			break;
+		}
+		break;
+	case IHC_SET_FACE_MARK:
+		pr_err("FACE_MARK(%d,%d,%d) is not acceptable\n",
+			msg->parameter1,
+			msg->parameter2,
+			msg->parameter3);
+		break;
+	case IHC_AA_DONE:
+		pr_err("AA_DONE(%d,%d,%d) is not acceptable\n",
+			msg->parameter1,
+			msg->parameter2,
+			msg->parameter3);
+		break;
+	case IHC_FLASH_READY:
+		pr_err("IHC_FLASH_READY is not acceptable");
+		break;
+	case IHC_NOT_READY:
+		pr_err("IHC_NOT_READY is occured, need reset");
+		break;
+	default:
+		pr_err("func_general unknown(0x%08X) end\n", msg->command);
+		break;
+	}
+}
+
+static void itf_handle_scaler_done(struct fimc_is_interface *itf,
+		struct fimc_is_msg *msg)
+{
+	struct fimc_is *is = fimc_interface_to_is(itf);
+	struct fimc_is_pipeline *pipeline = &is->pipeline;
+	struct fimc_is_buf *buf;
+	struct fimc_is_scaler *scl;
+	struct fimc_is_fmt *fmt;
+	struct timeval *tv;
+	struct timespec ts;
+	unsigned int wh, i;
+	unsigned int fcount = msg->parameter1;
+	unsigned long *comp_state;
+
+	if (msg->parameter4 == SCALER_SCC) {
+		scl = &pipeline->scaler[SCALER_SCC];
+		comp_state = &pipeline->comp_state[IS_SCC];
+	} else {
+		scl = &pipeline->scaler[SCALER_SCP];
+		comp_state = &pipeline->comp_state[IS_SCP];
+	}
+
+	fmt = scl->fmt;
+
+	fimc_is_pipeline_buf_lock(pipeline);
+	if (!list_empty(&scl->run_queue)) {
+
+		wh = scl->width * scl->height;
+		buf = fimc_is_scaler_run_queue_get(scl);
+		for (i = 0; i < fmt->num_planes; i++) {
+			vb2_set_plane_payload(buf->vb, i,
+					(wh * fmt->depth[i]) / 8);
+		}
+
+		/* Set timestamp */
+		ktime_get_ts(&ts);
+		tv = &buf->vb->v4l2_buf.timestamp;
+		tv->tv_sec = ts.tv_sec;
+		tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
+		buf->vb->v4l2_buf.sequence = fcount;
+
+		pr_debug("SCP buffer done %d/%d\n",
+				msg->parameter1, msg->parameter3);
+		vb2_buffer_done(buf->vb, VB2_BUF_STATE_DONE);
+	}
+	fimc_is_pipeline_buf_unlock(pipeline);
+	clear_bit(COMP_RUN, comp_state);
+	wake_up(&scl->event_q);
+}
+
+static void itf_handle_shot_done(struct fimc_is_interface *itf,
+		struct fimc_is_msg *msg)
+{
+	struct fimc_is *is = fimc_interface_to_is(itf);
+	struct fimc_is_pipeline *pipeline = &is->pipeline;
+	unsigned int status = msg->parameter2;
+	struct fimc_is_buf *bayer_buf;
+	int ret;
+
+	if (status != ISR_DONE)
+		pr_err("Shot done is invalid(0x%08X)\n", status);
+
+	/* DQ the bayer input buffer */
+	fimc_is_pipeline_buf_lock(pipeline);
+	bayer_buf = fimc_is_isp_run_queue_get(&pipeline->isp);
+	if (bayer_buf) {
+		vb2_buffer_done(bayer_buf->vb, VB2_BUF_STATE_DONE);
+		pr_debug("Bayer buffer done.\n");
+	}
+	fimc_is_pipeline_buf_unlock(pipeline);
+
+	/* Clear state & call shot again */
+	clear_bit(PIPELINE_RUN, &pipeline->state);
+
+	ret = fimc_is_pipeline_shot(pipeline);
+	if (ret)
+		pr_err("Shot failed\n");
+}
+
+/* Main FIMC-IS interrupt handler */
+static irqreturn_t itf_irq_handler(int irq, void *data)
+{
+	struct fimc_is_interface *itf;
+	struct fimc_is_msg msg;
+	unsigned int status;
+
+	itf = (struct fimc_is_interface *)data;
+	status = itf_get_intr(itf);
+
+	if (status & (1<<INTR_SHOT_DONE)) {
+		itf_get_cmd(itf, &msg, INTR_SHOT_DONE);
+
+		itf_handle_shot_done(itf, &msg);
+
+		status &= ~(1<<INTR_SHOT_DONE);
+		itf_clr_intr(itf, INTR_SHOT_DONE);
+	}
+
+	if (status & (1<<INTR_GENERAL)) {
+		itf_get_cmd(itf, &msg, INTR_GENERAL);
+
+		itf_handle_general(itf, &msg);
+
+		status &= ~(1<<INTR_GENERAL);
+		itf_clr_intr(itf, INTR_GENERAL);
+	}
+
+	if (status & (1<<INTR_SCC_FDONE)) {
+		itf_get_cmd(itf, &msg, INTR_SCC_FDONE);
+
+		msg.parameter4 = SCALER_SCC;
+		itf_handle_scaler_done(itf, &msg);
+
+		status &= ~(1<<INTR_SCC_FDONE);
+		itf_clr_intr(itf, INTR_SCC_FDONE);
+	}
+
+	if (status & (1<<INTR_SCP_FDONE)) {
+		itf_get_cmd(itf, &msg, INTR_SCP_FDONE);
+
+		msg.parameter4 = SCALER_SCP;
+		itf_handle_scaler_done(itf, &msg);
+
+		status &= ~(1<<INTR_SCP_FDONE);
+		itf_clr_intr(itf, INTR_SCP_FDONE);
+	}
+
+	if (status & (1<<INTR_META_DONE)) {
+		status &= ~(1<<INTR_META_DONE);
+		itf_clr_intr(itf, INTR_META_DONE);
+	}
+
+	if (status != 0)
+		pr_err("status is NOT all clear(0x%08X)", status);
+
+	return IRQ_HANDLED;
+}
+
+int fimc_is_itf_open_sensor(struct fimc_is_interface *itf,
+		unsigned int instance,
+		unsigned int sensor_id,
+		unsigned int i2c_channel,
+		unsigned int sensor_ext)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_OPEN_SENSOR;
+	msg.instance = instance;
+	msg.parameter1 = sensor_id;
+	msg.parameter2 = i2c_channel;
+	msg.parameter3 = sensor_ext;
+	msg.parameter4 = 0;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_get_setfile_addr(struct fimc_is_interface *itf,
+		unsigned int instance, unsigned int *setfile_addr)
+{
+	int ret;
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_GET_SET_FILE_ADDR;
+	msg.instance = instance;
+	msg.parameter1 = 0;
+	msg.parameter2 = 0;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	ret = fimc_is_itf_set_cmd(itf, &msg);
+	*setfile_addr = itf->reply.parameter2;
+
+	return ret;
+}
+
+int fimc_is_itf_load_setfile(struct fimc_is_interface *itf,
+		unsigned int instance)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_LOAD_SET_FILE;
+	msg.instance = instance;
+	msg.parameter1 = 0;
+	msg.parameter2 = 0;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_stream_on(struct fimc_is_interface *itf,
+		unsigned int instance)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_STREAM_ON;
+	msg.instance = instance;
+	msg.parameter1 = 0;
+	msg.parameter2 = 0;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_stream_off(struct fimc_is_interface *itf,
+		unsigned int instance)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_STREAM_OFF;
+	msg.instance = instance;
+	msg.parameter1 = 0;
+	msg.parameter2 = 0;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_process_on(struct fimc_is_interface *itf,
+		unsigned int instance)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_PROCESS_START;
+	msg.instance = instance;
+	msg.parameter1 = 0;
+	msg.parameter2 = 0;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_process_off(struct fimc_is_interface *itf,
+		unsigned int instance)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_PROCESS_STOP;
+	msg.instance = instance;
+	msg.parameter1 = 0;
+	msg.parameter2 = 0;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_set_param(struct fimc_is_interface *itf,
+		unsigned int instance,
+		unsigned int indexes,
+		unsigned int lindex,
+		unsigned int hindex)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_SET_PARAMETER;
+	msg.instance = instance;
+	msg.parameter1 = ISS_PREVIEW_STILL;
+	msg.parameter2 = indexes;
+	msg.parameter3 = lindex;
+	msg.parameter4 = hindex;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_preview_still(struct fimc_is_interface *itf,
+		unsigned int instance)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_PREVIEW_STILL;
+	msg.instance = instance;
+	msg.parameter1 = 0;
+	msg.parameter2 = 0;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_get_capability(struct fimc_is_interface *itf,
+	unsigned int instance, unsigned int address)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_GET_STATIC_METADATA;
+	msg.instance = instance;
+	msg.parameter1 = address;
+	msg.parameter2 = 0;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_cfg_mem(struct fimc_is_interface *itf,
+		unsigned int instance, unsigned int address,
+		unsigned int size)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_SET_A5_MEM_ACCESS;
+	msg.instance = instance;
+	msg.parameter1 = address;
+	msg.parameter2 = size;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	return fimc_is_itf_set_cmd(itf, &msg);
+}
+
+int fimc_is_itf_shot_nblk(struct fimc_is_interface *itf,
+		unsigned int instance, unsigned int bayer,
+		unsigned int shot, unsigned int fcount, unsigned int rcount)
+{
+	struct fimc_is_msg msg;
+
+	msg.id = 0;
+	msg.command = HIC_SHOT;
+	msg.instance = instance;
+	msg.parameter1 = bayer;
+	msg.parameter2 = shot;
+	msg.parameter3 = fcount;
+	msg.parameter4 = rcount;
+
+	return fimc_is_itf_set_cmd_shot(itf, &msg);
+}
+
+int fimc_is_itf_power_down(struct fimc_is_interface *itf,
+		unsigned int instance)
+{
+	struct fimc_is_msg msg;
+	int ret;
+
+	msg.id = 0;
+	msg.command = HIC_POWER_DOWN;
+	msg.instance = instance;
+	msg.parameter1 = 0;
+	msg.parameter2 = 0;
+	msg.parameter3 = 0;
+	msg.parameter4 = 0;
+
+	ret = fimc_is_itf_set_cmd(itf, &msg);
+	itf_clr_state(itf, IS_IF_STATE_INIT);
+
+	return ret;
+}
+
+/* Debugfs for showing FW debug messages */
+static int fimc_is_log_show(struct seq_file *s, void *data)
+{
+	struct fimc_is_interface *itf = s->private;
+	struct fimc_is *is = fimc_interface_to_is(itf);
+
+	const u8 *buf = (u8 *) (is->minfo.fw_vaddr + DEBUG_OFFSET);
+
+	if (is->minfo.fw_vaddr == 0) {
+		pr_err("Firmware memory is not initialized\n");
+		return -EIO;
+	}
+
+	seq_printf(s, "%s\n", buf);
+	return 0;
+}
+
+static int fimc_is_debugfs_open(struct inode *inode, struct file *file)
+{
+	return single_open(file, fimc_is_log_show, inode->i_private);
+}
+
+static const struct file_operations fimc_is_debugfs_fops = {
+	.open		= fimc_is_debugfs_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= single_release,
+};
+
+static void fimc_is_debugfs_remove(struct fimc_is_interface *itf)
+{
+	debugfs_remove(itf->debugfs_entry);
+	itf->debugfs_entry = NULL;
+}
+
+static int fimc_is_debugfs_create(struct fimc_is_interface *itf)
+{
+	struct dentry *dentry;
+
+	itf->debugfs_entry = debugfs_create_dir("fimc_is", NULL);
+
+	dentry = debugfs_create_file("fw_log", S_IRUGO, itf->debugfs_entry,
+					itf, &fimc_is_debugfs_fops);
+	if (!dentry)
+		fimc_is_debugfs_remove(itf);
+
+	return itf->debugfs_entry == NULL ? -EIO : 0;
+}
+
+int fimc_is_interface_init(struct fimc_is_interface *itf,
+		void __iomem *regs, int irq)
+{
+	struct fimc_is *is = fimc_interface_to_is(itf);
+	struct device *dev = &is->pdev->dev;
+	int ret;
+
+	if (!regs || !irq) {
+		pr_err("Invalid args\n");
+		return -EINVAL;
+	}
+
+	itf->regs = regs;
+	itf->com_regs = (struct is_common_reg *)(regs + ISSR(0));
+
+	init_waitqueue_head(&itf->irq_queue);
+	spin_lock_init(&itf->slock_state);
+	spin_lock_init(&itf->slock);
+
+	/* Register interrupt handler */
+	ret = devm_request_irq(dev, irq, itf_irq_handler,
+			       0, dev_name(dev), itf);
+	if (ret) {
+		dev_err(dev, "Failed to install irq (%d)\n", ret);
+		return -EINVAL;
+	}
+
+	/* Initialize context vars */
+	itf->streaming = IS_IF_STREAMING_INIT;
+	itf->processing = IS_IF_PROCESSING_INIT;
+	itf->pdown_ready = IS_IF_POWER_DOWN_READY;
+	itf->debug_cnt = 0;
+	init_request_barrier(itf);
+
+	/* Debugfs for FW debug log */
+	fimc_is_debugfs_create(itf);
+
+	return 0;
+}
diff --git a/drivers/media/platform/exynos5-is/fimc-is-interface.h b/drivers/media/platform/exynos5-is/fimc-is-interface.h
new file mode 100644
index 0000000..08994f0
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-interface.h
@@ -0,0 +1,131 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ *  Arun Kumar K <arun.kk@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef FIMC_IS_INTERFACE_H_
+#define FIMC_IS_INTERFACE_H_
+
+#include "fimc-is-core.h"
+
+#define TRY_RECV_AWARE_COUNT    100
+
+#define ISDRV_VERSION		111
+
+#define LOWBIT_OF(num)  (num >= 32 ? 0 : (unsigned int)1<<num)
+#define HIGHBIT_OF(num) (num >= 32 ? (unsigned int)1<<(num-32) : 0)
+
+enum interrupt_map {
+	INTR_GENERAL            = 0,
+	INTR_ISP_FDONE          = 1,
+	INTR_SCC_FDONE          = 2,
+	INTR_DNR_FDONE          = 3,
+	INTR_SCP_FDONE          = 4,
+	/* 5 is ISP YUV DONE */
+	INTR_META_DONE          = 6,
+	INTR_SHOT_DONE          = 7,
+	INTR_MAX_MAP
+};
+
+enum fimc_is_interface_state {
+	IS_IF_STATE_INIT,
+	IS_IF_STATE_OPEN,
+	IS_IF_STATE_START,
+	IS_IF_STATE_BUSY
+};
+
+enum streaming_state {
+	IS_IF_STREAMING_INIT,
+	IS_IF_STREAMING_OFF,
+	IS_IF_STREAMING_ON
+};
+
+enum processing_state {
+	IS_IF_PROCESSING_INIT,
+	IS_IF_PROCESSING_OFF,
+	IS_IF_PROCESSING_ON
+};
+
+enum pdown_ready_state {
+	IS_IF_POWER_DOWN_READY,
+	IS_IF_POWER_DOWN_NREADY
+};
+
+struct fimc_is_msg {
+	unsigned int	id;
+	unsigned int	command;
+	unsigned int	instance;
+	unsigned int	parameter1;
+	unsigned int	parameter2;
+	unsigned int	parameter3;
+	unsigned int	parameter4;
+};
+
+struct fimc_is_interface {
+
+	unsigned long			state;
+
+	void __iomem			*regs;
+	struct is_common_reg __iomem    *com_regs;
+	spinlock_t			slock;
+	spinlock_t			slock_state;
+	wait_queue_head_t		irq_queue;
+
+	spinlock_t			process_barrier;
+	struct mutex			request_barrier;
+
+	enum streaming_state		streaming;
+	enum processing_state		processing;
+	enum pdown_ready_state		pdown_ready;
+
+	struct fimc_is_msg		reply;
+
+	int				debug_cnt;
+	struct dentry                   *debugfs_entry;
+
+};
+
+int fimc_is_interface_init(struct fimc_is_interface *itf,
+		void __iomem *regs, int irq);
+int fimc_is_itf_wait_init_state(struct fimc_is_interface *itf);
+int fimc_is_itf_hw_dump(struct fimc_is_interface *itf);
+int fimc_is_itf_open_sensor(struct fimc_is_interface *itf,
+		unsigned int instance,
+		unsigned int sensor_id,
+		unsigned int i2c_channel,
+		unsigned int sensor_ext);
+int fimc_is_itf_get_setfile_addr(struct fimc_is_interface *this,
+		unsigned int instance, unsigned int *setfile_addr);
+int fimc_is_itf_load_setfile(struct fimc_is_interface *itf,
+		unsigned int instance);
+int fimc_is_itf_stream_on(struct fimc_is_interface *itf,
+		unsigned int instance);
+int fimc_is_itf_stream_off(struct fimc_is_interface *itf,
+		unsigned int instance);
+int fimc_is_itf_process_on(struct fimc_is_interface *itf,
+		unsigned int instance);
+int fimc_is_itf_process_off(struct fimc_is_interface *itf,
+		unsigned int instance);
+int fimc_is_itf_set_param(struct fimc_is_interface *this,
+		unsigned int instance,
+		unsigned int indexes,
+		unsigned int lindex,
+		unsigned int hindex);
+int fimc_is_itf_preview_still(struct fimc_is_interface *itf,
+		unsigned int instance);
+int fimc_is_itf_get_capability(struct fimc_is_interface *itf,
+	unsigned int instance, unsigned int address);
+int fimc_is_itf_cfg_mem(struct fimc_is_interface *itf,
+		unsigned int instance, unsigned int address,
+		unsigned int size);
+int fimc_is_itf_shot_nblk(struct fimc_is_interface *itf,
+		unsigned int instance, unsigned int bayer,
+		unsigned int shot, unsigned int fcount, unsigned int rcount);
+int fimc_is_itf_power_down(struct fimc_is_interface *itf,
+		unsigned int instance);
+#endif
-- 
1.7.9.5

[RFC v2 10/10] exynos5-fimc-is: Adds the Kconfig and Makefile

[Arun Kumar K]

Modifies the exynos5-is Makefile and Kconfig to include the new
fimc-is driver.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
---
 drivers/media/platform/exynos5-is/Kconfig  |   12 ++++++++++++
 drivers/media/platform/exynos5-is/Makefile |    3 +++
 2 files changed, 15 insertions(+)

diff --git a/drivers/media/platform/exynos5-is/Kconfig b/drivers/media/platform/exynos5-is/Kconfig
index 7aacf3b..f8bd17c 100644
--- a/drivers/media/platform/exynos5-is/Kconfig
+++ b/drivers/media/platform/exynos5-is/Kconfig
@@ -5,3 +5,15 @@ config VIDEO_SAMSUNG_EXYNOS5_MDEV
 	  This is a v4l2 based media controller driver for
 	  Exynos5 SoC.
 
+if VIDEO_SAMSUNG_EXYNOS5_MDEV
+
+config VIDEO_SAMSUNG_EXYNOS5_FIMC_IS
+	tristate "Samsung Exynos5 SoC FIMC-IS driver"
+	depends on VIDEO_V4L2_SUBDEV_API
+	depends on VIDEO_SAMSUNG_EXYNOS5_MDEV
+	select VIDEOBUF2_DMA_CONTIG
+	help
+	  This is a V4L2 driver for Samsung Exynos5 SoC series Imaging
+	  Subsystem known as FIMC-IS.
+
+endif #VIDEO_SAMSUNG_EXYNOS5_MDEV
diff --git a/drivers/media/platform/exynos5-is/Makefile b/drivers/media/platform/exynos5-is/Makefile
index 472d8e1..e5003d0 100644
--- a/drivers/media/platform/exynos5-is/Makefile
+++ b/drivers/media/platform/exynos5-is/Makefile
@@ -1,4 +1,7 @@
 ccflags-y += -Idrivers/media/platform/s5p-fimc
+exynos5-fimc-is-objs := fimc-is-core.o fimc-is-isp.o fimc-is-scaler.o fimc-is-sensor.o
+exynos5-fimc-is-objs += fimc-is-pipeline.o fimc-is-interface.o
 exynos-mdevice-objs := exynos5-mdev.o
 
+obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS5_FIMC_IS) += exynos5-fimc-is.o
 obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS5_MDEV) += exynos-mdevice.o
-- 
1.7.9.5

Re: [RFC v2 02/10] exynos5-fimc-is: Adds fimc-is driver core files

[Sachin Kamat]

Hi Arun,

On 31 May 2013 18:33, Arun Kumar K <arun.kk@samsung.com> wrote:
> This driver is for the FIMC-IS IP available in Samsung Exynos5
> SoC onwards. This patch adds the core files for the new driver.
>
> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
> ---
[snip]

> +
> +static void fimc_is_clk_put(struct fimc_is *is)
> +{
> +       int i;
> +
> +       for (i = 0; i < IS_CLK_MAX_NUM; i++) {
> +               if (IS_ERR_OR_NULL(is->clock[i]))

You should not check for NULL here. Instead initialize the clocks to
some error value (like  "is->clock[i] =  ERR_PTR(-EINVAL);" )
and use IS_ERR only.

> +                       continue;
> +               clk_unprepare(is->clock[i]);
> +               clk_put(is->clock[i]);
> +               is->clock[i] = NULL;
> +       }
> +}
> +
> +static int fimc_is_clk_get(struct fimc_is *is)
> +{
> +       struct device *dev = &is->pdev->dev;
> +       int i, ret;
> +
> +       for (i = 0; i < IS_CLK_MAX_NUM; i++) {
> +               is->clock[i] = clk_get(dev, fimc_is_clock_name[i]);
> +               if (IS_ERR(is->clock[i]))
> +                       goto err;
> +               ret = clk_prepare(is->clock[i]);
> +               if (ret < 0) {
> +                       clk_put(is->clock[i]);
> +                       is->clock[i] = NULL;

is->clock[i] =  ERR_PTR(-EINVAL);

> +                       goto err;
> +               }
> +       }
> +       return 0;
> +err:
> +       fimc_is_clk_put(is);
> +       pr_err("Failed to get clock: %s\n", fimc_is_clock_name[i]);
> +       return -ENXIO;
> +}
> +
> +static int fimc_is_clk_cfg(struct fimc_is *is)
> +{
> +       int ret;
> +
> +       ret = fimc_is_clk_get(is);
> +       if (ret)
> +               return ret;
> +
> +       /* Set rates */
> +       ret = clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV0], 200 * 1000000);
> +       ret |= clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV1], 100 * 1000000);
> +       ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV0], 134 * 1000000);
> +       ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV1], 68 * 1000000);
> +       ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIVMPWM], 34 * 1000000);
> +
> +       if (ret)
> +               return -EINVAL;
> +
> +       return 0;
> +}
> +
> +static int fimc_is_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct resource res;
> +       struct fimc_is *is;
> +       struct pinctrl *pctrl;
> +       void __iomem *regs;
> +       struct device_node *node;
> +       int irq, ret;
> +
> +       pr_debug("FIMC-IS Probe Enter\n");
> +
> +       if (!pdev->dev.of_node)
> +               return -ENODEV;
> +
> +       is = devm_kzalloc(&pdev->dev, sizeof(*is), GFP_KERNEL);
> +       if (!is)
> +               return -ENOMEM;
> +
> +       is->pdev = pdev;
> +
> +       ret = of_address_to_resource(dev->of_node, 0, &res);
> +       if (ret < 0)
> +               return ret;
> +
> +       regs = devm_ioremap_resource(dev, &res);
> +       if (regs == NULL) {

Please use if(IS_ERR(regs))

> +               dev_err(dev, "Failed to obtain io memory\n");

This is not needed as devm_ioremap_resource prints the appropriate
error messages.

> +               return -ENOENT;

return PTR_ERR(regs);

Don't forget to include <linux/err.h> for using PTR_ERR() .

-- 
With warm regards,
Sachin

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Sachin Kamat]

On 31 May 2013 18:33, Arun Kumar K <arun.kk@samsung.com> wrote:
> fimc-is driver takes video data input from the ISP video node
> which is added in this patch. This node accepts Bayer input
> buffers which is given from the IS sensors.
>
> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
> ---
[snip]


> +static int isp_video_output_open(struct file *file)
> +{
> +       struct fimc_is_isp *isp = video_drvdata(file);
> +       int ret = 0;
> +
> +       /* Check if opened before */
> +       if (isp->refcount >= FIMC_IS_MAX_INSTANCES) {
> +               pr_err("All instances are in use.\n");
> +               return -EBUSY;
> +       }
> +
> +       INIT_LIST_HEAD(&isp->wait_queue);
> +       isp->wait_queue_cnt = 0;
> +       INIT_LIST_HEAD(&isp->run_queue);
> +       isp->run_queue_cnt = 0;
> +
> +       isp->refcount++;
> +       return ret;

You can directly return 0 here instead of creating a local variable
'ret' which is not used anywhere else.

> +}
> +
> +static int isp_video_output_close(struct file *file)
> +{
> +       struct fimc_is_isp *isp = video_drvdata(file);
> +       int ret = 0;
> +
> +       isp->refcount--;
> +       isp->output_state = 0;
> +       vb2_fop_release(file);
> +       return ret;

ditto

> +}
> +
> +static const struct v4l2_file_operations isp_video_output_fops = {
> +       .owner          = THIS_MODULE,
> +       .open           = isp_video_output_open,
> +       .release        = isp_video_output_close,
> +       .poll           = vb2_fop_poll,
> +       .unlocked_ioctl = video_ioctl2,
> +       .mmap           = vb2_fop_mmap,
> +};
> +

nit: Please consider changing "Adds" to "Add" in the patch titles of
this series during the next spin.

-- 
With warm regards,
Sachin

Re: [RFC v2 04/10] exynos5-fimc-is: Adds the register definition and context header

[Sachin Kamat]

On 31 May 2013 18:33, Arun Kumar K <arun.kk@samsung.com> wrote:
> This patch adds the register definition file for the fimc-is driver
> and also the header file containing the main context for the driver.
>
> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
> ---
>  drivers/media/platform/exynos5-is/fimc-is-regs.h |  107 +++++++++++++++
>  drivers/media/platform/exynos5-is/fimc-is.h      |  151 ++++++++++++++++++++++
>  2 files changed, 258 insertions(+)
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-regs.h
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is.h
>
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-regs.h b/drivers/media/platform/exynos5-is/fimc-is-regs.h
> new file mode 100644
> index 0000000..d00df7b
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-regs.h
> @@ -0,0 +1,107 @@
> +/*
> + * Samsung Exynos5 SoC series FIMC-IS driver
> + *
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd
> + * Arun Kumar K <arun.kk@samsung.com>
> + * Kil-yeon Lim <kilyeon.im@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef FIMC_IS_REGS_H
> +#define FIMC_IS_REGS_H
> +
> +#include <mach/map.h>

Why do you need this?


-- 
With warm regards,
Sachin

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Sachin Kamat]

On 31 May 2013 18:33, Arun Kumar K <arun.kk@samsung.com> wrote:
> FIMC-IS uses certain sensors which are exclusively controlled
> from the IS firmware. This patch adds the sensor subdev for the
> fimc-is sensors.
>
> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
> ---
>  drivers/media/platform/exynos5-is/fimc-is-sensor.c |  463 ++++++++++++++++++++
>  drivers/media/platform/exynos5-is/fimc-is-sensor.h |  168 +++++++
>  2 files changed, 631 insertions(+)
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.c
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.h
>
[snip]

> +static int sensor_s_stream(struct v4l2_subdev *sd, int enable)
> +{
> +       struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +       int ret;
> +
> +       if (enable) {
> +               pr_debug("Stream ON\n");
> +               /* Open pipeline */
> +               ret = fimc_is_pipeline_open(sensor->pipeline, sensor);
> +               if (ret < 0) {
> +                       pr_err("Pipeline already opened.\n");
> +                       return -EBUSY;

why not propogate 'ret'? Same for other instances below.

> +               }
> +
> +               /* Start IS pipeline */
> +               ret = fimc_is_pipeline_start(sensor->pipeline);
> +               if (ret < 0) {
> +                       pr_err("Pipeline start failed.\n");
> +                       return -EINVAL;
> +               }
> +       } else {
> +               pr_debug("Stream OFF\n");
> +               /* Stop IS pipeline */
> +               ret = fimc_is_pipeline_stop(sensor->pipeline);
> +               if (ret < 0) {
> +                       pr_err("Pipeline stop failed.\n");
> +                       return -EINVAL;
> +               }
> +
> +               /* Close pipeline */
> +               ret = fimc_is_pipeline_close(sensor->pipeline);
> +               if (ret < 0) {
> +                       pr_err("Pipeline close failed\n");
> +                       return -EBUSY;
> +               }
> +       }
> +
> +       return 0;
> +}
> +

[snip]

> +
> +static int fimc_is_sensor_probe(struct i2c_client *client,
> +                               const struct i2c_device_id *id)
> +{
> +       struct device *dev = &client->dev;
> +       struct fimc_is_sensor *sensor;
> +       const struct of_device_id *of_id;
> +       struct v4l2_subdev *sd;
> +       int gpio, ret;
> +       unsigned int sensor_id;
> +
> +       sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
> +       if (!sensor)
> +               return -ENOMEM;
> +
> +       sensor->gpio_reset = -EINVAL;
> +
> +       gpio = of_get_gpio_flags(dev->of_node, 0, NULL);
> +       if (gpio_is_valid(gpio)) {
> +               ret = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, DRIVER_NAME);
> +               if (ret < 0)
> +                       return ret;
> +       }
> +       pr_err("GPIO Request success : %d", gpio);
> +       sensor->gpio_reset = gpio;
> +
> +       of_id = of_match_node(fimc_is_sensor_of_match, dev->of_node);
> +       if (!of_id) {
> +               ret = -ENODEV;
> +               goto err_gpio;
> +       }
> +
> +       sensor->drvdata = (struct fimc_is_sensor_drv_data *) of_id->data;
> +       sensor->dev = dev;
> +
> +       /* Get FIMC-IS context */
> +       ret = sensor_parse_dt(sensor, dev->of_node);
> +       if (ret) {
> +               pr_err("Unable to obtain IS context\n");
> +               ret = -ENODEV;

Why not propagate 'ret' itself?


-- 
With warm regards,
Sachin

Re: [RFC v2 07/10] exynos5-fimc-is: Adds scaler subdev

[Sachin Kamat]

On 31 May 2013 18:33, Arun Kumar K <arun.kk@samsung.com> wrote:
> FIMC-IS has two hardware scalers named as scaler-codec and
> scaler-preview. This patch adds the common code handling the
> video nodes and subdevs of both the scalers.
>
> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
> ---

[snip]

> +static int scaler_video_capture_open(struct file *file)
> +{
> +       struct fimc_is_scaler *ctx = video_drvdata(file);
> +       int ret = 0;
> +
> +       /* Check if opened before */
> +       if (ctx->refcount >= FIMC_IS_MAX_INSTANCES) {
> +               pr_err("All instances are in use.\n");
> +               return -EBUSY;
> +       }
> +
> +       INIT_LIST_HEAD(&ctx->wait_queue);
> +       ctx->wait_queue_cnt = 0;
> +       INIT_LIST_HEAD(&ctx->run_queue);
> +       ctx->run_queue_cnt = 0;
> +
> +       ctx->fmt = NULL;
> +       ctx->refcount++;
> +
> +       return ret;

Directly return 0.

> +}
> +
> +static int scaler_video_capture_close(struct file *file)
> +{
> +       struct fimc_is_scaler *ctx = video_drvdata(file);
> +       int ret = 0;
> +
> +       ctx->refcount--;
> +       ctx->capture_state = 0;
> +       vb2_fop_release(file);
> +
> +       return ret;

ditto

-- 
With warm regards,
Sachin

Re: [RFC v2 02/10] exynos5-fimc-is: Adds fimc-is driver core files

[Arun Kumar K]

Hi Sachin,

Thank you for the review.
Will address your comments in next iteration.

Regards
Arun

On Thu, Jun 6, 2013 at 10:50 AM, Sachin Kamat <sachin.kamat@linaro.org> wrote:
> Hi Arun,
>
> On 31 May 2013 18:33, Arun Kumar K <arun.kk@samsung.com> wrote:
>> This driver is for the FIMC-IS IP available in Samsung Exynos5
>> SoC onwards. This patch adds the core files for the new driver.
>>
>> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
>> ---
> [snip]
>
>> +
>> +static void fimc_is_clk_put(struct fimc_is *is)
>> +{
>> +       int i;
>> +
>> +       for (i = 0; i < IS_CLK_MAX_NUM; i++) {
>> +               if (IS_ERR_OR_NULL(is->clock[i]))
>
> You should not check for NULL here. Instead initialize the clocks to
> some error value (like  "is->clock[i] =  ERR_PTR(-EINVAL);" )
> and use IS_ERR only.
>
>> +                       continue;
>> +               clk_unprepare(is->clock[i]);
>> +               clk_put(is->clock[i]);
>> +               is->clock[i] = NULL;
>> +       }
>> +}
>> +
>> +static int fimc_is_clk_get(struct fimc_is *is)
>> +{
>> +       struct device *dev = &is->pdev->dev;
>> +       int i, ret;
>> +
>> +       for (i = 0; i < IS_CLK_MAX_NUM; i++) {
>> +               is->clock[i] = clk_get(dev, fimc_is_clock_name[i]);
>> +               if (IS_ERR(is->clock[i]))
>> +                       goto err;
>> +               ret = clk_prepare(is->clock[i]);
>> +               if (ret < 0) {
>> +                       clk_put(is->clock[i]);
>> +                       is->clock[i] = NULL;
>
> is->clock[i] =  ERR_PTR(-EINVAL);
>
>> +                       goto err;
>> +               }
>> +       }
>> +       return 0;
>> +err:
>> +       fimc_is_clk_put(is);
>> +       pr_err("Failed to get clock: %s\n", fimc_is_clock_name[i]);
>> +       return -ENXIO;
>> +}
>> +
>> +static int fimc_is_clk_cfg(struct fimc_is *is)
>> +{
>> +       int ret;
>> +
>> +       ret = fimc_is_clk_get(is);
>> +       if (ret)
>> +               return ret;
>> +
>> +       /* Set rates */
>> +       ret = clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV0], 200 * 1000000);
>> +       ret |= clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV1], 100 * 1000000);
>> +       ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV0], 134 * 1000000);
>> +       ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV1], 68 * 1000000);
>> +       ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIVMPWM], 34 * 1000000);
>> +
>> +       if (ret)
>> +               return -EINVAL;
>> +
>> +       return 0;
>> +}
>> +
>> +static int fimc_is_probe(struct platform_device *pdev)
>> +{
>> +       struct device *dev = &pdev->dev;
>> +       struct resource res;
>> +       struct fimc_is *is;
>> +       struct pinctrl *pctrl;
>> +       void __iomem *regs;
>> +       struct device_node *node;
>> +       int irq, ret;
>> +
>> +       pr_debug("FIMC-IS Probe Enter\n");
>> +
>> +       if (!pdev->dev.of_node)
>> +               return -ENODEV;
>> +
>> +       is = devm_kzalloc(&pdev->dev, sizeof(*is), GFP_KERNEL);
>> +       if (!is)
>> +               return -ENOMEM;
>> +
>> +       is->pdev = pdev;
>> +
>> +       ret = of_address_to_resource(dev->of_node, 0, &res);
>> +       if (ret < 0)
>> +               return ret;
>> +
>> +       regs = devm_ioremap_resource(dev, &res);
>> +       if (regs == NULL) {
>
> Please use if(IS_ERR(regs))
>
>> +               dev_err(dev, "Failed to obtain io memory\n");
>
> This is not needed as devm_ioremap_resource prints the appropriate
> error messages.
>
>> +               return -ENOENT;
>
> return PTR_ERR(regs);
>
> Don't forget to include <linux/err.h> for using PTR_ERR() .
>
> --
> With warm regards,
> Sachin

Re: [RFC v2 04/10] exynos5-fimc-is: Adds the register definition and context header

[Arun Kumar K]

Hi Sachin,

Its a leftover from old PMU register access which is now modified
to be DT based. Will remove it.

Thanks & Regards
Arun

On Thu, Jun 6, 2013 at 11:54 AM, Sachin Kamat <sachin.kamat@linaro.org> wrote:
> On 31 May 2013 18:33, Arun Kumar K <arun.kk@samsung.com> wrote:
>> This patch adds the register definition file for the fimc-is driver
>> and also the header file containing the main context for the driver.
>>
>> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
>> ---
>>  drivers/media/platform/exynos5-is/fimc-is-regs.h |  107 +++++++++++++++
>>  drivers/media/platform/exynos5-is/fimc-is.h      |  151 ++++++++++++++++++++++
>>  2 files changed, 258 insertions(+)
>>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-regs.h
>>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is.h
>>
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-regs.h b/drivers/media/platform/exynos5-is/fimc-is-regs.h
>> new file mode 100644
>> index 0000000..d00df7b
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-regs.h
>> @@ -0,0 +1,107 @@
>> +/*
>> + * Samsung Exynos5 SoC series FIMC-IS driver
>> + *
>> + * Copyright (c) 2013 Samsung Electronics Co., Ltd
>> + * Arun Kumar K <arun.kk@samsung.com>
>> + * Kil-yeon Lim <kilyeon.im@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#ifndef FIMC_IS_REGS_H
>> +#define FIMC_IS_REGS_H
>> +
>> +#include <mach/map.h>
>
> Why do you need this?
>
>
> --
> With warm regards,
> Sachin

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Arun Kumar K]

Hi Sachin,

>> +       isp->refcount++;
>> +       return ret;
>
> You can directly return 0 here instead of creating a local variable
> 'ret' which is not used anywhere else.

Ok.

>> +
>
> nit: Please consider changing "Adds" to "Add" in the patch titles of
> this series during the next spin.
>

Ok will change like that.

Regards
Arun

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Arun Kumar K]

Hi Sachin,

>> +               if (ret < 0) {
>> +                       pr_err("Pipeline already opened.\n");
>> +                       return -EBUSY;
>
> why not propogate 'ret'? Same for other instances below.
>

Yes it can be done. Will change it.

Regards
Arun

Re: [RFC v2 01/10] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation

[Sylwester Nawrocki]

Hi Arun,

On 05/31/2013 03:03 PM, Arun Kumar K wrote:

Please add at least one sentence here. All in all this patch
adds DT binding documentation for a fairly complex subsystem.

And please Cc devicetree-discuss@lists.ozlabs.org next time.

> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
> ---
>   .../devicetree/bindings/media/exynos5-fimc-is.txt  |   41 ++++++++++++++++++++
>   1 file changed, 41 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>
> diff --git a/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
> new file mode 100644
> index 0000000..9fd4646
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
> @@ -0,0 +1,41 @@
> +Samsung EXYNOS SoC Camera Subsystem

Shouldn't it be, e.g.:

Samsung EXYNOS5 SoC series Imaging Subsystem (FIMC-IS)

Or do you intend this file to be describing also the other sub-devices,
like GScaler ?

> +-----------------------------------
> +
> +The camera subsystem on Samsung Exynos5 SoC has some changes relative
> +to previous SoC versions. Exynos5 has almost similar MIPI-CSIS and
> +FIMC-LITE IPs but has a much improved version of FIMC-IS which can
> +handle sensor controls and camera post-processing operations. The
> +Exynos5 FIMC-IS has a dedicated ARM Cortex A5 processor, many
> +post-processing blocks (ISP, DRC, FD, ODC, DIS, 3DNR) and two
> +dedicated scalers (SCC and SCP).
> +
> +fimc-is node
> +------------
> +
> +Required properties:
> +
> +- compatible        : must be "samsung,exynos5250-fimc-is"
> +- reg               : physical base address and size of the memory mapped
> +                      registers
> +- interrupt-parent  : Parent interrupt controller
> +- interrupts        : fimc-is interrupt to the parent combiner
> +- clocks            : list of clock specifiers, corresponding to entries in
> +                      clock-names property;
> +- clock-names       : must contain "isp", "mcu_isp", "isp_div0", "isp_div1",
> +                      "isp_divmpwm", "mcu_isp_div0", "mcu_isp_div1" entries,
> +                      matching entries in the clocks property.
> +
> +
> +Board specific properties:
> +
> +- pinctrl-names    : pinctrl names for camera port pinmux control, at least
> +		     "default" needs to be specified.
> +- pinctrl-0...N	   : pinctrl properties corresponding to pinctrl-names

What pins exactly are supposed to be covered by these properties ? For what
devices ? Aren't the camera port pins supposed to be specified at the common
'camera' node ? I believe the camera ports are not specific to the FIMC-IS.

> +pmu subnode
> +-----------
> +
> +Required properties:
> + - reg : should contain PMU physical base address and size of the memory
> +         mapped registers.

What about other devices, like ISP I2C, SPI ? Don't you want to list at 
least
the ones currently used (I2C bus controllers) ?

Regards,
Sylwester

Re: [RFC v2 02/10] exynos5-fimc-is: Adds fimc-is driver core files

[Sylwester Nawrocki]

On 05/31/2013 03:03 PM, Arun Kumar K wrote:
> This driver is for the FIMC-IS IP available in Samsung Exynos5
> SoC onwards. This patch adds the core files for the new driver.
>
> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
> ---
>   drivers/media/platform/exynos5-is/fimc-is-core.c |  304 ++++++++++++++++++++++
>   drivers/media/platform/exynos5-is/fimc-is-core.h |  126 +++++++++
>   2 files changed, 430 insertions(+)
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.c
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.h
>
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-core.c b/drivers/media/platform/exynos5-is/fimc-is-core.c
> new file mode 100644
> index 0000000..d24b634
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-core.c
> @@ -0,0 +1,304 @@
> +/*
> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
> +*
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + * Arun Kumar K<arun.kk@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include<linux/bug.h>
> +#include<linux/ctype.h>
> +#include<linux/device.h>
> +#include<linux/debugfs.h>
> +#include<linux/delay.h>
> +#include<linux/errno.h>
> +#include<linux/firmware.h>
> +#include<linux/fs.h>
> +#include<linux/gpio.h>
> +#include<linux/interrupt.h>
> +#include<linux/kernel.h>
> +#include<linux/list.h>
> +#include<linux/module.h>
> +#include<linux/types.h>
> +#include<linux/platform_device.h>
> +#include<linux/pm_runtime.h>
> +#include<linux/slab.h>
> +#include<linux/videodev2.h>
> +#include<linux/of.h>
> +#include<linux/of_gpio.h>
> +#include<linux/of_address.h>
> +#include<linux/of_platform.h>
> +#include<linux/of_irq.h>
> +#include<linux/pinctrl/consumer.h>
> +
> +#include<media/v4l2-device.h>
> +#include<media/v4l2-ioctl.h>
> +#include<media/v4l2-mem2mem.h>
> +#include<media/v4l2-of.h>
> +#include<media/videobuf2-core.h>
> +#include<media/videobuf2-dma-contig.h>
> +
> +#include "fimc-is.h"
> +
> +static char *fimc_is_clock_name[] = {
> +	[IS_CLK_ISP]		= "isp",
> +	[IS_CLK_MCU_ISP]	= "mcu_isp",
> +	[IS_CLK_ISP_DIV0]	= "isp_div0",
> +	[IS_CLK_ISP_DIV1]	= "isp_div1",
> +	[IS_CLK_ISP_DIVMPWM]	= "isp_divmpwm",
> +	[IS_CLK_MCU_ISP_DIV0]	= "mcu_isp_div0",
> +	[IS_CLK_MCU_ISP_DIV1]	= "mcu_isp_div1",
> +};
> +
> +static void fimc_is_clk_put(struct fimc_is *is)

nit: fimc_is_put_clocks() would be probably a better name for this function.

> +{
> +	int i;
> +
> +	for (i = 0; i<  IS_CLK_MAX_NUM; i++) {
> +		if (IS_ERR_OR_NULL(is->clock[i]))
> +			continue;
> +		clk_unprepare(is->clock[i]);
> +		clk_put(is->clock[i]);
> +		is->clock[i] = NULL;
> +	}
> +}
> +
> +static int fimc_is_clk_get(struct fimc_is *is)

nit: fimc_is_get_clocks() ?

> +{
> +	struct device *dev =&is->pdev->dev;
> +	int i, ret;
> +
> +	for (i = 0; i<  IS_CLK_MAX_NUM; i++) {
> +		is->clock[i] = clk_get(dev, fimc_is_clock_name[i]);
> +		if (IS_ERR(is->clock[i]))
> +			goto err;
> +		ret = clk_prepare(is->clock[i]);
> +		if (ret<  0) {
> +			clk_put(is->clock[i]);
> +			is->clock[i] = NULL;
> +			goto err;
> +		}
> +	}
> +	return 0;
> +err:
> +	fimc_is_clk_put(is);
> +	pr_err("Failed to get clock: %s\n", fimc_is_clock_name[i]);
> +	return -ENXIO;
> +}
> +
> +static int fimc_is_clk_cfg(struct fimc_is *is)

nit: fimc_is_configure_clocks() ?

> +{
> +	int ret;
> +
> +	ret = fimc_is_clk_get(is);
> +	if (ret)
> +		return ret;
> +
> +	/* Set rates */
> +	ret = clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV0], 200 * 1000000);
> +	ret |= clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV1], 100 * 1000000);
> +	ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV0], 134 * 1000000);
> +	ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV1], 68 * 1000000);
> +	ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIVMPWM], 34 * 1000000);

Please do not obfuscate return value like this.

	ret = clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV0], 200 * 1000000);
	if (ret)
		ret = clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV1], 100 * 1000000);
	...

And how about adding macro definitions for the frequencies, rather
than using magic numbers in the code ?

> +	if (ret)
> +		return -EINVAL;
> +
> +	return 0;
> +}
> +
> +static int fimc_is_probe(struct platform_device *pdev)
> +{
> +	struct device *dev =&pdev->dev;
> +	struct resource res;
> +	struct fimc_is *is;
> +	struct pinctrl *pctrl;
> +	void __iomem *regs;
> +	struct device_node *node;
> +	int irq, ret;
> +
> +	pr_debug("FIMC-IS Probe Enter\n");
> +
> +	if (!pdev->dev.of_node)
> +		return -ENODEV;
> +
> +	is = devm_kzalloc(&pdev->dev, sizeof(*is), GFP_KERNEL);
> +	if (!is)
> +		return -ENOMEM;
> +
> +	is->pdev = pdev;

> +	ret = of_address_to_resource(dev->of_node, 0,&res);
> +	if (ret<  0)
> +		return ret;

It could be simplified to:
	
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

and 'res' could be passed to devm_ioremap_resource() without any checks.

> +	regs = devm_ioremap_resource(dev,&res);
> +	if (regs == NULL) {
> +		dev_err(dev, "Failed to obtain io memory\n");
> +		return -ENOENT;
> +	}
> +
> +	/* Get the PMU base */
> +	node = of_get_child_by_name(dev->of_node, "pmu");
> +	if (!node)
> +		return -ENODEV;
> +	is->pmu_regs = of_iomap(node, 0);
> +	if (!is->pmu_regs)
> +		return -ENOMEM;
> +
> +	irq = irq_of_parse_and_map(dev->of_node, 0);
> +	if (irq<  0) {
> +		dev_err(dev, "Failed to get IRQ\n");
> +		return irq;
> +	}
> +
> +	ret = fimc_is_clk_cfg(is);
> +	if (ret<  0) {
> +		dev_err(dev, "Clock config failed\n");
> +		goto err_clk;
> +	}
> +
> +	platform_set_drvdata(pdev, is);
> +	pm_runtime_enable(dev);
> +
> +	ret = pm_runtime_get_sync(dev);
> +	if (ret<  0)
> +		goto err_clk;
> +
> +	is->alloc_ctx = vb2_dma_contig_init_ctx(dev);
> +	if (IS_ERR(is->alloc_ctx)) {
> +		ret = PTR_ERR(is->alloc_ctx);
> +		goto err_pm;
> +	}
> +
> +	/* Init FIMC Pipeline */

s/Init/Initialize ?

> +	ret = fimc_is_pipeline_init(&is->pipeline, 0, is);
> +	if (ret<  0)
> +		goto err_sd;
> +
> +	/* Init FIMC Interface */

s/Init/ Initialize

> +	ret = fimc_is_interface_init(&is->interface, regs, irq);
> +	if (ret<  0)
> +		goto err_sd;
> +
> +	pm_runtime_put(dev);
> +
> +	dev_dbg(dev, "FIMC-IS registered successfully\n");
> +
> +	return 0;
> +
> +err_sd:
> +	fimc_is_pipeline_destroy(&is->pipeline);
> +err_vb:
> +	vb2_dma_contig_cleanup_ctx(is->alloc_ctx);
> +err_pm:
> +	pm_runtime_put(dev);
> +err_clk:
> +	fimc_is_clk_put(is);
> +
> +	return ret;
> +}
> +
> +int fimc_is_clk_enable(struct fimc_is *is)
> +{
> +	int ret;
> +
> +	ret = clk_enable(is->clock[IS_CLK_ISP]);
> +	ret |= clk_enable(is->clock[IS_CLK_MCU_ISP]);

Please don't obfuscate the return value.

> +	return ret;
> +}
> +
> +void fimc_is_clk_disable(struct fimc_is *is)
> +{
> +	clk_disable(is->clock[IS_CLK_ISP]);
> +	clk_disable(is->clock[IS_CLK_MCU_ISP]);
> +}
> +
> +static int fimc_is_pm_resume(struct device *dev)
> +{
> +	struct fimc_is *is = dev_get_drvdata(dev);
> +	int ret;
> +
> +	ret = fimc_is_clk_enable(is);
> +	if (ret<  0)
> +		dev_err(dev, "Could not enable clocks\n");
> +
> +	return 0;
> +}
> +
> +static int fimc_is_pm_suspend(struct device *dev)
> +{
> +	struct fimc_is *is = dev_get_drvdata(dev);
> +
> +	fimc_is_clk_disable(is);
> +	return 0;
> +}
> +
> +static int fimc_is_runtime_resume(struct device *dev)
> +{
> +	return fimc_is_pm_resume(dev);
> +}
> +
> +static int fimc_is_runtime_suspend(struct device *dev)
> +{
> +	return fimc_is_pm_suspend(dev);
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int fimc_is_resume(struct device *dev)
> +{
> +	return fimc_is_pm_resume(dev);
> +}
> +
> +static int fimc_is_suspend(struct device *dev)
> +{
> +	return fimc_is_pm_suspend(dev);
> +}
> +#endif /* CONFIG_PM_SLEEP */
> +
> +static int fimc_is_remove(struct platform_device *pdev)
> +{
> +	struct fimc_is *is = platform_get_drvdata(pdev);
> +	struct device *dev =&pdev->dev;
> +
> +	pm_runtime_disable(dev);
> +	pm_runtime_set_suspended(dev);
> +	fimc_is_pipeline_destroy(&is->pipeline);
> +	vb2_dma_contig_cleanup_ctx(is->alloc_ctx);
> +	fimc_is_clk_put(is);
> +
> +	return 0;
> +}
> +
> +static const struct dev_pm_ops fimc_is_pm_ops = {
> +	SET_SYSTEM_SLEEP_PM_OPS(fimc_is_suspend, fimc_is_resume)
> +	SET_RUNTIME_PM_OPS(fimc_is_runtime_suspend, fimc_is_runtime_resume,
> +			   NULL)
> +};
> +
> +static const struct of_device_id exynos5_fimc_is_match[] = {
> +	{
> +		.compatible = "samsung,exynos5250-fimc-is",
> +	},
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, exynos5_fimc_is_match);
> +
> +static struct platform_driver fimc_is_driver = {
> +	.probe		= fimc_is_probe,
> +	.remove		= fimc_is_remove,
> +	.driver = {
> +		.name	= FIMC_IS_DRV_NAME,
> +		.owner	= THIS_MODULE,
> +		.pm	=&fimc_is_pm_ops,
> +		.of_match_table = exynos5_fimc_is_match,
> +	}
> +};
> +module_platform_driver(fimc_is_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("Arun Kumar K<arun.kk@samsung.com>");
> +MODULE_DESCRIPTION("Samsung Exynos5 (FIMC-IS) Imaging Subsystem driver");
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-core.h b/drivers/media/platform/exynos5-is/fimc-is-core.h
> new file mode 100644
> index 0000000..0512280
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-core.h
> @@ -0,0 +1,126 @@
> +/*
> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + *  Arun Kumar K<arun.kk@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef FIMC_IS_CORE_H_
> +#define FIMC_IS_CORE_H_
> +
> +#include<linux/bug.h>
> +#include<linux/clk.h>
> +#include<linux/device.h>
> +#include<linux/errno.h>
> +#include<linux/firmware.h>
> +#include<linux/interrupt.h>
> +#include<linux/kernel.h>
> +#include<linux/list.h>
> +#include<linux/module.h>
> +#include<linux/types.h>
> +#include<linux/platform_device.h>
> +#include<linux/pm_runtime.h>
> +#include<linux/slab.h>
> +#include<linux/videodev2.h>
> +
> +#include<asm/barrier.h>
> +#include<linux/sizes.h>
> +#include<linux/io.h>
> +#include<linux/irqreturn.h>
> +#include<linux/platform_device.h>
> +#include<linux/sched.h>
> +#include<linux/spinlock.h>
> +
> +#include<media/media-entity.h>
> +#include<media/videobuf2-core.h>
> +#include<media/v4l2-ctrls.h>
> +#include<media/v4l2-device.h>
> +#include<media/v4l2-mem2mem.h>
> +#include<media/v4l2-mediabus.h>
> +#include<media/s5p_fimc.h>
> +
> +#define FIMC_IS_DRV_NAME		"exynos5-fimc-is"
> +#define FIMC_IS_CLK_NAME		"fimc_is"

Unused symbol, please remove.

> +#define FIMC_IS_DEBUG_MSG		0x3f
> +#define FIMC_IS_DEBUG_LEVEL		3

These 2 are unused too.

> +#define FIMC_IS_COMMAND_TIMEOUT		(3*HZ)
> +#define FIMC_IS_STARTUP_TIMEOUT		(3*HZ)
> +#define FIMC_IS_SHUTDOWN_TIMEOUT	(10*HZ)

Please add spaces around '*'. It also applies to other places in most
of the patches.

> +
> +#define FW_SHARED_OFFSET		(0x8C0000)

> +#define DEBUG_CNT			(500*1024)
> +#define DEBUG_OFFSET			(0x840000)
> +#define DEBUGCTL_OFFSET			(0x8BD000)
> +#define DEBUG_FCOUNT			(0x8C64C0)

Please put all hex numbers in lower case.

> +#define FIMC_IS_MAX_INSTANCES		1
> +
> +#define FIMC_IS_MAX_GPIOS		32
> +#define FIMC_IS_NUM_SENSORS		2
> +
> +#define FIMC_IS_MAX_PLANES		3
> +#define FIMC_IS_NUM_SCALERS		2
> +
> +enum fimc_is_clks {
> +	IS_CLK_ISP,
> +	IS_CLK_MCU_ISP,
> +	IS_CLK_ISP_DIV0,
> +	IS_CLK_ISP_DIV1,
> +	IS_CLK_ISP_DIVMPWM,
> +	IS_CLK_MCU_ISP_DIV0,
> +	IS_CLK_MCU_ISP_DIV1,
> +	IS_CLK_MAX_NUM
> +};
> +
> +/* Video capture states */
> +enum fimc_is_video_state {
> +	STATE_INIT,
> +	STATE_BUFS_ALLOCATED,
> +	STATE_RUNNING,
> +};
> +
> +enum fimc_is_scaler_id {
> +	SCALER_SCC,
> +	SCALER_SCP
> +};
> +
> +enum fimc_is_sensor_pos {
> +	SENSOR_CAM0,
> +	SENSOR_CAM1
> +};
> +
> +struct fimc_is_buf {
> +	struct list_head list;
> +	struct vb2_buffer *vb;
> +	unsigned int paddr[FIMC_IS_MAX_PLANES];
> +};
> +
> +struct fimc_is_meminfo {
> +	unsigned int fw_paddr;
> +	unsigned int fw_vaddr;
> +	unsigned int region_paddr;
> +	unsigned int region_vaddr;
> +	unsigned int shared_paddr;
> +	unsigned int shared_vaddr;
> +};
> +
> +/**
> + * struct fimc_is_fmt - the driver's internal color format data
> + * @name: format description
> + * @fourcc: the fourcc code for this format
> + * @depth: number of bytes per pixel
> + * @num_planes: number of planes for this color format
> + */
> +struct fimc_is_fmt {
> +	char		*name;
> +	unsigned int	fourcc;
> +	unsigned int	depth[FIMC_IS_MAX_PLANES];
> +	unsigned int	num_planes;
> +};
> +
> +#endif

Regards,
Sylwester

Re: [RFC v2 03/10] exynos5-fimc-is: Adds common driver header files

[Sylwester Nawrocki]

On 05/31/2013 03:03 PM, Arun Kumar K wrote:
> This patch adds all the common header files used by the fimc-is
> driver. It includes the commands for interfacing with the firmware
> and error codes from IS firmware, metadata and command parameter
> definitions.
>
> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
> ---
>   drivers/media/platform/exynos5-is/fimc-is-cmd.h    |  201 ++++
>   drivers/media/platform/exynos5-is/fimc-is-err.h    |  261 ++++
>   .../media/platform/exynos5-is/fimc-is-metadata.h   |  771 ++++++++++++
>   drivers/media/platform/exynos5-is/fimc-is-param.h  | 1259 ++++++++++++++++++++
>   4 files changed, 2492 insertions(+)
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-cmd.h
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-err.h
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-metadata.h
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-param.h
>
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-cmd.h b/drivers/media/platform/exynos5-is/fimc-is-cmd.h
> new file mode 100644
> index 0000000..4adf832
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-cmd.h
> @@ -0,0 +1,201 @@
> +/*
> + * Samsung Exynos5 SoC series FIMC-IS driver
> + *
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd
> + * Kil-yeon Lim<kilyeon.im@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef FIMC_IS_CMD_H
> +#define FIMC_IS_CMD_H
> +
> +#define IS_COMMAND_VER 122 /* IS COMMAND VERSION 1.22 */
> +
> +enum is_cmd {
> +	/* HOST ->  IS */
> +	HIC_PREVIEW_STILL = 0x1,
> +	HIC_PREVIEW_VIDEO,
> +	HIC_CAPTURE_STILL,
> +	HIC_CAPTURE_VIDEO,
> +	HIC_PROCESS_START,
> +	HIC_PROCESS_STOP,
> +	HIC_STREAM_ON,
> +	HIC_STREAM_OFF,
> +	HIC_SHOT,
> +	HIC_GET_STATIC_METADATA,
> +	HIC_SET_CAM_CONTROL,
> +	HIC_GET_CAM_CONTROL,
> +	HIC_SET_PARAMETER,
> +	HIC_GET_PARAMETER,
> +	HIC_SET_A5_MEM_ACCESS,
> +	RESERVED2,
> +	HIC_GET_STATUS,
> +	/* SENSOR PART*/
> +	HIC_OPEN_SENSOR,
> +	HIC_CLOSE_SENSOR,
> +	HIC_SIMMIAN_INIT,
> +	HIC_SIMMIAN_WRITE,
> +	HIC_SIMMIAN_READ,
> +	HIC_POWER_DOWN,
> +	HIC_GET_SET_FILE_ADDR,
> +	HIC_LOAD_SET_FILE,
> +	HIC_MSG_CONFIG,
> +	HIC_MSG_TEST,
> +	/* IS ->  HOST */
> +	IHC_GET_SENSOR_NUMBER = 0x1000,
> +	/* Parameter1 : Address of space to copy a setfile */
> +	/* Parameter2 : Space szie */
> +	IHC_SET_SHOT_MARK,
> +	/* PARAM1 : a frame number */
> +	/* PARAM2 : confidence level(smile 0~100) */
> +	/* PARMA3 : confidence level(blink 0~100) */
> +	IHC_SET_FACE_MARK,
> +	/* PARAM1 : coordinate count */
> +	/* PARAM2 : coordinate buffer address */
> +	IHC_FRAME_DONE,
> +	/* PARAM1 : frame start number */
> +	/* PARAM2 : frame count */
> +	IHC_AA_DONE,
> +	IHC_NOT_READY,
> +	IHC_FLASH_READY
> +};
> +
> +enum is_reply {
> +	ISR_DONE	= 0x2000,
> +	ISR_NDONE
> +};
> +
> +enum is_scenario_id {
> +	ISS_PREVIEW_STILL,
> +	ISS_PREVIEW_VIDEO,
> +	ISS_CAPTURE_STILL,
> +	ISS_CAPTURE_VIDEO,
> +	ISS_END
> +};
> +
> +enum is_subscenario_id {
> +	ISS_SUB_SCENARIO_STILL,
> +	ISS_SUB_SCENARIO_VIDEO,
> +	ISS_SUB_SCENARIO_SCENE1,
> +	ISS_SUB_SCENARIO_SCENE2,
> +	ISS_SUB_SCENARIO_SCENE3,
> +	ISS_SUB_END
> +};
> +
> +struct is_setfile_header_element {
> +	u32 binary_addr;
> +	u32 binary_size;
> +};
> +
> +struct is_setfile_header {
> +	struct is_setfile_header_element isp[ISS_END];
> +	struct is_setfile_header_element drc[ISS_END];
> +	struct is_setfile_header_element fd[ISS_END];
> +};
> +
> +struct is_common_reg {
> +	u32 hicmd;
> +	u32 hic_sensorid;
> +	u32 hic_param1;
> +	u32 hic_param2;
> +	u32 hic_param3;
> +	u32 hic_param4;

How about replacing the above 4 fields with

	u32 hic_param[4];

?
> +	u32 reserved1[3];
> +
> +	u32 ihcmd_iflag;
> +	u32 ihcmd;
> +	u32 ihc_sensorid;
> +	u32 ihc_param1;
> +	u32 ihc_param2;
> +	u32 ihc_param3;
> +	u32 ihc_param4;

Similarly,

	u32 ihc_param[4];

and for other groups of fields below ?

> +
> +	u32 reserved2[3];
> +
> +	u32 isp_bayer_iflag;
> +	u32 isp_bayer_sensor_id;
> +	u32 isp_bayer_param1;
> +	u32 isp_bayer_param2;
> +
> +	u32 reserved3[4];
> +
> +	u32 scc_iflag;
> +	u32 scc_sensor_id;
> +	u32 scc_param1;
> +	u32 scc_param2;
> +	u32 scc_param3;
> +
> +	u32 reserved4[3];
> +
> +	u32 dnr_iflag;
> +	u32 dnr_sensor_id;
> +	u32 dnr_param1;
> +	u32 dnr_param2;
> +
> +	u32 reserved5[4];
> +
> +	u32 scp_iflag;
> +	u32 scp_sensor_id;
> +	u32 scp_param1;
> +	u32 scp_param2;
> +	u32 scp_param3;
> +
> +	u32 reserved6[1];
> +
> +	u32 isp_yuv_iflag;
> +	u32 isp_yuv_sensor_id;
> +	u32 isp_yuv_param1;
> +	u32 isp_yuv_param2;
> +
> +	u32 reserved7[1];
> +
> +	u32 shot_iflag;
> +	u32 shot_sensor_id;
> +	u32 shot_param1;
> +	u32 shot_param2;
> +
> +	u32 reserved8[1];
> +
> +	u32 meta_iflag;
> +	u32 meta_sensor_id;
> +	u32 meta_param1;
> +
> +	u32 reserved9[1];
> +
> +	u32 fcount;
> +};
> +
> +struct is_mcuctl_reg {
> +	u32 mcuctl;
> +	u32 bboar;
> +
> +	u32 intgr0;
> +	u32 intcr0;
> +	u32 intmr0;
> +	u32 intsr0;
> +	u32 intmsr0;
> +
> +	u32 intgr1;
> +	u32 intcr1;
> +	u32 intmr1;
> +	u32 intsr1;
> +	u32 intmsr1;
> +
> +	u32 intcr2;
> +	u32 intmr2;
> +	u32 intsr2;
> +	u32 intmsr2;
> +
> +	u32 gpoctrl;
> +	u32 cpoenctlr;
> +	u32 gpictlr;
> +
> +	u32 pad[0xD];
> +
> +	struct is_common_reg common_reg;
> +};
> +#endif
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-err.h b/drivers/media/platform/exynos5-is/fimc-is-err.h
> new file mode 100644
> index 0000000..49d7cf5
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-err.h
> @@ -0,0 +1,261 @@
> +/*
> + * Samsung Exynos5 SoC series FIMC-IS driver
> + *
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd
> + * Arun Kumar K<arun.kk@samsung.com>
> + * Kil-yeon Lim<kilyeon.im@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef FIMC_IS_ERR_H
> +#define FIMC_IS_ERR_H
> +
> +#define IS_ERROR_VER 012 /* IS ERROR VERSION 0.07 */
> +
> +/* IS error enum */
> +enum is_error {
> +
> +	IS_ERROR_SUCCESS = 0,
> +
> +	/* General 1 ~ 100 */
> +	IS_ERROR_INVALID_COMMAND = 1,
> +	IS_ERROR_REQUEST_FAIL,
> +	IS_ERROR_INVALID_SCENARIO,
> +	IS_ERROR_INVALID_SENSORID,
> +	IS_ERROR_INVALID_MODE_CHANGE,
> +	IS_ERROR_INVALID_MAGIC_NUMBER,
> +	IS_ERROR_INVALID_SETFILE_HDR,
> +	IS_ERROR_ISP_SETFILE_VERSION_MISMATCH,
> +	IS_ERROR_ISP_SETFILE_REVISION_MISMATCH,
> +	IS_ERROR_BUSY,
> +	IS_ERROR_SET_PARAMETER,
> +	IS_ERROR_INVALID_PATH,
> +	IS_ERROR_OPEN_SENSOR_FAIL,
> +	IS_ERROR_ENTRY_MSG_THREAD_DOWN,
> +	IS_ERROR_ISP_FRAME_END_NOT_DONE,
> +	IS_ERROR_DRC_FRAME_END_NOT_DONE,
> +	IS_ERROR_SCALERC_FRAME_END_NOT_DONE,
> +	IS_ERROR_ODC_FRAME_END_NOT_DONE,
> +	IS_ERROR_DIS_FRAME_END_NOT_DONE,
> +	IS_ERROR_TDNR_FRAME_END_NOT_DONE,
> +	IS_ERROR_SCALERP_FRAME_END_NOT_DONE,
> +	IS_ERROR_WAIT_STREAM_OFF_NOT_DONE,
> +	IS_ERROR_NO_MSG_IS_RECEIVED,
> +	IS_ERROR_SENSOR_MSG_FAIL,
> +	IS_ERROR_ISP_MSG_FAIL,
> +	IS_ERROR_DRC_MSG_FAIL,
> +	IS_ERROR_SCALERC_MSG_FAIL,
> +	IS_ERROR_ODC_MSG_FAIL,
> +	IS_ERROR_DIS_MSG_FAIL,
> +	IS_ERROR_TDNR_MSG_FAIL,
> +	IS_ERROR_SCALERP_MSG_FAIL,
> +	IS_ERROR_LHFD_MSG_FAIL,
> +	IS_ERROR_INTERNAL_STOP,
> +	IS_ERROR_UNKNOWN,
> +	IS_ERROR_TIME_OUT_FLAG,
> +
> +	/* Sensor 100 ~ 200 */
> +	IS_ERROR_SENSOR_PWRDN_FAIL = 100,
> +	IS_ERROR_SENSOR_STREAM_ON_FAIL,
> +	IS_ERROR_SENSOR_STREAM_OFF_FAIL,
> +
> +	/* ISP 200 ~ 300 */
> +	IS_ERROR_ISP_PWRDN_FAIL = 200,
> +	IS_ERROR_ISP_MULTIPLE_INPUT,
> +	IS_ERROR_ISP_ABSENT_INPUT,
> +	IS_ERROR_ISP_ABSENT_OUTPUT,
> +	IS_ERROR_ISP_NONADJACENT_OUTPUT,
> +	IS_ERROR_ISP_FORMAT_MISMATCH,
> +	IS_ERROR_ISP_WIDTH_MISMATCH,
> +	IS_ERROR_ISP_HEIGHT_MISMATCH,
> +	IS_ERROR_ISP_BITWIDTH_MISMATCH,
> +	IS_ERROR_ISP_FRAME_END_TIME_OUT,
> +
> +	/* DRC 300 ~ 400 */
> +	IS_ERROR_DRC_PWRDN_FAIL = 300,
> +	IS_ERROR_DRC_MULTIPLE_INPUT,
> +	IS_ERROR_DRC_ABSENT_INPUT,
> +	IS_ERROR_DRC_NONADJACENT_INTPUT,
> +	IS_ERROR_DRC_ABSENT_OUTPUT,
> +	IS_ERROR_DRC_NONADJACENT_OUTPUT,
> +	IS_ERROR_DRC_FORMAT_MISMATCH,
> +	IS_ERROR_DRC_WIDTH_MISMATCH,
> +	IS_ERROR_DRC_HEIGHT_MISMATCH,
> +	IS_ERROR_DRC_BITWIDTH_MISMATCH,
> +	IS_ERROR_DRC_FRAME_END_TIME_OUT,
> +
> +	/*SCALERC(400~500)*/
> +	IS_ERROR_SCALERC_PWRDN_FAIL = 400,
> +
> +	/*ODC(500~600)*/
> +	IS_ERROR_ODC_PWRDN_FAIL = 500,
> +
> +	/*DIS(600~700)*/
> +	IS_ERROR_DIS_PWRDN_FAIL = 600,
> +
> +	/*TDNR(700~800)*/
> +	IS_ERROR_TDNR_PWRDN_FAIL = 700,
> +
> +	/*SCALERP(800~900)*/
> +	IS_ERROR_SCALERP_PWRDN_FAIL = 800,
> +
> +	/*FD(900~1000)*/
> +	IS_ERROR_FD_PWRDN_FAIL = 900,
> +	IS_ERROR_FD_MULTIPLE_INPUT,
> +	IS_ERROR_FD_ABSENT_INPUT,
> +	IS_ERROR_FD_NONADJACENT_INPUT,
> +	IS_ERROR_LHFD_FRAME_END_TIME_OUT,
> +};
> +
> +/* Set parameter error enum */
> +enum error {
> +	/* Common error (0~99) */
> +	ERROR_COMMON_NO			= 0,

How about renaming all those ERROR_*_NO symbols to ERROR_*_NONE ?

> +	ERROR_COMMON_CMD		= 1,	/* Invalid command*/
> +	ERROR_COMMON_PARAMETER		= 2,	/* Invalid parameter*/
> +	/* setfile is not loaded before adjusting */
> +	ERROR_COMMON_SETFILE_LOAD	= 3,
> +	/* setfile is not Adjusted before runnng. */
> +	ERROR_COMMON_SETFILE_ADJUST	= 4,
> +	/* index of setfile is not valid. */
> +	ERROR_COMMON_SETFILE_INDEX = 5,
> +	/* Input path can be changed in ready state(stop) */
> +	ERROR_COMMON_INPUT_PATH		= 6,
> +	/* IP can not start if input path is not set */
> +	ERROR_COMMON_INPUT_INIT		= 7,
> +	/* Output path can be changed in ready state(stop) */
> +	ERROR_COMMON_OUTPUT_PATH	= 8,
> +	/* IP can not start if output path is not set */
> +	ERROR_COMMON_OUTPUT_INIT	= 9,
> +
> +	ERROR_CONTROL_NO		= ERROR_COMMON_NO,
> +	ERROR_CONTROL_BYPASS		= 11,	/* Enable or Disable */
> +	ERROR_CONTROL_BUF		= 12,	/* invalid buffer info */
> +
> +	ERROR_OTF_INPUT_NO		= ERROR_COMMON_NO,
> +	/* invalid command */
> +	ERROR_OTF_INPUT_CMD		= 21,
> +	/* invalid format  (DRC: YUV444, FD: YUV444, 422, 420) */
> +	ERROR_OTF_INPUT_FORMAT		= 22,
> +	/* invalid width (DRC: 128~8192, FD: 32~8190) */
> +	ERROR_OTF_INPUT_WIDTH		= 23,
> +	/* invalid height (DRC: 64~8192, FD: 16~8190) */
> +	ERROR_OTF_INPUT_HEIGHT		= 24,
> +	/* invalid bit-width (DRC: 8~12bits, FD: 8bit) */
> +	ERROR_OTF_INPUT_BIT_WIDTH	= 25,
> +	/* invalid frame time for ISP */
> +	ERROR_OTF_INPUT_USER_FRAMETILE = 26,
> +
> +	ERROR_DMA_INPUT_NO		= ERROR_COMMON_NO,
> +	/* invalid width (DRC: 128~8192, FD: 32~8190) */
> +	ERROR_DMA_INPUT_WIDTH		= 31,
> +	/* invalid height (DRC: 64~8192, FD: 16~8190) */
> +	ERROR_DMA_INPUT_HEIGHT		= 32,
> +	/* invalid format (DRC: YUV444 or YUV422, FD: YUV444, 422, 420) */
> +	ERROR_DMA_INPUT_FORMAT		= 33,
> +	/* invalid bit-width (DRC: 8~12bit, FD: 8bit) */
> +	ERROR_DMA_INPUT_BIT_WIDTH	= 34,
> +	/* invalid order(DRC: YYCbCrorYCbYCr, FD:NO,YYCbCr,YCbYCr,CbCr,CrCb) */
> +	ERROR_DMA_INPUT_ORDER		= 35,
> +	/* invalid palne (DRC: 3, FD: 1, 2, 3) */
> +	ERROR_DMA_INPUT_PLANE		= 36,
> +
> +	ERROR_OTF_OUTPUT_NO		= ERROR_COMMON_NO,
> +	/* invalid width (DRC: 128~8192) */
> +	ERROR_OTF_OUTPUT_WIDTH		= 41,
> +	/* invalid height (DRC: 64~8192) */
> +	ERROR_OTF_OUTPUT_HEIGHT		= 42,
> +	/* invalid format (DRC: YUV444) */
> +	ERROR_OTF_OUTPUT_FORMAT		= 43,
> +	/* invalid bit-width (DRC: 8~12bits) */
> +	ERROR_OTF_OUTPUT_BIT_WIDTH	= 44,
> +	/* invalid crop size (ODC: left>2, right>10) */
> +	ERROR_OTF_OUTPUT_CROP		= 45,
> +
> +	ERROR_DMA_OUTPUT_NO		= ERROR_COMMON_NO,
> +	ERROR_DMA_OUTPUT_WIDTH		= 51,	/* invalid width */
> +	ERROR_DMA_OUTPUT_HEIGHT		= 52,	/* invalid height */
> +	ERROR_DMA_OUTPUT_FORMAT		= 53,	/* invalid format */
> +	ERROR_DMA_OUTPUT_BIT_WIDTH	= 54,	/* invalid bit-width */
> +	ERROR_DMA_OUTPUT_PLANE		= 55,	/* invalid plane */
> +	ERROR_DMA_OUTPUT_ORDER		= 56,	/* invalid order */
> +	ERROR_DMA_OUTPUT_BUF		= 57,	/* invalid buffer info */
> +
> +	ERROR_GLOBAL_SHOTMODE_NO	= ERROR_COMMON_NO,
> +
> +	/* SENSOR Error(100~199) */
> +	ERROR_SENSOR_NO			= ERROR_COMMON_NO,
> +	ERROR_SENSOR_I2C_FAIL		= 101,
> +	ERROR_SENSOR_INVALID_FRAMERATE,
> +	ERROR_SENSOR_INVALID_EXPOSURETIME,
> +	ERROR_SENSOR_INVALID_SIZE,
> +	ERROR_SENSOR_ACTURATOR_INIT_FAIL,
> +	ERROR_SENSOR_INVALID_AF_POS,
> +	ERROR_SENSOR_UNSUPPORT_FUNC,
> +	ERROR_SENSOR_UNSUPPORT_PERI,
> +	ERROR_SENSOR_UNSUPPORT_AF,
> +	ERROR_SENSOR_FLASH_FAIL,
> +	ERROR_SENSOR_START_FAIL,
> +	ERROR_SENSOR_STOP_FAIL,
> +
> +	/* ISP Error (200~299) */
> +	ERROR_ISP_AF_NO			= ERROR_COMMON_NO,
> +	ERROR_ISP_AF_BUSY		= 201,
> +	ERROR_ISP_AF_INVALID_COMMAND	= 202,
> +	ERROR_ISP_AF_INVALID_MODE	= 203,
> +	ERROR_ISP_FLASH_NO		= ERROR_COMMON_NO,
> +	ERROR_ISP_AWB_NO		= ERROR_COMMON_NO,
> +	ERROR_ISP_IMAGE_EFFECT_NO	= ERROR_COMMON_NO,
> +	ERROR_ISP_IMAGE_EFFECT_INVALID	= 231,
> +	ERROR_ISP_ISO_NO		= ERROR_COMMON_NO,
> +	ERROR_ISP_ADJUST_NO		= ERROR_COMMON_NO,
> +	ERROR_ISP_METERING_NO		= ERROR_COMMON_NO,
> +	ERROR_ISP_AFC_NO		= ERROR_COMMON_NO,
> +
> +	/* DRC Error (300~399) */
> +
> +	/* FD Error  (400~499) */
> +	ERROR_FD_NO					= ERROR_COMMON_NO,
> +	/* Invalid max number (1~16) */
> +	ERROR_FD_CONFIG_MAX_NUMBER_STATE		= 401,
> +	ERROR_FD_CONFIG_MAX_NUMBER_INVALID		= 402,
> +	ERROR_FD_CONFIG_YAW_ANGLE_STATE			= 403,
> +	ERROR_FD_CONFIG_YAW_ANGLE_INVALID		= 404,
> +	ERROR_FD_CONFIG_ROLL_ANGLE_STATE		= 405,
> +	ERROR_FD_CONFIG_ROLL_ANGLE_INVALID		= 406,
> +	ERROR_FD_CONFIG_SMILE_MODE_INVALID		= 407,
> +	ERROR_FD_CONFIG_BLINK_MODE_INVALID		= 408,
> +	ERROR_FD_CONFIG_EYES_DETECT_INVALID		= 409,
> +	ERROR_FD_CONFIG_MOUTH_DETECT_INVALID		= 410,
> +	ERROR_FD_CONFIG_ORIENTATION_STATE		= 411,
> +	ERROR_FD_CONFIG_ORIENTATION_INVALID		= 412,
> +	ERROR_FD_CONFIG_ORIENTATION_VALUE_INVALID	= 413,
> +	/* PARAM_FdResultStr can be only applied
> +	 * in ready-state or stream off */
> +	ERROR_FD_RESULT				= 414,
> +	/* PARAM_FdModeStr can be only applied
> +	 * in ready-state or stream off */
> +	ERROR_FD_MODE					= 415,
> +
> +	/*SCALER ERR(500~599)*/
> +	ERROR_SCALER_NO			= ERROR_COMMON_NO,
> +	ERROR_SCALER_DMA_OUTSEL		= 501,
> +	ERROR_SCALER_H_RATIO			= 502,
> +	ERROR_SCALER_V_RATIO			= 503,
> +	ERROR_SCALER_FRAME_BUFFER_SEQ		= 504,
> +
> +	ERROR_SCALER_IMAGE_EFFECT		= 510,
> +
> +	ERROR_SCALER_ROTATE			= 520,
> +	ERROR_SCALER_FLIP			= 521,
> +
> +};
> +
> +#define ENOBASE_IS		0x10000
> +#define	ENOSHOT			(ENOBASE_IS + 1) /* shot error */
> +#define ENOMDONE		(ENOBASE_IS + 2) /* meta done error */
> +
> +#endif
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-metadata.h b/drivers/media/platform/exynos5-is/fimc-is-metadata.h
> new file mode 100644
> index 0000000..9738d7d
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-metadata.h
> @@ -0,0 +1,771 @@
> +/*
> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + * Kil-yeon Lim<kilyeon.im@samsung.com>
> + * Arun Kumar K<arun.kk@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef FIMC_IS_METADATA_H_
> +#define FIMC_IS_METADATA_H_
> +
> +struct rational {
> +	uint32_t num;
> +	uint32_t den;
> +};
> +
> +#define CAMERA2_MAX_AVAILABLE_MODE	21
> +#define CAMERA2_MAX_FACES		16
> +
> +/*
> + *controls/dynamic metadata
> +*/
> +
> +enum metadata_mode {
> +	METADATA_MODE_NONE,
> +	METADATA_MODE_FULL
> +};
> +
> +struct camera2_request_ctl {
> +	uint32_t		id;
> +	enum metadata_mode	metadatamode;
> +	uint8_t			outputstreams[16];
> +	uint32_t		framecount;
> +};
> +
> +struct camera2_request_dm {
> +	uint32_t		id;
> +	enum metadata_mode	metadatamode;
> +	uint32_t		framecount;
> +};
> +
> +
> +
> +enum optical_stabilization_mode {
> +	OPTICAL_STABILIZATION_MODE_OFF,
> +	OPTICAL_STABILIZATION_MODE_ON
> +};
> +
> +enum lens_facing {
> +	LENS_FACING_BACK,
> +	LENS_FACING_FRONT
> +};
> +
> +struct camera2_lens_ctl {
> +	uint32_t				focusdistance;
> +	float					aperture;
> +	float					focallength;
> +	float					filterdensity;
> +	enum optical_stabilization_mode		opticalstabilizationmode;
> +

Unnecessary empty line.

Huh, flat number in the kernel ? What are we going to do with those ?
Is this structure going to be needed to be exposed to user space somehow ?

> +};
> +
> +struct camera2_lens_dm {
> +	uint32_t				focusdistance;
> +	float					aperture;
> +	float					focalilength;
> +	float					filterdensity;
> +	enum optical_stabilization_mode		opticalstabilizationmode;
> +	float					focusrange[2];
> +};
> +
> +struct camera2_lens_sm {
> +	float				minimumfocusdistance;
> +	float				hyperfocaldistance;
> +	float				availablefocalLength[2];
> +	float				availableapertures;
> +	/*assuming 1 aperture*/
> +	float				availablefilterdensities;
> +	/*assuming 1 ND filter value*/
> +	enum optical_stabilization_mode	availableopticalstabilization;
> +	/*assuming 1*/
> +	uint32_t			shadingmapsize;
> +	float				shadingmap[3][40][30];
> +	uint32_t			geometriccorrectionmapsize;
> +	float				geometriccorrectionmap[2][3][40][30];
> +	enum lens_facing		facing;
> +	float				position[2];
> +};
> +
> +enum sensor_colorfilterarrangement {
> +	SENSOR_COLORFILTERARRANGEMENT_RGGB,
> +	SENSOR_COLORFILTERARRANGEMENT_GRBG,
> +	SENSOR_COLORFILTERARRANGEMENT_GBRG,
> +	SENSOR_COLORFILTERARRANGEMENT_BGGR,
> +	SENSOR_COLORFILTERARRANGEMENT_RGB

Iwonderwhathappenedwithspacesinthoseenumdefinitions....

> +};
> +
> +enum sensor_ref_illuminant {
> +	SENSOR_ILLUMINANT_DAYLIGHT = 1,
> +	SENSOR_ILLUMINANT_FLUORESCENT = 2,
> +	SENSOR_ILLUMINANT_TUNGSTEN = 3,
> +	SENSOR_ILLUMINANT_FLASH = 4,
> +	SENSOR_ILLUMINANT_FINE_WEATHER = 9,
> +	SENSOR_ILLUMINANT_CLOUDY_WEATHER = 10,
> +	SENSOR_ILLUMINANT_SHADE = 11,
> +	SENSOR_ILLUMINANT_DAYLIGHT_FLUORESCENT = 12,
> +	SENSOR_ILLUMINANT_DAY_WHITE_FLUORESCENT = 13,
> +	SENSOR_ILLUMINANT_COOL_WHITE_FLUORESCENT = 14,
> +	SENSOR_ILLUMINANT_WHITE_FLUORESCENT = 15,
> +	SENSOR_ILLUMINANT_STANDARD_A = 17,
> +	SENSOR_ILLUMINANT_STANDARD_B = 18,
> +	SENSOR_ILLUMINANT_STANDARD_C = 19,
> +	SENSOR_ILLUMINANT_D55 = 20,
> +	SENSOR_ILLUMINANT_D65 = 21,
> +	SENSOR_ILLUMINANT_D75 = 22,
> +	SENSOR_ILLUMINANT_D50 = 23,
> +	SENSOR_ILLUMINANT_ISO_STUDIO_TUNGSTEN = 24
> +};

> +struct camera2_sensor_ctl {
> +	/* unit : nano */
> +	uint64_t	exposuretime;
> +	/* unit : nano(It's min frame duration */
> +	uint64_t	frameduration;
> +	/* unit : percent(need to change ISO value?) */
> +	uint32_t	sensitivity;
> +};
> +
> +struct camera2_sensor_dm {
> +	uint64_t	exposuretime;
> +	uint64_t	frameduration;
> +	uint32_t	sensitivity;
> +	uint64_t	timestamp;
> +};
> +
> +struct camera2_sensor_sm {
> +	uint32_t	exposuretimerange[2];
> +	uint32_t	maxframeduration;
> +	/* list of available sensitivities. */
> +	uint32_t	availablesensitivities[10];
> +	enum sensor_colorfilterarrangement colorfilterarrangement;
> +	float		physicalsize[2];
> +	uint32_t	pixelarraysize[2];
> +	uint32_t	activearraysize[4];
> +	uint32_t	whitelevel;
> +	uint32_t	blacklevelpattern[4];
> +	struct rational	colortransform1[9];
> +	struct rational	colortransform2[9];
> +	enum sensor_ref_illuminant	referenceilluminant1;
> +	enum sensor_ref_illuminant	referenceilluminant2;
> +	struct rational	forwardmatrix1[9];
> +	struct rational	forwardmatrix2[9];
> +	struct rational	calibrationtransform1[9];
> +	struct rational	calibrationtransform2[9];
> +	struct rational	basegainfactor;
> +	uint32_t	maxanalogsensitivity;
> +	float		noisemodelcoefficients[2];
> +	uint32_t	orientation;
> +};
> +
> +
> +
> +enum flash_mode {
> +	CAM2_FLASH_MODE_OFF = 1,
> +	CAM2_FLASH_MODE_SINGLE,
> +	CAM2_FLASH_MODE_TORCH,
> +	CAM2_FLASH_MODE_BEST
> +};
> +
> +struct camera2_flash_ctl {
> +	enum flash_mode		flashmode;
> +	uint32_t		firingpower;
> +	uint64_t		firingtime;
> +};
> +
> +struct camera2_flash_dm {
> +	enum flash_mode		flashmode;
> +	/*10 is max power*/
> +	uint32_t		firingpower;
> +	/*unit : microseconds*/
> +	uint64_t		firingtime;
> +	/*1 : stable, 0 : unstable*/
> +	uint32_t		firingstable;
> +	/*1 : success, 0 : fail*/
> +	uint32_t		decision;
> +};
> +
> +struct camera2_flash_sm {
> +	uint32_t	available;
> +	uint64_t	chargeduration;
> +};
> +
> +enum processing_mode {
> +	PROCESSING_MODE_OFF = 1,
> +	PROCESSING_MODE_FAST,
> +	PROCESSING_MODE_HIGH_QUALITY
> +};
> +
> +
> +struct camera2_hotpixel_ctl {
> +	enum processing_mode	mode;
> +};
> +
> +struct camera2_hotpixel_dm {
> +	enum processing_mode	mode;
> +};
> +
> +struct camera2_demosaic_ctl {
> +	enum processing_mode	mode;
> +};
> +
> +struct camera2_demosaic_dm {
> +	enum processing_mode	mode;
> +};
> +
> +struct camera2_noisereduction_ctl {
> +	enum processing_mode	mode;
> +	uint32_t		strength;
> +};
> +
> +struct camera2_noisereduction_dm {
> +	enum processing_mode	mode;
> +	uint32_t		strength;
> +};
> +
> +struct camera2_shading_ctl {
> +	enum processing_mode	mode;
> +};
> +
> +struct camera2_shading_dm {
> +	enum processing_mode	mode;
> +};
> +
> +struct camera2_geometric_ctl {
> +	enum processing_mode	mode;
> +};
> +
> +struct camera2_geometric_dm {
> +	enum processing_mode	mode;
> +};
> +
> +enum colorcorrection_mode {
> +	COLORCORRECTION_MODE_FAST = 1,
> +	COLORCORRECTION_MODE_HIGH_QUALITY,
> +	COLORCORRECTION_MODE_TRANSFORM_MATRIX,
> +	COLORCORRECTION_MODE_EFFECT_MONO,
> +	COLORCORRECTION_MODE_EFFECT_NEGATIVE,
> +	COLORCORRECTION_MODE_EFFECT_SOLARIZE,
> +	COLORCORRECTION_MODE_EFFECT_SEPIA,
> +	COLORCORRECTION_MODE_EFFECT_POSTERIZE,
> +	COLORCORRECTION_MODE_EFFECT_WHITEBOARD,
> +	COLORCORRECTION_MODE_EFFECT_BLACKBOARD,
> +	COLORCORRECTION_MODE_EFFECT_AQUA
> +};
> +
> +
> +struct camera2_colorcorrection_ctl {
> +	enum colorcorrection_mode	mode;
> +	float				transform[9];
> +	uint32_t			hue;
> +	uint32_t			saturation;
> +	uint32_t			brightness;
> +};
> +
> +struct camera2_colorcorrection_dm {
> +	enum colorcorrection_mode	mode;
> +	float				transform[9];
> +	uint32_t			hue;
> +	uint32_t			saturation;
> +	uint32_t			brightness;
> +};
> +
> +struct camera2_colorcorrection_sm {
> +	/*assuming 10 supported modes*/
> +	uint8_t			availablemodes[CAMERA2_MAX_AVAILABLE_MODE];
> +	uint32_t		huerange[2];
> +	uint32_t		saturationrange[2];
> +	uint32_t		brightnessrange[2];
> +};
> +
> +enum tonemap_mode {
> +	TONEMAP_MODE_FAST = 1,
> +	TONEMAP_MODE_HIGH_QUALITY,
> +	TONEMAP_MODE_CONTRAST_CURVE
> +};
> +
> +struct camera2_tonemap_ctl {
> +	enum tonemap_mode		mode;
> +	/* assuming maxCurvePoints = 64 */
> +	float				curvered[64];
> +	float				curvegreen[64];
> +	float				curveblue[64];
> +};
> +
> +struct camera2_tonemap_dm {
> +	enum tonemap_mode		mode;
> +	/* assuming maxCurvePoints = 64 */
> +	float				curvered[64];
> +	float				curvegreen[64];
> +	float				curveblue[64];
> +};
> +
> +struct camera2_tonemap_sm {
> +	uint32_t	maxcurvepoints;
> +};
> +
> +struct camera2_edge_ctl {
> +	enum processing_mode	mode;
> +	uint32_t		strength;
> +};
> +
> +struct camera2_edge_dm {
> +	enum processing_mode	mode;
> +	uint32_t		strength;
> +};
> +
> +enum scaler_availableformats {

Perhaps just 'enum scaler_formats' ?

> +	SCALER_FORMAT_BAYER_RAW,
> +	SCALER_FORMAT_YV12,
> +	SCALER_FORMAT_NV21,
> +	SCALER_FORMAT_JPEG,
> +	SCALER_FORMAT_UNKNOWN
> +};
> +
> +struct camera2_scaler_ctl {
> +	uint32_t	cropregion[3];
> +};
> +
> +struct camera2_scaler_dm {
> +	uint32_t	cropregion[3];
> +};
> +
> +struct camera2_scaler_sm {
> +	enum scaler_availableformats availableformats[4];
> +	/*assuming # of availableFormats = 4*/

nit: Can you please amend all comments in this driver so there are
      spaces after '/*' and before '*/' ?

> +	uint32_t	availablerawsizes;
> +	uint64_t	availablerawmindurations;
> +	/* needs check */
> +	uint32_t	availableprocessedsizes[8];
> +	uint64_t	availableprocessedmindurations[8];
> +	uint32_t	availablejpegsizes[8][2];
> +	uint64_t	availablejpegmindurations[8];
> +	uint32_t	availablemaxdigitalzoom[8];
> +};
> +
> +struct camera2_jpeg_ctl {
> +	uint32_t	quality;
> +	uint32_t	thumbnailsize[2];
> +	uint32_t	thumbnailquality;
> +	double		gpscoordinates[3];
> +	uint32_t	gpsprocessingcethod;
> +	uint64_t	gpstimestamp;
> +	uint32_t	orientation;
> +};
> +
> +struct camera2_jpeg_dm {
> +	uint32_t	quality;
> +	uint32_t	thumbnailsize[2];
> +	uint32_t	thumbnailquality;
> +	double		gpscoordinates[3];
> +	uint32_t	gpsprocessingmethod;
> +	uint64_t	gpstimestamp;
> +	uint32_t	orientation;
> +};
> +
> +struct camera2_jpeg_sm {
> +	uint32_t	availablethumbnailsizes[8][2];
> +	uint32_t	maxsize;
> +	/*assuming supported size=8*/
> +};
> +
> +enum facedetect_mode {
> +	FACEDETECT_MODE_OFF = 1,
> +	FACEDETECT_MODE_SIMPLE,
> +	FACEDETECT_MODE_FULL
> +};
> +
> +enum stats_mode {
> +	STATS_MODE_OFF = 1,
> +	STATS_MODE_ON
> +};
> +
> +struct camera2_stats_ctl {
> +	enum facedetect_mode	facedetectmode;
> +	enum stats_mode		histogrammode;
> +	enum stats_mode		sharpnessmapmode;
> +};
> +
> +
> +struct camera2_stats_dm {
> +	enum facedetect_mode	facedetectmode;
> +	uint32_t		facerectangles[CAMERA2_MAX_FACES][4];
> +	uint8_t			facescores[CAMERA2_MAX_FACES];
> +	uint32_t		facelandmarks[CAMERA2_MAX_FACES][6];
> +	uint32_t		faceids[CAMERA2_MAX_FACES];
> +	enum stats_mode		histogrammode;
> +	uint32_t		histogram[3 * 256];
> +	enum stats_mode		sharpnessmapmode;
> +};
> +
> +
> +struct camera2_stats_sm {
> +	uint8_t		availablefacedetectmodes[CAMERA2_MAX_AVAILABLE_MODE];
> +	/*assuming supported modes = 3;*/
> +	uint32_t	maxfacecount;
> +	uint32_t	histogrambucketcount;
> +	uint32_t	maxhistogramcount;
> +	uint32_t	sharpnessmapsize[2];
> +	uint32_t	maxsharpnessmapvalue;
> +};
> +
> +enum aa_capture_intent {
> +	AA_CAPTURE_INTENT_CUSTOM = 0,
> +	AA_CAPTURE_INTENT_PREVIEW,
> +	AA_CAPTURE_INTENT_STILL_CAPTURE,
> +	AA_CAPTURE_INTENT_VIDEO_RECORD,
> +	AA_CAPTURE_INTENT_VIDEO_SNAPSHOT,
> +	AA_CAPTURE_INTENT_ZERO_SHUTTER_LAG
> +};
> +
> +enum aa_mode {
> +	AA_CONTROL_OFF = 1,
> +	AA_CONTROL_AUTO,
> +	AA_CONTROL_USE_SCENE_MODE
> +};
> +
> +enum aa_scene_mode {
> +	AA_SCENE_MODE_UNSUPPORTED = 1,
> +	AA_SCENE_MODE_FACE_PRIORITY,
> +	AA_SCENE_MODE_ACTION,
> +	AA_SCENE_MODE_PORTRAIT,
> +	AA_SCENE_MODE_LANDSCAPE,
> +	AA_SCENE_MODE_NIGHT,
> +	AA_SCENE_MODE_NIGHT_PORTRAIT,
> +	AA_SCENE_MODE_THEATRE,
> +	AA_SCENE_MODE_BEACH,
> +	AA_SCENE_MODE_SNOW,
> +	AA_SCENE_MODE_SUNSET,
> +	AA_SCENE_MODE_STEADYPHOTO,
> +	AA_SCENE_MODE_FIREWORKS,
> +	AA_SCENE_MODE_SPORTS,
> +	AA_SCENE_MODE_PARTY,
> +	AA_SCENE_MODE_CANDLELIGHT,
> +	AA_SCENE_MODE_BARCODE,
> +	AA_SCENE_MODE_NIGHT_CAPTURE
> +};
> +
> +enum aa_effect_mode {
> +	AA_EFFECT_OFF = 1,
> +	AA_EFFECT_MONO,
> +	AA_EFFECT_NEGATIVE,
> +	AA_EFFECT_SOLARIZE,
> +	AA_EFFECT_SEPIA,
> +	AA_EFFECT_POSTERIZE,
> +	AA_EFFECT_WHITEBOARD,
> +	AA_EFFECT_BLACKBOARD,
> +	AA_EFFECT_AQUA
> +};
> +
> +enum aa_aemode {
> +	AA_AEMODE_OFF = 1,
> +	AA_AEMODE_LOCKED,
> +	AA_AEMODE_ON,
> +	AA_AEMODE_ON_AUTO_FLASH,
> +	AA_AEMODE_ON_ALWAYS_FLASH,
> +	AA_AEMODE_ON_AUTO_FLASH_REDEYE
> +};
> +
> +enum aa_ae_flashmode {
> +	/*all flash control stop*/
> +	AA_FLASHMODE_OFF = 1,
> +	/*internal 3A can control flash*/
> +	AA_FLASHMODE_ON,
> +	/*internal 3A can do auto flash algorithm*/
> +	AA_FLASHMODE_AUTO,
> +	/*internal 3A can fire flash by auto result*/
> +	AA_FLASHMODE_CAPTURE,
> +	/*internal 3A can control flash forced*/
> +	AA_FLASHMODE_ON_ALWAYS
> +
> +};
> +
> +enum aa_ae_antibanding_mode {
> +	AA_AE_ANTIBANDING_OFF = 1,
> +	AA_AE_ANTIBANDING_50HZ,
> +	AA_AE_ANTIBANDING_60HZ,
> +	AA_AE_ANTIBANDING_AUTO
> +};
> +
> +enum aa_awbmode {
> +	AA_AWBMODE_OFF = 1,
> +	AA_AWBMODE_LOCKED,
> +	AA_AWBMODE_WB_AUTO,
> +	AA_AWBMODE_WB_INCANDESCENT,
> +	AA_AWBMODE_WB_FLUORESCENT,
> +	AA_AWBMODE_WB_WARM_FLUORESCENT,
> +	AA_AWBMODE_WB_DAYLIGHT,
> +	AA_AWBMODE_WB_CLOUDY_DAYLIGHT,
> +	AA_AWBMODE_WB_TWILIGHT,
> +	AA_AWBMODE_WB_SHADE
> +};
> +
> +enum aa_afmode {
> +	AA_AFMODE_OFF = 1,
> +	AA_AFMODE_AUTO,
> +	AA_AFMODE_MACRO,
> +	AA_AFMODE_CONTINUOUS_VIDEO,
> +	AA_AFMODE_CONTINUOUS_PICTURE,
> +	AA_AFMODE_EDOF
> +};
> +
> +enum aa_afstate {
> +	AA_AFSTATE_INACTIVE = 1,
> +	AA_AFSTATE_PASSIVE_SCAN,
> +	AA_AFSTATE_ACTIVE_SCAN,
> +	AA_AFSTATE_AF_ACQUIRED_FOCUS,
> +	AA_AFSTATE_AF_FAILED_FOCUS
> +};
> +
> +enum ae_state {
> +	AE_STATE_INACTIVE = 1,
> +	AE_STATE_SEARCHING,
> +	AE_STATE_CONVERGED,
> +	AE_STATE_LOCKED,
> +	AE_STATE_FLASH_REQUIRED,
> +	AE_STATE_PRECAPTURE
> +};
> +
> +enum awb_state {
> +	AWB_STATE_INACTIVE = 1,
> +	AWB_STATE_SEARCHING,
> +	AWB_STATE_CONVERGED,
> +	AWB_STATE_LOCKED
> +};
> +
> +enum aa_isomode {
> +	AA_ISOMODE_AUTO = 1,
> +	AA_ISOMODE_MANUAL,
> +};
> +
> +struct camera2_aa_ctl {
> +	enum aa_capture_intent		captureintent;
> +	enum aa_mode			mode;
> +	/*enum aa_effect_mode		effectMode;*/
> +	enum aa_scene_mode		scenemode;
> +	uint32_t			videostabilizationmode;
> +	enum aa_aemode			aemode;
> +	uint32_t			aeregions[5];
> +	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
> +	int32_t				aeexpcompensation;
> +	uint32_t			aetargetfpsrange[2];
> +	enum aa_ae_antibanding_mode	aeantibandingmode;
> +	enum aa_ae_flashmode		aeflashmode;
> +	enum aa_awbmode			awbmode;
> +	uint32_t			awbregions[5];
> +	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
> +	enum aa_afmode			afmode;
> +	uint32_t			afregions[5];
> +	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
> +	uint32_t			aftrigger;
> +	enum aa_isomode			isomode;
> +	uint32_t			isovalue;
> +
> +};
> +
> +struct camera2_aa_dm {
> +	enum aa_mode				mode;
> +	enum aa_effect_mode			effectmode;
> +	enum aa_scene_mode			scenemode;
> +	uint32_t				videostabilizationmode;
> +	enum aa_aemode				aemode;
> +	/*needs check*/
> +	uint32_t				aeregions[5];
> +	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
> +	enum ae_state				aestate;
> +	enum aa_ae_flashmode			aeflashmode;
> +	/*needs check*/
> +	enum aa_awbmode				awbmode;
> +	uint32_t				awbregions[5];
> +	enum awb_state				awbstate;
> +	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region.*/
> +	enum aa_afmode				afmode;
> +	uint32_t				afregions[5];
> +	/*5 per region(x1,y1,x2,y2,weight). currently assuming 1 region*/
> +	enum aa_afstate				afstate;
> +	enum aa_isomode				isomode;
> +	uint32_t				isovalue;
> +};
> +
> +struct camera2_aa_sm {
> +	uint8_t		availablescenemodes[CAMERA2_MAX_AVAILABLE_MODE];
> +	uint8_t		availableeffects[CAMERA2_MAX_AVAILABLE_MODE];
> +	/*assuming # of available scene modes = 10*/
> +	uint32_t	maxregions;
> +	uint8_t		aeavailablemodes[CAMERA2_MAX_AVAILABLE_MODE];
> +	/*assuming # of available ae modes = 8*/
> +	struct rational	aecompensationstep;
> +	int32_t		aecompensationrange[2];
> +	uint32_t aeavailabletargetfpsranges[CAMERA2_MAX_AVAILABLE_MODE][2];
> +	uint8_t		aeavailableantibandingmodes[CAMERA2_MAX_AVAILABLE_MODE];
> +	uint8_t		awbavailablemodes[CAMERA2_MAX_AVAILABLE_MODE];
> +	/*assuming # of awbAvailableModes = 10*/
> +	uint8_t		afavailablemodes[CAMERA2_MAX_AVAILABLE_MODE];
> +	/*assuming # of afAvailableModes = 4*/
> +	uint8_t availablevideostabilizationmodes[4];
> +	/*assuming # of availableVideoStabilizationModes = 4*/
> +	uint32_t	isorange[2];
> +};
> +
> +struct camera2_lens_usm {
> +	/** Frame delay between sending command and applying frame data */

s//**/*/, this applies to multiple places elsewhere in those patches.
Please use correct comment style.

> +	uint32_t	focusdistanceframedelay;
> +};
> +
> +struct camera2_sensor_usm {
> +	/** Frame delay between sending command and applying frame data */
> +	uint32_t	exposuretimeframedelay;
> +	uint32_t	framedurationframedelay;
> +	uint32_t	sensitivityframedelay;
> +};
> +
> +struct camera2_flash_usm {
> +	/** Frame delay between sending command and applying frame data */
> +	uint32_t	flashmodeframedelay;
> +	uint32_t	firingpowerframedelay;
> +	uint64_t	firingtimeframedelay;
> +};
> +
> +struct camera2_ctl {
> +	struct camera2_request_ctl		request;
> +	struct camera2_lens_ctl			lens;
> +	struct camera2_sensor_ctl		sensor;
> +	struct camera2_flash_ctl		flash;
> +	struct camera2_hotpixel_ctl		hotpixel;
> +	struct camera2_demosaic_ctl		demosaic;
> +	struct camera2_noisereduction_ctl	noise;
> +	struct camera2_shading_ctl		shading;
> +	struct camera2_geometric_ctl		geometric;
> +	struct camera2_colorcorrection_ctl	color;
> +	struct camera2_tonemap_ctl		tonemap;
> +	struct camera2_edge_ctl			edge;
> +	struct camera2_scaler_ctl		scaler;
> +	struct camera2_jpeg_ctl			jpeg;
> +	struct camera2_stats_ctl		stats;
> +	struct camera2_aa_ctl			aa;
> +};
> +
> +struct camera2_dm {
> +	struct camera2_request_dm		request;
> +	struct camera2_lens_dm			lens;
> +	struct camera2_sensor_dm		sensor;
> +	struct camera2_flash_dm			flash;
> +	struct camera2_hotpixel_dm		hotpixel;
> +	struct camera2_demosaic_dm		demosaic;
> +	struct camera2_noisereduction_dm	noise;
> +	struct camera2_shading_dm		shading;
> +	struct camera2_geometric_dm		geometric;
> +	struct camera2_colorcorrection_dm	color;
> +	struct camera2_tonemap_dm		tonemap;
> +	struct camera2_edge_dm			edge;
> +	struct camera2_scaler_dm		scaler;
> +	struct camera2_jpeg_dm			jpeg;
> +	struct camera2_stats_dm			stats;
> +	struct camera2_aa_dm			aa;
> +};
> +
> +struct camera2_sm {
> +	struct camera2_lens_sm			lens;
> +	struct camera2_sensor_sm		sensor;
> +	struct camera2_flash_sm			flash;
> +	struct camera2_colorcorrection_sm	color;
> +	struct camera2_tonemap_sm		tonemap;
> +	struct camera2_scaler_sm		scaler;
> +	struct camera2_jpeg_sm			jpeg;
> +	struct camera2_stats_sm			stats;
> +	struct camera2_aa_sm			aa;
> +
> +	/** User-defined(ispfw specific) static metadata. */
> +	struct camera2_lens_usm			lensud;
> +	struct camera2_sensor_usm		sensorud;
> +	struct camera2_flash_usm		flashud;
> +};
> +
> +/**
> +	User-defined control for lens.
> +*/
> +struct camera2_lens_uctl {
> +	struct camera2_lens_ctl ctl;
> +
> +	/** It depends by af algorithm(normally 255 or 1023) */
> +	uint32_t        maxpos;
> +	/** Some actuator support slew rate control. */
> +	uint32_t        slewrate;
> +};
> +
> +/**
> +	User-defined metadata for lens.
> +*/
> +struct camera2_lens_udm {
> +	/** It depends by af algorithm(normally 255 or 1023) */
> +	uint32_t        maxpos;
> +	/** Some actuator support slew rate control. */
> +	uint32_t        slewrate;
> +};
> +
> +/**
> +	User-defined control for sensor.
> +*/
> +struct camera2_sensor_uctl {
> +	struct camera2_sensor_ctl ctl;
> +	/** Dynamic frame duration.
> +	This feature is decided to max. value between
> +	'sensor.exposureTime'+alpha and 'sensor.frameDuration'.
> +	*/

Wrong comment style, should be:

/*
  * Dynamic frame duration....
  * ...
  */

> +	uint64_t        dynamicrrameduration;
> +};
> +
> +struct camera2_scaler_uctl {
> +	/* target address for next frame.
> +	[0] invalid address, stop
> +	[others] valid address
> +	*/
> +	uint32_t scctargetaddress[4];
> +	uint32_t scptargetaddress[4];
> +};
> +
> +struct camera2_flash_uctl {
> +	struct camera2_flash_ctl ctl;
> +};
> +
> +struct camera2_uctl {
> +	/* Set sensor, lens, flash control for next frame.
> +	This flag can be combined.
> +	[0 bit] lens
> +	[1 bit] sensor
> +	[2 bit] flash
> +	*/
> +	uint32_t uupdatebitmap;
> +
> +	/** For debugging */
> +	uint32_t uframenumber;
> +
> +	/** isp fw specific control(user-defined) of lens. */
> +	struct camera2_lens_uctl	lensud;
> +	/** isp fw specific control(user-defined) of sensor. */
> +	struct camera2_sensor_uctl	sensorud;
> +	/** isp fw specific control(user-defined) of flash. */
> +	struct camera2_flash_uctl	flashud;
> +
> +	struct camera2_scaler_uctl	scalerud;
> +};
> +
> +struct camera2_udm {
> +	struct camera2_lens_udm		lens;
> +};
> +
> +struct camera2_shot {
> +	/*standard area*/
> +	struct camera2_ctl	ctl;
> +	struct camera2_dm	dm;
> +	/*user defined area*/
> +	struct camera2_uctl	uctl;
> +	struct camera2_udm	udm;
> +	/*magic : 23456789*/
> +	uint32_t		magicnumber;
> +};
> +#endif
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-param.h b/drivers/media/platform/exynos5-is/fimc-is-param.h
> new file mode 100644
> index 0000000..8eec772
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-param.h
> @@ -0,0 +1,1259 @@
> +/*
> + * Samsung Exynos5 SoC series FIMC-IS driver
> + *
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd
> + * Kil-yeon Lim<kilyeon.im@samsung.com>
> + * Arun Kumar K<arun.kk@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef FIMC_IS_PARAM_H
> +#define FIMC_IS_PARAM_H
> +
> +#define IS_REGION_VER 145  /* IS REGION VERSION 1.45 */
> +
> +/* MACROs */
> +#define IS_SET_PARAM_BIT(dev, num) \
> +	(num>= 32 ? set_bit((num-32),&dev->p_region_index2) \
> +		: set_bit(num,&dev->p_region_index1))

The bit operation could take a bitmask of arbitrary length, not only 32 
bits.
Could you rework this parameter bitmask handling as is done in this patch
http://git.linuxtv.org/media_tree.git/commitdiff/0e761b21b9d6c7a95a8e2b858af85d07f6c62d99 
?

Then some macros below could be removed.

> +#define IS_INC_PARAM_NUM(dev)		atomic_inc(&dev->p_region_num)
> +#define IS_PARAM_GLOBAL(dev)		(dev->is_p_region->parameter.global)
> +#define IS_PARAM_ISP(dev)		(dev->is_p_region->parameter.isp)
> +#define IS_PARAM_DRC(dev)		(dev->is_p_region->parameter.drc)
> +#define IS_PARAM_FD(dev)		(dev->is_p_region->parameter.fd)
> +#define IS_HEADER(dev)			(dev->is_p_region->header)
> +#define IS_FACE(dev)			(dev->is_p_region->face)
> +#define IS_SHARED(dev)			(dev->is_shared_region)
> +#define IS_PARAM_SIZE			(FIMC_IS_REGION_SIZE + 1)

All these are unused. Please double check for any unused code, this driver
has already 8k LOC, and only subset of features are supported :/

> +#define  INC_BIT(bit) (bit<<1)
> +#define  INC_NUM(bit) (bit + 1)

These two are unused, and a bit odd. Please remove.

> +#define MAGIC_NUMBER 0x01020304
> +
> +#define PARAMETER_MAX_SIZE    128  /* in byte */
> +#define PARAMETER_MAX_MEMBER  (PARAMETER_MAX_SIZE/4)
> +
> +enum is_param_set_bit {
> +	PARAM_GLOBAL_SHOTMODE = 0,
> +	PARAM_SENSOR_CONTROL,
> +	PARAM_SENSOR_OTF_INPUT,
> +	PARAM_SENSOR_OTF_OUTPUT,
> +	PARAM_SENSOR_FRAME_RATE,
> +	PARAM_SENSOR_DMA_OUTPUT,
> +	PARAM_BUFFER_CONTROL,
> +	PARAM_BUFFER_OTF_INPUT,
> +	PARAM_BUFFER_OTF_OUTPUT,
> +	PARAM_ISP_CONTROL,
> +	PARAM_ISP_OTF_INPUT = 10,
> +	PARAM_ISP_DMA1_INPUT,
> +	PARAM_ISP_DMA2_INPUT,
> +	PARAM_ISP_AA,
> +	PARAM_ISP_FLASH,
> +	PARAM_ISP_AWB,
> +	PARAM_ISP_IMAGE_EFFECT,
> +	PARAM_ISP_ISO,
> +	PARAM_ISP_ADJUST,
> +	PARAM_ISP_METERING,
> +	PARAM_ISP_AFC = 20,
> +	PARAM_ISP_OTF_OUTPUT,
> +	PARAM_ISP_DMA1_OUTPUT,
> +	PARAM_ISP_DMA2_OUTPUT,
> +	PARAM_DRC_CONTROL,
> +	PARAM_DRC_OTF_INPUT,
> +	PARAM_DRC_DMA_INPUT,
> +	PARAM_DRC_OTF_OUTPUT,
> +	PARAM_SCALERC_CONTROL,
> +	PARAM_SCALERC_OTF_INPUT,
> +	PARAM_SCALERC_IMAGE_EFFECT = 30,
> +	PARAM_SCALERC_INPUT_CROP,
> +	PARAM_SCALERC_OUTPUT_CROP,
> +	PARAM_SCALERC_OTF_OUTPUT,
> +	PARAM_SCALERC_DMA_OUTPUT = 34,
> +	PARAM_ODC_CONTROL,
> +	PARAM_ODC_OTF_INPUT,
> +	PARAM_ODC_OTF_OUTPUT,
> +	PARAM_DIS_CONTROL,
> +	PARAM_DIS_OTF_INPUT,
> +	PARAM_DIS_OTF_OUTPUT = 40,
> +	PARAM_TDNR_CONTROL,
> +	PARAM_TDNR_OTF_INPUT,
> +	PARAM_TDNR_1ST_FRAME,
> +	PARAM_TDNR_OTF_OUTPUT,
> +	PARAM_TDNR_DMA_OUTPUT,
> +	PARAM_SCALERP_CONTROL,
> +	PARAM_SCALERP_OTF_INPUT,
> +	PARAM_SCALERP_IMAGE_EFFECT,
> +	PARAM_SCALERP_INPUT_CROP,
> +	PARAM_SCALERP_OUTPUT_CROP = 50,
> +	PARAM_SCALERP_ROTATION,
> +	PARAM_SCALERP_FLIP,
> +	PARAM_SCALERP_OTF_OUTPUT,
> +	PARAM_SCALERP_DMA_OUTPUT,
> +	PARAM_FD_CONTROL,
> +	PARAM_FD_OTF_INPUT,
> +	PARAM_FD_DMA_INPUT,
> +	PARAM_FD_CONFIG = 58,
> +	PARAM_END,
> +};
> +
> +#define ADDRESS_TO_OFFSET(start, end)	((uint32)end - (uint32)start)
> +#define OFFSET_TO_NUM(offset)		((offset)>>6)
> +#define IS_OFFSET_LOWBIT(offset)	(OFFSET_TO_NUM(offset)>= \
> +						32 ? false : true)
> +#define OFFSET_TO_BIT(offset) \
> +		{(IS_OFFSET_LOWBIT(offset) ? (1<<OFFSET_TO_NUM(offset)) \
> +			: (1<<(OFFSET_TO_NUM(offset)-32))}
> +#define LOWBIT_OF_NUM(num)		(num>= 32 ? 0 : BIT0<<num)
> +#define HIGHBIT_OF_NUM(num)		(num>= 32 ? BIT0<<(num-32) : 0)
> +
> +#define PARAM_LOW_MASK		(0xFFFFFFFF)
> +#define PARAM_HIGH_MASK		(0x07FFFFFF)

These guys are going to be redundant when you rework the parameter bitmask
handling as suggested above.

> +
> +/* ----------------------  Input  ----------------------------------- */
> +enum control_command {
> +	CONTROL_COMMAND_STOP	= 0,
> +	CONTROL_COMMAND_START	= 1,
> +	CONTROL_COMMAND_TEST	= 2
> +};
> +
> +enum bypass_command {
> +	CONTROL_BYPASS_DISABLE		= 0,
> +	CONTROL_BYPASS_ENABLE		= 1
> +};
> +
> +enum control_error {
> +	CONTROL_ERROR_NO		= 0
> +};
> +
> +enum otf_input_command {
> +	OTF_INPUT_COMMAND_DISABLE	= 0,
> +	OTF_INPUT_COMMAND_ENABLE	= 1
> +};
> +
> +enum otf_input_format {
> +	OTF_INPUT_FORMAT_BAYER		= 0, /* 1 Channel */
> +	OTF_INPUT_FORMAT_YUV444		= 1, /* 3 Channel */
> +	OTF_INPUT_FORMAT_YUV422		= 2, /* 3 Channel */
> +	OTF_INPUT_FORMAT_YUV420		= 3, /* 3 Channel */
> +	OTF_INPUT_FORMAT_STRGEN_COLORBAR_BAYER = 10,
> +	OTF_INPUT_FORMAT_BAYER_DMA	= 11,
> +};
> +
> +enum otf_input_bitwidth {
> +	OTF_INPUT_BIT_WIDTH_14BIT	= 14,
> +	OTF_INPUT_BIT_WIDTH_12BIT	= 12,
> +	OTF_INPUT_BIT_WIDTH_11BIT	= 11,
> +	OTF_INPUT_BIT_WIDTH_10BIT	= 10,
> +	OTF_INPUT_BIT_WIDTH_9BIT	= 9,
> +	OTF_INPUT_BIT_WIDTH_8BIT	= 8
> +};
> +
> +enum otf_input_order {
> +	OTF_INPUT_ORDER_BAYER_GR_BG	= 0,
> +	OTF_INPUT_ORDER_BAYER_RG_GB	= 1,
> +	OTF_INPUT_ORDER_BAYER_BG_GR	= 2,
> +	OTF_INPUT_ORDER_BAYER_GB_RG	= 3
> +};
> +
> +enum otf_intput_error {
> +	OTF_INPUT_ERROR_NO		= 0 /* Input setting is done */
> +};
> +
> +enum dma_input_command {
> +	DMA_INPUT_COMMAND_DISABLE	= 0,
> +	DMA_INPUT_COMMAND_ENABLE	= 1,
> +	DMA_INPUT_COMMAND_BUF_MNGR	= 2,
> +	DMA_INPUT_COMMAND_RUN_SINGLE	= 3,
> +};
> +
> +enum dma_inut_format {
> +	DMA_INPUT_FORMAT_BAYER		= 0,
> +	DMA_INPUT_FORMAT_YUV444		= 1,
> +	DMA_INPUT_FORMAT_YUV422		= 2,
> +	DMA_INPUT_FORMAT_YUV420		= 3,
> +};
> +
> +enum dma_input_bitwidth {
> +	DMA_INPUT_BIT_WIDTH_14BIT	= 14,
> +	DMA_INPUT_BIT_WIDTH_12BIT	= 12,
> +	DMA_INPUT_BIT_WIDTH_11BIT	= 11,
> +	DMA_INPUT_BIT_WIDTH_10BIT	= 10,
> +	DMA_INPUT_BIT_WIDTH_9BIT	= 9,
> +	DMA_INPUT_BIT_WIDTH_8BIT	= 8
> +};
> +
> +enum dma_input_plane {
> +	DMA_INPUT_PLANE_3	= 3,
> +	DMA_INPUT_PLANE_2	= 2,
> +	DMA_INPUT_PLANE_1	= 1
> +};
> +
> +enum dma_input_order {
> +	/* (for DMA_INPUT_PLANE_3) */
> +	DMA_INPUT_ORDER_NO	= 0,
> +	/* (only valid at DMA_INPUT_PLANE_2) */
> +	DMA_INPUT_ORDER_CBCR	= 1,
> +	/* (only valid at DMA_INPUT_PLANE_2) */
> +	DMA_INPUT_ORDER_CRCB	= 2,
> +	/* (only valid at DMA_INPUT_PLANE_1&  DMA_INPUT_FORMAT_YUV444) */
> +	DMA_INPUT_ORDER_YCBCR	= 3,
> +	/* (only valid at DMA_INPUT_FORMAT_YUV422&  DMA_INPUT_PLANE_1) */
> +	DMA_INPUT_ORDER_YYCBCR	= 4,
> +	/* (only valid at DMA_INPUT_FORMAT_YUV422&  DMA_INPUT_PLANE_1) */
> +	DMA_INPUT_ORDER_YCBYCR	= 5,
> +	/* (only valid at DMA_INPUT_FORMAT_YUV422&  DMA_INPUT_PLANE_1) */
> +	DMA_INPUT_ORDER_YCRYCB	= 6,
> +	/* (only valid at DMA_INPUT_FORMAT_YUV422&  DMA_INPUT_PLANE_1) */
> +	DMA_INPUT_ORDER_CBYCRY	= 7,
> +	/* (only valid at DMA_INPUT_FORMAT_YUV422&  DMA_INPUT_PLANE_1) */
> +	DMA_INPUT_ORDER_CRYCBY	= 8,
> +	/* (only valid at DMA_INPUT_FORMAT_BAYER) */
> +	DMA_INPUT_ORDER_GR_BG	= 9
> +};
> +
> +enum dma_input_error {
> +	DMA_INPUT_ERROR_NO	= 0 /*  DMA input setting is done */
> +};
> +
> +/* ----------------------  Output  ----------------------------------- */
> +enum otf_output_crop {
> +	OTF_OUTPUT_CROP_DISABLE		= 0,
> +	OTF_OUTPUT_CROP_ENABLE		= 1
> +};
> +
> +enum otf_output_command {
> +	OTF_OUTPUT_COMMAND_DISABLE	= 0,
> +	OTF_OUTPUT_COMMAND_ENABLE	= 1
> +};
> +
> +enum orf_output_format {
> +	OTF_OUTPUT_FORMAT_YUV444	= 1,
> +	OTF_OUTPUT_FORMAT_YUV422	= 2,
> +	OTF_OUTPUT_FORMAT_YUV420	= 3,
> +	OTF_OUTPUT_FORMAT_RGB		= 4
> +};
> +
> +enum otf_output_bitwidth {
> +	OTF_OUTPUT_BIT_WIDTH_14BIT	= 14,
> +	OTF_OUTPUT_BIT_WIDTH_12BIT	= 12,
> +	OTF_OUTPUT_BIT_WIDTH_11BIT	= 11,
> +	OTF_OUTPUT_BIT_WIDTH_10BIT	= 10,
> +	OTF_OUTPUT_BIT_WIDTH_9BIT	= 9,
> +	OTF_OUTPUT_BIT_WIDTH_8BIT	= 8
> +};
> +
> +enum otf_output_order {
> +	OTF_OUTPUT_ORDER_BAYER_GR_BG	= 0,
> +};
> +
> +enum otf_output_error {
> +	OTF_OUTPUT_ERROR_NO = 0 /* Output Setting is done */
> +};
> +
> +enum dma_output_command {
> +	DMA_OUTPUT_COMMAND_DISABLE	= 0,
> +	DMA_OUTPUT_COMMAND_ENABLE	= 1,
> +	DMA_OUTPUT_COMMAND_BUF_MNGR	= 2,
> +	DMA_OUTPUT_UPDATE_MASK_BITS	= 3
> +};
> +
> +enum dma_output_format {
> +	DMA_OUTPUT_FORMAT_BAYER		= 0,
> +	DMA_OUTPUT_FORMAT_YUV444	= 1,
> +	DMA_OUTPUT_FORMAT_YUV422	= 2,
> +	DMA_OUTPUT_FORMAT_YUV420	= 3,
> +	DMA_OUTPUT_FORMAT_RGB		= 4
> +};
> +
> +enum dma_output_bitwidth {
> +	DMA_OUTPUT_BIT_WIDTH_14BIT	= 14,
> +	DMA_OUTPUT_BIT_WIDTH_12BIT	= 12,
> +	DMA_OUTPUT_BIT_WIDTH_11BIT	= 11,
> +	DMA_OUTPUT_BIT_WIDTH_10BIT	= 10,
> +	DMA_OUTPUT_BIT_WIDTH_9BIT	= 9,
> +	DMA_OUTPUT_BIT_WIDTH_8BIT	= 8
> +};
> +
> +enum dma_output_plane {
> +	DMA_OUTPUT_PLANE_3		= 3,
> +	DMA_OUTPUT_PLANE_2		= 2,
> +	DMA_OUTPUT_PLANE_1		= 1
> +};
> +
> +enum dma_output_order {
> +	DMA_OUTPUT_ORDER_NO		= 0,
> +	/* (for DMA_OUTPUT_PLANE_3) */
> +	DMA_OUTPUT_ORDER_CBCR		= 1,
> +	/* (only valid at DMA_INPUT_PLANE_2) */
> +	DMA_OUTPUT_ORDER_CRCB		= 2,
> +	/* (only valid at DMA_OUTPUT_PLANE_2) */
> +	DMA_OUTPUT_ORDER_YYCBCR		= 3,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV422&  DMA_OUTPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_YCBYCR		= 4,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV422&  DMA_OUTPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_YCRYCB		= 5,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV422&  DMA_OUTPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_CBYCRY		= 6,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV422&  DMA_OUTPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_CRYCBY		= 7,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV422&  DMA_OUTPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_YCBCR		= 8,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV444&  DMA_OUPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_CRYCB		= 9,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV444&  DMA_OUPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_CRCBY		= 10,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV444&  DMA_OUPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_CBYCR		= 11,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV444&  DMA_OUPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_YCRCB		= 12,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV444&  DMA_OUPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_CBCRY		= 13,
> +	/* (only valid at DMA_OUTPUT_FORMAT_YUV444&  DMA_OUPUT_PLANE_1) */
> +	DMA_OUTPUT_ORDER_BGR		= 14,
> +	/* (only valid at DMA_OUTPUT_FORMAT_RGB) */
> +	DMA_OUTPUT_ORDER_GB_BG		= 15
> +	/* (only valid at DMA_OUTPUT_FORMAT_BAYER) */
> +};
> +
> +enum dma_output_notify_dma_done {
> +	DMA_OUTPUT_NOTIFY_DMA_DONE_DISABLE	= 0,
> +	DMA_OUTPUT_NOTIFY_DMA_DONE_ENBABLE	= 1,
> +};
> +
> +enum dma_output_error {
> +	DMA_OUTPUT_ERROR_NO		= 0 /* DMA output setting is done */
> +};
> +
> +/* ----------------------  Global  ----------------------------------- */
> +enum global_shotmode_error {
> +	GLOBAL_SHOTMODE_ERROR_NO	= 0 /* shot-mode setting is done */
> +};
> +
> +/* -------------------------  AA  ------------------------------------ */
> +enum isp_lock_command {
> +	ISP_AA_COMMAND_START	= 0,
> +	ISP_AA_COMMAND_STOP	= 1
> +};
> +
> +enum isp_lock_target {
> +	ISP_AA_TARGET_AF	= 1,
> +	ISP_AA_TARGET_AE	= 2,
> +	ISP_AA_TARGET_AWB	= 4
> +};
> +
> +enum isp_af_mode {
> +	ISP_AF_MANUAL = 0,
> +	ISP_AF_SINGLE,
> +	ISP_AF_CONTINUOUS,
> +	ISP_AF_REGION,
> +	ISP_AF_SLEEP,
> +	ISP_AF_INIT,
> +	ISP_AF_SET_CENTER_WINDOW,
> +	ISP_AF_SET_TOUCH_WINDOW,
> +	ISP_AF_SET_FACE_WINDOW
> +};
> +
> +enum isp_af_scene {
> +	ISP_AF_SCENE_NORMAL		= 0,
> +	ISP_AF_SCENE_MACRO		= 1
> +};
> +
> +enum isp_af_touch {
> +	ISP_AF_TOUCH_DISABLE = 0,
> +	ISP_AF_TOUCH_ENABLE
> +};
> +
> +enum isp_af_face {
> +	ISP_AF_FACE_DISABLE = 0,
> +	ISP_AF_FACE_ENABLE
> +};
> +
> +enum isp_af_reponse {
> +	ISP_AF_RESPONSE_PREVIEW = 0,
> +	ISP_AF_RESPONSE_MOVIE
> +};
> +
> +enum isp_af_sleep {
> +	ISP_AF_SLEEP_OFF		= 0,
> +	ISP_AF_SLEEP_ON			= 1
> +};
> +
> +enum isp_af_continuous {
> +	ISP_AF_CONTINUOUS_DISABLE	= 0,
> +	ISP_AF_CONTINUOUS_ENABLE	= 1
> +};
> +
> +enum isp_af_error {
> +	ISP_AF_ERROR_NO			= 0, /* AF mode change is done */
> +	ISP_AF_EROOR_NO_LOCK_DONE	= 1  /* AF lock is done */
> +};
> +
> +/* -------------------------  Flash  ------------------------------------- */
> +enum isp_flash_command {
> +	ISP_FLASH_COMMAND_DISABLE	= 0,
> +	ISP_FLASH_COMMAND_MANUALON	= 1, /* (forced flash) */
> +	ISP_FLASH_COMMAND_AUTO		= 2,
> +	ISP_FLASH_COMMAND_TORCH		= 3,   /* 3 sec */
> +	ISP_FLASH_COMMAND_FLASH_ON	= 4,
> +	ISP_FLASH_COMMAND_CAPTURE	= 5,
> +	ISP_FLASH_COMMAND_TRIGGER	= 6,
> +	ISP_FLASH_COMMAND_CALIBRATION	= 7
> +};
> +
> +enum isp_flash_redeye {
> +	ISP_FLASH_REDEYE_DISABLE	= 0,
> +	ISP_FLASH_REDEYE_ENABLE		= 1
> +};
> +
> +enum isp_flash_error {
> +	ISP_FLASH_ERROR_NO		= 0 /* Flash setting is done */
> +};
> +
> +/* --------------------------  AWB  ------------------------------------ */
> +enum isp_awb_command {
> +	ISP_AWB_COMMAND_AUTO		= 0,
> +	ISP_AWB_COMMAND_ILLUMINATION	= 1,
> +	ISP_AWB_COMMAND_MANUAL	= 2
> +};
> +
> +enum isp_awb_illumination {
> +	ISP_AWB_ILLUMINATION_DAYLIGHT		= 0,
> +	ISP_AWB_ILLUMINATION_CLOUDY		= 1,
> +	ISP_AWB_ILLUMINATION_TUNGSTEN		= 2,
> +	ISP_AWB_ILLUMINATION_FLUORESCENT	= 3
> +};
> +
> +enum isp_awb_error {
> +	ISP_AWB_ERROR_NO		= 0 /* AWB setting is done */
> +};
> +
> +/* --------------------------  Effect  ----------------------------------- */
> +enum isp_imageeffect_command {
> +	ISP_IMAGE_EFFECT_DISABLE		= 0,
> +	ISP_IMAGE_EFFECT_MONOCHROME		= 1,
> +	ISP_IMAGE_EFFECT_NEGATIVE_MONO		= 2,
> +	ISP_IMAGE_EFFECT_NEGATIVE_COLOR		= 3,
> +	ISP_IMAGE_EFFECT_SEPIA			= 4,
> +	ISP_IMAGE_EFFECT_AQUA			= 5,
> +	ISP_IMAGE_EFFECT_EMBOSS			= 6,
> +	ISP_IMAGE_EFFECT_EMBOSS_MONO		= 7,
> +	ISP_IMAGE_EFFECT_SKETCH			= 8,
> +	ISP_IMAGE_EFFECT_RED_YELLOW_POINT	= 9,
> +	ISP_IMAGE_EFFECT_GREEN_POINT		= 10,
> +	ISP_IMAGE_EFFECT_BLUE_POINT		= 11,
> +	ISP_IMAGE_EFFECT_MAGENTA_POINT		= 12,
> +	ISP_IMAGE_EFFECT_WARM_VINTAGE		= 13,
> +	ISP_IMAGE_EFFECT_COLD_VINTAGE		= 14,
> +	ISP_IMAGE_EFFECT_POSTERIZE		= 15,
> +	ISP_IMAGE_EFFECT_SOLARIZE		= 16,
> +	ISP_IMAGE_EFFECT_WASHED			= 17,
> +	ISP_IMAGE_EFFECT_CCM			= 18,
> +};
> +
> +enum isp_imageeffect_error {
> +	ISP_IMAGE_EFFECT_ERROR_NO	= 0 /* Image effect setting is done */
> +};
> +
> +/* ---------------------------  ISO  ------------------------------------ */
> +enum isp_iso_command {
> +	ISP_ISO_COMMAND_AUTO		= 0,
> +	ISP_ISO_COMMAND_MANUAL		= 1
> +};
> +
> +enum iso_error {
> +	ISP_ISO_ERROR_NO		= 0 /* ISO setting is done */
> +};
> +
> +/* --------------------------  Adjust  ----------------------------------- */
> +enum iso_adjust_command {
> +	ISP_ADJUST_COMMAND_AUTO			= 0,
> +	ISP_ADJUST_COMMAND_MANUAL_CONTRAST	= (1<<  0),
> +	ISP_ADJUST_COMMAND_MANUAL_SATURATION	= (1<<  1),
> +	ISP_ADJUST_COMMAND_MANUAL_SHARPNESS	= (1<<  2),
> +	ISP_ADJUST_COMMAND_MANUAL_EXPOSURE	= (1<<  3),
> +	ISP_ADJUST_COMMAND_MANUAL_BRIGHTNESS	= (1<<  4),
> +	ISP_ADJUST_COMMAND_MANUAL_HUE		= (1<<  5),
> +	ISP_ADJUST_COMMAND_MANUAL_HOTPIXEL	= (1<<  6),
> +	ISP_ADJUST_COMMAND_MANUAL_NOISEREDUCTION = (1<<  7),
> +	ISP_ADJUST_COMMAND_MANUAL_SHADING	= (1<<  8),
> +	ISP_ADJUST_COMMAND_MANUAL_GAMMA		= (1<<  9),
> +	ISP_ADJUST_COMMAND_MANUAL_EDGEENHANCEMENT = (1<<  10),
> +	ISP_ADJUST_COMMAND_MANUAL_SCENE		= (1<<  11),
> +	ISP_ADJUST_COMMAND_MANUAL_FRAMETIME	= (1<<  12),
> +	ISP_ADJUST_COMMAND_MANUAL_ALL		= 0x1FFF
> +};
> +
> +enum isp_adjust_scene_index {
> +	ISP_ADJUST_SCENE_NORMAL			= 0,
> +	ISP_ADJUST_SCENE_NIGHT_PREVIEW		= 1,
> +	ISP_ADJUST_SCENE_NIGHT_CAPTURE		= 2
> +};
> +
> +
> +enum isp_adjust_error {
> +	ISP_ADJUST_ERROR_NO		= 0 /* Adjust setting is done */
> +};
> +
> +/* -------------------------  Metering  ---------------------------------- */
> +enum isp_metering_command {
> +	ISP_METERING_COMMAND_AVERAGE		= 0,
> +	ISP_METERING_COMMAND_SPOT		= 1,
> +	ISP_METERING_COMMAND_MATRIX		= 2,
> +	ISP_METERING_COMMAND_CENTER		= 3,
> +	ISP_METERING_COMMAND_EXPOSURE_MODE	= (1<<  8)
> +};
> +
> +enum isp_exposure_mode {
> +	ISP_EXPOSUREMODE_OFF		= 1,
> +	ISP_EXPOSUREMODE_AUTO		= 2
> +};
> +
> +enum isp_metering_error {
> +	ISP_METERING_ERROR_NO	= 0 /* Metering setting is done */
> +};
> +
> +/* --------------------------  AFC  ----------------------------------- */
> +enum isp_afc_command {
> +	ISP_AFC_COMMAND_DISABLE		= 0,
> +	ISP_AFC_COMMAND_AUTO		= 1,
> +	ISP_AFC_COMMAND_MANUAL		= 2
> +};
> +
> +enum isp_afc_manual {
> +	ISP_AFC_MANUAL_50HZ		= 50,
> +	ISP_AFC_MANUAL_60HZ		= 60
> +};
> +
> +enum isp_afc_error {
> +	ISP_AFC_ERROR_NO	= 0 /* AFC setting is done */
> +};
> +
> +enum isp_scene_command {
> +	ISP_SCENE_NONE		= 0,
> +	ISP_SCENE_PORTRAIT	= 1,
> +	ISP_SCENE_LANDSCAPE     = 2,
> +	ISP_SCENE_SPORTS        = 3,
> +	ISP_SCENE_PARTYINDOOR	= 4,
> +	ISP_SCENE_BEACHSNOW	= 5,
> +	ISP_SCENE_SUNSET	= 6,
> +	ISP_SCENE_DAWN		= 7,
> +	ISP_SCENE_FALL		= 8,
> +	ISP_SCENE_NIGHT		= 9,
> +	ISP_SCENE_AGAINSTLIGHTWLIGHT	= 10,
> +	ISP_SCENE_AGAINSTLIGHTWOLIGHT	= 11,
> +	ISP_SCENE_FIRE			= 12,
> +	ISP_SCENE_TEXT			= 13,
> +	ISP_SCENE_CANDLE		= 14
> +};
> +
> +/* --------------------------  Scaler  --------------------------------- */
> +enum scaler_imageeffect_command {
> +	SCALER_IMAGE_EFFECT_COMMNAD_DISABLE	= 0,
> +	SCALER_IMAGE_EFFECT_COMMNAD_SEPIA_CB	= 1,
> +	SCALER_IMAGE_EFFECT_COMMAND_SEPIA_CR	= 2,
> +	SCALER_IMAGE_EFFECT_COMMAND_NEGATIVE	= 3,
> +	SCALER_IMAGE_EFFECT_COMMAND_ARTFREEZE	= 4,
> +	SCALER_IMAGE_EFFECT_COMMAND_EMBOSSING	= 5,
> +	SCALER_IMAGE_EFFECT_COMMAND_SILHOUETTE	= 6
> +};
> +
> +enum scaler_imageeffect_error {
> +	SCALER_IMAGE_EFFECT_ERROR_NO		= 0
> +};
> +
> +enum scaler_crop_command {
> +	SCALER_CROP_COMMAND_DISABLE		= 0,
> +	SCALER_CROP_COMMAND_ENABLE		= 1
> +};
> +
> +enum scaler_crop_error {
> +	SCALER_CROP_ERROR_NO			= 0 /* crop setting is done */
> +};
> +
> +enum scaler_scaling_command {
> +	SCALER_SCALING_COMMNAD_DISABLE		= 0,
> +	SCALER_SCALING_COMMAND_UP		= 1,
> +	SCALER_SCALING_COMMAND_DOWN		= 2
> +};
> +
> +enum scaler_scaling_error {
> +	SCALER_SCALING_ERROR_NO			= 0
> +};
> +
> +enum scaler_rotation_command {
> +	SCALER_ROTATION_COMMAND_DISABLE		= 0,
> +	SCALER_ROTATION_COMMAND_CLOCKWISE90	= 1
> +};
> +
> +enum scaler_rotation_error {
> +	SCALER_ROTATION_ERROR_NO		= 0
> +};
> +
> +enum scaler_flip_command {
> +	SCALER_FLIP_COMMAND_NORMAL		= 0,
> +	SCALER_FLIP_COMMAND_X_MIRROR		= 1,
> +	SCALER_FLIP_COMMAND_Y_MIRROR		= 2,
> +	SCALER_FLIP_COMMAND_XY_MIRROR		= 3 /* (180 rotation) */
> +};
> +
> +enum scaler_flip_error {
> +	SCALER_FLIP_ERROR_NO			= 0 /* flip setting is done */
> +};
> +
> +/* --------------------------  3DNR  ----------------------------------- */
> +enum tdnr_1st_frame_command {
> +	TDNR_1ST_FRAME_COMMAND_NOPROCESSING	= 0,
> +	TDNR_1ST_FRAME_COMMAND_2DNR		= 1
> +};
> +
> +enum tdnr_1st_frame_error {
> +	TDNR_1ST_FRAME_ERROR_NO			= 0
> +		/*1st frame setting is done*/
> +};
> +
> +/* ----------------------------  FD  ------------------------------------- */
> +enum fd_config_command {
> +	FD_CONFIG_COMMAND_MAXIMUM_NUMBER	= 0x1,
> +	FD_CONFIG_COMMAND_ROLL_ANGLE		= 0x2,
> +	FD_CONFIG_COMMAND_YAW_ANGLE		= 0x4,
> +	FD_CONFIG_COMMAND_SMILE_MODE		= 0x8,
> +	FD_CONFIG_COMMAND_BLINK_MODE		= 0x10,
> +	FD_CONFIG_COMMAND_EYES_DETECT		= 0x20,
> +	FD_CONFIG_COMMAND_MOUTH_DETECT		= 0x40,
> +	FD_CONFIG_COMMAND_ORIENTATION		= 0x80,
> +	FD_CONFIG_COMMAND_ORIENTATION_VALUE	= 0x100
> +};
> +
> +enum fd_config_roll_angle {
> +	FD_CONFIG_ROLL_ANGLE_BASIC		= 0,
> +	FD_CONFIG_ROLL_ANGLE_PRECISE_BASIC	= 1,
> +	FD_CONFIG_ROLL_ANGLE_SIDES		= 2,
> +	FD_CONFIG_ROLL_ANGLE_PRECISE_SIDES	= 3,
> +	FD_CONFIG_ROLL_ANGLE_FULL		= 4,
> +	FD_CONFIG_ROLL_ANGLE_PRECISE_FULL	= 5,
> +};
> +
> +enum fd_config_yaw_angle {
> +	FD_CONFIG_YAW_ANGLE_0			= 0,
> +	FD_CONFIG_YAW_ANGLE_45			= 1,
> +	FD_CONFIG_YAW_ANGLE_90			= 2,
> +	FD_CONFIG_YAW_ANGLE_45_90		= 3,
> +};
> +
> +enum fd_config_smile_mode {
> +	FD_CONFIG_SMILE_MODE_DISABLE		= 0,
> +	FD_CONFIG_SMILE_MODE_ENABLE		= 1
> +};
> +
> +enum fd_config_blink_mode {
> +	FD_CONFIG_BLINK_MODE_DISABLE		= 0,
> +	FD_CONFIG_BLINK_MODE_ENABLE		= 1
> +};
> +
> +enum fd_config_eye_result {
> +	FD_CONFIG_EYES_DETECT_DISABLE		= 0,
> +	FD_CONFIG_EYES_DETECT_ENABLE		= 1
> +};
> +
> +enum fd_config_mouth_result {
> +	FD_CONFIG_MOUTH_DETECT_DISABLE		= 0,
> +	FD_CONFIG_MOUTH_DETECT_ENABLE		= 1
> +};
> +
> +enum fd_config_orientation {
> +	FD_CONFIG_ORIENTATION_DISABLE		= 0,
> +	FD_CONFIG_ORIENTATION_ENABLE		= 1
> +};
> +
> +struct param_control {
> +	u32	cmd;
> +	u32	bypass;
> +	u32	buffer_address;
> +	u32	buffer_number;
> +	/* 0: continuous, 1: single */
> +	u32	run_mode;
> +	u32	reserved[PARAMETER_MAX_MEMBER-6];
> +	u32	err;
> +};
> +
> +struct param_otf_input {
> +	u32	cmd;
> +	u32	width;
> +	u32	height;
> +	u32	format;
> +	u32	bitwidth;
> +	u32	order;
> +	u32	crop_offset_x;
> +	u32	crop_offset_y;
> +	u32	crop_width;
> +	u32	crop_height;
> +	u32	frametime_min;
> +	u32	frametime_max;
> +	u32	reserved[PARAMETER_MAX_MEMBER-13];
> +	u32	err;
> +};
> +
> +struct param_dma_input {
> +	u32	cmd;
> +	u32	width;
> +	u32	height;
> +	u32	format;
> +	u32	bitwidth;
> +	u32	plane;
> +	u32	order;
> +	u32	buffer_number;
> +	u32	buffer_address;
> +	u32	bayer_crop_offset_x;
> +	u32	bayer_crop_offset_y;
> +	u32	bayer_crop_width;
> +	u32	bayer_crop_height;
> +	u32	dma_crop_offset_x;
> +	u32	dma_crop_offset_y;
> +	u32	dma_crop_width;
> +	u32	dma_crop_height;
> +	u32	user_min_frametime;
> +	u32	user_max_frametime;
> +	u32	wide_frame_gap;
> +	u32	frame_gap;
> +	u32	line_gap;
> +	u32	reserved[PARAMETER_MAX_MEMBER-23];
> +	u32	err;
> +};
> +
> +struct param_otf_output {
> +	u32	cmd;
> +	u32	width;
> +	u32	height;
> +	u32	format;
> +	u32	bitwidth;
> +	u32	order;
> +	u32	crop_offset_x;
> +	u32	crop_offset_y;
> +	u32	reserved[PARAMETER_MAX_MEMBER-9];
> +	u32	err;
> +};
> +
> +struct param_dma_output {
> +	u32	cmd;
> +	u32	width;
> +	u32	height;
> +	u32	format;
> +	u32	bitwidth;
> +	u32	plane;
> +	u32	order;
> +	u32	buffer_number;
> +	u32	buffer_address;
> +	u32	notify_dma_done;
> +	u32	dma_out_mask;
> +	u32	reserved[PARAMETER_MAX_MEMBER-12];
> +	u32	err;
> +};
> +
> +struct param_global_shotmode {
> +	u32	cmd;
> +	u32	skip_frames;
> +	u32	reserved[PARAMETER_MAX_MEMBER-3];
> +	u32	err;
> +};
> +
> +struct param_sensor_framerate {
> +	u32	frame_rate;
> +	u32	reserved[PARAMETER_MAX_MEMBER-2];
> +	u32	err;
> +};
> +
> +struct param_isp_aa {
> +	u32	cmd;
> +	u32	target;
> +	u32	mode;
> +	u32	scene;
> +	u32	af_touch;
> +	u32	af_face;
> +	u32	af_response;
> +	u32	sleep;
> +	u32	touch_x;
> +	u32	touch_y;
> +	u32	manual_af_setting;
> +	/*0: Legacy, 1: Camera 2.0*/
> +	u32	cam_api2p0;
> +	/* For android.control.afRegions in Camera 2.0,
> +	Resolution based on YUV output size*/
> +	u32	af_region_left;
> +	/* For android.control.afRegions in Camera 2.0,
> +	Resolution based on YUV output size*/
> +	u32	af_region_top;
> +	/* For android.control.afRegions in Camera 2.0,
> +	Resolution based on YUV output size*/
> +	u32	af_region_right;
> +	/* For android.control.afRegions in Camera 2.0,
> +	Resolution based on YUV output size*/
> +	u32	af_region_bottom;
> +	u32	reserved[PARAMETER_MAX_MEMBER-17];
> +	u32	err;
> +};
> +
> +struct param_isp_flash {
> +	u32	cmd;
> +	u32	redeye;
> +	u32	flash_intensity;
> +	u32	reserved[PARAMETER_MAX_MEMBER-4];
> +	u32	err;
> +};
> +
> +struct param_isp_awb {
> +	u32	cmd;
> +	u32	illumination;
> +	u32	reserved[PARAMETER_MAX_MEMBER-3];
> +	u32	err;
> +};
> +
> +struct param_isp_imageeffect {
> +	u32	cmd;
> +	u32	reserved[PARAMETER_MAX_MEMBER-2];
> +	u32	err;
> +};
> +
> +struct param_isp_iso {
> +	u32	cmd;
> +	u32	value;
> +	u32	reserved[PARAMETER_MAX_MEMBER-3];
> +	u32	err;
> +};
> +
> +struct param_isp_adjust {
> +	u32	cmd;
> +	s32	contrast;
> +	s32	saturation;
> +	s32	sharpness;
> +	s32	exposure;
> +	s32	brightness;
> +	s32	hue;
> +	/* 0 or 1 */
> +	u32	hotpixel_enable;
> +	/* -127 ~ 127 */
> +	s32	noise_reduction_strength;
> +	/* 0 or 1 */
> +	u32	shading_correction_enable;
> +	/* 0 or 1 */
> +	u32	user_gamma_enable;
> +	/* -127 ~ 127 */
> +	s32	edge_enhancement_strength;
> +	/* ISP_AdjustSceneIndexEnum */
> +	u32	user_scene_mode;
> +	u32	min_frametime;
> +	u32	max_frametime;
> +	u32	reserved[PARAMETER_MAX_MEMBER-16];
> +	u32	err;
> +};
> +
> +struct param_isp_metering {
> +	u32	cmd;
> +	u32	win_pos_x;
> +	u32	win_pos_y;
> +	u32	win_width;
> +	u32	win_height;
> +	u32	exposure_mode;
> +	/* 0: Legacy, 1: Camera 2.0 */
> +	u32	cam_api2p0;
> +	u32	reserved[PARAMETER_MAX_MEMBER-8];
> +	u32	err;
> +};
> +
> +struct param_isp_afc {
> +	u32	cmd;
> +	u32	manual;
> +	u32	reserved[PARAMETER_MAX_MEMBER-3];
> +	u32	err;
> +};
> +
> +struct param_scaler_imageeffect {
> +	u32	cmd;
> +	u32	reserved[PARAMETER_MAX_MEMBER-2];
> +	u32	err;
> +};
> +
> +struct param_scaler_input_crop {
> +	u32  cmd;
> +	u32  pos_x;
> +	u32  pos_y;
> +	u32  crop_width;
> +	u32  crop_height;
> +	u32  in_width;
> +	u32  in_height;
> +	u32  out_width;
> +	u32  out_height;
> +	u32  reserved[PARAMETER_MAX_MEMBER-10];
> +	u32  err;
> +};
> +
> +struct param_scaler_output_crop {
> +	u32  cmd;
> +	u32  pos_x;
> +	u32  pos_y;
> +	u32  crop_width;
> +	u32  crop_height;
> +	u32  format;
> +	u32  reserved[PARAMETER_MAX_MEMBER-7];
> +	u32  err;
> +};
> +
> +struct param_scaler_rotation {
> +	u32	cmd;
> +	u32	reserved[PARAMETER_MAX_MEMBER-2];
> +	u32	err;
> +};
> +
> +struct param_scaler_flip {
> +	u32	cmd;
> +	u32	reserved[PARAMETER_MAX_MEMBER-2];
> +	u32	err;
> +};
> +
> +struct param_3dnr_1stframe {
> +	u32	cmd;
> +	u32	reserved[PARAMETER_MAX_MEMBER-2];
> +	u32	err;
> +};
> +
> +struct param_fd_config {
> +	u32	cmd;
> +	u32	max_number;
> +	u32	roll_angle;
> +	u32	yaw_angle;
> +	s32	smile_mode;
> +	s32	blink_mode;
> +	u32	eye_detect;
> +	u32	mouth_detect;
> +	u32	orientation;
> +	u32	orientation_value;
> +	u32	reserved[PARAMETER_MAX_MEMBER-11];
> +	u32	err;
> +};
> +
> +struct global_param {
> +	struct param_global_shotmode	shotmode; /* 0 */
> +};
> +
> +/* To be added */
> +struct sensor_param {
> +	struct param_control		control;
> +	struct param_otf_input		otf_input;
> +	struct param_otf_output		otf_output;
> +	struct param_sensor_framerate	frame_rate;
> +	struct param_dma_output		dma_output;
> +};
> +
> +struct buffer_param {
> +	struct param_control	control;
> +	struct param_otf_input	otf_input;
> +	struct param_otf_output	otf_output;
> +};
> +
> +struct isp_param {
> +	struct param_control		control;
> +	struct param_otf_input		otf_input;
> +	struct param_dma_input		dma1_input;
> +	struct param_dma_input		dma2_input;
> +	struct param_isp_aa		aa;
> +	struct param_isp_flash		flash;
> +	struct param_isp_awb		awb;
> +	struct param_isp_imageeffect	effect;
> +	struct param_isp_iso		iso;
> +	struct param_isp_adjust		adjust;
> +	struct param_isp_metering	metering;
> +	struct param_isp_afc		afc;
> +	struct param_otf_output		otf_output;
> +	struct param_dma_output		dma1_output;
> +	struct param_dma_output		dma2_output;
> +};
> +
> +struct drc_param {
> +	struct param_control		control;
> +	struct param_otf_input		otf_input;
> +	struct param_dma_input		dma_input;
> +	struct param_otf_output		otf_output;
> +};
> +
> +struct scalerc_param {
> +	struct param_control		control;
> +	struct param_otf_input		otf_input;
> +	struct param_scaler_imageeffect	effect;
> +	struct param_scaler_input_crop	input_crop;
> +	struct param_scaler_output_crop	 output_crop;
> +	struct param_otf_output		otf_output;
> +	struct param_dma_output		dma_output;
> +};
> +
> +struct odc_param {
> +	struct param_control		control;
> +	struct param_otf_input		otf_input;
> +	struct param_otf_output		otf_output;
> +};
> +
> +struct dis_param {
> +	struct param_control		control;
> +	struct param_otf_input		otf_input;
> +	struct param_otf_output		otf_output;
> +};
> +
> +struct tdnr_param {
> +	struct param_control		control;
> +	struct param_otf_input		otf_input;
> +	struct param_3dnr_1stframe	frame;
> +	struct param_otf_output		otf_output;
> +	struct param_dma_output		dma_output;
> +};
> +
> +struct scalerp_param {
> +	struct param_control			control;
> +	struct param_otf_input			otf_input;
> +	struct param_scaler_imageeffect		effect;
> +	struct param_scaler_input_crop		input_crop;
> +	struct param_scaler_output_crop		output_crop;
> +	struct param_scaler_rotation		rotation;
> +	struct param_scaler_flip		flip;
> +	struct param_otf_output			otf_output;
> +	struct param_dma_output			dma_output;
> +};
> +
> +struct fd_param {
> +	struct param_control			control;
> +	struct param_otf_input			otf_input;
> +	struct param_dma_input			dma_input;
> +	struct param_fd_config			config;
> +};
> +
> +struct is_param_region {
> +	struct global_param	global;
> +	struct sensor_param	sensor;
> +	struct buffer_param	buf;
> +	struct isp_param	isp;
> +	struct drc_param	drc;
> +	struct scalerc_param	scalerc;
> +	struct odc_param	odc;
> +	struct dis_param	dis;
> +	struct tdnr_param	tdnr;
> +	struct scalerp_param	scalerp;
> +	struct fd_param		fd;
> +};
> +
> +#define	NUMBER_OF_GAMMA_CURVE_POINTS	32
> +
> +struct is_sensor_tune {
> +	u32 exposure;
> +	u32 analog_gain;
> +	u32 frame_rate;
> +	u32 actuator_pos;
> +};
> +
> +struct is_tune_gammacurve {
> +	u32 num_pts_x[NUMBER_OF_GAMMA_CURVE_POINTS];
> +	u32 num_pts_y_r[NUMBER_OF_GAMMA_CURVE_POINTS];
> +	u32 num_pts_y_g[NUMBER_OF_GAMMA_CURVE_POINTS];
> +	u32 num_pts_y_b[NUMBER_OF_GAMMA_CURVE_POINTS];
> +};
> +
> +struct is_isp_tune {
> +	/* Brightness level : range 0~100, default : 7 */
> +	u32 brightness_level;
> +	/* Contrast level : range -127~127, default : 0 */
> +	s32 contrast_level;
> +	/* Saturation level : range -127~127, default : 0 */
> +	s32 saturation_level;
> +	s32 gamma_level;
> +	struct is_tune_gammacurve gamma_curve[4];
> +	/* Hue : range -127~127, default : 0 */
> +	s32 hue;
> +	/* Sharpness blur : range -127~127, default : 0 */
> +	s32 sharpness_blur;
> +	/* Despeckle : range -127~127, default : 0 */
> +	s32 despeckle;
> +	/* Edge color supression : range -127~127, default : 0 */
> +	s32 edge_color_supression;
> +	/* Noise reduction : range -127~127, default : 0 */
> +	s32 noise_reduction;
> +	/* (32*4 + 9)*4 = 548 bytes */
> +};
> +
> +struct is_tune_region {
> +	struct is_sensor_tune sensor_tune;
> +	struct is_isp_tune isp_tune;
> +};
> +
> +struct rational_t {
> +	u32 num;
> +	u32 den;
> +};
> +
> +struct srational_t {
> +	s32 num;
> +	s32 den;
> +};
> +
> +#define FLASH_FIRED_SHIFT	0
> +#define FLASH_NOT_FIRED		0
> +#define FLASH_FIRED		1
> +
> +#define FLASH_STROBE_SHIFT				1
> +#define FLASH_STROBE_NO_DETECTION			0
> +#define FLASH_STROBE_RESERVED				1
> +#define FLASH_STROBE_RETURN_LIGHT_NOT_DETECTED		2
> +#define FLASH_STROBE_RETURN_LIGHT_DETECTED		3
> +
> +#define FLASH_MODE_SHIFT			3
> +#define FLASH_MODE_UNKNOWN			0
> +#define FLASH_MODE_COMPULSORY_FLASH_FIRING	1
> +#define FLASH_MODE_COMPULSORY_FLASH_SUPPRESSION	2
> +#define FLASH_MODE_AUTO_MODE			3
> +
> +#define FLASH_FUNCTION_SHIFT		5
> +#define FLASH_FUNCTION_PRESENT		0
> +#define FLASH_FUNCTION_NONE		1
> +
> +#define FLASH_RED_EYE_SHIFT		6
> +#define FLASH_RED_EYE_DISABLED		0
> +#define FLASH_RED_EYE_SUPPORTED		1
> +
> +enum apex_aperture_value {
> +	F1_0		= 0,
> +	F1_4		= 1,
> +	F2_0		= 2,
> +	F2_8		= 3,
> +	F4_0		= 4,
> +	F5_6		= 5,
> +	F8_9		= 6,
> +	F11_0		= 7,
> +	F16_0		= 8,
> +	F22_0		= 9,
> +	F32_0		= 10,
> +};

Exynos4 FIMC-IS driver has similar Flash and APEX aperture definitons.
They looks like taken directly from EXIF standard. Perhaps we some
EXIF definitions in a standard header file.

> +struct exif_attribute {
> +	struct rational_t exposure_time;
> +	struct srational_t shutter_speed;
> +	u32 iso_speed_rating;
> +	u32 flash;
> +	struct srational_t brightness;
> +};
> +
> +struct is_frame_header {
> +	u32 valid;
> +	u32 bad_mark;
> +	u32 captured;
> +	u32 frame_number;
> +	struct exif_attribute	exif;
> +};
> +
> +struct is_fd_rect {
> +	u32 offset_x;
> +	u32 offset_y;
> +	u32 width;
> +	u32 height;
> +};
> +
> +struct is_face_marker {
> +	u32	frame_number;
> +	struct is_fd_rect face;
> +	struct is_fd_rect left_eye;
> +	struct is_fd_rect right_eye;
> +	struct is_fd_rect mouth;
> +	u32	roll_angle;
> +	u32	yaw_angle;
> +	u32	confidence;
> +	u32	stracked;
> +	u32	tracked_faceid;
> +	u32	smile_level;
> +	u32	blink_level;
> +};
> +
> +#define MAX_FRAME_COUNT		8
> +#define MAX_FRAME_COUNT_PREVIEW	4
> +#define MAX_FRAME_COUNT_CAPTURE	1
> +#define MAX_FACE_COUNT		16
> +
> +#define MAX_SHARED_COUNT	500
> +
> +struct is_region {
> +	struct is_param_region	parameter;
> +	struct is_tune_region	tune;
> +	struct is_frame_header	header[MAX_FRAME_COUNT];
> +	struct is_face_marker	face[MAX_FACE_COUNT];
> +	u32			shared[MAX_SHARED_COUNT];
> +};
> +
> +struct is_time_measure_us {
> +	u32  min_time_us;
> +	u32  max_time_us;
> +	u32  avrg_time_us;
> +	u32  current_time_us;
> +};
> +
> +struct is_debug_frame_descriptor {
> +	u32	sensor_frame_time;
> +	u32	sensor_exposure_time;
> +	u32	sensor_analog_gain;
> +	u32	req_lei;
> +};
> +
> +#define MAX_FRAMEDESCRIPTOR_CONTEXT_NUM	(30 * 20)	/* 600 frame */

s/frame/frames

> +#define MAX_VERSION_DISPLAY_BUF		(32)
> +
> +struct is_share_region {
> +	u32	frame_time;
> +	u32	exposure_time;
> +	u32	analog_gain;
> +
> +	u32	r_gain;
> +	u32	g_gain;
> +	u32	b_gain;
> +
> +	u32	af_position;
> +	u32	af_status;
> +	u32	af_scene_type;
> +
> +	u32	frame_descp_onoff_control;
> +	u32	frame_descp_update_done;
> +	u32	frame_descp_idx;
> +	u32	frame_descp_max_idx;
> +
> +	struct is_debug_frame_descriptor
> +		dbg_frame_descp_ctx[MAX_FRAMEDESCRIPTOR_CONTEXT_NUM];
> +
> +	u32	chip_id;
> +	u32	chip_rev_no;
> +	u8	ispfw_version_no[MAX_VERSION_DISPLAY_BUF];
> +	u8	ispfw_version_date[MAX_VERSION_DISPLAY_BUF];
> +	u8	sirc_sdk_version_no[MAX_VERSION_DISPLAY_BUF];
> +	u8	sirc_sdk_revsion_no[MAX_VERSION_DISPLAY_BUF];
> +	u8	sirc_sdk_version_date[MAX_VERSION_DISPLAY_BUF];
> +
> +	/*measure timing*/
> +	struct is_time_measure_us	isp_sdk_time;
> +};
> +
> +struct is_debug_control {
> +	u32 write_point;	/* 0~500KB boundary*/
> +	u32 assert_flag;	/* 0:Not Inovked, 1:Invoked*/

s/Inovked/Invoked

> +	u32 pabort_flag;	/* 0:Not Inovked, 1:Invoked*/
> +	u32 dabort_flag;	/* 0:Not Inovked, 1:Invoked*/
> +	u32 pd_ready_flag;	/* 0:Normal, 1:EnterIdle(Ready to power down)*/
> +	u32 isp_frameerr;	/* Frame Error Count.*/

s/frameerr/frame_err ?
Is there a need to repeat same comment for all these fields ?

Perhaps you could put at the first entry only, e.g.

				/* Frame error counters */ ?

> +	u32 drc_frame_err;	/* Frame Error Count.*/
> +	u32 scc_frame_err;	/* Frame Error Count.*/
> +	u32 odc_frame_err;	/* Frame Error Count.*/
> +	u32 dis_frame_err;	/* Frame Error Count.*/
> +	u32 tdnr_frame_err;	/* Frame Error Count.*/
> +	u32 scp_frame_err;	/* Frame Error Count.*/
> +	u32 fd_frame_err;	/* Frame Error Count.*/
> +	u32 isp_frame_drop;	/* Frame Drop Count.*/

And similarly here
				/* Frame drop counters */

> +	u32 drc_frame_drop;	/* Frame Drop Count.*/
> +	u32 dis_frame_drop;	/* Frame Drop Count.*/
> +	u32 uifdframedrop;
> +};
> +
> +#endif

Guys, I was wondering how difficult would be to make a common driver
for the Exynos4 and Exynos5 FIMC-IS ? My feeling is that it would allow
to save significant amount of code, since the hardware has many
similarities. I imagine it would be a lot of work, and testing would have
been a bit difficult. But would it really to troublesome to make a common
driver ? Could you list some arguments against it ? For the MFC we have
same driver, handling different firmware versions. Similarly for the other
media IPs. Only the FIMC-IS subsystems would have separate drivers.
My intentions is really only to reduce the amount of code we would have
to merge with this new driver, nothing else. But I'm not going to push
for the common driver if this is too much trouble.

Thanks,
Sylwester

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Sylwester Nawrocki]

On 05/31/2013 03:03 PM, Arun Kumar K wrote:
> FIMC-IS uses certain sensors which are exclusively controlled
> from the IS firmware. This patch adds the sensor subdev for the
> fimc-is sensors.
>
> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
> ---
>   drivers/media/platform/exynos5-is/fimc-is-sensor.c |  463 ++++++++++++++++++++
>   drivers/media/platform/exynos5-is/fimc-is-sensor.h |  168 +++++++
>   2 files changed, 631 insertions(+)
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.c
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.h
>
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.c b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
> new file mode 100644
> index 0000000..b8fb834
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
> @@ -0,0 +1,463 @@
> +/*
> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + * Arun Kumar K<arun.kk@samsung.com>
> + * Kil-yeon Lim<kilyeon.im@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include<linux/gpio.h>
> +#include<linux/of_gpio.h>
> +#include<linux/i2c.h>
> +#include<linux/of.h>
> +#include<linux/of_platform.h>
> +#include<media/v4l2-of.h>
> +#include "fimc-is-sensor.h"
> +#include "fimc-is.h"
> +
> +#define DRIVER_NAME "fimc-is-sensor"
> +
> +static char *sensor_clock_name[] = {
> +	[SCLK_BAYER]	= "sclk_bayer",
> +	[SCLK_CAM0]	= "sclk_cam0",
> +	[SCLK_CAM1]	= "sclk_cam1",
> +};
> +
> +/* Sensor supported formats */
> +static struct v4l2_mbus_framefmt sensor_formats[FIMC_IS_MAX_SENSORS] = {
> +	[SENSOR_S5K4E5] = {
> +		.width          = SENSOR_4E5_WIDTH + 16,
> +		.height         = SENSOR_4E5_HEIGHT + 10,
> +		.code           = V4L2_MBUS_FMT_SGRBG10_1X10,
> +		.field          = V4L2_FIELD_NONE,
> +		.colorspace     = V4L2_COLORSPACE_SRGB,
> +	},
> +	[SENSOR_S5K6A3] = {
> +		.width          = SENSOR_6A3_WIDTH + 16,
> +		.height         = SENSOR_6A3_HEIGHT + 10,
> +		.code           = V4L2_MBUS_FMT_SGRBG10_1X10,
> +		.field          = V4L2_FIELD_NONE,
> +		.colorspace     = V4L2_COLORSPACE_SRGB,
> +	},
> +};
> +
> +static struct fimc_is_sensor *sd_to_fimc_is_sensor(struct v4l2_subdev *sd)
> +{
> +	return container_of(sd, struct fimc_is_sensor, subdev);
> +}
> +
> +static void sensor_clk_put(struct fimc_is_sensor *sensor)
> +{
> +	int i;
> +
> +	for (i = 0; i<  SCLK_MAX_NUM; i++) {
> +		if (IS_ERR(sensor->clock[i]))
> +			continue;
> +		clk_unprepare(sensor->clock[i]);
> +		clk_put(sensor->clock[i]);
> +		sensor->clock[i] = ERR_PTR(-EINVAL);
> +	}
> +}
> +
> +static int sensor_clk_init(struct fimc_is_sensor *sensor)
> +{
> +	int i, ret;
> +
> +	/* Get CAM clocks */
> +	for (i = 0; i<  SCLK_MAX_NUM; i++) {
> +		sensor->clock[i] = clk_get(NULL, sensor_clock_name[i]);
> +		if (IS_ERR(sensor->clock[i]))
> +			goto err;
> +		ret = clk_prepare(sensor->clock[i]);
> +		if (ret<  0) {
> +			clk_put(sensor->clock[i]);
> +			sensor->clock[i] = ERR_PTR(-EINVAL);
> +			goto err;
> +		}
> +	}
> +
> +	/* Set clock rates */
> +	ret = clk_set_rate(sensor->clock[SCLK_CAM0], 24 * 1000000);
> +	ret |= clk_set_rate(sensor->clock[SCLK_BAYER], 24 * 1000000);

Please don't obfuscate the return value.

> +	if (ret) {
> +		pr_err("Failed to set cam clock rates\n");
> +		goto err;
> +	}
> +	return 0;
> +err:
> +	sensor_clk_put(sensor);
> +	pr_err("Failed to init sensor clock\n");
> +	return -ENXIO;

> +}
> +
> +static int sensor_clk_enable(struct fimc_is_sensor *sensor)
> +{
> +	int ret = 0, i;
> +
> +	for (i = 0; i<  SCLK_MAX_NUM; i++) {
> +		ret = clk_enable(sensor->clock[i]);
> +		if (ret)
> +			return ret;
> +	}

Oh, so you enable all clocks in this driver ? Is it really flexible
enough ? What if one of these clocks is connected to some external
sensor with an ISP ? Are this clocks going to be managed/exposed by
the media device driver as well ?

> +	return ret;
> +}
> +
> +static void sensor_clk_disable(struct fimc_is_sensor *sensor)
> +{
> +	int i;
> +
> +	for (i = 0; i<  SCLK_MAX_NUM; i++)
> +		clk_disable(sensor->clock[i]);
> +}
> +
> +static int sensor_enum_mbus_code(struct v4l2_subdev *sd,
> +				  struct v4l2_subdev_fh *fh,
> +				  struct v4l2_subdev_mbus_code_enum *code)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +	struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
> +
> +	if (!code)
> +		return -EINVAL;
> +
> +	code->code = sensor_formats[sdata->sensor_id].code;
> +	return 0;
> +}
> +
> +static int sensor_set_fmt(struct v4l2_subdev *sd,
> +			  struct v4l2_subdev_fh *fh,
> +			  struct v4l2_subdev_format *fmt)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +	struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
> +	struct v4l2_mbus_framefmt *sfmt =&fmt->format;
> +
> +	if ((sfmt->width != sensor_formats[sdata->sensor_id].width) ||
> +		(sfmt->height != sensor_formats[sdata->sensor_id].height) ||
> +		(sfmt->code != sensor_formats[sdata->sensor_id].code))

Couldn't this check be just dropped ?

> +		*sfmt = sensor_formats[sdata->sensor_id];
> +
> +	return 0;
> +}
> +
> +static int sensor_get_fmt(struct v4l2_subdev *sd,
> +			  struct v4l2_subdev_fh *fh,
> +			  struct v4l2_subdev_format *fmt)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +	struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
> +
> +	fmt->format = sensor_formats[sdata->sensor_id];
> +	return 0;
> +}
> +
> +static struct v4l2_subdev_pad_ops sensor_pad_ops = {
> +	.enum_mbus_code		= sensor_enum_mbus_code,
> +	.get_fmt		= sensor_get_fmt,
> +	.set_fmt		= sensor_set_fmt,
> +};
> +
> +static int sensor_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
> +{
> +	struct v4l2_mbus_framefmt *format = v4l2_subdev_get_try_format(fh, 0);
> +
> +	*format = sensor_formats[0];
> +	return 0;
> +}
> +
> +static const struct v4l2_subdev_internal_ops sensor_sd_internal_ops = {
> +	.open = sensor_open,
> +};
> +
> +static int sensor_s_power(struct v4l2_subdev *sd, int on)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +
> +	if (on) {
> +		/* Power on sensor */
> +		sensor_clk_enable(sensor);

The return value from at least this function should not be ignored.

> +		gpio_set_value(sensor->gpio_reset, 1);
> +	} else {
> +		/* Power off sensor */
> +		gpio_set_value(sensor->gpio_reset, 0);
> +		sensor_clk_disable(sensor);
> +	}
> +	return 0;
> +}
> +
> +static struct v4l2_subdev_core_ops sensor_core_ops = {
> +	.s_power = sensor_s_power,
> +};
> +
> +static int sensor_s_stream(struct v4l2_subdev *sd, int enable)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +	int ret;
> +
> +	if (enable) {
> +		pr_debug("Stream ON\n");
> +		/* Open pipeline */
> +		ret = fimc_is_pipeline_open(sensor->pipeline, sensor);
> +		if (ret<  0) {
> +			pr_err("Pipeline already opened.\n");
> +			return -EBUSY;
> +		}

'fimc_is_pipeline_' might be a bit confusing prefix for these FIMC-IS
firmware interface functions, perhaps fimc_ischain_ or something similar
would be more explicit. But that's just my personal impression, let's
don't bother with it.

> +		/* Start IS pipeline */
> +		ret = fimc_is_pipeline_start(sensor->pipeline);

OK, using the FIMC-IS firmware interface calls from within the subdev
drivers is fine. But does the whole pipeline need to be initialized,
the firmware and the setfile loaded and devices powered on from within
the sensor's subdev s_stream() operation ?

This is what really bother me most in the current design. Why couldn't
the media device driver handle dependencies between the subdevs, e.g.
when sensor -> mipi-csis -> fimc-lite -> memory processing pipeline is
started, couldn't it call s_power/s_stream on the ISP subdev when those
calls are made on the sensor subdev ?

> +		if (ret<  0) {
> +			pr_err("Pipeline start failed.\n");
> +			return -EINVAL;

			return ret; ?	
> +		}
> +	} else {
> +		pr_debug("Stream OFF\n");
> +		/* Stop IS pipeline */
> +		ret = fimc_is_pipeline_stop(sensor->pipeline);
> +		if (ret<  0) {
> +			pr_err("Pipeline stop failed.\n");
> +			return -EINVAL;

			return ret; ?	
> +		}
> +
> +		/* Close pipeline */
> +		ret = fimc_is_pipeline_close(sensor->pipeline);
> +		if (ret<  0) {
> +			pr_err("Pipeline close failed\n");
> +			return -EBUSY;
> +		}
> +	}
> +
> +	return 0;
> +}
> +
> +static const struct v4l2_subdev_video_ops sensor_video_ops = {
> +	.s_stream       = sensor_s_stream,
> +};
> +
> +static struct v4l2_subdev_ops sensor_subdev_ops = {
> +	.core =&sensor_core_ops,
> +	.pad =&sensor_pad_ops,
> +	.video =&sensor_video_ops,
> +};
> +
> +static int sensor_parse_dt(struct fimc_is_sensor *sensor,
> +			struct device_node *sensor_node)
> +{
> +	struct device_node *port, *ep, *remote, *fimc_is_node, *camera;
> +	struct fimc_is *is_data;
> +	struct platform_device *pdev_is;
> +	struct v4l2_of_endpoint endpoint;

> +	/* Parse ports */
> +	port = sensor_node;
> +	while ((port = of_get_next_child(port, NULL))) {
> +		if (!of_node_cmp(port->name, "port"))
> +			break;
> +		of_node_put(port);
> +	};
> +	if (!port) {
> +		pr_err("Sensor port undefined\n");
> +		return -EINVAL;
> +	}
> +
> +	ep = of_get_next_child(port, NULL);
> +	if (!ep)
> +		return -EINVAL;
> +
> +	port = of_parse_phandle(ep, "remote-endpoint", 0);
> +	if (port) {
> +		v4l2_of_parse_endpoint(port,&endpoint);
> +		sensor->i2c_ch = (endpoint.port>>  2)&  0x1;
> +	}

Couldn't some of this code be replaced with v4l2_of_get_next_endpoint() ?

> +	remote = v4l2_of_get_remote_port_parent(ep);
> +	of_node_put(ep);
> +
> +	if (!remote)
> +		return -EINVAL;
> +
> +	camera = of_get_parent(remote);
> +	fimc_is_node = NULL;
> +	while ((fimc_is_node = of_get_next_child(camera, fimc_is_node))) {
> +		if (!of_node_cmp(fimc_is_node->name, "fimc-is"))
> +			break;
> +		of_node_put(fimc_is_node);
> +	};
> +	of_node_put(camera);
> +
> +	if (!fimc_is_node)
> +		return -EINVAL;
> +
> +	/* Get the IS pipeline context */
> +	pdev_is = of_find_device_by_node(fimc_is_node);
> +	is_data = dev_get_drvdata(&pdev_is->dev);
> +
> +	if (!is_data)
> +		return -EINVAL;
> +
> +	sensor->pipeline =&is_data->pipeline;
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id fimc_is_sensor_of_match[];
> +
> +static int fimc_is_sensor_probe(struct i2c_client *client,
> +				const struct i2c_device_id *id)
> +{
> +	struct device *dev =&client->dev;
> +	struct fimc_is_sensor *sensor;
> +	const struct of_device_id *of_id;
> +	struct v4l2_subdev *sd;
> +	int gpio, ret;
> +	unsigned int sensor_id;
> +
> +	sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
> +	if (!sensor)
> +		return -ENOMEM;
> +
> +	sensor->gpio_reset = -EINVAL;
> +
> +	gpio = of_get_gpio_flags(dev->of_node, 0, NULL);
> +	if (gpio_is_valid(gpio)) {
> +		ret = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, DRIVER_NAME);

You could use devm_gpio_request_one, so the GPIO is properly freed on
the driver's removal. You should test this driver built as a module as well.

> +		if (ret<  0)
> +			return ret;
> +	}
> +	pr_err("GPIO Request success : %d", gpio);

pr_debug() or needs to be removed.

> +	sensor->gpio_reset = gpio;
> +
> +	of_id = of_match_node(fimc_is_sensor_of_match, dev->of_node);
> +	if (!of_id) {
> +		ret = -ENODEV;
> +		goto err_gpio;
> +	}
> +
> +	sensor->drvdata = (struct fimc_is_sensor_drv_data *) of_id->data;

No need for casting. Just make struct fimc_is_sensor:drvdata 'const'.

> +	sensor->dev = dev;
> +
> +	/* Get FIMC-IS context */
> +	ret = sensor_parse_dt(sensor, dev->of_node);
> +	if (ret) {
> +		pr_err("Unable to obtain IS context\n");
> +		ret = -ENODEV;

Is overwriting ret really needed ?

> +		goto err_gpio;
> +	}
> +
> +	sd =&sensor->subdev;
> +	v4l2_i2c_subdev_init(sd, client,&sensor_subdev_ops);
> +	snprintf(sd->name, sizeof(sd->name), sensor->drvdata->sensor_name);
> +	sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
> +
> +	sensor_id = sensor->drvdata->sensor_id;
> +	sensor->format.code = sensor_formats[sensor_id].code;
> +	sensor->format.width = sensor_formats[sensor_id].width;
> +	sensor->format.height = sensor_formats[sensor_id].height;
> +
> +	sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
> +	ret = media_entity_init(&sd->entity, 1,&sensor->pad, 0);
> +	if (ret<  0)
> +		goto err_gpio;
> +
> +	v4l2_set_subdevdata(sd, sensor);
> +	i2c_set_clientdata(client,&sensor->subdev);
> +
> +	pm_runtime_no_callbacks(dev);
> +	pm_runtime_enable(dev);
> +	sensor_clk_init(sensor);
> +
> +	return 0;
> +err_gpio:
> +	if (gpio_is_valid(sensor->gpio_reset))
> +		gpio_free(sensor->gpio_reset);
> +	return ret;
> +}
> +
> +static int fimc_is_sensor_remove(struct i2c_client *client)
> +{
> +	struct v4l2_subdev *sd = i2c_get_clientdata(client);
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +
> +	media_entity_cleanup(&sensor->subdev.entity);
> +	sensor_clk_put(sensor);
> +
> +	return 0;
> +}
> +
> +static const struct i2c_device_id fimc_is_sensor_ids[] = {
> +	{ }
> +};
> +
> +static const struct fimc_is_sensor_drv_data s5k4e5_drvdata = {
> +	.sensor_id = SENSOR_S5K4E5,
> +	.sensor_name = "s5k4e5",
> +	.pixel_width = SENSOR_4E5_WIDTH + 16,
> +	.pixel_height = SENSOR_4E5_HEIGHT + 10,
> +	.active_width = SENSOR_4E5_WIDTH,
> +	.active_height = SENSOR_4E5_HEIGHT,
> +	.max_framerate = 30,
> +	.setfile_name = "setfile_4e5.bin",
> +	.ext = {
> +		.actuator_con = {
> +			.product_name = ACTUATOR_NAME_DWXXXX,
> +			.peri_type = SE_I2C,
> +			.peri_setting.i2c.channel = SENSOR_CONTROL_I2C0,
> +		},
> +		.flash_con = {
> +			.product_name = FLADRV_NAME_KTD267,
> +			.peri_type = SE_GPIO,
> +			.peri_setting.gpio.first_gpio_port_no = 1,
> +			.peri_setting.gpio.second_gpio_port_no = 2,
> +		},
> +		.from_con.product_name = FROMDRV_NAME_NOTHING,
> +		.mclk = 0,
> +		.mipi_lane_num = 0,
> +		.mipi_speed = 0,
> +		.fast_open_sensor = 0,
> +		.self_calibration_mode = 0,
> +	},
> +};
> +
> +static const struct fimc_is_sensor_drv_data s5k6a3_drvdata = {
> +	.sensor_id = SENSOR_S5K6A3,
> +	.sensor_name = "s5k6a3",
> +	.pixel_width = SENSOR_6A3_WIDTH + 16,
> +	.pixel_height = SENSOR_6A3_HEIGHT + 10,
> +	.active_width = SENSOR_6A3_WIDTH,
> +	.active_height = SENSOR_6A3_HEIGHT,
> +	.max_framerate = 30,
> +	.setfile_name = "setfile_6a3.bin",
> +};
> +
> +static const struct of_device_id fimc_is_sensor_of_match[] = {
> +	{
> +		.compatible	= "samsung,s5k4e5",
> +		.data		=&s5k4e5_drvdata,
> +	},
> +	{
> +		.compatible	= "samsung,s5k6a3",
> +		.data		=&s5k6a3_drvdata,
> +	},
> +	{  }
> +};
> +MODULE_DEVICE_TABLE(of, fimc_is_sensor_of_match);
> +
> +static struct i2c_driver fimc_is_sensor_driver = {
> +	.driver = {
> +		.of_match_table	= fimc_is_sensor_of_match,
> +		.name		= DRIVER_NAME,
> +		.owner		= THIS_MODULE,
> +	},
> +	.probe		= fimc_is_sensor_probe,
> +	.remove		= fimc_is_sensor_remove,
> +	.id_table	= fimc_is_sensor_ids,
> +};
> +
> +module_i2c_driver(fimc_is_sensor_driver);
> +
> +MODULE_AUTHOR("Arun Kumar K<arun.kk@samsung.com>");
> +MODULE_DESCRIPTION("Exynos5 FIMC-IS sensor subdev driver");
> +MODULE_LICENSE("GPL");
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.h b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
> new file mode 100644
> index 0000000..75e5f20
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
> @@ -0,0 +1,168 @@
> +/*
> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + * Arun Kumar K<arun.kk@samsung.com>
> + * Kil-yeon Lim<kilyeon.im@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef FIMC_IS_SENSOR_H_
> +#define FIMC_IS_SENSOR_H_
> +
> +#include<linux/clk.h>
> +#include<linux/device.h>
> +#include<linux/kernel.h>
> +#include<linux/platform_device.h>
> +#include<linux/regulator/consumer.h>
> +#include<linux/videodev2.h>
> +#include<media/v4l2-subdev.h>
> +
> +#include "fimc-is-pipeline.h"
> +
> +#define FIMC_IS_MAX_CAMIF_CLIENTS	2
> +#define FIMC_IS_MAX_NAME_LEN		32
> +#define FIMC_IS_MAX_GPIO_NUM		32
> +#define UART_ISP_SEL			0
> +#define UART_ISP_RATIO			1
> +
> +#define FIMC_IS_MAX_SENSORS		4
> +
> +#define SENSOR_4E5_WIDTH		2560
> +#define SENSOR_4E5_HEIGHT		1920
> +#define SENSOR_6A3_WIDTH		1392
> +#define SENSOR_6A3_HEIGHT		1392
> +
> +enum sensor_id {
> +	SENSOR_S5K3H2	= 1,
> +	SENSOR_S5K6A3	= 2,
> +	SENSOR_S5K4E5	= 3,
> +	SENSOR_S5K3H7	= 4,
> +	SENSOR_CUSTOM	= 100,
> +	SENSOR_END
> +};
> +
> +enum sensor_channel {
> +	SENSOR_CONTROL_I2C0	 = 0,
> +	SENSOR_CONTROL_I2C1	 = 1
> +};
> +
> +enum actuator_name {
> +	ACTUATOR_NAME_AD5823	= 1,
> +	ACTUATOR_NAME_DWXXXX	= 2,
> +	ACTUATOR_NAME_AK7343	= 3,
> +	ACTUATOR_NAME_HYBRIDVCA	= 4,
> +	ACTUATOR_NAME_NOTHING	= 100,
> +	ACTUATOR_NAME_END
> +};
> +
> +enum flash_drv_name {
> +	FLADRV_NAME_KTD267	= 1,
> +	FLADRV_NAME_NOTHING	= 100,
> +	FLADRV_NAME_END
> +};
> +
> +enum from_name {
> +	FROMDRV_NAME_W25Q80BW	= 1,
> +	FROMDRV_NAME_NOTHING
> +};
> +
> +enum sensor_peri_type {
> +	SE_I2C,
> +	SE_SPI,
> +	SE_GPIO,
> +	SE_MPWM,
> +	SE_ADC,
> +	SE_NULL
> +};
> +
> +struct i2c_type {
> +	u32 channel;
> +	u32 slave_address;
> +	u32 speed;
> +};
> +
> +struct spi_type {
> +	u32 channel;
> +};
> +
> +struct gpio_type {
> +	u32 first_gpio_port_no;
> +	u32 second_gpio_port_no;
> +};
> +
> +union sensor_peri_format {
> +	struct i2c_type i2c;
> +	struct spi_type spi;
> +	struct gpio_type gpio;
> +};
> +
> +struct sensor_protocol {
> +	unsigned int product_name;
> +	enum sensor_peri_type peri_type;
> +	union sensor_peri_format peri_setting;
> +};
> +
> +struct fimc_is_sensor_ext {
> +	struct sensor_protocol actuator_con;
> +	struct sensor_protocol flash_con;
> +	struct sensor_protocol from_con;
> +
> +	unsigned int mclk;
> +	unsigned int mipi_lane_num;
> +	unsigned int mipi_speed;
> +	unsigned int fast_open_sensor;
> +	unsigned int self_calibration_mode;
> +};
> +
> +struct fimc_is_sensor_drv_data {
> +	unsigned int	sensor_id;
> +	char		*sensor_name;
> +	unsigned int	pixel_width;
> +	unsigned int	pixel_height;
> +	unsigned int	active_width;
> +	unsigned int	active_height;
> +	unsigned int	max_framerate;
> +	struct fimc_is_sensor_ext ext;
> +	char		*setfile_name;
> +};
> +
> +enum sensor_clks {
> +	SCLK_BAYER,
> +	SCLK_CAM0,
> +	SCLK_CAM1,
> +	SCLK_MAX_NUM,
> +};
> +
> +struct sensor_pix_format {
> +	enum v4l2_mbus_pixelcode code;
> +};
> +
> +/**
> + * struct fimc_is_sensor - fimc-is sensor context
> + * @pad: media pad
> + * @subdev: sensor subdev
> + * @clock: sensor clocks array
> + * @dev: sensor device ptr
> + * @pipeline: is pipeline context pointer
> + * @drvdata: sensor specific driver data
> + * @format: v4l2 mbus format for the subdev
> + * @gpio_reset: gpio pin to be used for sensor power on/off
> + * @i2c_ch: sensor's i2c channel number
> + */
> +struct fimc_is_sensor {
> +	struct media_pad		pad;
> +	struct v4l2_subdev		subdev;
> +	struct clk			*clock[SCLK_MAX_NUM];
> +	struct device			*dev;
> +
> +	struct fimc_is_pipeline		*pipeline;
> +	struct fimc_is_sensor_drv_data	*drvdata;
> +	struct v4l2_mbus_framefmt	format;
> +	int				gpio_reset;
> +	unsigned int			i2c_ch;
> +};
> +
> +#endif /* FIMC_IS_SENSOR_H_ */

Thanks,
Sylwester

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Sylwester Nawrocki]

On 05/31/2013 03:03 PM, Arun Kumar K wrote:
> fimc-is driver takes video data input from the ISP video node
> which is added in this patch. This node accepts Bayer input
> buffers which is given from the IS sensors.
>
> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
> ---
>   drivers/media/platform/exynos5-is/fimc-is-isp.c |  438 +++++++++++++++++++++++
>   drivers/media/platform/exynos5-is/fimc-is-isp.h |   89 +++++
>   2 files changed, 527 insertions(+)
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.c
>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.h
>
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-isp.c b/drivers/media/platform/exynos5-is/fimc-is-isp.c
> new file mode 100644
> index 0000000..2890f17
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-isp.c
> @@ -0,0 +1,438 @@
> +/*
> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + *  Arun Kumar K<arun.kk@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include<media/v4l2-ioctl.h>
> +#include<media/videobuf2-dma-contig.h>
> +
> +#include "fimc-is.h"
> +
> +#define ISP_DRV_NAME "fimc-is-isp"
> +
> +static const struct fimc_is_fmt formats[] = {
> +	{
> +		.name           = "Bayer GR-BG 8bits",
> +		.fourcc         = V4L2_PIX_FMT_SGRBG8,
> +		.depth		= {8},

Please add spaces betwen {} and the number.

> +		.num_planes     = 1,
> +	},
> +	{
> +		.name           = "Bayer GR-BG 10bits",
> +		.fourcc         = V4L2_PIX_FMT_SGRBG10,
> +		.depth		= {10},
> +		.num_planes     = 1,
> +	},
> +	{
> +		.name           = "Bayer GR-BG 12bits",
> +		.fourcc         = V4L2_PIX_FMT_SGRBG12,
> +		.depth		= {12},
> +		.num_planes     = 1,
> +	},
> +};
> +#define NUM_FORMATS ARRAY_SIZE(formats)
> +
> +static struct fimc_is_fmt *find_format(struct v4l2_format *f)

Make the return value 'const'...

> +{
> +	unsigned int i;
> +
> +	for (i = 0; i<  NUM_FORMATS; i++) {
> +		if (formats[i].fourcc == f->fmt.pix_mp.pixelformat)
> +			return (struct fimc_is_fmt *)&formats[i];

and drop the casting here.

> +	}
> +	return NULL;
> +}
> +
> +static int isp_video_output_start_streaming(struct vb2_queue *vq,
> +					unsigned int count)
> +{
> +	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
> +
> +	/* Set state to RUNNING */

This comment doesn't add any value.

> +	set_bit(STATE_RUNNING,&isp->output_state);
> +	return 0;
> +}
> +
> +static int isp_video_output_stop_streaming(struct vb2_queue *vq)
> +{
> +	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
> +
> +	clear_bit(STATE_RUNNING,&isp->output_state);
> +	return 0;
> +}
> +
> +static int isp_video_output_queue_setup(struct vb2_queue *vq,
> +			const struct v4l2_format *pfmt,
> +			unsigned int *num_buffers, unsigned int *num_planes,
> +			unsigned int sizes[], void *allocators[])
> +{
> +	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
> +	struct fimc_is_fmt *fmt = isp->fmt;
> +	unsigned int wh, i;
> +
> +	if (!fmt)
> +		return -EINVAL;
> +
> +	*num_planes = fmt->num_planes;
> +	wh = isp->width * isp->height;
> +
> +	for (i = 0; i<  *num_planes; i++) {
> +		allocators[i] = isp->alloc_ctx;
> +		sizes[i] = (wh * fmt->depth[i]) / 8;
> +	}
> +	return 0;
> +}
> +
> +static int isp_video_output_buffer_init(struct vb2_buffer *vb)
> +{
> +	struct vb2_queue *vq = vb->vb2_queue;
> +	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
> +	struct fimc_is_buf *buf;
> +
> +	buf =&isp->output_bufs[vb->v4l2_buf.index];
> +	/* Initialize buffer */
> +	buf->vb = vb;
> +	buf->paddr[0] = vb2_dma_contig_plane_dma_addr(vb, 0);
> +	isp->out_buf_cnt++;
> +	return 0;
> +}
> +
> +static void isp_video_output_buffer_queue(struct vb2_buffer *vb)
> +{
> +	struct vb2_queue *vq = vb->vb2_queue;
> +	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
> +	struct fimc_is_buf *buf;
> +
> +	buf =&isp->output_bufs[vb->v4l2_buf.index];
> +
> +	fimc_is_pipeline_buf_lock(isp->pipeline);
> +	fimc_is_isp_wait_queue_add(isp, buf);
> +	fimc_is_pipeline_buf_unlock(isp->pipeline);
> +
> +	/* Call shot command */
> +	fimc_is_pipeline_shot(isp->pipeline);
> +}
> +
> +static void isp_lock(struct vb2_queue *vq)
> +{
> +	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
> +	mutex_lock(&isp->video_lock);
> +}
> +
> +static void isp_unlock(struct vb2_queue *vq)
> +{
> +	struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
> +	mutex_unlock(&isp->video_lock);
> +}
> +
> +static const struct vb2_ops isp_video_output_qops = {
> +	.queue_setup	 = isp_video_output_queue_setup,
> +	.buf_init	 = isp_video_output_buffer_init,
> +	.buf_queue	 = isp_video_output_buffer_queue,
> +	.wait_prepare	 = isp_unlock,
> +	.wait_finish	 = isp_lock,
> +	.start_streaming = isp_video_output_start_streaming,
> +	.stop_streaming	 = isp_video_output_stop_streaming,
> +};
> +
> +static int isp_video_output_open(struct file *file)
> +{
> +	struct fimc_is_isp *isp = video_drvdata(file);
> +	int ret = 0;
> +
> +	/* Check if opened before */
> +	if (isp->refcount>= FIMC_IS_MAX_INSTANCES) {
> +		pr_err("All instances are in use.\n");
> +		return -EBUSY;

Multiple open() should be allowed. And device node drivers should
use struct v4l2_fh.

> +	}
> +
> +	INIT_LIST_HEAD(&isp->wait_queue);
> +	isp->wait_queue_cnt = 0;
> +	INIT_LIST_HEAD(&isp->run_queue);
> +	isp->run_queue_cnt = 0;

This does not belong here, I would put it into the start_streaming
handler.

> +	isp->refcount++;
> +	return ret;
> +}
> +
> +static int isp_video_output_close(struct file *file)
> +{
> +	struct fimc_is_isp *isp = video_drvdata(file);
> +	int ret = 0;

This variable looks redundant.

> +	isp->refcount--;
> +	isp->output_state = 0;
> +	vb2_fop_release(file);

> +	return ret;
> +}
> +
> +static const struct v4l2_file_operations isp_video_output_fops = {
> +	.owner		= THIS_MODULE,
> +	.open		= isp_video_output_open,
> +	.release	= isp_video_output_close,
> +	.poll		= vb2_fop_poll,
> +	.unlocked_ioctl	= video_ioctl2,
> +	.mmap		= vb2_fop_mmap,
> +};
> +
> +/*
> + * Video node ioctl operations
> + */
> +static int isp_querycap_output(struct file *file, void *priv,
> +					struct v4l2_capability *cap)
> +{
> +	strncpy(cap->driver, ISP_DRV_NAME, sizeof(cap->driver) - 1);
> +	strncpy(cap->card, ISP_DRV_NAME, sizeof(cap->card) - 1);
> +	strncpy(cap->bus_info, ISP_DRV_NAME, sizeof(cap->bus_info) - 1);
> +	cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT_MPLANE;
> +	cap->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT_MPLANE;

	cap->capabilities = V4L2_CAP_STREAMING;
	cap->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT_MPLANE;

This should be:

	cap->device_caps = V4L2_CAP_STREAMING;
	cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;

Media Controller device nodes must not use V4L2_CAP_VIDEO_{OUTPUT, 
CAPTURE}_(_MPLANE)
capability flags.

> +	return 0;
> +}
> +
> +static int isp_enum_fmt_mplane(struct file *file, void *priv,
> +				     struct v4l2_fmtdesc *f)
> +{
> +	const struct fimc_is_fmt *fmt;
> +
> +	if (f->index>= NUM_FORMATS)
> +		return -EINVAL;
> +
> +	fmt =&formats[f->index];
> +	strlcpy(f->description, fmt->name, sizeof(f->description));
> +	f->pixelformat = fmt->fourcc;
> +
> +	return 0;
> +}
> +
> +static int isp_g_fmt_mplane(struct file *file, void *fh,
> +				  struct v4l2_format *f)
> +{
> +	struct fimc_is_isp *isp = video_drvdata(file);
> +	struct v4l2_pix_format_mplane *pixm =&f->fmt.pix_mp;
> +	struct v4l2_plane_pix_format *plane_fmt =&pixm->plane_fmt[0];
> +	const struct fimc_is_fmt *fmt = isp->fmt;
> +
> +	plane_fmt->bytesperline = (isp->width * fmt->depth[0]) / 8;
> +	plane_fmt->sizeimage = plane_fmt->bytesperline * isp->height;
> +
> +	pixm->num_planes = fmt->num_planes;
> +	pixm->pixelformat = fmt->fourcc;
> +	pixm->width = isp->width;
> +	pixm->height = isp->height;
> +	pixm->field = V4L2_FIELD_NONE;
> +	pixm->colorspace = V4L2_COLORSPACE_JPEG;
> +
> +	return 0;
> +}
> +
> +static int isp_try_fmt_mplane(struct file *file, void *fh,
> +		struct v4l2_format *f)
> +{
> +	struct fimc_is_fmt *fmt;
> +
> +	fmt = find_format(f);
> +	if (!fmt) {
> +		fmt = (struct fimc_is_fmt *)&formats[0];
> +		f->fmt.pix_mp.pixelformat = fmt->fourcc;
> +	}
> +
> +	if (fmt->num_planes != f->fmt.pix_mp.num_planes)
> +		f->fmt.pix_mp.num_planes = fmt->num_planes;
> +
> +	return 0;
> +}
> +
> +static int isp_s_fmt_mplane(struct file *file, void *priv,
> +		struct v4l2_format *f)
> +{
> +	struct fimc_is_isp *isp = video_drvdata(file);
> +	struct fimc_is_pipeline *p = isp->pipeline;
> +	struct fimc_is_fmt *fmt;
> +	unsigned int sensor_width, sensor_height;
> +	int ret;
> +
> +	ret = isp_try_fmt_mplane(file, priv, f);
> +	if (ret)
> +		return ret;
> +
> +	/* Get format type */
> +	fmt = find_format(f);
> +	if (!fmt) {
> +		fmt = (struct fimc_is_fmt *)&formats[0];
> +		f->fmt.pix_mp.pixelformat = fmt->fourcc;
> +		f->fmt.pix_mp.num_planes = fmt->num_planes;
> +	}
> +
> +	/* Check if same as sensor width&  height */
> +	sensor_width = p->sensor->drvdata->pixel_width;
> +	sensor_height = p->sensor->drvdata->pixel_height;
> +	if ((sensor_width != f->fmt.pix_mp.width) ||
> +		(sensor_height != f->fmt.pix_mp.height)) {

What's the point of this check ?

> +		f->fmt.pix_mp.width = sensor_width;
> +		f->fmt.pix_mp.height = sensor_height;
> +	}

> +	isp->fmt = fmt;
> +	isp->width = f->fmt.pix_mp.width;
> +	isp->height = f->fmt.pix_mp.height;
> +	isp->size_image = f->fmt.pix_mp.plane_fmt[0].sizeimage;
> +	set_bit(STATE_INIT,&isp->output_state);
> +	return 0;
> +}
> +
> +static int isp_reqbufs(struct file *file, void *priv,
> +		struct v4l2_requestbuffers *reqbufs)
> +{
> +	struct fimc_is_isp *isp = video_drvdata(file);
> +	int ret;
> +
> +	ret = vb2_reqbufs(&isp->vbq, reqbufs);
> +	if (ret) {
> +		pr_err("vb2 req buffers failed\n");
> +		return ret;
> +	}
> +
> +	isp->num_buffers = reqbufs->count;
> +	isp->out_buf_cnt = 0;
> +	set_bit(STATE_BUFS_ALLOCATED,&isp->output_state);
> +	return 0;
> +}
> +
> +static const struct v4l2_ioctl_ops isp_video_output_ioctl_ops = {
> +	.vidioc_querycap		= isp_querycap_output,
> +	.vidioc_enum_fmt_vid_out_mplane	= isp_enum_fmt_mplane,
> +	.vidioc_try_fmt_vid_out_mplane	= isp_try_fmt_mplane,
> +	.vidioc_s_fmt_vid_out_mplane	= isp_s_fmt_mplane,
> +	.vidioc_g_fmt_vid_out_mplane	= isp_g_fmt_mplane,
> +	.vidioc_reqbufs			= isp_reqbufs,
> +	.vidioc_querybuf		= vb2_ioctl_querybuf,
> +	.vidioc_qbuf			= vb2_ioctl_qbuf,
> +	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
> +	.vidioc_streamon		= vb2_ioctl_streamon,
> +	.vidioc_streamoff		= vb2_ioctl_streamoff,
> +};
> +
> +static int isp_subdev_registered(struct v4l2_subdev *sd)
> +{
> +	struct fimc_is_isp *isp = v4l2_get_subdevdata(sd);
> +	struct vb2_queue *q =&isp->vbq;
> +	struct video_device *vfd =&isp->vfd;
> +	int ret;
> +
> +	mutex_init(&isp->video_lock);
> +
> +	memset(vfd, 0, sizeof(*vfd));
> +	snprintf(vfd->name, sizeof(vfd->name), "fimc-is-isp.output");
> +
> +	vfd->fops =&isp_video_output_fops;
> +	vfd->ioctl_ops =&isp_video_output_ioctl_ops;
> +	vfd->v4l2_dev = sd->v4l2_dev;
> +	vfd->minor = -1;
> +	vfd->release = video_device_release_empty;
> +	vfd->lock =&isp->video_lock;
> +	vfd->queue = q;
> +	vfd->vfl_dir = VFL_DIR_TX;
> +
> +	memset(q, 0, sizeof(*q));
> +	q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
> +	q->io_modes = VB2_MMAP | VB2_DMABUF;
> +	q->ops =&isp_video_output_qops;
> +	q->mem_ops =&vb2_dma_contig_memops;
> +	q->drv_priv = isp;
> +
> +	ret = vb2_queue_init(q);
> +	if (ret<  0)
> +		return ret;
> +
> +	isp->vd_pad.flags = MEDIA_PAD_FL_SINK;
> +	ret = media_entity_init(&vfd->entity, 1,&isp->vd_pad, 0);
> +	if (ret<  0)
> +		return ret;
> +
> +	video_set_drvdata(vfd, isp);
> +
> +	ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
> +	if (ret<  0) {
> +		media_entity_cleanup(&vfd->entity);
> +		return ret;
> +	}
> +
> +	v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
> +		  vfd->name, video_device_node_name(vfd));
> +	return 0;
> +}
> +
> +static void isp_subdev_unregistered(struct v4l2_subdev *sd)
> +{
> +	struct fimc_is_isp *isp = v4l2_get_subdevdata(sd);
> +
> +	if (isp&&  video_is_registered(&isp->vfd))
> +		video_unregister_device(&isp->vfd);
> +}
> +
> +static const struct v4l2_subdev_internal_ops isp_subdev_internal_ops = {
> +	.registered = isp_subdev_registered,
> +	.unregistered = isp_subdev_unregistered,
> +};
> +
> +static struct v4l2_subdev_ops isp_subdev_ops;
> +
> +int fimc_is_isp_subdev_create(struct fimc_is_isp *isp,
> +		struct vb2_alloc_ctx *alloc_ctx,
> +		struct fimc_is_pipeline *pipeline)
> +{
> +	struct v4l2_ctrl_handler *handler =&isp->ctrl_handler;
> +	struct v4l2_subdev *sd =&isp->subdev;
> +	int ret;
> +
> +	/* Init context vars */
> +	isp->alloc_ctx = alloc_ctx;
> +	isp->pipeline = pipeline;
> +	isp->refcount = 0;
> +	isp->fmt = (struct fimc_is_fmt *)&formats[1];

What the casting is needed for ?

> +	v4l2_subdev_init(sd,&isp_subdev_ops);
> +	sd->owner = THIS_MODULE;
> +	sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
> +	snprintf(sd->name, sizeof(sd->name), ISP_DRV_NAME);
> +
> +	isp->subdev_pads[ISP_SD_PAD_SINK_DMA].flags = MEDIA_PAD_FL_SINK;
> +	isp->subdev_pads[ISP_SD_PAD_SINK_OTF].flags = MEDIA_PAD_FL_SINK;
> +	isp->subdev_pads[ISP_SD_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE;
> +	ret = media_entity_init(&sd->entity, ISP_SD_PADS_NUM,
> +			isp->subdev_pads, 0);
> +	if (ret<  0)
> +		return ret;
> +
> +	ret = v4l2_ctrl_handler_init(handler, 1);
> +	if (handler->error)
> +		goto err_ctrl;
> +
> +	sd->ctrl_handler = handler;
> +	sd->internal_ops =&isp_subdev_internal_ops;
> +	v4l2_set_subdevdata(sd, isp);
> +
> +	return 0;
> +
> +err_ctrl:
> +	media_entity_cleanup(&sd->entity);
> +	v4l2_ctrl_handler_free(handler);
> +	return ret;
> +}
> +
> +void fimc_is_isp_subdev_destroy(struct fimc_is_isp *isp)
> +{
> +	struct v4l2_subdev *sd =&isp->subdev;
> +
> +	v4l2_device_unregister_subdev(sd);
> +	media_entity_cleanup(&sd->entity);
> +	v4l2_ctrl_handler_free(&isp->ctrl_handler);
> +	v4l2_set_subdevdata(sd, NULL);
> +}
> +
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-isp.h b/drivers/media/platform/exynos5-is/fimc-is-isp.h
> new file mode 100644
> index 0000000..f707a8d
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-isp.h
> @@ -0,0 +1,89 @@
> +/*
> + * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2012 Samsung Electronics Co., Ltd.
> + *  Arun Kumar K<arun.kk@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef FIMC_IS_ISP_H_
> +#define FIMC_IS_ISP_H_
> +
> +#include "fimc-is-core.h"
> +#include "fimc-is-pipeline.h"
> +
> +#define FIMC_IS_ISP_REQ_BUFS_MIN	2

This is currently unused, but I guess you need to add some
code to ensure minimum number of buffer for the DMA interfaces.

> +#define ISP_SD_PAD_SINK_DMA	0
> +#define ISP_SD_PAD_SINK_OTF	1
> +#define ISP_SD_PAD_SRC		2
> +#define ISP_SD_PADS_NUM		3
> +
> +#define ISP_MAX_BUFS		2
> +
> +/**
> + * struct fimc_is_isp - ISP context
> + * @vfd: video device node
> + * @fh: v4l2 file handle
> + * @alloc_ctx: videobuf2 memory allocator context
> + * @subdev: fimc-is-isp subdev
> + * @vd_pad: media pad for the output video node
> + * @subdev_pads: the subdev media pads
> + * @ctrl_handler: v4l2 control handler
> + * @video_lock: video lock mutex
> + * @refcount: keeps track of number of instances opened
> + * @pipeline: pipeline instance for this isp context
> + * @vbq: vb2 buffers queue for ISP output video node
> + * @wait_queue: list holding buffers waiting to be queued to HW
> + * @wait_queue_cnt: wait queue number of buffers
> + * @run_queue: list holding buffers queued to HW
> + * @run_queue_cnt: run queue number of buffers
> + * @output_bufs: isp output buffers array
> + * @out_buf_cnt: number of output buffers in use
> + * @fmt: output plane format for isp
> + * @width: user configured input width
> + * @height: user configured input height
> + * @num_buffers: number of output plane buffers in use
> + * @size_image: image size in bytes
> + * @output_state: state of the output video node operations
> + */
> +struct fimc_is_isp {
> +	struct video_device		vfd;
> +	struct v4l2_fh			fh;
> +	struct vb2_alloc_ctx		*alloc_ctx;
> +	struct v4l2_subdev		subdev;
> +	struct media_pad		vd_pad;
> +	struct media_pad		subdev_pads[ISP_SD_PADS_NUM];
> +	struct v4l2_ctrl_handler	ctrl_handler;
> +
> +	struct mutex			video_lock;
> +
> +	unsigned int			refcount;
> +
> +	struct fimc_is_pipeline		*pipeline;
> +
> +	struct vb2_queue		vbq;
> +	struct list_head		wait_queue;
> +	unsigned int			wait_queue_cnt;
> +	struct list_head		run_queue;
> +	unsigned int			run_queue_cnt;
> +
> +	struct fimc_is_buf		output_bufs[ISP_MAX_BUFS];
> +	unsigned int			out_buf_cnt;
> +
> +	struct fimc_is_fmt		*fmt;
> +	unsigned int			width;
> +	unsigned int			height;
> +	unsigned int			num_buffers;
> +	unsigned int			size_image;
> +	unsigned long			output_state;
> +};
> +
> +int fimc_is_isp_subdev_create(struct fimc_is_isp *isp,
> +		struct vb2_alloc_ctx *alloc_ctx,
> +		struct fimc_is_pipeline *pipeline);
> +void fimc_is_isp_subdev_destroy(struct fimc_is_isp *isp);
> +
> +#endif /* FIMC_IS_ISP_H_ */

Thanks,
Sylwester

Re: [RFC v2 03/10] exynos5-fimc-is: Adds common driver header files

[Arun Kumar K]

Hi Sylwester,

On Fri, Jun 21, 2013 at 4:16 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> Guys, I was wondering how difficult would be to make a common driver
> for the Exynos4 and Exynos5 FIMC-IS ? My feeling is that it would allow
> to save significant amount of code, since the hardware has many
> similarities. I imagine it would be a lot of work, and testing would have
> been a bit difficult. But would it really to troublesome to make a common
> driver ? Could you list some arguments against it ? For the MFC we have
> same driver, handling different firmware versions. Similarly for the other
> media IPs. Only the FIMC-IS subsystems would have separate drivers.
> My intentions is really only to reduce the amount of code we would have
> to merge with this new driver, nothing else. But I'm not going to push
> for the common driver if this is too much trouble.

We have thought about it while starting the development and major
arguments against common driver are :

- FIMC-IS IP has significantly changed from Exynos4.
In Exynos4, it has sub-components ISP, DRC and FD where as in exynos5,
it has ISP, DRC, SCC, ODC, DIS. 3DNR, SCP and FD.

- The FW design has changed considerably to make use of camera2 api
interface. Most of the code in the new driver is for this FW interface
which are done in fimc_is_pipeline.* and fimc_is_interface.*. This is the
major reason against a common driver as the new FW expects each
input frame to be passed along with the controls in a SHOT command.
It is a request-response mode handled per-frame by the FW which is
a major design philosophy change from exynos4.

- Two scalers introduced in the pipeline capable of DMA out which
again changes the pipeline design considerably compared to exynos4.

- The only common part of code between exynos 4 and 5 now is in
the fimc-isp.c and fimc-is-sensor.c and some control structures
in header files. If re-used, only some user controls part can be
re-used and most of the code will still be different.
>From the exynos5 driver, still the fimc-is-scaler.*, fimc-is-pipeline.*,
fimc-is-interface.* has to be retained which constitutes majority of the LOC.

Regards
Arun

Re: [RFC v2 09/10] exynos5-fimc-is: Adds the hardware interface module

[Andrzej Hajda]

Hi Arun,

My few comments.

On 05/31/2013 03:03 PM, Arun Kumar K wrote:
> The hardware interface module finally sends the commands to the
> FIMC-IS firmware and runs the interrupt handler for getting the
> responses.
> 
> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
> ---
>  .../media/platform/exynos5-is/fimc-is-interface.c  | 1025 ++++++++++++++++++++
>  .../media/platform/exynos5-is/fimc-is-interface.h  |  131 +++
>  2 files changed, 1156 insertions(+)
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.c
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.h
> 
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-interface.c b/drivers/media/platform/exynos5-is/fimc-is-interface.c
> new file mode 100644
> index 0000000..63176fa
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-interface.c
> @@ -0,0 +1,1025 @@
> +/*
> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
> +*
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + * Kil-yeon Lim <kilyeon.im@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/debugfs.h>
> +#include <linux/seq_file.h>
> +#include "fimc-is.h"
> +#include "fimc-is-cmd.h"
> +#include "fimc-is-regs.h"
> +
> +#define init_request_barrier(itf) mutex_init(&itf->request_barrier)
> +#define enter_request_barrier(itf) mutex_lock(&itf->request_barrier)
> +#define exit_request_barrier(itf) mutex_unlock(&itf->request_barrier)
> +
> +static inline void itf_get_cmd(struct fimc_is_interface *itf,
> +	struct fimc_is_msg *msg, unsigned int index)
> +{
> +	struct is_common_reg __iomem *com_regs = itf->com_regs;
> +
> +	switch (index) {
> +	case INTR_GENERAL:
> +		msg->id = 0;
> +		msg->command = com_regs->ihcmd;
> +		msg->instance = com_regs->ihc_sensorid;
> +		msg->parameter1 = com_regs->ihc_param1;
> +		msg->parameter2 = com_regs->ihc_param2;
> +		msg->parameter3 = com_regs->ihc_param3;
> +		msg->parameter4 = com_regs->ihc_param4;
> +		break;
> +	case INTR_SCC_FDONE:
> +		msg->id = 0;
> +		msg->command = IHC_FRAME_DONE;
> +		msg->instance = com_regs->scc_sensor_id;
> +		msg->parameter1 = com_regs->scc_param1;
> +		msg->parameter2 = com_regs->scc_param2;
> +		msg->parameter3 = com_regs->scc_param3;
> +		msg->parameter4 = 0;
> +		break;
> +	case INTR_SCP_FDONE:
> +		msg->id = 0;
> +		msg->command = IHC_FRAME_DONE;
> +		msg->instance = com_regs->scp_sensor_id;
> +		msg->parameter1 = com_regs->scp_param1;
> +		msg->parameter2 = com_regs->scp_param2;
> +		msg->parameter3 = com_regs->scp_param3;
> +		msg->parameter4 = 0;
> +		break;
> +	case INTR_META_DONE:
> +		msg->id = 0;
> +		msg->command = IHC_FRAME_DONE;
> +		msg->instance = com_regs->meta_sensor_id;
> +		msg->parameter1 = com_regs->meta_param1;
> +		msg->parameter2 = 0;
> +		msg->parameter3 = 0;
> +		msg->parameter4 = 0;
> +		break;
> +	case INTR_SHOT_DONE:
> +		msg->id = 0;
> +		msg->command = IHC_FRAME_DONE;
> +		msg->instance = com_regs->shot_sensor_id;
> +		msg->parameter1 = com_regs->shot_param1;
> +		msg->parameter2 = com_regs->shot_param2;
> +		msg->parameter3 = 0;
> +		msg->parameter4 = 0;
> +		break;
> +	default:
> +		msg->id = 0;
> +		msg->command = 0;
> +		msg->instance = 0;
> +		msg->parameter1 = 0;
> +		msg->parameter2 = 0;
> +		msg->parameter3 = 0;
> +		msg->parameter4 = 0;
> +		pr_err("unknown command getting\n");
> +		break;
> +	}
> +}

If you memset(msg, 0, sizeof(*msg)) at the beginning of the function,
you can remove all zero assignements and the switch statement will
become much shorter.

> +
> +static inline unsigned int itf_get_intr(struct fimc_is_interface *itf)
> +{
> +	unsigned int status;
> +	struct is_common_reg __iomem *com_regs = itf->com_regs;
> +
> +	status = readl(itf->regs + INTMSR1) | com_regs->ihcmd_iflag |
> +		com_regs->scc_iflag |
> +		com_regs->scp_iflag |
> +		com_regs->meta_iflag |
> +		com_regs->shot_iflag;
> +
> +	return status;
> +}
> +
> +static void itf_set_state(struct fimc_is_interface *itf,
> +		unsigned long state)
> +{
> +	unsigned long flags;
> +	spin_lock_irqsave(&itf->slock_state, flags);
> +	__set_bit(state, &itf->state);
> +	spin_unlock_irqrestore(&itf->slock_state, flags);
> +}
> +
> +static void itf_clr_state(struct fimc_is_interface *itf,
> +		unsigned long state)
> +{
> +	unsigned long flags;
> +	spin_lock_irqsave(&itf->slock_state, flags);
> +	__clear_bit(state, &itf->state);
> +	spin_unlock_irqrestore(&itf->slock_state, flags);
> +}
> +
> +static int itf_get_state(struct fimc_is_interface *itf,
> +		unsigned long state)
> +{
> +	int ret = 0;
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&itf->slock_state, flags);
> +	ret = test_bit(state, &itf->state);
> +	spin_unlock_irqrestore(&itf->slock_state, flags);
> +	return ret;
> +}
> +
> +static void itf_init_wakeup(struct fimc_is_interface *itf)
> +{
> +	itf_set_state(itf, IS_IF_STATE_INIT);
> +	wake_up(&itf->irq_queue);
> +}
> +
> +void itf_busy_wakeup(struct fimc_is_interface *itf)
> +{
> +	itf_clr_state(itf, IS_IF_STATE_BUSY);
> +	wake_up(&itf->irq_queue);
> +}
> +
> +static int itf_wait_hw_ready(struct fimc_is_interface *itf)
> +{
> +	int ret = 0;
> +	unsigned int try_count = TRY_RECV_AWARE_COUNT;
> +	unsigned int cfg = readl(itf->regs + INTMSR0);
> +	unsigned int status = INTMSR0_GET_INTMSD(0, cfg);
> +
> +	while (status) {
> +		cfg = readl(itf->regs + INTMSR0);
> +		status = INTMSR0_GET_INTMSD(0, cfg);
> +
> +		if (try_count-- == 0) {
> +			try_count = TRY_RECV_AWARE_COUNT;
> +			pr_err("INTMSR0's 0 bit is not cleared.\n");
> +			ret = -EINVAL;
> +			break;
> +		}
> +	}
> +	return ret;
> +}

I think the body could be replaced by more clear code, for example:
{
	int t;
	for (t = TRY_RECV_AWARE_COUNT; t >= 0; t--) {
		unsigned int cfg = readl(itf->regs + INTMSR0);
		unsigned int status = INTMSR0_GET_INTMSD(0, cfg);
		if (!status)
			return 0;
	}
	pr_err("INTMSR0's 0 bit is not cleared.\n");
	return -EINVAL;
}

> +
> +static int itf_wait_idlestate(struct fimc_is_interface *itf)
> +{
> +	int ret = 0;

Initialization is not needed here.

> +
> +	ret = wait_event_timeout(itf->irq_queue,
> +			!itf_get_state(itf, IS_IF_STATE_BUSY),
> +			FIMC_IS_COMMAND_TIMEOUT);
> +	if (!ret) {
> +		pr_err("timeout");
> +		return -ETIME;
> +	}
> +	return 0;
> +}
> +
> +int fimc_is_itf_wait_init_state(struct fimc_is_interface *itf)
> +{
> +	int ret = 0;

...

> +
> +	ret = wait_event_timeout(itf->irq_queue,
> +		itf_get_state(itf, IS_IF_STATE_INIT),
> +		FIMC_IS_STARTUP_TIMEOUT);
> +
> +	if (!ret) {
> +		pr_err("timeout\n");
> +		return -ETIME;
> +	}
> +	return 0;
> +}
> +
> +static inline void itf_clr_intr(struct fimc_is_interface *itf,
> +		unsigned int index)
> +{
> +	struct is_common_reg __iomem *com_regs = itf->com_regs;
> +
> +	switch (index) {
> +	case INTR_GENERAL:
> +		writel((1<<INTR_GENERAL), itf->regs + INTCR1);
> +		com_regs->ihcmd_iflag = 0;
> +		break;
> +	case INTR_SCC_FDONE:
> +		writel((1<<INTR_SCC_FDONE), itf->regs + INTCR1);
> +		com_regs->scc_iflag = 0;
> +		break;
> +	case INTR_SCP_FDONE:
> +		writel((1<<INTR_SCP_FDONE), itf->regs + INTCR1);
> +		com_regs->scp_iflag = 0;
> +		break;
> +	case INTR_META_DONE:
> +		writel((1<<INTR_META_DONE), itf->regs + INTCR1);
> +		com_regs->meta_iflag = 0;
> +		break;
> +	case INTR_SHOT_DONE:
> +		writel((1<<INTR_SHOT_DONE), itf->regs + INTCR1);
> +		com_regs->shot_iflag = 0;
> +		break;
> +	default:
> +		pr_err("Unknown command clear\n");
> +		break;
> +	}
> +}
You could remove all writel and at the end add:
writel((1<<index), itf->regs + INTCR1). In such case s/break/return/ in
'default' statement.
> +
> +/* Send Host to IS command interrupt */
> +static void itf_hic_interrupt(struct fimc_is_interface *itf)
> +{
> +	writel(INTGR0_INTGD(0), itf->regs + INTGR0);
> +}
> +
> +static int itf_send_sensor_number(struct fimc_is_interface *itf)
> +{
> +	struct fimc_is_msg msg;
> +	unsigned long flags;
> +
> +	msg.id = 0;
> +	msg.command = ISR_DONE;
> +	msg.instance = 0;
> +	msg.parameter1 = IHC_GET_SENSOR_NUMBER;
> +
> +	msg.parameter2 = 1;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;

Replace it with:

	struct fimc_is_msg msg = {
		.command = ISR_DONE,
		.parameter1 = IHC_GET_SENSOR_NUMBER,
		.parameter2 = 1
	};
	unsigned long flags;

> +
> +	spin_lock_irqsave(&itf->slock, flags);
> +	itf->com_regs->hicmd = msg.command;
> +	itf->com_regs->hic_sensorid = msg.instance;
> +	itf->com_regs->hic_param1 = msg.parameter1;
> +	itf->com_regs->hic_param2 = msg.parameter2;
> +	itf->com_regs->hic_param3 = msg.parameter3;
> +	itf->com_regs->hic_param4 = msg.parameter4;
> +	itf_hic_interrupt(itf);
> +	spin_unlock_irqrestore(&itf->slock, flags);
> +
> +	return 0;
> +}
> +
> +static int fimc_is_itf_set_cmd(struct fimc_is_interface *itf,
> +	struct fimc_is_msg *msg)
> +{
> +	int ret = 0;
> +	bool block_io, send_cmd;
> +	unsigned long flags;
> +
> +	enter_request_barrier(itf);
> +
> +	switch (msg->command) {
> +	case HIC_STREAM_ON:
> +		if (itf->streaming == IS_IF_STREAMING_ON) {
> +			send_cmd = false;
> +		} else {
> +			send_cmd = true;
> +			block_io = true;
> +		}
> +		break;
> +	case HIC_STREAM_OFF:
> +		if (itf->streaming == IS_IF_STREAMING_OFF) {
> +			send_cmd = false;
> +		} else {
> +			send_cmd = true;
> +			block_io = true;
> +		}
> +		break;
> +	case HIC_PROCESS_START:
> +		if (itf->processing == IS_IF_PROCESSING_ON) {
> +			send_cmd = false;
> +		} else {
> +			send_cmd = true;
> +			block_io = true;
> +		}
> +		break;
> +	case HIC_PROCESS_STOP:
> +		if (itf->processing == IS_IF_PROCESSING_OFF) {
> +			send_cmd = false;
> +		} else {
> +			send_cmd = true;
> +			block_io = true;
> +		}
> +		break;
> +	case HIC_POWER_DOWN:
> +		if (itf->pdown_ready == IS_IF_POWER_DOWN_READY) {
> +			send_cmd = false;
> +		} else {
> +			send_cmd = true;
> +			block_io = true;
> +		}
> +		break;
> +	case HIC_OPEN_SENSOR:
> +	case HIC_GET_SET_FILE_ADDR:
> +	case HIC_SET_PARAMETER:
> +	case HIC_PREVIEW_STILL:
> +	case HIC_GET_STATIC_METADATA:
> +	case HIC_SET_A5_MEM_ACCESS:
> +	case HIC_SET_CAM_CONTROL:
> +		send_cmd = true;
> +		block_io = true;
> +		break;
> +	case HIC_SHOT:
> +	case ISR_DONE:
> +		send_cmd = true;
> +		block_io = false;
> +		break;
> +	default:
> +		send_cmd = true;
> +		block_io = true;
> +		break;
> +	}
> +
> +	if (!send_cmd) {
> +		pr_debug("skipped\n");
> +		goto exit;
> +	}

Remove above conditional
s/send_cmd = false/goto exit/;
s/send_cmd = true//;


> +
> +	ret = itf_wait_hw_ready(itf);
> +	if (ret) {
> +		pr_err("waiting for ready is fail");
> +		ret = -EBUSY;
> +		goto exit;
> +	}
> +
> +	spin_lock_irqsave(&itf->slock, flags);
> +	itf_set_state(itf, IS_IF_STATE_BUSY);
> +	itf->com_regs->hicmd = msg->command;
> +	itf->com_regs->hic_sensorid = msg->instance;
> +	itf->com_regs->hic_param1 = msg->parameter1;
> +	itf->com_regs->hic_param2 = msg->parameter2;
> +	itf->com_regs->hic_param3 = msg->parameter3;
> +	itf->com_regs->hic_param4 = msg->parameter4;
> +	itf_hic_interrupt(itf);
> +	spin_unlock_irqrestore(&itf->slock, flags);
> +
> +	if (!block_io)
> +		goto exit;
> +
> +	ret = itf_wait_idlestate(itf);
> +	if (ret) {
> +		pr_err("%d command is timeout\n", msg->command);
> +		itf_clr_state(itf, IS_IF_STATE_BUSY);
> +		ret = -ETIME;
> +		goto exit;
> +	}
> +
> +	if (itf->reply.command == ISR_DONE) {
> +		switch (msg->command) {
> +		case HIC_STREAM_ON:
> +			itf->streaming = IS_IF_STREAMING_ON;
> +			break;
> +		case HIC_STREAM_OFF:
> +			itf->streaming = IS_IF_STREAMING_OFF;
> +			break;
> +		case HIC_PROCESS_START:
> +			itf->processing = IS_IF_PROCESSING_ON;
> +			break;
> +		case HIC_PROCESS_STOP:
> +			itf->processing = IS_IF_PROCESSING_OFF;
> +			break;
> +		case HIC_POWER_DOWN:
> +			itf->pdown_ready = IS_IF_POWER_DOWN_READY;
> +			break;
> +		case HIC_OPEN_SENSOR:
> +			if (itf->reply.parameter1 == HIC_POWER_DOWN) {
> +				pr_err("firmware power down");
> +				itf->pdown_ready = IS_IF_POWER_DOWN_READY;
> +				ret = -ECANCELED;
> +				goto exit;
> +			} else
> +				itf->pdown_ready = IS_IF_POWER_DOWN_NREADY;
> +			break;
> +		default:
> +			break;
> +		}
> +	} else {
> +		pr_err("ISR_NDONE is occured");
> +		ret = -EINVAL;
> +	}
> +
> +exit:
> +	exit_request_barrier(itf);
> +
> +	if (ret)
> +		pr_err("Error returned from FW. See debugfs for error log\n");
> +
> +
> +	return ret;
> +}
> +
> +static int fimc_is_itf_set_cmd_shot(struct fimc_is_interface *itf,
> +		struct fimc_is_msg *msg)
> +{
> +	int ret = 0;
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&itf->slock, flags);
> +	itf->com_regs->hicmd = msg->command;
> +	itf->com_regs->hic_sensorid = msg->instance;
> +	itf->com_regs->hic_param1 = msg->parameter1;
> +	itf->com_regs->hic_param2 = msg->parameter2;
> +	itf->com_regs->hic_param3 = msg->parameter3;
> +	itf->com_regs->hic_param4 = msg->parameter4;
> +	itf->com_regs->fcount = msg->parameter3;
> +	itf_hic_interrupt(itf);
> +	spin_unlock_irqrestore(&itf->slock, flags);
> +
> +	return ret;
> +}
> +
> +static void itf_handle_general(struct fimc_is_interface *itf,
> +		struct fimc_is_msg *msg)
> +{
> +	switch (msg->command) {
> +
> +	case IHC_GET_SENSOR_NUMBER:
> +		pr_debug("IS version : %d.%d\n",
> +			ISDRV_VERSION, msg->parameter1);
> +		/* Respond with sensor number */
> +		itf_send_sensor_number(itf);
> +		itf_init_wakeup(itf);
> +		break;
> +	case ISR_DONE:
> +		switch (msg->parameter1) {
> +		case HIC_OPEN_SENSOR:
> +			pr_debug("open done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_GET_SET_FILE_ADDR:
> +			pr_debug("saddr(%p) done\n",
> +				(void *)msg->parameter2);
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_LOAD_SET_FILE:
> +			pr_debug("setfile done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_SET_A5_MEM_ACCESS:
> +			pr_debug("cfgmem done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_PROCESS_START:
> +			pr_debug("process_on done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_PROCESS_STOP:
> +			pr_debug("process_off done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_STREAM_ON:
> +			pr_debug("stream_on done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_STREAM_OFF:
> +			pr_debug("stream_off done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_SET_PARAMETER:
> +			pr_debug("s_param done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_GET_STATIC_METADATA:
> +			pr_debug("g_capability done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_PREVIEW_STILL:
> +			pr_debug("a_param(%dx%d) done\n",
> +				msg->parameter2,
> +				msg->parameter3);
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		case HIC_POWER_DOWN:
> +			pr_debug("powerdown done\n");
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		/*non-blocking command*/
> +		case HIC_SHOT:
> +			pr_err("shot done is not acceptable\n");
> +			break;
> +		case HIC_SET_CAM_CONTROL:
> +			pr_err("camctrl is not acceptable\n");
> +			break;
> +		default:
> +			pr_err("unknown done is invokded\n");
> +			break;
> +		}

You can add:
	bool is_blocking = true;
at the begining and set it to false in case of non-blocking commands.
This will allow to remove all the statements:
			memcpy(&itf->reply, msg,
			sizeof(struct fimc_is_msg));
			itf_busy_wakeup(itf);
and add one conditionally after the switch.

> +		break;
> +	case ISR_NDONE:
> +		switch (msg->parameter1) {
> +		case HIC_SHOT:
> +			pr_err("shot NOT done is not acceptable\n");
> +			break;
> +		case HIC_SET_CAM_CONTROL:
> +			pr_debug("camctrl NOT done\n");
> +			break;
> +		case HIC_SET_PARAMETER:
> +			pr_err("s_param NOT done\n");
> +			pr_err("param2 : 0x%08X\n", msg->parameter2);
> +			pr_err("param3 : 0x%08X\n", msg->parameter3);
> +			pr_err("param4 : 0x%08X\n", msg->parameter4);
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		default:
> +			pr_err("a command(%d) not done", msg->parameter1);
> +			memcpy(&itf->reply, msg,
> +				sizeof(struct fimc_is_msg));
> +			itf_busy_wakeup(itf);
> +			break;
> +		}
> +		break;
> +	case IHC_SET_FACE_MARK:
> +		pr_err("FACE_MARK(%d,%d,%d) is not acceptable\n",
> +			msg->parameter1,
> +			msg->parameter2,
> +			msg->parameter3);
> +		break;
> +	case IHC_AA_DONE:
> +		pr_err("AA_DONE(%d,%d,%d) is not acceptable\n",
> +			msg->parameter1,
> +			msg->parameter2,
> +			msg->parameter3);
> +		break;
> +	case IHC_FLASH_READY:
> +		pr_err("IHC_FLASH_READY is not acceptable");
> +		break;
> +	case IHC_NOT_READY:
> +		pr_err("IHC_NOT_READY is occured, need reset");
> +		break;
> +	default:
> +		pr_err("func_general unknown(0x%08X) end\n", msg->command);
> +		break;
> +	}
> +}
> +
> +static void itf_handle_scaler_done(struct fimc_is_interface *itf,
> +		struct fimc_is_msg *msg)
> +{
> +	struct fimc_is *is = fimc_interface_to_is(itf);
> +	struct fimc_is_pipeline *pipeline = &is->pipeline;
> +	struct fimc_is_buf *buf;
> +	struct fimc_is_scaler *scl;
> +	struct fimc_is_fmt *fmt;
> +	struct timeval *tv;
> +	struct timespec ts;
> +	unsigned int wh, i;
> +	unsigned int fcount = msg->parameter1;
> +	unsigned long *comp_state;
> +
> +	if (msg->parameter4 == SCALER_SCC) {
> +		scl = &pipeline->scaler[SCALER_SCC];
> +		comp_state = &pipeline->comp_state[IS_SCC];
> +	} else {
> +		scl = &pipeline->scaler[SCALER_SCP];
> +		comp_state = &pipeline->comp_state[IS_SCP];
> +	}
> +
> +	fmt = scl->fmt;
> +
> +	fimc_is_pipeline_buf_lock(pipeline);
> +	if (!list_empty(&scl->run_queue)) {
> +
> +		wh = scl->width * scl->height;
> +		buf = fimc_is_scaler_run_queue_get(scl);
> +		for (i = 0; i < fmt->num_planes; i++) {
> +			vb2_set_plane_payload(buf->vb, i,
> +					(wh * fmt->depth[i]) / 8);
> +		}
> +
> +		/* Set timestamp */
> +		ktime_get_ts(&ts);
> +		tv = &buf->vb->v4l2_buf.timestamp;
> +		tv->tv_sec = ts.tv_sec;
> +		tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
> +		buf->vb->v4l2_buf.sequence = fcount;
> +
> +		pr_debug("SCP buffer done %d/%d\n",
> +				msg->parameter1, msg->parameter3);
> +		vb2_buffer_done(buf->vb, VB2_BUF_STATE_DONE);
> +	}
> +	fimc_is_pipeline_buf_unlock(pipeline);
> +	clear_bit(COMP_RUN, comp_state);
> +	wake_up(&scl->event_q);
> +}
> +
> +static void itf_handle_shot_done(struct fimc_is_interface *itf,
> +		struct fimc_is_msg *msg)
> +{
> +	struct fimc_is *is = fimc_interface_to_is(itf);
> +	struct fimc_is_pipeline *pipeline = &is->pipeline;
> +	unsigned int status = msg->parameter2;
> +	struct fimc_is_buf *bayer_buf;
> +	int ret;
> +
> +	if (status != ISR_DONE)
> +		pr_err("Shot done is invalid(0x%08X)\n", status);
> +
> +	/* DQ the bayer input buffer */
> +	fimc_is_pipeline_buf_lock(pipeline);
> +	bayer_buf = fimc_is_isp_run_queue_get(&pipeline->isp);
> +	if (bayer_buf) {
> +		vb2_buffer_done(bayer_buf->vb, VB2_BUF_STATE_DONE);
> +		pr_debug("Bayer buffer done.\n");
> +	}
> +	fimc_is_pipeline_buf_unlock(pipeline);
> +
> +	/* Clear state & call shot again */
> +	clear_bit(PIPELINE_RUN, &pipeline->state);
> +
> +	ret = fimc_is_pipeline_shot(pipeline);
> +	if (ret)
> +		pr_err("Shot failed\n");
> +}
> +
> +/* Main FIMC-IS interrupt handler */
> +static irqreturn_t itf_irq_handler(int irq, void *data)
> +{
> +	struct fimc_is_interface *itf;
> +	struct fimc_is_msg msg;
> +	unsigned int status;
> +
> +	itf = (struct fimc_is_interface *)data;
> +	status = itf_get_intr(itf);
> +
> +	if (status & (1<<INTR_SHOT_DONE)) {
> +		itf_get_cmd(itf, &msg, INTR_SHOT_DONE);
> +
> +		itf_handle_shot_done(itf, &msg);
> +
> +		status &= ~(1<<INTR_SHOT_DONE);
> +		itf_clr_intr(itf, INTR_SHOT_DONE);
> +	}
> +
> +	if (status & (1<<INTR_GENERAL)) {
> +		itf_get_cmd(itf, &msg, INTR_GENERAL);
> +
> +		itf_handle_general(itf, &msg);
> +
> +		status &= ~(1<<INTR_GENERAL);
> +		itf_clr_intr(itf, INTR_GENERAL);
> +	}
> +
> +	if (status & (1<<INTR_SCC_FDONE)) {
> +		itf_get_cmd(itf, &msg, INTR_SCC_FDONE);
> +
> +		msg.parameter4 = SCALER_SCC;
> +		itf_handle_scaler_done(itf, &msg);
> +
> +		status &= ~(1<<INTR_SCC_FDONE);
> +		itf_clr_intr(itf, INTR_SCC_FDONE);
> +	}
> +
> +	if (status & (1<<INTR_SCP_FDONE)) {
> +		itf_get_cmd(itf, &msg, INTR_SCP_FDONE);
> +
> +		msg.parameter4 = SCALER_SCP;
> +		itf_handle_scaler_done(itf, &msg);
> +
> +		status &= ~(1<<INTR_SCP_FDONE);
> +		itf_clr_intr(itf, INTR_SCP_FDONE);
> +	}
> +
> +	if (status & (1<<INTR_META_DONE)) {
> +		status &= ~(1<<INTR_META_DONE);
> +		itf_clr_intr(itf, INTR_META_DONE);
> +	}

The code above seems quite redundant, putting it into a loop
would look better. Also moving body of itf_clr_intr into this loop
seems to me more clear.

> +
> +	if (status != 0)
> +		pr_err("status is NOT all clear(0x%08X)", status);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +int fimc_is_itf_open_sensor(struct fimc_is_interface *itf,
> +		unsigned int instance,
> +		unsigned int sensor_id,
> +		unsigned int i2c_channel,
> +		unsigned int sensor_ext)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_OPEN_SENSOR;
> +	msg.instance = instance;
> +	msg.parameter1 = sensor_id;
> +	msg.parameter2 = i2c_channel;
> +	msg.parameter3 = sensor_ext;
> +	msg.parameter4 = 0;

You could use initializer here instead of code,
the same for the following functions.

> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_get_setfile_addr(struct fimc_is_interface *itf,
> +		unsigned int instance, unsigned int *setfile_addr)
> +{
> +	int ret;
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_GET_SET_FILE_ADDR;
> +	msg.instance = instance;
> +	msg.parameter1 = 0;
> +	msg.parameter2 = 0;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	ret = fimc_is_itf_set_cmd(itf, &msg);
> +	*setfile_addr = itf->reply.parameter2;
> +
> +	return ret;
> +}
> +
> +int fimc_is_itf_load_setfile(struct fimc_is_interface *itf,
> +		unsigned int instance)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_LOAD_SET_FILE;
> +	msg.instance = instance;
> +	msg.parameter1 = 0;
> +	msg.parameter2 = 0;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_stream_on(struct fimc_is_interface *itf,
> +		unsigned int instance)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_STREAM_ON;
> +	msg.instance = instance;
> +	msg.parameter1 = 0;
> +	msg.parameter2 = 0;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_stream_off(struct fimc_is_interface *itf,
> +		unsigned int instance)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_STREAM_OFF;
> +	msg.instance = instance;
> +	msg.parameter1 = 0;
> +	msg.parameter2 = 0;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_process_on(struct fimc_is_interface *itf,
> +		unsigned int instance)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_PROCESS_START;
> +	msg.instance = instance;
> +	msg.parameter1 = 0;
> +	msg.parameter2 = 0;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_process_off(struct fimc_is_interface *itf,
> +		unsigned int instance)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_PROCESS_STOP;
> +	msg.instance = instance;
> +	msg.parameter1 = 0;
> +	msg.parameter2 = 0;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_set_param(struct fimc_is_interface *itf,
> +		unsigned int instance,
> +		unsigned int indexes,
> +		unsigned int lindex,
> +		unsigned int hindex)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_SET_PARAMETER;
> +	msg.instance = instance;
> +	msg.parameter1 = ISS_PREVIEW_STILL;
> +	msg.parameter2 = indexes;
> +	msg.parameter3 = lindex;
> +	msg.parameter4 = hindex;
> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_preview_still(struct fimc_is_interface *itf,
> +		unsigned int instance)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_PREVIEW_STILL;
> +	msg.instance = instance;
> +	msg.parameter1 = 0;
> +	msg.parameter2 = 0;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_get_capability(struct fimc_is_interface *itf,
> +	unsigned int instance, unsigned int address)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_GET_STATIC_METADATA;
> +	msg.instance = instance;
> +	msg.parameter1 = address;
> +	msg.parameter2 = 0;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_cfg_mem(struct fimc_is_interface *itf,
> +		unsigned int instance, unsigned int address,
> +		unsigned int size)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_SET_A5_MEM_ACCESS;
> +	msg.instance = instance;
> +	msg.parameter1 = address;
> +	msg.parameter2 = size;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	return fimc_is_itf_set_cmd(itf, &msg);
> +}
> +
> +int fimc_is_itf_shot_nblk(struct fimc_is_interface *itf,
> +		unsigned int instance, unsigned int bayer,
> +		unsigned int shot, unsigned int fcount, unsigned int rcount)
> +{
> +	struct fimc_is_msg msg;
> +
> +	msg.id = 0;
> +	msg.command = HIC_SHOT;
> +	msg.instance = instance;
> +	msg.parameter1 = bayer;
> +	msg.parameter2 = shot;
> +	msg.parameter3 = fcount;
> +	msg.parameter4 = rcount;
> +
> +	return fimc_is_itf_set_cmd_shot(itf, &msg);
> +}
> +
> +int fimc_is_itf_power_down(struct fimc_is_interface *itf,
> +		unsigned int instance)
> +{
> +	struct fimc_is_msg msg;
> +	int ret;
> +
> +	msg.id = 0;
> +	msg.command = HIC_POWER_DOWN;
> +	msg.instance = instance;
> +	msg.parameter1 = 0;
> +	msg.parameter2 = 0;
> +	msg.parameter3 = 0;
> +	msg.parameter4 = 0;
> +
> +	ret = fimc_is_itf_set_cmd(itf, &msg);
> +	itf_clr_state(itf, IS_IF_STATE_INIT);
> +
> +	return ret;
> +}
> +
> +/* Debugfs for showing FW debug messages */
> +static int fimc_is_log_show(struct seq_file *s, void *data)
> +{
> +	struct fimc_is_interface *itf = s->private;
> +	struct fimc_is *is = fimc_interface_to_is(itf);
> +
> +	const u8 *buf = (u8 *) (is->minfo.fw_vaddr + DEBUG_OFFSET);
> +
> +	if (is->minfo.fw_vaddr == 0) {
> +		pr_err("Firmware memory is not initialized\n");
> +		return -EIO;
> +	}
> +
> +	seq_printf(s, "%s\n", buf);
> +	return 0;
> +}
> +
> +static int fimc_is_debugfs_open(struct inode *inode, struct file *file)
> +{
> +	return single_open(file, fimc_is_log_show, inode->i_private);
> +}
> +
> +static const struct file_operations fimc_is_debugfs_fops = {
> +	.open		= fimc_is_debugfs_open,
> +	.read		= seq_read,
> +	.llseek		= seq_lseek,
> +	.release	= single_release,
> +};
> +
> +static void fimc_is_debugfs_remove(struct fimc_is_interface *itf)
> +{
> +	debugfs_remove(itf->debugfs_entry);
> +	itf->debugfs_entry = NULL;
> +}
> +
> +static int fimc_is_debugfs_create(struct fimc_is_interface *itf)
> +{
> +	struct dentry *dentry;
> +
> +	itf->debugfs_entry = debugfs_create_dir("fimc_is", NULL);
> +
> +	dentry = debugfs_create_file("fw_log", S_IRUGO, itf->debugfs_entry,
> +					itf, &fimc_is_debugfs_fops);
> +	if (!dentry)
> +		fimc_is_debugfs_remove(itf);
> +
> +	return itf->debugfs_entry == NULL ? -EIO : 0;
> +}
> +
> +int fimc_is_interface_init(struct fimc_is_interface *itf,
> +		void __iomem *regs, int irq)
> +{
> +	struct fimc_is *is = fimc_interface_to_is(itf);
> +	struct device *dev = &is->pdev->dev;
> +	int ret;
> +
> +	if (!regs || !irq) {
> +		pr_err("Invalid args\n");
> +		return -EINVAL;
> +	}
> +
> +	itf->regs = regs;
> +	itf->com_regs = (struct is_common_reg *)(regs + ISSR(0));
> +
> +	init_waitqueue_head(&itf->irq_queue);
> +	spin_lock_init(&itf->slock_state);
> +	spin_lock_init(&itf->slock);
> +
> +	/* Register interrupt handler */
> +	ret = devm_request_irq(dev, irq, itf_irq_handler,
> +			       0, dev_name(dev), itf);
> +	if (ret) {
> +		dev_err(dev, "Failed to install irq (%d)\n", ret);
> +		return -EINVAL;
> +	}
> +
> +	/* Initialize context vars */
> +	itf->streaming = IS_IF_STREAMING_INIT;
> +	itf->processing = IS_IF_PROCESSING_INIT;
> +	itf->pdown_ready = IS_IF_POWER_DOWN_READY;
> +	itf->debug_cnt = 0;
> +	init_request_barrier(itf);
> +
> +	/* Debugfs for FW debug log */
> +	fimc_is_debugfs_create(itf);
> +
> +	return 0;
> +}
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-interface.h b/drivers/media/platform/exynos5-is/fimc-is-interface.h
> new file mode 100644
> index 0000000..08994f0
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-interface.h
> @@ -0,0 +1,131 @@
> +/*
> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + *  Arun Kumar K <arun.kk@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef FIMC_IS_INTERFACE_H_
> +#define FIMC_IS_INTERFACE_H_
> +
> +#include "fimc-is-core.h"
> +
> +#define TRY_RECV_AWARE_COUNT    100
> +
> +#define ISDRV_VERSION		111
> +
> +#define LOWBIT_OF(num)  (num >= 32 ? 0 : (unsigned int)1<<num)
> +#define HIGHBIT_OF(num) (num >= 32 ? (unsigned int)1<<(num-32) : 0)
> +
> +enum interrupt_map {
> +	INTR_GENERAL            = 0,
> +	INTR_ISP_FDONE          = 1,
> +	INTR_SCC_FDONE          = 2,
> +	INTR_DNR_FDONE          = 3,
> +	INTR_SCP_FDONE          = 4,
> +	/* 5 is ISP YUV DONE */
> +	INTR_META_DONE          = 6,
> +	INTR_SHOT_DONE          = 7,
> +	INTR_MAX_MAP
> +};
> +
> +enum fimc_is_interface_state {
> +	IS_IF_STATE_INIT,
> +	IS_IF_STATE_OPEN,
> +	IS_IF_STATE_START,
> +	IS_IF_STATE_BUSY
> +};
> +
> +enum streaming_state {
> +	IS_IF_STREAMING_INIT,
> +	IS_IF_STREAMING_OFF,
> +	IS_IF_STREAMING_ON
> +};
> +
> +enum processing_state {
> +	IS_IF_PROCESSING_INIT,
> +	IS_IF_PROCESSING_OFF,
> +	IS_IF_PROCESSING_ON
> +};
> +
> +enum pdown_ready_state {
> +	IS_IF_POWER_DOWN_READY,
> +	IS_IF_POWER_DOWN_NREADY
> +};
> +
> +struct fimc_is_msg {
> +	unsigned int	id;
> +	unsigned int	command;
> +	unsigned int	instance;
> +	unsigned int	parameter1;
> +	unsigned int	parameter2;
> +	unsigned int	parameter3;
> +	unsigned int	parameter4;
> +};

Why not unsigned int params[4];

> +
> +struct fimc_is_interface {
> +
> +	unsigned long			state;
> +
> +	void __iomem			*regs;
> +	struct is_common_reg __iomem    *com_regs;
> +	spinlock_t			slock;
> +	spinlock_t			slock_state;
> +	wait_queue_head_t		irq_queue;
> +
> +	spinlock_t			process_barrier;
> +	struct mutex			request_barrier;
> +
> +	enum streaming_state		streaming;
> +	enum processing_state		processing;
> +	enum pdown_ready_state		pdown_ready;
> +
> +	struct fimc_is_msg		reply;
> +
> +	int				debug_cnt;
> +	struct dentry                   *debugfs_entry;
> +
> +};
> +
> +int fimc_is_interface_init(struct fimc_is_interface *itf,
> +		void __iomem *regs, int irq);
> +int fimc_is_itf_wait_init_state(struct fimc_is_interface *itf);
> +int fimc_is_itf_hw_dump(struct fimc_is_interface *itf);
> +int fimc_is_itf_open_sensor(struct fimc_is_interface *itf,
> +		unsigned int instance,
> +		unsigned int sensor_id,
> +		unsigned int i2c_channel,
> +		unsigned int sensor_ext);
> +int fimc_is_itf_get_setfile_addr(struct fimc_is_interface *this,
> +		unsigned int instance, unsigned int *setfile_addr);
> +int fimc_is_itf_load_setfile(struct fimc_is_interface *itf,
> +		unsigned int instance);
> +int fimc_is_itf_stream_on(struct fimc_is_interface *itf,
> +		unsigned int instance);
> +int fimc_is_itf_stream_off(struct fimc_is_interface *itf,
> +		unsigned int instance);
> +int fimc_is_itf_process_on(struct fimc_is_interface *itf,
> +		unsigned int instance);
> +int fimc_is_itf_process_off(struct fimc_is_interface *itf,
> +		unsigned int instance);
> +int fimc_is_itf_set_param(struct fimc_is_interface *this,
> +		unsigned int instance,
> +		unsigned int indexes,
> +		unsigned int lindex,
> +		unsigned int hindex);
> +int fimc_is_itf_preview_still(struct fimc_is_interface *itf,
> +		unsigned int instance);
> +int fimc_is_itf_get_capability(struct fimc_is_interface *itf,
> +	unsigned int instance, unsigned int address);
> +int fimc_is_itf_cfg_mem(struct fimc_is_interface *itf,
> +		unsigned int instance, unsigned int address,
> +		unsigned int size);
> +int fimc_is_itf_shot_nblk(struct fimc_is_interface *itf,
> +		unsigned int instance, unsigned int bayer,
> +		unsigned int shot, unsigned int fcount, unsigned int rcount);
> +int fimc_is_itf_power_down(struct fimc_is_interface *itf,
> +		unsigned int instance);
> +#endif
> 

Regards
Andrzej

Re: [RFC v2 07/10] exynos5-fimc-is: Adds scaler subdev

[Hans Verkuil]

On Fri May 31 2013 15:03:25 Arun Kumar K wrote:
> FIMC-IS has two hardware scalers named as scaler-codec and
> scaler-preview. This patch adds the common code handling the
> video nodes and subdevs of both the scalers.
> 
> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
> ---
>  drivers/media/platform/exynos5-is/fimc-is-scaler.c |  492 ++++++++++++++++++++
>  drivers/media/platform/exynos5-is/fimc-is-scaler.h |  107 +++++
>  2 files changed, 599 insertions(+)
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.c
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.h
> 
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-scaler.c b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
> new file mode 100644
> index 0000000..b4f3f5c
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
> @@ -0,0 +1,492 @@
> +/*
> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + *  Arun Kumar K <arun.kk@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <media/v4l2-ioctl.h>
> +#include <media/videobuf2-dma-contig.h>
> +
> +#include "fimc-is.h"
> +
> +#define IS_SCALER_DRV_NAME "fimc-is-scaler"
> +
> +static const struct fimc_is_fmt formats[] = {
> +	{
> +		.name           = "YUV 4:2:0 3p MultiPlanar",
> +		.fourcc         = V4L2_PIX_FMT_YUV420M,
> +		.depth		= {8, 2, 2},
> +		.num_planes     = 3,
> +	},
> +	{
> +		.name           = "YUV 4:2:0 2p MultiPlanar",
> +		.fourcc         = V4L2_PIX_FMT_NV12M,
> +		.depth		= {8, 4},
> +		.num_planes     = 2,
> +	},
> +	{
> +		.name           = "YUV 4:2:2 1p MultiPlanar",
> +		.fourcc         = V4L2_PIX_FMT_NV16,
> +		.depth		= {16},
> +		.num_planes     = 1,
> +	},
> +};
> +#define NUM_FORMATS ARRAY_SIZE(formats)
> +
> +static struct fimc_is_fmt *find_format(struct v4l2_format *f)
> +{
> +	unsigned int i;
> +
> +	for (i = 0; i < NUM_FORMATS; i++) {
> +		if (formats[i].fourcc == f->fmt.pix_mp.pixelformat)
> +			return (struct fimc_is_fmt *) &formats[i];
> +	}
> +	return NULL;
> +}
> +
> +static int scaler_video_capture_start_streaming(struct vb2_queue *vq,
> +					unsigned int count)
> +{
> +	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
> +	int ret;
> +
> +	/* Scaler start */
> +	ret = fimc_is_pipeline_scaler_start(ctx->pipeline,
> +			ctx->scaler_id,
> +			(unsigned int **)ctx->buf_paddr,
> +			ctx->num_buffers,
> +			ctx->fmt->num_planes);
> +	if (ret) {
> +		pr_err("Scaler start failed.\n");
> +		return -EINVAL;
> +	}
> +
> +	set_bit(STATE_RUNNING, &ctx->capture_state);
> +	return 0;
> +}
> +
> +static int scaler_video_capture_stop_streaming(struct vb2_queue *vq)
> +{
> +	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
> +	int ret;
> +
> +	/* Scaler stop */
> +	ret = fimc_is_pipeline_scaler_stop(ctx->pipeline, ctx->scaler_id);
> +	if (ret)
> +		pr_debug("Scaler already stopped.\n");
> +
> +	clear_bit(STATE_RUNNING, &ctx->capture_state);
> +	return 0;
> +}
> +
> +static int scaler_video_capture_queue_setup(struct vb2_queue *vq,
> +			const struct v4l2_format *pfmt,
> +			unsigned int *num_buffers, unsigned int *num_planes,
> +			unsigned int sizes[], void *allocators[])
> +{
> +	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
> +	struct fimc_is_fmt *fmt = ctx->fmt;
> +	unsigned int wh;
> +	int i;
> +
> +	if (!fmt)
> +		return -EINVAL;
> +
> +	*num_planes = fmt->num_planes;
> +	wh = ctx->width * ctx->height;
> +
> +	for (i = 0; i < *num_planes; i++) {
> +		allocators[i] = ctx->alloc_ctx;
> +		sizes[i] = (wh * fmt->depth[i]) / 8;
> +	}
> +	return 0;
> +}
> +
> +static int scaler_video_capture_buffer_init(struct vb2_buffer *vb)
> +{
> +	struct vb2_queue *vq = vb->vb2_queue;
> +	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
> +	struct fimc_is_buf *buf;
> +	struct fimc_is_fmt *fmt;
> +	int i;
> +
> +	buf = &ctx->capture_bufs[vb->v4l2_buf.index];
> +	/* Initialize buffer */
> +	buf->vb = vb;
> +	fmt = ctx->fmt;
> +	for (i = 0; i < fmt->num_planes; i++)
> +		buf->paddr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
> +
> +	ctx->cap_buf_cnt++;
> +	return 0;
> +}
> +
> +static void scaler_video_capture_buffer_queue(struct vb2_buffer *vb)
> +{
> +	struct vb2_queue *vq = vb->vb2_queue;
> +	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
> +	struct fimc_is_buf *buf;
> +
> +	buf = &ctx->capture_bufs[vb->v4l2_buf.index];
> +
> +	/* Add buffer to the wait queue */
> +	pr_debug("Add buffer %d in Scaler %d\n",
> +			vb->v4l2_buf.index, ctx->scaler_id);
> +	fimc_is_pipeline_buf_lock(ctx->pipeline);
> +	fimc_is_scaler_wait_queue_add(ctx, buf);
> +	fimc_is_pipeline_buf_unlock(ctx->pipeline);
> +}
> +
> +static void scaler_lock(struct vb2_queue *vq)
> +{
> +	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
> +	mutex_lock(&ctx->video_lock);
> +}
> +
> +static void scaler_unlock(struct vb2_queue *vq)
> +{
> +	struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
> +	mutex_unlock(&ctx->video_lock);
> +}
> +
> +static const struct vb2_ops scaler_video_capture_qops = {
> +	.queue_setup		= scaler_video_capture_queue_setup,
> +	.buf_init		= scaler_video_capture_buffer_init,
> +	.buf_queue		= scaler_video_capture_buffer_queue,
> +	.wait_prepare		= scaler_unlock,
> +	.wait_finish		= scaler_lock,
> +	.start_streaming	= scaler_video_capture_start_streaming,
> +	.stop_streaming		= scaler_video_capture_stop_streaming,
> +};
> +
> +static int scaler_video_capture_open(struct file *file)
> +{
> +	struct fimc_is_scaler *ctx = video_drvdata(file);
> +	int ret = 0;
> +
> +	/* Check if opened before */
> +	if (ctx->refcount >= FIMC_IS_MAX_INSTANCES) {
> +		pr_err("All instances are in use.\n");
> +		return -EBUSY;
> +	}
> +
> +	INIT_LIST_HEAD(&ctx->wait_queue);
> +	ctx->wait_queue_cnt = 0;
> +	INIT_LIST_HEAD(&ctx->run_queue);
> +	ctx->run_queue_cnt = 0;
> +
> +	ctx->fmt = NULL;
> +	ctx->refcount++;
> +
> +	return ret;
> +}
> +
> +static int scaler_video_capture_close(struct file *file)
> +{
> +	struct fimc_is_scaler *ctx = video_drvdata(file);
> +	int ret = 0;
> +
> +	ctx->refcount--;
> +	ctx->capture_state = 0;
> +	vb2_fop_release(file);
> +
> +	return ret;
> +}
> +
> +static const struct v4l2_file_operations scaler_video_capture_fops = {
> +	.owner		= THIS_MODULE,
> +	.open		= scaler_video_capture_open,
> +	.release	= scaler_video_capture_close,
> +	.poll		= vb2_fop_poll,
> +	.unlocked_ioctl	= video_ioctl2,
> +	.mmap		= vb2_fop_mmap,
> +};
> +
> +/*
> + * Video node ioctl operations
> + */
> +static int scaler_querycap_capture(struct file *file, void *priv,
> +					struct v4l2_capability *cap)
> +{
> +	strncpy(cap->driver, IS_SCALER_DRV_NAME, sizeof(cap->driver) - 1);
> +	strncpy(cap->card, IS_SCALER_DRV_NAME, sizeof(cap->card) - 1);
> +	strncpy(cap->bus_info, IS_SCALER_DRV_NAME, sizeof(cap->bus_info) - 1);

bus_info for a platform device must be prefixed with "platform:"

> +	cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;

You are missing V4L2_CAP_DEVICE_CAPS.

It's easier to write:

	cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;

> +	cap->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
> +	return 0;
> +}
> +
> +static int scaler_enum_fmt_mplane(struct file *file, void *priv,
> +				     struct v4l2_fmtdesc *f)
> +{
> +	const struct fimc_is_fmt *fmt;
> +
> +	if (f->index >= NUM_FORMATS)
> +		return -EINVAL;
> +
> +	fmt = &formats[f->index];
> +	strlcpy(f->description, fmt->name, sizeof(f->description));
> +	f->pixelformat = fmt->fourcc;
> +	return 0;
> +}
> +
> +static int scaler_g_fmt_mplane(struct file *file, void *priv,
> +				  struct v4l2_format *f)
> +{
> +	struct fimc_is_scaler *ctx = video_drvdata(file);
> +	struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
> +	struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
> +	const struct fimc_is_fmt *fmt = ctx->fmt;
> +
> +	plane_fmt->bytesperline = (ctx->width * fmt->depth[0]) / 8;
> +	plane_fmt->sizeimage = plane_fmt->bytesperline * ctx->height;
> +
> +	pixm->num_planes = fmt->num_planes;
> +	pixm->pixelformat = fmt->fourcc;
> +	pixm->width = ctx->width;
> +	pixm->height = ctx->height;
> +	pixm->field = V4L2_FIELD_NONE;
> +	pixm->colorspace = V4L2_COLORSPACE_JPEG;

priv must be zeroed: pixm->priv = 0;

> +
> +	return 0;
> +}
> +
> +static int scaler_try_fmt_mplane(struct file *file, void *priv,
> +				  struct v4l2_format *f)
> +{
> +	struct fimc_is_fmt *fmt;
> +
> +	if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
> +		return -EINVAL;

Not necessary, checked by the core for you.

> +
> +	fmt = find_format(f);
> +	if (!fmt) {
> +		fmt = (struct fimc_is_fmt *) &formats[0];
> +		f->fmt.pix_mp.pixelformat = fmt->fourcc;
> +	}
> +
> +	if (fmt->num_planes != f->fmt.pix_mp.num_planes)
> +		f->fmt.pix_mp.num_planes = fmt->num_planes;

try_fmt must also set field, colorspace, priv and calculate bytesperline
and sizeimage. Note: if the DMA supports strides > width then a
bytesperline value > width * depth must be honoured.

> +
> +	return 0;
> +}
> +
> +static int scaler_s_fmt_mplane(struct file *file, void *priv,
> +				struct v4l2_format *f)
> +{
> +	struct fimc_is_scaler *ctx = video_drvdata(file);
> +	struct fimc_is_fmt *fmt;
> +	int ret;
> +
> +	ret = scaler_try_fmt_mplane(file, priv, f);
> +	if (ret)
> +		return ret;
> +
> +	/* Get format type */
> +	fmt = find_format(f);
> +	if (!fmt) {
> +		fmt = (struct fimc_is_fmt *) &formats[0];
> +		f->fmt.pix_mp.pixelformat = fmt->fourcc;
> +		f->fmt.pix_mp.num_planes = fmt->num_planes;
> +	}
> +
> +	/* Check width & height */
> +	if (f->fmt.pix_mp.width > ctx->pipeline->sensor_width ||
> +		f->fmt.pix_mp.height > ctx->pipeline->sensor_height) {
> +		f->fmt.pix_mp.width = ctx->pipeline->sensor_width;
> +		f->fmt.pix_mp.height = ctx->pipeline->sensor_height;
> +	}
> +
> +	/* Save values to context */
> +	ctx->fmt = fmt;
> +	ctx->width = f->fmt.pix_mp.width;
> +	ctx->height = f->fmt.pix_mp.height;
> +	ctx->pipeline->scaler_width[ctx->scaler_id] = ctx->width;
> +	ctx->pipeline->scaler_height[ctx->scaler_id] = ctx->height;
> +	set_bit(STATE_INIT, &ctx->capture_state);
> +	return 0;
> +}
> +
> +static int scaler_reqbufs(struct file *file, void *priv,
> +		struct v4l2_requestbuffers *reqbufs)
> +{
> +	struct fimc_is_scaler *ctx = video_drvdata(file);
> +	int ret;
> +
> +	if (reqbufs->memory != V4L2_MEMORY_MMAP &&
> +			reqbufs->memory != V4L2_MEMORY_DMABUF) {
> +		pr_err("Memory type not supported\n");
> +		return -EINVAL;
> +	}

No need for this, vb2 checks this already.

> +
> +	if (!ctx->fmt) {
> +		pr_err("Set format not done\n");
> +		return -EINVAL;
> +	}

This should never happen, ctx->fmt must always be set to something.
On driver load a default format should be selected to ensure this.

> +
> +	/* Check whether buffers are already allocated */
> +	if (test_bit(STATE_BUFS_ALLOCATED, &ctx->capture_state)) {
> +		pr_err("Buffers already allocated\n");
> +		return -EINVAL;
> +	}

vb2 also takes care of this: vb2_is_busy()

> +
> +	ret = vb2_reqbufs(&ctx->vbq, reqbufs);
> +	if (ret) {
> +		pr_err("vb2 req buffers failed\n");
> +		return ret;
> +	}
> +
> +	ctx->num_buffers = reqbufs->count;

vb2 stores this in q->num_buffers, no need to keep track of this.

> +	ctx->cap_buf_cnt = 0;
> +	set_bit(STATE_BUFS_ALLOCATED, &ctx->capture_state);
> +	return 0;
> +}

Frankly I see no reason why you can't use vb2_ioctl_reqbufs instead.

> +
> +static const struct v4l2_ioctl_ops scaler_video_capture_ioctl_ops = {
> +	.vidioc_querycap		= scaler_querycap_capture,
> +	.vidioc_enum_fmt_vid_cap_mplane	= scaler_enum_fmt_mplane,
> +	.vidioc_try_fmt_vid_cap_mplane	= scaler_try_fmt_mplane,
> +	.vidioc_s_fmt_vid_cap_mplane	= scaler_s_fmt_mplane,
> +	.vidioc_g_fmt_vid_cap_mplane	= scaler_g_fmt_mplane,
> +	.vidioc_reqbufs			= scaler_reqbufs,
> +	.vidioc_querybuf		= vb2_ioctl_querybuf,
> +	.vidioc_qbuf			= vb2_ioctl_qbuf,
> +	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
> +	.vidioc_expbuf			= vb2_ioctl_expbuf,
> +	.vidioc_streamon		= vb2_ioctl_streamon,
> +	.vidioc_streamoff		= vb2_ioctl_streamoff,
> +};
> +
> +static int scaler_subdev_registered(struct v4l2_subdev *sd)
> +{
> +	struct fimc_is_scaler *ctx = v4l2_get_subdevdata(sd);
> +	struct vb2_queue *q = &ctx->vbq;
> +	struct video_device *vfd = &ctx->vfd;
> +	int ret;
> +
> +	mutex_init(&ctx->video_lock);
> +
> +	memset(vfd, 0, sizeof(*vfd));
> +	if (ctx->scaler_id == SCALER_SCC)
> +		snprintf(vfd->name, sizeof(vfd->name), "fimc-is-scaler.codec");
> +	else
> +		snprintf(vfd->name, sizeof(vfd->name),
> +				"fimc-is-scaler.preview");
> +
> +	vfd->fops = &scaler_video_capture_fops;
> +	vfd->ioctl_ops = &scaler_video_capture_ioctl_ops;
> +	vfd->v4l2_dev = sd->v4l2_dev;
> +	vfd->minor = -1;

No need to set this.

> +	vfd->release = video_device_release_empty;
> +	vfd->lock = &ctx->video_lock;
> +	vfd->queue = q;
> +	vfd->vfl_dir = VFL_DIR_RX;

In order to provide G/S_PRIORITY support and for supporting control events
you need to use struct v4l2_fh and set the PRIO flag in vfd->flags. See e.g.
vivi.c.

Please run the v4l2-compliance tool over any video nodes you make to check
that the driver implements everything correctly! Always use the latest version
from the v4l-utils.git repository as this utility is continuously improved.

Most if not all comments I made would have been found with that utility.
Don't leave home without it :-)

Regards,

	Hans

> +
> +	memset(q, 0, sizeof(*q));
> +	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
> +	q->io_modes = VB2_MMAP | VB2_DMABUF;
> +	q->ops = &scaler_video_capture_qops;
> +	q->mem_ops = &vb2_dma_contig_memops;
> +	q->drv_priv = ctx;
> +
> +	ret = vb2_queue_init(q);
> +	if (ret < 0)
> +		return ret;
> +
> +	ctx->vd_pad.flags = MEDIA_PAD_FL_SINK;
> +	ret = media_entity_init(&vfd->entity, 1, &ctx->vd_pad, 0);
> +	if (ret < 0)
> +		return ret;
> +
> +	video_set_drvdata(vfd, ctx);
> +
> +	ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
> +	if (ret < 0) {
> +		media_entity_cleanup(&vfd->entity);
> +		return ret;
> +	}
> +
> +	v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
> +		  vfd->name, video_device_node_name(vfd));
> +	return 0;
> +}
> +
> +static void scaler_subdev_unregistered(struct v4l2_subdev *sd)
> +{
> +	struct fimc_is_scaler *ctx = v4l2_get_subdevdata(sd);
> +
> +	if (ctx && video_is_registered(&ctx->vfd))
> +		video_unregister_device(&ctx->vfd);
> +}
> +
> +static const struct v4l2_subdev_internal_ops scaler_subdev_internal_ops = {
> +	.registered = scaler_subdev_registered,
> +	.unregistered = scaler_subdev_unregistered,
> +};
> +
> +static struct v4l2_subdev_ops scaler_subdev_ops;
> +
> +int fimc_is_scaler_subdev_create(struct fimc_is_scaler *ctx,
> +		enum fimc_is_scaler_id scaler_id,
> +		struct vb2_alloc_ctx *alloc_ctx,
> +		struct fimc_is_pipeline *pipeline)
> +{
> +	struct v4l2_ctrl_handler *handler = &ctx->ctrl_handler;
> +	struct v4l2_subdev *sd = &ctx->subdev;
> +	int ret;
> +
> +	/* Set context data */
> +	ctx->scaler_id = scaler_id;
> +	ctx->alloc_ctx = alloc_ctx;
> +	ctx->pipeline = pipeline;
> +	ctx->fmt = (struct fimc_is_fmt *) &formats[0];
> +	ctx->refcount = 0;
> +	init_waitqueue_head(&ctx->event_q);
> +
> +	/* Initialize scaler subdev */
> +	v4l2_subdev_init(sd, &scaler_subdev_ops);
> +	sd->owner = THIS_MODULE;
> +	sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
> +	if (scaler_id == SCALER_SCC)
> +		snprintf(sd->name, sizeof(sd->name), "fimc-is-scc");
> +	else
> +		snprintf(sd->name, sizeof(sd->name), "fimc-is-scp");
> +
> +	ctx->subdev_pads[SCALER_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
> +	ctx->subdev_pads[SCALER_SD_PAD_SRC_FIFO].flags = MEDIA_PAD_FL_SOURCE;
> +	ctx->subdev_pads[SCALER_SD_PAD_SRC_DMA].flags = MEDIA_PAD_FL_SOURCE;
> +	ret = media_entity_init(&sd->entity, ISP_SD_PADS_NUM,
> +			ctx->subdev_pads, 0);
> +	if (ret < 0)
> +		return ret;
> +
> +	ret = v4l2_ctrl_handler_init(handler, 1);
> +	if (handler->error)
> +		goto err_ctrl;
> +
> +	sd->ctrl_handler = handler;
> +	sd->internal_ops = &scaler_subdev_internal_ops;
> +	v4l2_set_subdevdata(sd, ctx);
> +
> +	return 0;
> +err_ctrl:
> +	media_entity_cleanup(&sd->entity);
> +	v4l2_ctrl_handler_free(handler);
> +	return ret;
> +}
> +
> +void fimc_is_scaler_subdev_destroy(struct fimc_is_scaler *ctx)
> +{
> +	struct v4l2_subdev *sd = &ctx->subdev;
> +
> +	v4l2_device_unregister_subdev(sd);
> +	media_entity_cleanup(&sd->entity);
> +	v4l2_ctrl_handler_free(&ctx->ctrl_handler);
> +	v4l2_set_subdevdata(sd, NULL);
> +}
> +
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-scaler.h b/drivers/media/platform/exynos5-is/fimc-is-scaler.h
> new file mode 100644
> index 0000000..115e00a
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-scaler.h
> @@ -0,0 +1,107 @@
> +/*
> + * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + *  Arun Kumar K <arun.kk@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef FIMC_IS_SCALER_H_
> +#define FIMC_IS_SCALER_H_
> +
> +#include <linux/sizes.h>
> +#include <linux/io.h>
> +#include <linux/irqreturn.h>
> +#include <linux/platform_device.h>
> +#include <linux/sched.h>
> +#include <linux/spinlock.h>
> +#include <linux/types.h>
> +#include <linux/videodev2.h>
> +
> +#include <media/media-entity.h>
> +#include <media/videobuf2-core.h>
> +#include <media/v4l2-device.h>
> +#include <media/v4l2-mediabus.h>
> +#include <media/s5p_fimc.h>
> +
> +#include "fimc-is-core.h"
> +
> +#define SCALER_SD_PAD_SINK	0
> +#define SCALER_SD_PAD_SRC_FIFO	1
> +#define SCALER_SD_PAD_SRC_DMA	2
> +#define SCALER_SD_PADS_NUM	3
> +
> +#define SCALER_MAX_BUFS		32
> +#define SCALER_MAX_PLANES	3
> +
> +/**
> + * struct fimc_is_scaler - fimc-is scaler structure
> + * @vfd: video device node
> + * @fh: v4l2 file handle
> + * @alloc_ctx: videobuf2 memory allocator context
> + * @subdev: fimc-is-scaler subdev
> + * @vd_pad: media pad for the output video node
> + * @subdev_pads: the subdev media pads
> + * @ctrl_handler: v4l2 control handler
> + * @video_lock: video lock mutex
> + * @refcount: keeps track of number of instances opened
> + * @event_q: notifies scaler events
> + * @pipeline: pipeline instance for this scaler context
> + * @scaler_id: distinguishes scaler preview or scaler codec
> + * @vbq: vb2 buffers queue for ISP output video node
> + * @wait_queue: list holding buffers waiting to be queued to HW
> + * @wait_queue_cnt: wait queue number of buffers
> + * @run_queue: list holding buffers queued to HW
> + * @run_queue_cnt: run queue number of buffers
> + * @capture_bufs: scaler capture buffers array
> + * @cap_buf_cnt: number of capture buffers in use
> + * @fmt: capture plane format for scaler
> + * @width: user configured output width
> + * @height: user configured output height
> + * @num_buffers: number of capture plane buffers in use
> + * @capture_state: state of the capture video node operations
> + * @buf_paddr: holds the physical address of capture buffers
> + */
> +struct fimc_is_scaler {
> +	struct video_device		vfd;
> +	struct v4l2_fh			fh;
> +	struct vb2_alloc_ctx		*alloc_ctx;
> +	struct v4l2_subdev		subdev;
> +	struct media_pad		vd_pad;
> +	struct media_pad		subdev_pads[SCALER_SD_PADS_NUM];
> +	struct v4l2_mbus_framefmt	subdev_fmt;
> +	struct v4l2_ctrl_handler	ctrl_handler;
> +
> +	struct mutex		video_lock;
> +	unsigned int		refcount;
> +	wait_queue_head_t	event_q;
> +
> +	struct fimc_is_pipeline	*pipeline;
> +	enum fimc_is_scaler_id	scaler_id;
> +
> +	struct vb2_queue	vbq;
> +	struct list_head	wait_queue;
> +	unsigned int		wait_queue_cnt;
> +	struct list_head	run_queue;
> +	unsigned int		run_queue_cnt;
> +
> +	struct fimc_is_buf	capture_bufs[SCALER_MAX_BUFS];
> +	unsigned int		cap_buf_cnt;
> +
> +	struct fimc_is_fmt	*fmt;
> +	unsigned int		width;
> +	unsigned int		height;
> +	unsigned int		num_buffers;
> +	unsigned long		capture_state;
> +	unsigned int		buf_paddr[SCALER_MAX_BUFS][SCALER_MAX_PLANES];
> +};
> +
> +int fimc_is_scaler_subdev_create(struct fimc_is_scaler *ctx,
> +		enum fimc_is_scaler_id scaler_id,
> +		struct vb2_alloc_ctx *alloc_ctx,
> +		struct fimc_is_pipeline *pipeline);
> +void fimc_is_scaler_subdev_destroy(struct fimc_is_scaler *scaler);
> +
> +#endif /* FIMC_IS_SCALER_H_ */
> 

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Hans Verkuil]

On Fri May 31 2013 15:03:24 Arun Kumar K wrote:
> fimc-is driver takes video data input from the ISP video node
> which is added in this patch. This node accepts Bayer input
> buffers which is given from the IS sensors.
> 
> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
> ---
>  drivers/media/platform/exynos5-is/fimc-is-isp.c |  438 +++++++++++++++++++++++
>  drivers/media/platform/exynos5-is/fimc-is-isp.h |   89 +++++
>  2 files changed, 527 insertions(+)
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.c
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.h
> 

The same comments I made for the scaler subdev apply here as well.

Regards,

	Hans

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Hans Verkuil]

On Fri May 31 2013 15:03:23 Arun Kumar K wrote:
> FIMC-IS uses certain sensors which are exclusively controlled
> from the IS firmware. This patch adds the sensor subdev for the
> fimc-is sensors.
> 
> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>

Not surprisingly I really hate the idea of sensor drivers that are tied to
a specific SoC, since it completely destroys the reusability of such drivers.

I understand that you have little choice to do something special here, but
I was wondering whether there is a way of keeping things as generic as
possible.

I'm just brainstorming here, but as far as I can see this driver is basically
a partial sensor driver: it handles the clock, the format negotiation and
power management. Any sensor driver needs that.

What would be nice is if the fmic specific parts are replaced by callbacks
into the bridge driver using v4l2_subdev_notify().

The platform data (or DT) can also state if this sensor is firmware controlled
or not. If not, then the missing bits can be implemented in the future by
someone who needs that.

That way the driver itself remains independent from fimc.

And existing sensor drivers can be adapted to be usable with fimc as well by
adding support for the notify callback.

Would a scheme along those lines work?

Regards,

	Hans

> ---
>  drivers/media/platform/exynos5-is/fimc-is-sensor.c |  463 ++++++++++++++++++++
>  drivers/media/platform/exynos5-is/fimc-is-sensor.h |  168 +++++++
>  2 files changed, 631 insertions(+)
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.c
>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.h
> 
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.c b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
> new file mode 100644
> index 0000000..b8fb834
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
> @@ -0,0 +1,463 @@
> +/*
> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + * Arun Kumar K <arun.kk@samsung.com>
> + * Kil-yeon Lim <kilyeon.im@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/gpio.h>
> +#include <linux/of_gpio.h>
> +#include <linux/i2c.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <media/v4l2-of.h>
> +#include "fimc-is-sensor.h"
> +#include "fimc-is.h"
> +
> +#define DRIVER_NAME "fimc-is-sensor"
> +
> +static char *sensor_clock_name[] = {
> +	[SCLK_BAYER]	= "sclk_bayer",
> +	[SCLK_CAM0]	= "sclk_cam0",
> +	[SCLK_CAM1]	= "sclk_cam1",
> +};
> +
> +/* Sensor supported formats */
> +static struct v4l2_mbus_framefmt sensor_formats[FIMC_IS_MAX_SENSORS] = {
> +	[SENSOR_S5K4E5] = {
> +		.width          = SENSOR_4E5_WIDTH + 16,
> +		.height         = SENSOR_4E5_HEIGHT + 10,
> +		.code           = V4L2_MBUS_FMT_SGRBG10_1X10,
> +		.field          = V4L2_FIELD_NONE,
> +		.colorspace     = V4L2_COLORSPACE_SRGB,
> +	},
> +	[SENSOR_S5K6A3] = {
> +		.width          = SENSOR_6A3_WIDTH + 16,
> +		.height         = SENSOR_6A3_HEIGHT + 10,
> +		.code           = V4L2_MBUS_FMT_SGRBG10_1X10,
> +		.field          = V4L2_FIELD_NONE,
> +		.colorspace     = V4L2_COLORSPACE_SRGB,
> +	},
> +};
> +
> +static struct fimc_is_sensor *sd_to_fimc_is_sensor(struct v4l2_subdev *sd)
> +{
> +	return container_of(sd, struct fimc_is_sensor, subdev);
> +}
> +
> +static void sensor_clk_put(struct fimc_is_sensor *sensor)
> +{
> +	int i;
> +
> +	for (i = 0; i < SCLK_MAX_NUM; i++) {
> +		if (IS_ERR(sensor->clock[i]))
> +			continue;
> +		clk_unprepare(sensor->clock[i]);
> +		clk_put(sensor->clock[i]);
> +		sensor->clock[i] = ERR_PTR(-EINVAL);
> +	}
> +}
> +
> +static int sensor_clk_init(struct fimc_is_sensor *sensor)
> +{
> +	int i, ret;
> +
> +	/* Get CAM clocks */
> +	for (i = 0; i < SCLK_MAX_NUM; i++) {
> +		sensor->clock[i] = clk_get(NULL, sensor_clock_name[i]);
> +		if (IS_ERR(sensor->clock[i]))
> +			goto err;
> +		ret = clk_prepare(sensor->clock[i]);
> +		if (ret < 0) {
> +			clk_put(sensor->clock[i]);
> +			sensor->clock[i] = ERR_PTR(-EINVAL);
> +			goto err;
> +		}
> +	}
> +
> +	/* Set clock rates */
> +	ret = clk_set_rate(sensor->clock[SCLK_CAM0], 24 * 1000000);
> +	ret |= clk_set_rate(sensor->clock[SCLK_BAYER], 24 * 1000000);
> +	if (ret) {
> +		pr_err("Failed to set cam clock rates\n");
> +		goto err;
> +	}
> +	return 0;
> +err:
> +	sensor_clk_put(sensor);
> +	pr_err("Failed to init sensor clock\n");
> +	return -ENXIO;
> +}
> +
> +static int sensor_clk_enable(struct fimc_is_sensor *sensor)
> +{
> +	int ret = 0, i;
> +
> +	for (i = 0; i < SCLK_MAX_NUM; i++) {
> +		ret = clk_enable(sensor->clock[i]);
> +		if (ret)
> +			return ret;
> +	}
> +	return ret;
> +}
> +
> +static void sensor_clk_disable(struct fimc_is_sensor *sensor)
> +{
> +	int i;
> +
> +	for (i = 0; i < SCLK_MAX_NUM; i++)
> +		clk_disable(sensor->clock[i]);
> +}
> +
> +static int sensor_enum_mbus_code(struct v4l2_subdev *sd,
> +				  struct v4l2_subdev_fh *fh,
> +				  struct v4l2_subdev_mbus_code_enum *code)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +	struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
> +
> +	if (!code)
> +		return -EINVAL;
> +
> +	code->code = sensor_formats[sdata->sensor_id].code;
> +	return 0;
> +}
> +
> +static int sensor_set_fmt(struct v4l2_subdev *sd,
> +			  struct v4l2_subdev_fh *fh,
> +			  struct v4l2_subdev_format *fmt)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +	struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
> +	struct v4l2_mbus_framefmt *sfmt = &fmt->format;
> +
> +	if ((sfmt->width != sensor_formats[sdata->sensor_id].width) ||
> +		(sfmt->height != sensor_formats[sdata->sensor_id].height) ||
> +		(sfmt->code != sensor_formats[sdata->sensor_id].code))
> +		*sfmt = sensor_formats[sdata->sensor_id];
> +
> +	return 0;
> +}
> +
> +static int sensor_get_fmt(struct v4l2_subdev *sd,
> +			  struct v4l2_subdev_fh *fh,
> +			  struct v4l2_subdev_format *fmt)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +	struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
> +
> +	fmt->format = sensor_formats[sdata->sensor_id];
> +	return 0;
> +}
> +
> +static struct v4l2_subdev_pad_ops sensor_pad_ops = {
> +	.enum_mbus_code		= sensor_enum_mbus_code,
> +	.get_fmt		= sensor_get_fmt,
> +	.set_fmt		= sensor_set_fmt,
> +};
> +
> +static int sensor_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
> +{
> +	struct v4l2_mbus_framefmt *format = v4l2_subdev_get_try_format(fh, 0);
> +
> +	*format = sensor_formats[0];
> +	return 0;
> +}
> +
> +static const struct v4l2_subdev_internal_ops sensor_sd_internal_ops = {
> +	.open = sensor_open,
> +};
> +
> +static int sensor_s_power(struct v4l2_subdev *sd, int on)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +
> +	if (on) {
> +		/* Power on sensor */
> +		sensor_clk_enable(sensor);
> +		gpio_set_value(sensor->gpio_reset, 1);
> +	} else {
> +		/* Power off sensor */
> +		gpio_set_value(sensor->gpio_reset, 0);
> +		sensor_clk_disable(sensor);
> +	}
> +	return 0;
> +}
> +
> +static struct v4l2_subdev_core_ops sensor_core_ops = {
> +	.s_power = sensor_s_power,
> +};
> +
> +static int sensor_s_stream(struct v4l2_subdev *sd, int enable)
> +{
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +	int ret;
> +
> +	if (enable) {
> +		pr_debug("Stream ON\n");
> +		/* Open pipeline */
> +		ret = fimc_is_pipeline_open(sensor->pipeline, sensor);
> +		if (ret < 0) {
> +			pr_err("Pipeline already opened.\n");
> +			return -EBUSY;
> +		}
> +
> +		/* Start IS pipeline */
> +		ret = fimc_is_pipeline_start(sensor->pipeline);
> +		if (ret < 0) {
> +			pr_err("Pipeline start failed.\n");
> +			return -EINVAL;
> +		}
> +	} else {
> +		pr_debug("Stream OFF\n");
> +		/* Stop IS pipeline */
> +		ret = fimc_is_pipeline_stop(sensor->pipeline);
> +		if (ret < 0) {
> +			pr_err("Pipeline stop failed.\n");
> +			return -EINVAL;
> +		}
> +
> +		/* Close pipeline */
> +		ret = fimc_is_pipeline_close(sensor->pipeline);
> +		if (ret < 0) {
> +			pr_err("Pipeline close failed\n");
> +			return -EBUSY;
> +		}
> +	}
> +
> +	return 0;
> +}
> +
> +static const struct v4l2_subdev_video_ops sensor_video_ops = {
> +	.s_stream       = sensor_s_stream,
> +};
> +
> +static struct v4l2_subdev_ops sensor_subdev_ops = {
> +	.core = &sensor_core_ops,
> +	.pad = &sensor_pad_ops,
> +	.video = &sensor_video_ops,
> +};
> +
> +static int sensor_parse_dt(struct fimc_is_sensor *sensor,
> +			struct device_node *sensor_node)
> +{
> +	struct device_node *port, *ep, *remote, *fimc_is_node, *camera;
> +	struct fimc_is *is_data;
> +	struct platform_device *pdev_is;
> +	struct v4l2_of_endpoint endpoint;
> +
> +	/* Parse ports */
> +	port = sensor_node;
> +	while ((port = of_get_next_child(port, NULL))) {
> +		if (!of_node_cmp(port->name, "port"))
> +			break;
> +		of_node_put(port);
> +	};
> +	if (!port) {
> +		pr_err("Sensor port undefined\n");
> +		return -EINVAL;
> +	}
> +
> +	ep = of_get_next_child(port, NULL);
> +	if (!ep)
> +		return -EINVAL;
> +
> +	port = of_parse_phandle(ep, "remote-endpoint", 0);
> +	if (port) {
> +		v4l2_of_parse_endpoint(port, &endpoint);
> +		sensor->i2c_ch = (endpoint.port >> 2) & 0x1;
> +	}
> +
> +	remote = v4l2_of_get_remote_port_parent(ep);
> +	of_node_put(ep);
> +
> +	if (!remote)
> +		return -EINVAL;
> +
> +	camera = of_get_parent(remote);
> +	fimc_is_node = NULL;
> +	while ((fimc_is_node = of_get_next_child(camera, fimc_is_node))) {
> +		if (!of_node_cmp(fimc_is_node->name, "fimc-is"))
> +			break;
> +		of_node_put(fimc_is_node);
> +	};
> +	of_node_put(camera);
> +
> +	if (!fimc_is_node)
> +		return -EINVAL;
> +
> +	/* Get the IS pipeline context */
> +	pdev_is = of_find_device_by_node(fimc_is_node);
> +	is_data = dev_get_drvdata(&pdev_is->dev);
> +
> +	if (!is_data)
> +		return -EINVAL;
> +
> +	sensor->pipeline = &is_data->pipeline;
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id fimc_is_sensor_of_match[];
> +
> +static int fimc_is_sensor_probe(struct i2c_client *client,
> +				const struct i2c_device_id *id)
> +{
> +	struct device *dev = &client->dev;
> +	struct fimc_is_sensor *sensor;
> +	const struct of_device_id *of_id;
> +	struct v4l2_subdev *sd;
> +	int gpio, ret;
> +	unsigned int sensor_id;
> +
> +	sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
> +	if (!sensor)
> +		return -ENOMEM;
> +
> +	sensor->gpio_reset = -EINVAL;
> +
> +	gpio = of_get_gpio_flags(dev->of_node, 0, NULL);
> +	if (gpio_is_valid(gpio)) {
> +		ret = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, DRIVER_NAME);
> +		if (ret < 0)
> +			return ret;
> +	}
> +	pr_err("GPIO Request success : %d", gpio);
> +	sensor->gpio_reset = gpio;
> +
> +	of_id = of_match_node(fimc_is_sensor_of_match, dev->of_node);
> +	if (!of_id) {
> +		ret = -ENODEV;
> +		goto err_gpio;
> +	}
> +
> +	sensor->drvdata = (struct fimc_is_sensor_drv_data *) of_id->data;
> +	sensor->dev = dev;
> +
> +	/* Get FIMC-IS context */
> +	ret = sensor_parse_dt(sensor, dev->of_node);
> +	if (ret) {
> +		pr_err("Unable to obtain IS context\n");
> +		ret = -ENODEV;
> +		goto err_gpio;
> +	}
> +
> +	sd = &sensor->subdev;
> +	v4l2_i2c_subdev_init(sd, client, &sensor_subdev_ops);
> +	snprintf(sd->name, sizeof(sd->name), sensor->drvdata->sensor_name);
> +	sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
> +
> +	sensor_id = sensor->drvdata->sensor_id;
> +	sensor->format.code = sensor_formats[sensor_id].code;
> +	sensor->format.width = sensor_formats[sensor_id].width;
> +	sensor->format.height = sensor_formats[sensor_id].height;
> +
> +	sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
> +	ret = media_entity_init(&sd->entity, 1, &sensor->pad, 0);
> +	if (ret < 0)
> +		goto err_gpio;
> +
> +	v4l2_set_subdevdata(sd, sensor);
> +	i2c_set_clientdata(client, &sensor->subdev);
> +
> +	pm_runtime_no_callbacks(dev);
> +	pm_runtime_enable(dev);
> +	sensor_clk_init(sensor);
> +
> +	return 0;
> +err_gpio:
> +	if (gpio_is_valid(sensor->gpio_reset))
> +		gpio_free(sensor->gpio_reset);
> +	return ret;
> +}
> +
> +static int fimc_is_sensor_remove(struct i2c_client *client)
> +{
> +	struct v4l2_subdev *sd = i2c_get_clientdata(client);
> +	struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
> +
> +	media_entity_cleanup(&sensor->subdev.entity);
> +	sensor_clk_put(sensor);
> +
> +	return 0;
> +}
> +
> +static const struct i2c_device_id fimc_is_sensor_ids[] = {
> +	{ }
> +};
> +
> +static const struct fimc_is_sensor_drv_data s5k4e5_drvdata = {
> +	.sensor_id = SENSOR_S5K4E5,
> +	.sensor_name = "s5k4e5",
> +	.pixel_width = SENSOR_4E5_WIDTH + 16,
> +	.pixel_height = SENSOR_4E5_HEIGHT + 10,
> +	.active_width = SENSOR_4E5_WIDTH,
> +	.active_height = SENSOR_4E5_HEIGHT,
> +	.max_framerate = 30,
> +	.setfile_name = "setfile_4e5.bin",
> +	.ext = {
> +		.actuator_con = {
> +			.product_name = ACTUATOR_NAME_DWXXXX,
> +			.peri_type = SE_I2C,
> +			.peri_setting.i2c.channel = SENSOR_CONTROL_I2C0,
> +		},
> +		.flash_con = {
> +			.product_name = FLADRV_NAME_KTD267,
> +			.peri_type = SE_GPIO,
> +			.peri_setting.gpio.first_gpio_port_no = 1,
> +			.peri_setting.gpio.second_gpio_port_no = 2,
> +		},
> +		.from_con.product_name = FROMDRV_NAME_NOTHING,
> +		.mclk = 0,
> +		.mipi_lane_num = 0,
> +		.mipi_speed = 0,
> +		.fast_open_sensor = 0,
> +		.self_calibration_mode = 0,
> +	},
> +};
> +
> +static const struct fimc_is_sensor_drv_data s5k6a3_drvdata = {
> +	.sensor_id = SENSOR_S5K6A3,
> +	.sensor_name = "s5k6a3",
> +	.pixel_width = SENSOR_6A3_WIDTH + 16,
> +	.pixel_height = SENSOR_6A3_HEIGHT + 10,
> +	.active_width = SENSOR_6A3_WIDTH,
> +	.active_height = SENSOR_6A3_HEIGHT,
> +	.max_framerate = 30,
> +	.setfile_name = "setfile_6a3.bin",
> +};
> +
> +static const struct of_device_id fimc_is_sensor_of_match[] = {
> +	{
> +		.compatible	= "samsung,s5k4e5",
> +		.data		= &s5k4e5_drvdata,
> +	},
> +	{
> +		.compatible	= "samsung,s5k6a3",
> +		.data		= &s5k6a3_drvdata,
> +	},
> +	{  }
> +};
> +MODULE_DEVICE_TABLE(of, fimc_is_sensor_of_match);
> +
> +static struct i2c_driver fimc_is_sensor_driver = {
> +	.driver = {
> +		.of_match_table	= fimc_is_sensor_of_match,
> +		.name		= DRIVER_NAME,
> +		.owner		= THIS_MODULE,
> +	},
> +	.probe		= fimc_is_sensor_probe,
> +	.remove		= fimc_is_sensor_remove,
> +	.id_table	= fimc_is_sensor_ids,
> +};
> +
> +module_i2c_driver(fimc_is_sensor_driver);
> +
> +MODULE_AUTHOR("Arun Kumar K <arun.kk@samsung.com>");
> +MODULE_DESCRIPTION("Exynos5 FIMC-IS sensor subdev driver");
> +MODULE_LICENSE("GPL");
> diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.h b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
> new file mode 100644
> index 0000000..75e5f20
> --- /dev/null
> +++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
> @@ -0,0 +1,168 @@
> +/*
> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
> + *
> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
> + * Arun Kumar K <arun.kk@samsung.com>
> + * Kil-yeon Lim <kilyeon.im@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef FIMC_IS_SENSOR_H_
> +#define FIMC_IS_SENSOR_H_
> +
> +#include <linux/clk.h>
> +#include <linux/device.h>
> +#include <linux/kernel.h>
> +#include <linux/platform_device.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/videodev2.h>
> +#include <media/v4l2-subdev.h>
> +
> +#include "fimc-is-pipeline.h"
> +
> +#define FIMC_IS_MAX_CAMIF_CLIENTS	2
> +#define FIMC_IS_MAX_NAME_LEN		32
> +#define FIMC_IS_MAX_GPIO_NUM		32
> +#define UART_ISP_SEL			0
> +#define UART_ISP_RATIO			1
> +
> +#define FIMC_IS_MAX_SENSORS		4
> +
> +#define SENSOR_4E5_WIDTH		2560
> +#define SENSOR_4E5_HEIGHT		1920
> +#define SENSOR_6A3_WIDTH		1392
> +#define SENSOR_6A3_HEIGHT		1392
> +
> +enum sensor_id {
> +	SENSOR_S5K3H2	= 1,
> +	SENSOR_S5K6A3	= 2,
> +	SENSOR_S5K4E5	= 3,
> +	SENSOR_S5K3H7	= 4,
> +	SENSOR_CUSTOM	= 100,
> +	SENSOR_END
> +};
> +
> +enum sensor_channel {
> +	SENSOR_CONTROL_I2C0	 = 0,
> +	SENSOR_CONTROL_I2C1	 = 1
> +};
> +
> +enum actuator_name {
> +	ACTUATOR_NAME_AD5823	= 1,
> +	ACTUATOR_NAME_DWXXXX	= 2,
> +	ACTUATOR_NAME_AK7343	= 3,
> +	ACTUATOR_NAME_HYBRIDVCA	= 4,
> +	ACTUATOR_NAME_NOTHING	= 100,
> +	ACTUATOR_NAME_END
> +};
> +
> +enum flash_drv_name {
> +	FLADRV_NAME_KTD267	= 1,
> +	FLADRV_NAME_NOTHING	= 100,
> +	FLADRV_NAME_END
> +};
> +
> +enum from_name {
> +	FROMDRV_NAME_W25Q80BW	= 1,
> +	FROMDRV_NAME_NOTHING
> +};
> +
> +enum sensor_peri_type {
> +	SE_I2C,
> +	SE_SPI,
> +	SE_GPIO,
> +	SE_MPWM,
> +	SE_ADC,
> +	SE_NULL
> +};
> +
> +struct i2c_type {
> +	u32 channel;
> +	u32 slave_address;
> +	u32 speed;
> +};
> +
> +struct spi_type {
> +	u32 channel;
> +};
> +
> +struct gpio_type {
> +	u32 first_gpio_port_no;
> +	u32 second_gpio_port_no;
> +};
> +
> +union sensor_peri_format {
> +	struct i2c_type i2c;
> +	struct spi_type spi;
> +	struct gpio_type gpio;
> +};
> +
> +struct sensor_protocol {
> +	unsigned int product_name;
> +	enum sensor_peri_type peri_type;
> +	union sensor_peri_format peri_setting;
> +};
> +
> +struct fimc_is_sensor_ext {
> +	struct sensor_protocol actuator_con;
> +	struct sensor_protocol flash_con;
> +	struct sensor_protocol from_con;
> +
> +	unsigned int mclk;
> +	unsigned int mipi_lane_num;
> +	unsigned int mipi_speed;
> +	unsigned int fast_open_sensor;
> +	unsigned int self_calibration_mode;
> +};
> +
> +struct fimc_is_sensor_drv_data {
> +	unsigned int	sensor_id;
> +	char		*sensor_name;
> +	unsigned int	pixel_width;
> +	unsigned int	pixel_height;
> +	unsigned int	active_width;
> +	unsigned int	active_height;
> +	unsigned int	max_framerate;
> +	struct fimc_is_sensor_ext ext;
> +	char		*setfile_name;
> +};
> +
> +enum sensor_clks {
> +	SCLK_BAYER,
> +	SCLK_CAM0,
> +	SCLK_CAM1,
> +	SCLK_MAX_NUM,
> +};
> +
> +struct sensor_pix_format {
> +	enum v4l2_mbus_pixelcode code;
> +};
> +
> +/**
> + * struct fimc_is_sensor - fimc-is sensor context
> + * @pad: media pad
> + * @subdev: sensor subdev
> + * @clock: sensor clocks array
> + * @dev: sensor device ptr
> + * @pipeline: is pipeline context pointer
> + * @drvdata: sensor specific driver data
> + * @format: v4l2 mbus format for the subdev
> + * @gpio_reset: gpio pin to be used for sensor power on/off
> + * @i2c_ch: sensor's i2c channel number
> + */
> +struct fimc_is_sensor {
> +	struct media_pad		pad;
> +	struct v4l2_subdev		subdev;
> +	struct clk			*clock[SCLK_MAX_NUM];
> +	struct device			*dev;
> +
> +	struct fimc_is_pipeline		*pipeline;
> +	struct fimc_is_sensor_drv_data	*drvdata;
> +	struct v4l2_mbus_framefmt	format;
> +	int				gpio_reset;
> +	unsigned int			i2c_ch;
> +};
> +
> +#endif /* FIMC_IS_SENSOR_H_ */
> 

Re: [RFC v2 01/10] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation

[Arun Kumar K]

Hi Sylwester,

Thank you for the review and sorry for the delayed response.

On Fri, Jun 21, 2013 at 4:15 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> Hi Arun,
>
> On 05/31/2013 03:03 PM, Arun Kumar K wrote:
>
> Please add at least one sentence here. All in all this patch
> adds DT binding documentation for a fairly complex subsystem.
>
> And please Cc devicetree-discuss@lists.ozlabs.org next time.
>

Ok will do that.

>
>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>> ---
>>   .../devicetree/bindings/media/exynos5-fimc-is.txt  |   41
>> ++++++++++++++++++++
>>   1 file changed, 41 insertions(+)
>>   create mode 100644
>> Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>
>> diff --git a/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>> b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>> new file mode 100644
>> index 0000000..9fd4646
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>> @@ -0,0 +1,41 @@
>> +Samsung EXYNOS SoC Camera Subsystem
>
>
> Shouldn't it be, e.g.:
>
> Samsung EXYNOS5 SoC series Imaging Subsystem (FIMC-IS)
>
> Or do you intend this file to be describing also the other sub-devices,
> like GScaler ?
>

Probably not. WIll change it to Imaging subsystem.

>
>> +-----------------------------------
>> +
>> +The camera subsystem on Samsung Exynos5 SoC has some changes relative
>> +to previous SoC versions. Exynos5 has almost similar MIPI-CSIS and
>> +FIMC-LITE IPs but has a much improved version of FIMC-IS which can
>> +handle sensor controls and camera post-processing operations. The
>> +Exynos5 FIMC-IS has a dedicated ARM Cortex A5 processor, many
>> +post-processing blocks (ISP, DRC, FD, ODC, DIS, 3DNR) and two
>> +dedicated scalers (SCC and SCP).
>> +
>> +fimc-is node
>> +------------
>> +
>> +Required properties:
>> +
>> +- compatible        : must be "samsung,exynos5250-fimc-is"
>> +- reg               : physical base address and size of the memory mapped
>> +                      registers
>> +- interrupt-parent  : Parent interrupt controller
>> +- interrupts        : fimc-is interrupt to the parent combiner
>> +- clocks            : list of clock specifiers, corresponding to entries
>> in
>> +                      clock-names property;
>> +- clock-names       : must contain "isp", "mcu_isp", "isp_div0",
>> "isp_div1",
>> +                      "isp_divmpwm", "mcu_isp_div0", "mcu_isp_div1"
>> entries,
>> +                      matching entries in the clocks property.
>> +
>> +
>> +Board specific properties:
>> +
>> +- pinctrl-names    : pinctrl names for camera port pinmux control, at
>> least
>> +                    "default" needs to be specified.
>> +- pinctrl-0...N           : pinctrl properties corresponding to
>> pinctrl-names
>
>
> What pins exactly are supposed to be covered by these properties ? For what
> devices ? Aren't the camera port pins supposed to be specified at the common
> 'camera' node ? I believe the camera ports are not specific to the FIMC-IS.
>

These are for the sensor controls (especially clock lines).
I think I should move these to the sensor node.

>
>> +pmu subnode
>> +-----------
>> +
>> +Required properties:
>> + - reg : should contain PMU physical base address and size of the memory
>> +         mapped registers.
>
>
> What about other devices, like ISP I2C, SPI ? Don't you want to list at
> least
> the ones currently used (I2C bus controllers) ?
>

The present driver doesnt make use of the SPI bus as its used only
for sensor calibration which is not yet added.
I2C bus is used by the sensor which has its own node. May be I should
explain one of the sensor nodes over here?

Regards
Arun

Re: [RFC v2 02/10] exynos5-fimc-is: Adds fimc-is driver core files

[Arun Kumar K]

Hi Sylwester,

Will make all the changes you suggested.

Thanks and regards
Arun

On Fri, Jun 21, 2013 at 4:16 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> On 05/31/2013 03:03 PM, Arun Kumar K wrote:
>>
>> This driver is for the FIMC-IS IP available in Samsung Exynos5
>> SoC onwards. This patch adds the core files for the new driver.
>>
>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
>> ---
>>   drivers/media/platform/exynos5-is/fimc-is-core.c |  304
>> ++++++++++++++++++++++
>>   drivers/media/platform/exynos5-is/fimc-is-core.h |  126 +++++++++
>>   2 files changed, 430 insertions(+)
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.c
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.h
>>
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-core.c
>> b/drivers/media/platform/exynos5-is/fimc-is-core.c
>> new file mode 100644
>> index 0000000..d24b634
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-core.c
>> @@ -0,0 +1,304 @@
>> +/*
>> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
>> +*
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + * Arun Kumar K<arun.kk@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include<linux/bug.h>
>> +#include<linux/ctype.h>
>> +#include<linux/device.h>
>> +#include<linux/debugfs.h>
>> +#include<linux/delay.h>
>> +#include<linux/errno.h>
>> +#include<linux/firmware.h>
>> +#include<linux/fs.h>
>> +#include<linux/gpio.h>
>> +#include<linux/interrupt.h>
>> +#include<linux/kernel.h>
>> +#include<linux/list.h>
>> +#include<linux/module.h>
>> +#include<linux/types.h>
>> +#include<linux/platform_device.h>
>> +#include<linux/pm_runtime.h>
>> +#include<linux/slab.h>
>> +#include<linux/videodev2.h>
>> +#include<linux/of.h>
>> +#include<linux/of_gpio.h>
>> +#include<linux/of_address.h>
>> +#include<linux/of_platform.h>
>> +#include<linux/of_irq.h>
>> +#include<linux/pinctrl/consumer.h>
>> +
>> +#include<media/v4l2-device.h>
>> +#include<media/v4l2-ioctl.h>
>> +#include<media/v4l2-mem2mem.h>
>> +#include<media/v4l2-of.h>
>> +#include<media/videobuf2-core.h>
>> +#include<media/videobuf2-dma-contig.h>
>> +
>> +#include "fimc-is.h"
>> +
>> +static char *fimc_is_clock_name[] = {
>> +       [IS_CLK_ISP]            = "isp",
>> +       [IS_CLK_MCU_ISP]        = "mcu_isp",
>> +       [IS_CLK_ISP_DIV0]       = "isp_div0",
>> +       [IS_CLK_ISP_DIV1]       = "isp_div1",
>> +       [IS_CLK_ISP_DIVMPWM]    = "isp_divmpwm",
>> +       [IS_CLK_MCU_ISP_DIV0]   = "mcu_isp_div0",
>> +       [IS_CLK_MCU_ISP_DIV1]   = "mcu_isp_div1",
>> +};
>> +
>> +static void fimc_is_clk_put(struct fimc_is *is)
>
>
> nit: fimc_is_put_clocks() would be probably a better name for this function.
>
>
>> +{
>> +       int i;
>> +
>> +       for (i = 0; i<  IS_CLK_MAX_NUM; i++) {
>> +               if (IS_ERR_OR_NULL(is->clock[i]))
>> +                       continue;
>> +               clk_unprepare(is->clock[i]);
>> +               clk_put(is->clock[i]);
>> +               is->clock[i] = NULL;
>> +       }
>> +}
>> +
>> +static int fimc_is_clk_get(struct fimc_is *is)
>
>
> nit: fimc_is_get_clocks() ?
>
>> +{
>> +       struct device *dev =&is->pdev->dev;
>>
>> +       int i, ret;
>> +
>> +       for (i = 0; i<  IS_CLK_MAX_NUM; i++) {
>> +               is->clock[i] = clk_get(dev, fimc_is_clock_name[i]);
>> +               if (IS_ERR(is->clock[i]))
>> +                       goto err;
>> +               ret = clk_prepare(is->clock[i]);
>> +               if (ret<  0) {
>> +                       clk_put(is->clock[i]);
>> +                       is->clock[i] = NULL;
>> +                       goto err;
>> +               }
>> +       }
>> +       return 0;
>> +err:
>> +       fimc_is_clk_put(is);
>> +       pr_err("Failed to get clock: %s\n", fimc_is_clock_name[i]);
>> +       return -ENXIO;
>> +}
>> +
>> +static int fimc_is_clk_cfg(struct fimc_is *is)
>
>
> nit: fimc_is_configure_clocks() ?
>
>
>> +{
>> +       int ret;
>> +
>> +       ret = fimc_is_clk_get(is);
>> +       if (ret)
>> +               return ret;
>> +
>> +       /* Set rates */
>> +       ret = clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV0], 200 * 1000000);
>> +       ret |= clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV1], 100 *
>> 1000000);
>> +       ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV0], 134 * 1000000);
>> +       ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIV1], 68 * 1000000);
>> +       ret |= clk_set_rate(is->clock[IS_CLK_ISP_DIVMPWM], 34 * 1000000);
>
>
> Please do not obfuscate return value like this.
>
>
>         ret = clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV0], 200 * 1000000);
>         if (ret)
>
>                 ret = clk_set_rate(is->clock[IS_CLK_MCU_ISP_DIV1], 100 *
> 1000000);
>         ...
>
> And how about adding macro definitions for the frequencies, rather
> than using magic numbers in the code ?
>
>> +       if (ret)
>> +               return -EINVAL;
>> +
>> +       return 0;
>> +}
>> +
>> +static int fimc_is_probe(struct platform_device *pdev)
>> +{
>> +       struct device *dev =&pdev->dev;
>>
>> +       struct resource res;
>> +       struct fimc_is *is;
>> +       struct pinctrl *pctrl;
>> +       void __iomem *regs;
>> +       struct device_node *node;
>> +       int irq, ret;
>> +
>> +       pr_debug("FIMC-IS Probe Enter\n");
>> +
>> +       if (!pdev->dev.of_node)
>> +               return -ENODEV;
>> +
>> +       is = devm_kzalloc(&pdev->dev, sizeof(*is), GFP_KERNEL);
>> +       if (!is)
>> +               return -ENOMEM;
>> +
>> +       is->pdev = pdev;
>
>
>> +       ret = of_address_to_resource(dev->of_node, 0,&res);
>>
>> +       if (ret<  0)
>> +               return ret;
>
>
> It could be simplified to:
>
>         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>
> and 'res' could be passed to devm_ioremap_resource() without any checks.
>
>> +       regs = devm_ioremap_resource(dev,&res);
>>
>> +       if (regs == NULL) {
>> +               dev_err(dev, "Failed to obtain io memory\n");
>> +               return -ENOENT;
>> +       }
>> +
>> +       /* Get the PMU base */
>> +       node = of_get_child_by_name(dev->of_node, "pmu");
>> +       if (!node)
>> +               return -ENODEV;
>> +       is->pmu_regs = of_iomap(node, 0);
>> +       if (!is->pmu_regs)
>> +               return -ENOMEM;
>> +
>> +       irq = irq_of_parse_and_map(dev->of_node, 0);
>> +       if (irq<  0) {
>> +               dev_err(dev, "Failed to get IRQ\n");
>> +               return irq;
>> +       }
>> +
>> +       ret = fimc_is_clk_cfg(is);
>> +       if (ret<  0) {
>> +               dev_err(dev, "Clock config failed\n");
>> +               goto err_clk;
>> +       }
>> +
>> +       platform_set_drvdata(pdev, is);
>> +       pm_runtime_enable(dev);
>> +
>> +       ret = pm_runtime_get_sync(dev);
>> +       if (ret<  0)
>> +               goto err_clk;
>> +
>> +       is->alloc_ctx = vb2_dma_contig_init_ctx(dev);
>> +       if (IS_ERR(is->alloc_ctx)) {
>> +               ret = PTR_ERR(is->alloc_ctx);
>> +               goto err_pm;
>> +       }
>> +
>> +       /* Init FIMC Pipeline */
>
>
> s/Init/Initialize ?
>
>
>> +       ret = fimc_is_pipeline_init(&is->pipeline, 0, is);
>> +       if (ret<  0)
>> +               goto err_sd;
>> +
>> +       /* Init FIMC Interface */
>
>
> s/Init/ Initialize
>
>
>> +       ret = fimc_is_interface_init(&is->interface, regs, irq);
>> +       if (ret<  0)
>> +               goto err_sd;
>> +
>> +       pm_runtime_put(dev);
>> +
>> +       dev_dbg(dev, "FIMC-IS registered successfully\n");
>> +
>> +       return 0;
>> +
>> +err_sd:
>> +       fimc_is_pipeline_destroy(&is->pipeline);
>> +err_vb:
>> +       vb2_dma_contig_cleanup_ctx(is->alloc_ctx);
>> +err_pm:
>> +       pm_runtime_put(dev);
>> +err_clk:
>> +       fimc_is_clk_put(is);
>> +
>> +       return ret;
>> +}
>> +
>> +int fimc_is_clk_enable(struct fimc_is *is)
>> +{
>> +       int ret;
>> +
>> +       ret = clk_enable(is->clock[IS_CLK_ISP]);
>> +       ret |= clk_enable(is->clock[IS_CLK_MCU_ISP]);
>
>
> Please don't obfuscate the return value.
>
>> +       return ret;
>> +}
>> +
>> +void fimc_is_clk_disable(struct fimc_is *is)
>> +{
>> +       clk_disable(is->clock[IS_CLK_ISP]);
>> +       clk_disable(is->clock[IS_CLK_MCU_ISP]);
>> +}
>> +
>> +static int fimc_is_pm_resume(struct device *dev)
>> +{
>> +       struct fimc_is *is = dev_get_drvdata(dev);
>> +       int ret;
>> +
>> +       ret = fimc_is_clk_enable(is);
>> +       if (ret<  0)
>> +               dev_err(dev, "Could not enable clocks\n");
>> +
>> +       return 0;
>> +}
>> +
>> +static int fimc_is_pm_suspend(struct device *dev)
>> +{
>> +       struct fimc_is *is = dev_get_drvdata(dev);
>> +
>> +       fimc_is_clk_disable(is);
>> +       return 0;
>> +}
>> +
>> +static int fimc_is_runtime_resume(struct device *dev)
>> +{
>> +       return fimc_is_pm_resume(dev);
>> +}
>> +
>> +static int fimc_is_runtime_suspend(struct device *dev)
>> +{
>> +       return fimc_is_pm_suspend(dev);
>> +}
>> +
>> +#ifdef CONFIG_PM_SLEEP
>> +static int fimc_is_resume(struct device *dev)
>> +{
>> +       return fimc_is_pm_resume(dev);
>> +}
>> +
>> +static int fimc_is_suspend(struct device *dev)
>> +{
>> +       return fimc_is_pm_suspend(dev);
>> +}
>> +#endif /* CONFIG_PM_SLEEP */
>> +
>> +static int fimc_is_remove(struct platform_device *pdev)
>> +{
>> +       struct fimc_is *is = platform_get_drvdata(pdev);
>> +       struct device *dev =&pdev->dev;
>>
>> +
>> +       pm_runtime_disable(dev);
>> +       pm_runtime_set_suspended(dev);
>> +       fimc_is_pipeline_destroy(&is->pipeline);
>> +       vb2_dma_contig_cleanup_ctx(is->alloc_ctx);
>> +       fimc_is_clk_put(is);
>> +
>> +       return 0;
>> +}
>> +
>> +static const struct dev_pm_ops fimc_is_pm_ops = {
>> +       SET_SYSTEM_SLEEP_PM_OPS(fimc_is_suspend, fimc_is_resume)
>> +       SET_RUNTIME_PM_OPS(fimc_is_runtime_suspend,
>> fimc_is_runtime_resume,
>> +                          NULL)
>> +};
>> +
>> +static const struct of_device_id exynos5_fimc_is_match[] = {
>> +       {
>> +               .compatible = "samsung,exynos5250-fimc-is",
>> +       },
>> +       {},
>> +};
>> +MODULE_DEVICE_TABLE(of, exynos5_fimc_is_match);
>> +
>> +static struct platform_driver fimc_is_driver = {
>> +       .probe          = fimc_is_probe,
>> +       .remove         = fimc_is_remove,
>> +       .driver = {
>> +               .name   = FIMC_IS_DRV_NAME,
>> +               .owner  = THIS_MODULE,
>> +               .pm     =&fimc_is_pm_ops,
>> +               .of_match_table = exynos5_fimc_is_match,
>> +       }
>> +};
>> +module_platform_driver(fimc_is_driver);
>> +
>> +MODULE_LICENSE("GPL");
>> +MODULE_AUTHOR("Arun Kumar K<arun.kk@samsung.com>");
>> +MODULE_DESCRIPTION("Samsung Exynos5 (FIMC-IS) Imaging Subsystem driver");
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-core.h
>> b/drivers/media/platform/exynos5-is/fimc-is-core.h
>> new file mode 100644
>> index 0000000..0512280
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-core.h
>> @@ -0,0 +1,126 @@
>> +/*
>> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
>> + *
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + *  Arun Kumar K<arun.kk@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +#ifndef FIMC_IS_CORE_H_
>> +#define FIMC_IS_CORE_H_
>> +
>> +#include<linux/bug.h>
>> +#include<linux/clk.h>
>> +#include<linux/device.h>
>> +#include<linux/errno.h>
>> +#include<linux/firmware.h>
>> +#include<linux/interrupt.h>
>> +#include<linux/kernel.h>
>> +#include<linux/list.h>
>> +#include<linux/module.h>
>> +#include<linux/types.h>
>> +#include<linux/platform_device.h>
>> +#include<linux/pm_runtime.h>
>> +#include<linux/slab.h>
>> +#include<linux/videodev2.h>
>> +
>> +#include<asm/barrier.h>
>> +#include<linux/sizes.h>
>> +#include<linux/io.h>
>> +#include<linux/irqreturn.h>
>> +#include<linux/platform_device.h>
>> +#include<linux/sched.h>
>> +#include<linux/spinlock.h>
>> +
>> +#include<media/media-entity.h>
>> +#include<media/videobuf2-core.h>
>> +#include<media/v4l2-ctrls.h>
>> +#include<media/v4l2-device.h>
>> +#include<media/v4l2-mem2mem.h>
>> +#include<media/v4l2-mediabus.h>
>> +#include<media/s5p_fimc.h>
>> +
>> +#define FIMC_IS_DRV_NAME               "exynos5-fimc-is"
>> +#define FIMC_IS_CLK_NAME               "fimc_is"
>
>
> Unused symbol, please remove.
>
>
>> +#define FIMC_IS_DEBUG_MSG              0x3f
>> +#define FIMC_IS_DEBUG_LEVEL            3
>
>
> These 2 are unused too.
>
>
>> +#define FIMC_IS_COMMAND_TIMEOUT                (3*HZ)
>> +#define FIMC_IS_STARTUP_TIMEOUT                (3*HZ)
>> +#define FIMC_IS_SHUTDOWN_TIMEOUT       (10*HZ)
>
>
> Please add spaces around '*'. It also applies to other places in most
> of the patches.
>
>
>> +
>> +#define FW_SHARED_OFFSET               (0x8C0000)
>
>
>> +#define DEBUG_CNT                      (500*1024)
>> +#define DEBUG_OFFSET                   (0x840000)
>> +#define DEBUGCTL_OFFSET                        (0x8BD000)
>> +#define DEBUG_FCOUNT                   (0x8C64C0)
>
>
> Please put all hex numbers in lower case.
>
>
>> +#define FIMC_IS_MAX_INSTANCES          1
>> +
>> +#define FIMC_IS_MAX_GPIOS              32
>> +#define FIMC_IS_NUM_SENSORS            2
>> +
>> +#define FIMC_IS_MAX_PLANES             3
>> +#define FIMC_IS_NUM_SCALERS            2
>> +
>> +enum fimc_is_clks {
>> +       IS_CLK_ISP,
>> +       IS_CLK_MCU_ISP,
>> +       IS_CLK_ISP_DIV0,
>> +       IS_CLK_ISP_DIV1,
>> +       IS_CLK_ISP_DIVMPWM,
>> +       IS_CLK_MCU_ISP_DIV0,
>> +       IS_CLK_MCU_ISP_DIV1,
>> +       IS_CLK_MAX_NUM
>> +};
>> +
>> +/* Video capture states */
>> +enum fimc_is_video_state {
>> +       STATE_INIT,
>> +       STATE_BUFS_ALLOCATED,
>> +       STATE_RUNNING,
>> +};
>> +
>> +enum fimc_is_scaler_id {
>> +       SCALER_SCC,
>> +       SCALER_SCP
>> +};
>> +
>> +enum fimc_is_sensor_pos {
>> +       SENSOR_CAM0,
>> +       SENSOR_CAM1
>> +};
>> +
>> +struct fimc_is_buf {
>> +       struct list_head list;
>> +       struct vb2_buffer *vb;
>> +       unsigned int paddr[FIMC_IS_MAX_PLANES];
>> +};
>> +
>> +struct fimc_is_meminfo {
>> +       unsigned int fw_paddr;
>> +       unsigned int fw_vaddr;
>> +       unsigned int region_paddr;
>> +       unsigned int region_vaddr;
>> +       unsigned int shared_paddr;
>> +       unsigned int shared_vaddr;
>> +};
>> +
>> +/**
>> + * struct fimc_is_fmt - the driver's internal color format data
>> + * @name: format description
>> + * @fourcc: the fourcc code for this format
>> + * @depth: number of bytes per pixel
>> + * @num_planes: number of planes for this color format
>> + */
>> +struct fimc_is_fmt {
>> +       char            *name;
>> +       unsigned int    fourcc;
>> +       unsigned int    depth[FIMC_IS_MAX_PLANES];
>> +       unsigned int    num_planes;
>> +};
>> +
>> +#endif
>
>
> Regards,
> Sylwester

Re: [RFC v2 03/10] exynos5-fimc-is: Adds common driver header files

[Arun Kumar K]

Hi Sylwester,

Thank you for the review.

On Fri, Jun 21, 2013 at 4:16 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> On 05/31/2013 03:03 PM, Arun Kumar K wrote:
>>
>> This patch adds all the common header files used by the fimc-is
>> driver. It includes the commands for interfacing with the firmware
>> and error codes from IS firmware, metadata and command parameter
>> definitions.
>>
>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
>> ---
>>   drivers/media/platform/exynos5-is/fimc-is-cmd.h    |  201 ++++
>>   drivers/media/platform/exynos5-is/fimc-is-err.h    |  261 ++++
>>   .../media/platform/exynos5-is/fimc-is-metadata.h   |  771 ++++++++++++
>>   drivers/media/platform/exynos5-is/fimc-is-param.h  | 1259
>> ++++++++++++++++++++
>>   4 files changed, 2492 insertions(+)
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-cmd.h
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-err.h
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-metadata.h
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-param.h
>>
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-cmd.h
>> b/drivers/media/platform/exynos5-is/fimc-is-cmd.h
>> new file mode 100644
>> index 0000000..4adf832
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-cmd.h
>> @@ -0,0 +1,201 @@
>> +/*
>> + * Samsung Exynos5 SoC series FIMC-IS driver
>> + *
>> + * Copyright (c) 2013 Samsung Electronics Co., Ltd
>> + * Kil-yeon Lim<kilyeon.im@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#ifndef FIMC_IS_CMD_H
>> +#define FIMC_IS_CMD_H
>> +
>> +#define IS_COMMAND_VER 122 /* IS COMMAND VERSION 1.22 */
>> +
>> +enum is_cmd {
>> +       /* HOST ->  IS */
>> +       HIC_PREVIEW_STILL = 0x1,
>> +       HIC_PREVIEW_VIDEO,
>> +       HIC_CAPTURE_STILL,
>> +       HIC_CAPTURE_VIDEO,
>> +       HIC_PROCESS_START,
>> +       HIC_PROCESS_STOP,
>> +       HIC_STREAM_ON,
>> +       HIC_STREAM_OFF,
>> +       HIC_SHOT,
>> +       HIC_GET_STATIC_METADATA,
>> +       HIC_SET_CAM_CONTROL,
>> +       HIC_GET_CAM_CONTROL,
>> +       HIC_SET_PARAMETER,
>> +       HIC_GET_PARAMETER,
>> +       HIC_SET_A5_MEM_ACCESS,
>> +       RESERVED2,
>> +       HIC_GET_STATUS,
>> +       /* SENSOR PART*/
>> +       HIC_OPEN_SENSOR,
>> +       HIC_CLOSE_SENSOR,
>> +       HIC_SIMMIAN_INIT,
>> +       HIC_SIMMIAN_WRITE,
>> +       HIC_SIMMIAN_READ,
>> +       HIC_POWER_DOWN,
>> +       HIC_GET_SET_FILE_ADDR,
>> +       HIC_LOAD_SET_FILE,
>> +       HIC_MSG_CONFIG,
>> +       HIC_MSG_TEST,
>> +       /* IS ->  HOST */
>> +       IHC_GET_SENSOR_NUMBER = 0x1000,
>> +       /* Parameter1 : Address of space to copy a setfile */
>> +       /* Parameter2 : Space szie */
>> +       IHC_SET_SHOT_MARK,
>> +       /* PARAM1 : a frame number */
>> +       /* PARAM2 : confidence level(smile 0~100) */
>> +       /* PARMA3 : confidence level(blink 0~100) */
>> +       IHC_SET_FACE_MARK,
>> +       /* PARAM1 : coordinate count */
>> +       /* PARAM2 : coordinate buffer address */
>> +       IHC_FRAME_DONE,
>> +       /* PARAM1 : frame start number */
>> +       /* PARAM2 : frame count */
>> +       IHC_AA_DONE,
>> +       IHC_NOT_READY,
>> +       IHC_FLASH_READY
>> +};
>> +
>> +enum is_reply {
>> +       ISR_DONE        = 0x2000,
>> +       ISR_NDONE
>> +};
>> +
>> +enum is_scenario_id {
>> +       ISS_PREVIEW_STILL,
>> +       ISS_PREVIEW_VIDEO,
>> +       ISS_CAPTURE_STILL,
>> +       ISS_CAPTURE_VIDEO,
>> +       ISS_END
>> +};
>> +
>> +enum is_subscenario_id {
>> +       ISS_SUB_SCENARIO_STILL,
>> +       ISS_SUB_SCENARIO_VIDEO,
>> +       ISS_SUB_SCENARIO_SCENE1,
>> +       ISS_SUB_SCENARIO_SCENE2,
>> +       ISS_SUB_SCENARIO_SCENE3,
>> +       ISS_SUB_END
>> +};
>> +
>> +struct is_setfile_header_element {
>> +       u32 binary_addr;
>> +       u32 binary_size;
>> +};
>> +
>> +struct is_setfile_header {
>> +       struct is_setfile_header_element isp[ISS_END];
>> +       struct is_setfile_header_element drc[ISS_END];
>> +       struct is_setfile_header_element fd[ISS_END];
>> +};
>> +
>> +struct is_common_reg {
>> +       u32 hicmd;
>> +       u32 hic_sensorid;
>> +       u32 hic_param1;
>> +       u32 hic_param2;
>> +       u32 hic_param3;
>> +       u32 hic_param4;
>
>
> How about replacing the above 4 fields with
>
>         u32 hic_param[4];
>
> ?

Ok.

>>
>> +       u32 reserved1[3];
>> +
>> +       u32 ihcmd_iflag;
>> +       u32 ihcmd;
>> +       u32 ihc_sensorid;
>> +       u32 ihc_param1;
>> +       u32 ihc_param2;
>> +       u32 ihc_param3;
>> +       u32 ihc_param4;
>
>
> Similarly,
>
>         u32 ihc_param[4];
>
> and for other groups of fields below ?
>

Will make this change.

>> +
>> +       u32 reserved2[3];
>> +
>> +       u32 isp_bayer_iflag;
>> +       u32 isp_bayer_sensor_id;
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-err.h
>> b/drivers/media/platform/exynos5-is/fimc-is-err.h
>> new file mode 100644
>> index 0000000..49d7cf5
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-err.h
>> @@ -0,0 +1,261 @@
>> +/*
>> + * Samsung Exynos5 SoC series FIMC-IS driver
>> + *
>> + * Copyright (c) 2013 Samsung Electronics Co., Ltd
>> + * Arun Kumar K<arun.kk@samsung.com>
>> + * Kil-yeon Lim<kilyeon.im@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#ifndef FIMC_IS_ERR_H
>> +#define FIMC_IS_ERR_H
>> +
>> +#define IS_ERROR_VER 012 /* IS ERROR VERSION 0.07 */
>> +
>> +/* IS error enum */
>> +enum is_error {
>> +
>> +       IS_ERROR_SUCCESS = 0,
>> +
>> +       /* General 1 ~ 100 */
>> +       IS_ERROR_INVALID_COMMAND = 1,
>> +       IS_ERROR_REQUEST_FAIL,
>> +       IS_ERROR_INVALID_SCENARIO,
>> +       IS_ERROR_INVALID_SENSORID,
>> +       IS_ERROR_INVALID_MODE_CHANGE,
>> +       IS_ERROR_INVALID_MAGIC_NUMBER,
>> +       IS_ERROR_INVALID_SETFILE_HDR,
>> +       IS_ERROR_ISP_SETFILE_VERSION_MISMATCH,
>> +       IS_ERROR_ISP_SETFILE_REVISION_MISMATCH,
>> +       IS_ERROR_BUSY,
>> +       IS_ERROR_SET_PARAMETER,
>> +       IS_ERROR_INVALID_PATH,
>> +       IS_ERROR_OPEN_SENSOR_FAIL,
>> +       IS_ERROR_ENTRY_MSG_THREAD_DOWN,
>> +       IS_ERROR_ISP_FRAME_END_NOT_DONE,
>> +       IS_ERROR_DRC_FRAME_END_NOT_DONE,
>> +       IS_ERROR_SCALERC_FRAME_END_NOT_DONE,
>> +       IS_ERROR_ODC_FRAME_END_NOT_DONE,
>> +       IS_ERROR_DIS_FRAME_END_NOT_DONE,
>> +       IS_ERROR_TDNR_FRAME_END_NOT_DONE,
>> +       IS_ERROR_SCALERP_FRAME_END_NOT_DONE,
>> +       IS_ERROR_WAIT_STREAM_OFF_NOT_DONE,
>> +       IS_ERROR_NO_MSG_IS_RECEIVED,
>> +       IS_ERROR_SENSOR_MSG_FAIL,
>> +       IS_ERROR_ISP_MSG_FAIL,
>> +       IS_ERROR_DRC_MSG_FAIL,
>> +       IS_ERROR_SCALERC_MSG_FAIL,
>> +       IS_ERROR_ODC_MSG_FAIL,
>> +       IS_ERROR_DIS_MSG_FAIL,
>> +       IS_ERROR_TDNR_MSG_FAIL,
>> +       IS_ERROR_SCALERP_MSG_FAIL,
>> +       IS_ERROR_LHFD_MSG_FAIL,
>> +       IS_ERROR_INTERNAL_STOP,
>> +       IS_ERROR_UNKNOWN,
>> +       IS_ERROR_TIME_OUT_FLAG,
>> +
>> +       /* Sensor 100 ~ 200 */
>> +       IS_ERROR_SENSOR_PWRDN_FAIL = 100,
>> +       IS_ERROR_SENSOR_STREAM_ON_FAIL,
>> +       IS_ERROR_SENSOR_STREAM_OFF_FAIL,
>> +
>> +       /* ISP 200 ~ 300 */
>> +       IS_ERROR_ISP_PWRDN_FAIL = 200,
>> +       IS_ERROR_ISP_MULTIPLE_INPUT,
>> +       IS_ERROR_ISP_ABSENT_INPUT,
>> +       IS_ERROR_ISP_ABSENT_OUTPUT,
>> +       IS_ERROR_ISP_NONADJACENT_OUTPUT,
>> +       IS_ERROR_ISP_FORMAT_MISMATCH,
>> +       IS_ERROR_ISP_WIDTH_MISMATCH,
>> +       IS_ERROR_ISP_HEIGHT_MISMATCH,
>> +       IS_ERROR_ISP_BITWIDTH_MISMATCH,
>> +       IS_ERROR_ISP_FRAME_END_TIME_OUT,
>> +
>> +       /* DRC 300 ~ 400 */
>> +       IS_ERROR_DRC_PWRDN_FAIL = 300,
>> +       IS_ERROR_DRC_MULTIPLE_INPUT,
>> +       IS_ERROR_DRC_ABSENT_INPUT,
>> +       IS_ERROR_DRC_NONADJACENT_INTPUT,
>> +       IS_ERROR_DRC_ABSENT_OUTPUT,
>> +       IS_ERROR_DRC_NONADJACENT_OUTPUT,
>> +       IS_ERROR_DRC_FORMAT_MISMATCH,
>> +       IS_ERROR_DRC_WIDTH_MISMATCH,
>> +       IS_ERROR_DRC_HEIGHT_MISMATCH,
>> +       IS_ERROR_DRC_BITWIDTH_MISMATCH,
>> +       IS_ERROR_DRC_FRAME_END_TIME_OUT,
>> +
>> +       /*SCALERC(400~500)*/
>> +       IS_ERROR_SCALERC_PWRDN_FAIL = 400,
>> +
>> +       /*ODC(500~600)*/
>> +       IS_ERROR_ODC_PWRDN_FAIL = 500,
>> +
>> +       /*DIS(600~700)*/
>> +       IS_ERROR_DIS_PWRDN_FAIL = 600,
>> +
>> +       /*TDNR(700~800)*/
>> +       IS_ERROR_TDNR_PWRDN_FAIL = 700,
>> +
>> +       /*SCALERP(800~900)*/
>> +       IS_ERROR_SCALERP_PWRDN_FAIL = 800,
>> +
>> +       /*FD(900~1000)*/
>> +       IS_ERROR_FD_PWRDN_FAIL = 900,
>> +       IS_ERROR_FD_MULTIPLE_INPUT,
>> +       IS_ERROR_FD_ABSENT_INPUT,
>> +       IS_ERROR_FD_NONADJACENT_INPUT,
>> +       IS_ERROR_LHFD_FRAME_END_TIME_OUT,
>> +};
>> +
>> +/* Set parameter error enum */
>> +enum error {
>> +       /* Common error (0~99) */
>> +       ERROR_COMMON_NO                 = 0,
>
>
> How about renaming all those ERROR_*_NO symbols to ERROR_*_NONE ?
>

Ok.


>> +       ERROR_COMMON_CMD                = 1,    /* Invalid command*/
>> +       ERROR_COMMON_PARAMETER          = 2,    /* Invalid parameter*/
>> +       /* setfile is not loaded before adjusting */

[snip]

>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-metadata.h
>> b/drivers/media/platform/exynos5-is/fimc-is-metadata.h
>> new file mode 100644
>> index 0000000..9738d7d
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-metadata.h
>> @@ -0,0 +1,771 @@
>> +/*
>> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
>> + *
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + * Kil-yeon Lim<kilyeon.im@samsung.com>
>> + * Arun Kumar K<arun.kk@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#ifndef FIMC_IS_METADATA_H_
>> +#define FIMC_IS_METADATA_H_
>> +
>> +struct rational {
>> +       uint32_t num;
>> +       uint32_t den;
>> +};
>> +
>> +#define CAMERA2_MAX_AVAILABLE_MODE     21
>> +#define CAMERA2_MAX_FACES              16
>> +
>> +/*
>> + *controls/dynamic metadata
>> +*/
>> +
>> +enum metadata_mode {
>> +       METADATA_MODE_NONE,
>> +       METADATA_MODE_FULL
>> +};
>> +
>> +struct camera2_request_ctl {
>> +       uint32_t                id;
>> +       enum metadata_mode      metadatamode;
>> +       uint8_t                 outputstreams[16];
>> +       uint32_t                framecount;
>> +};
>> +
>> +struct camera2_request_dm {
>> +       uint32_t                id;
>> +       enum metadata_mode      metadatamode;
>> +       uint32_t                framecount;
>> +};
>> +
>> +
>> +
>> +enum optical_stabilization_mode {
>> +       OPTICAL_STABILIZATION_MODE_OFF,
>> +       OPTICAL_STABILIZATION_MODE_ON
>> +};
>> +
>> +enum lens_facing {
>> +       LENS_FACING_BACK,
>> +       LENS_FACING_FRONT
>> +};
>> +
>> +struct camera2_lens_ctl {
>> +       uint32_t                                focusdistance;
>> +       float                                   aperture;
>> +       float                                   focallength;
>> +       float                                   filterdensity;
>> +       enum optical_stabilization_mode         opticalstabilizationmode;
>> +
>
>
> Unnecessary empty line.
>
> Huh, flat number in the kernel ? What are we going to do with those ?
> Is this structure going to be needed to be exposed to user space somehow ?
>

It was used like that in the reference driver from where this include is used
as it is. Will remove these as we no longer do that kind of stuff in this
re-worked driver.

>> +};
>> +
>> +struct camera2_lens_dm {
>> +       uint32_t                                focusdistance;
>> +       float                                   aperture;
>> +       float                                   focalilength;
>> +       float                                   filterdensity;
>> +       enum optical_stabilization_mode         opticalstabilizationmode;
>> +       float                                   focusrange[2];
>> +};
>> +
>> +struct camera2_lens_sm {
>> +       float                           minimumfocusdistance;
>> +       float                           hyperfocaldistance;
>> +       float                           availablefocalLength[2];
>> +       float                           availableapertures;
>> +       /*assuming 1 aperture*/
>> +       float                           availablefilterdensities;
>> +       /*assuming 1 ND filter value*/
>> +       enum optical_stabilization_mode availableopticalstabilization;
>> +       /*assuming 1*/
>> +       uint32_t                        shadingmapsize;
>> +       float                           shadingmap[3][40][30];
>> +       uint32_t                        geometriccorrectionmapsize;
>> +       float
>> geometriccorrectionmap[2][3][40][30];
>> +       enum lens_facing                facing;
>> +       float                           position[2];
>> +};
>> +
>> +enum sensor_colorfilterarrangement {
>> +       SENSOR_COLORFILTERARRANGEMENT_RGGB,
>> +       SENSOR_COLORFILTERARRANGEMENT_GRBG,
>> +       SENSOR_COLORFILTERARRANGEMENT_GBRG,
>> +       SENSOR_COLORFILTERARRANGEMENT_BGGR,
>> +       SENSOR_COLORFILTERARRANGEMENT_RGB
>
>
> Iwonderwhathappenedwithspacesinthoseenumdefinitions....
>

Will change it. Had a very good laugh by seeing your comment :)

[snip]
>> +
>> +struct camera2_edge_ctl {
>> +       enum processing_mode    mode;
>> +       uint32_t                strength;
>> +};
>> +
>> +struct camera2_edge_dm {
>> +       enum processing_mode    mode;
>> +       uint32_t                strength;
>> +};
>> +
>> +enum scaler_availableformats {
>
>
> Perhaps just 'enum scaler_formats' ?
>

Ok.

>> +       SCALER_FORMAT_BAYER_RAW,
>> +       SCALER_FORMAT_YV12,
>> +       SCALER_FORMAT_NV21,
>> +       SCALER_FORMAT_JPEG,
>> +       SCALER_FORMAT_UNKNOWN
>> +};
>> +
>> +struct camera2_scaler_ctl {
>> +       uint32_t        cropregion[3];
>> +};
>> +
>> +struct camera2_scaler_dm {
>> +       uint32_t        cropregion[3];
>> +};
>> +
>> +struct camera2_scaler_sm {
>> +       enum scaler_availableformats availableformats[4];
>> +       /*assuming # of availableFormats = 4*/
>
>
> nit: Can you please amend all comments in this driver so there are
>      spaces after '/*' and before '*/' ?
>

Yes will correct all these comments.

>> +       uint32_t        availablerawsizes;
>> +       uint64_t        availablerawmindurations;
>> +       /* needs check */
>> +       uint32_t        availableprocessedsizes[8];
>> +       uint64_t        availableprocessedmindurations[8];
>> +       uint32_t        availablejpegsizes[8][2];
>> +       uint64_t        availablejpegmindurations[8];
>> +       uint32_t        availablemaxdigitalzoom[8];
>> +};
>> +

[snip]

>> +
>> +/**
>> +       User-defined control for sensor.
>> +*/
>> +struct camera2_sensor_uctl {
>> +       struct camera2_sensor_ctl ctl;
>> +       /** Dynamic frame duration.
>> +       This feature is decided to max. value between
>> +       'sensor.exposureTime'+alpha and 'sensor.frameDuration'.
>> +       */
>
>
> Wrong comment style, should be:
>
> /*
>  * Dynamic frame duration....
>  * ...
>  */
>

Ok will change.

>> +       uint64_t        dynamicrrameduration;
>> +};
>> +
>> +struct camera2_scaler_uctl {
>> +       /* target address for next frame.
>> +       [0] invalid address, stop
>> +       [others] valid address
>> +       */
>> +       uint32_t scctargetaddress[4];
>> +       uint32_t scptargetaddress[4];
>> +};
>> +
>> +struct camera2_flash_uctl {
>> +       struct camera2_flash_ctl ctl;
>> +};
>> +
>> +struct camera2_uctl {
>> +       /* Set sensor, lens, flash control for next frame.
>> +       This flag can be combined.
>> +       [0 bit] lens
>> +       [1 bit] sensor
>> +       [2 bit] flash
>> +       */
>> +       uint32_t uupdatebitmap;
>> +
>> +       /** For debugging */
>> +       uint32_t uframenumber;
>> +
>> +       /** isp fw specific control(user-defined) of lens. */
>> +       struct camera2_lens_uctl        lensud;
>> +       /** isp fw specific control(user-defined) of sensor. */
>> +       struct camera2_sensor_uctl      sensorud;
>> +       /** isp fw specific control(user-defined) of flash. */
>> +       struct camera2_flash_uctl       flashud;
>> +
>> +       struct camera2_scaler_uctl      scalerud;
>> +};
>> +
>> +struct camera2_udm {
>> +       struct camera2_lens_udm         lens;
>> +};
>> +
>> +struct camera2_shot {
>> +       /*standard area*/
>> +       struct camera2_ctl      ctl;
>> +       struct camera2_dm       dm;
>> +       /*user defined area*/
>> +       struct camera2_uctl     uctl;
>> +       struct camera2_udm      udm;
>> +       /*magic : 23456789*/
>> +       uint32_t                magicnumber;
>> +};
>> +#endif
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-param.h
>> b/drivers/media/platform/exynos5-is/fimc-is-param.h
>> new file mode 100644
>> index 0000000..8eec772
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-param.h
>> @@ -0,0 +1,1259 @@
>> +/*
>> + * Samsung Exynos5 SoC series FIMC-IS driver
>> + *
>> + * Copyright (c) 2013 Samsung Electronics Co., Ltd
>> + * Kil-yeon Lim<kilyeon.im@samsung.com>
>> + * Arun Kumar K<arun.kk@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#ifndef FIMC_IS_PARAM_H
>> +#define FIMC_IS_PARAM_H
>> +
>> +#define IS_REGION_VER 145  /* IS REGION VERSION 1.45 */
>> +
>> +/* MACROs */
>> +#define IS_SET_PARAM_BIT(dev, num) \
>> +       (num>= 32 ? set_bit((num-32),&dev->p_region_index2) \
>> +               : set_bit(num,&dev->p_region_index1))
>
>
> The bit operation could take a bitmask of arbitrary length, not only 32
> bits.
> Could you rework this parameter bitmask handling as is done in this patch
> http://git.linuxtv.org/media_tree.git/commitdiff/0e761b21b9d6c7a95a8e2b858af85d07f6c62d99
> ?
>
> Then some macros below could be removed.
>

Ok will do that.

>> +#define IS_INC_PARAM_NUM(dev)          atomic_inc(&dev->p_region_num)
>> +#define IS_PARAM_GLOBAL(dev)
>> (dev->is_p_region->parameter.global)
>> +#define IS_PARAM_ISP(dev)              (dev->is_p_region->parameter.isp)
>> +#define IS_PARAM_DRC(dev)              (dev->is_p_region->parameter.drc)
>> +#define IS_PARAM_FD(dev)               (dev->is_p_region->parameter.fd)
>> +#define IS_HEADER(dev)                 (dev->is_p_region->header)
>> +#define IS_FACE(dev)                   (dev->is_p_region->face)
>> +#define IS_SHARED(dev)                 (dev->is_shared_region)
>> +#define IS_PARAM_SIZE                  (FIMC_IS_REGION_SIZE + 1)
>
>
> All these are unused. Please double check for any unused code, this driver
> has already 8k LOC, and only subset of features are supported :/
>

Ok will remove un-used code.

>> +#define  INC_BIT(bit) (bit<<1)
>> +#define  INC_NUM(bit) (bit + 1)
>
>
> These two are unused, and a bit odd. Please remove.
>

Ok.

>> +#define MAGIC_NUMBER 0x01020304
>> +
>> +#define PARAMETER_MAX_SIZE    128  /* in byte */
>> +#define PARAMETER_MAX_MEMBER  (PARAMETER_MAX_SIZE/4)
>> +
>> +enum is_param_set_bit {
>> +       PARAM_GLOBAL_SHOTMODE = 0,
>> +       PARAM_SENSOR_CONTROL,
>> +       PARAM_SENSOR_OTF_INPUT,
>> +       PARAM_SENSOR_OTF_OUTPUT,
>> +       PARAM_SENSOR_FRAME_RATE,
>> +       PARAM_SENSOR_DMA_OUTPUT,
>> +       PARAM_BUFFER_CONTROL,
>> +       PARAM_BUFFER_OTF_INPUT,
>> +       PARAM_BUFFER_OTF_OUTPUT,
>> +       PARAM_ISP_CONTROL,
>> +       PARAM_ISP_OTF_INPUT = 10,
>> +       PARAM_ISP_DMA1_INPUT,
>> +       PARAM_ISP_DMA2_INPUT,
>> +       PARAM_ISP_AA,
>> +       PARAM_ISP_FLASH,
>> +       PARAM_ISP_AWB,
>> +       PARAM_ISP_IMAGE_EFFECT,
>> +       PARAM_ISP_ISO,
>> +       PARAM_ISP_ADJUST,
>> +       PARAM_ISP_METERING,
>> +       PARAM_ISP_AFC = 20,
>> +       PARAM_ISP_OTF_OUTPUT,
>> +       PARAM_ISP_DMA1_OUTPUT,
>> +       PARAM_ISP_DMA2_OUTPUT,
>> +       PARAM_DRC_CONTROL,
>> +       PARAM_DRC_OTF_INPUT,
>> +       PARAM_DRC_DMA_INPUT,
>> +       PARAM_DRC_OTF_OUTPUT,
>> +       PARAM_SCALERC_CONTROL,
>> +       PARAM_SCALERC_OTF_INPUT,
>> +       PARAM_SCALERC_IMAGE_EFFECT = 30,
>> +       PARAM_SCALERC_INPUT_CROP,
>> +       PARAM_SCALERC_OUTPUT_CROP,
>> +       PARAM_SCALERC_OTF_OUTPUT,
>> +       PARAM_SCALERC_DMA_OUTPUT = 34,
>> +       PARAM_ODC_CONTROL,
>> +       PARAM_ODC_OTF_INPUT,
>> +       PARAM_ODC_OTF_OUTPUT,
>> +       PARAM_DIS_CONTROL,
>> +       PARAM_DIS_OTF_INPUT,
>> +       PARAM_DIS_OTF_OUTPUT = 40,
>> +       PARAM_TDNR_CONTROL,
>> +       PARAM_TDNR_OTF_INPUT,
>> +       PARAM_TDNR_1ST_FRAME,
>> +       PARAM_TDNR_OTF_OUTPUT,
>> +       PARAM_TDNR_DMA_OUTPUT,
>> +       PARAM_SCALERP_CONTROL,
>> +       PARAM_SCALERP_OTF_INPUT,
>> +       PARAM_SCALERP_IMAGE_EFFECT,
>> +       PARAM_SCALERP_INPUT_CROP,
>> +       PARAM_SCALERP_OUTPUT_CROP = 50,
>> +       PARAM_SCALERP_ROTATION,
>> +       PARAM_SCALERP_FLIP,
>> +       PARAM_SCALERP_OTF_OUTPUT,
>> +       PARAM_SCALERP_DMA_OUTPUT,
>> +       PARAM_FD_CONTROL,
>> +       PARAM_FD_OTF_INPUT,
>> +       PARAM_FD_DMA_INPUT,
>> +       PARAM_FD_CONFIG = 58,
>> +       PARAM_END,
>> +};
>> +
>> +#define ADDRESS_TO_OFFSET(start, end)  ((uint32)end - (uint32)start)
>> +#define OFFSET_TO_NUM(offset)          ((offset)>>6)
>> +#define IS_OFFSET_LOWBIT(offset)       (OFFSET_TO_NUM(offset)>= \
>> +                                               32 ? false : true)
>> +#define OFFSET_TO_BIT(offset) \
>> +               {(IS_OFFSET_LOWBIT(offset) ? (1<<OFFSET_TO_NUM(offset)) \
>> +                       : (1<<(OFFSET_TO_NUM(offset)-32))}
>> +#define LOWBIT_OF_NUM(num)             (num>= 32 ? 0 : BIT0<<num)
>> +#define HIGHBIT_OF_NUM(num)            (num>= 32 ? BIT0<<(num-32) : 0)
>> +
>> +#define PARAM_LOW_MASK         (0xFFFFFFFF)
>> +#define PARAM_HIGH_MASK                (0x07FFFFFF)
>
>
> These guys are going to be redundant when you rework the parameter bitmask
> handling as suggested above.
>

Ok.

Regards
Arun

Re: [RFC v2 09/10] exynos5-fimc-is: Adds the hardware interface module

[Arun Kumar K]

Hi Andrzej,

Thank you for the review.

On Fri, Jun 21, 2013 at 4:53 PM, Andrzej Hajda <a.hajda@samsung.com> wrote:
> Hi Arun,
>
> My few comments.
>
> On 05/31/2013 03:03 PM, Arun Kumar K wrote:
>> The hardware interface module finally sends the commands to the
>> FIMC-IS firmware and runs the interrupt handler for getting the
>> responses.
>>
>> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
>> ---
>>  .../media/platform/exynos5-is/fimc-is-interface.c  | 1025 ++++++++++++++++++++
>>  .../media/platform/exynos5-is/fimc-is-interface.h  |  131 +++
>>  2 files changed, 1156 insertions(+)
>>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.c
>>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.h
>>
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-interface.c b/drivers/media/platform/exynos5-is/fimc-is-interface.c
>> new file mode 100644
>> index 0000000..63176fa
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-interface.c
>> @@ -0,0 +1,1025 @@
>> +/*
>> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
>> +*
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + * Kil-yeon Lim <kilyeon.im@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/debugfs.h>
>> +#include <linux/seq_file.h>
>> +#include "fimc-is.h"
>> +#include "fimc-is-cmd.h"
>> +#include "fimc-is-regs.h"
>> +
>> +#define init_request_barrier(itf) mutex_init(&itf->request_barrier)
>> +#define enter_request_barrier(itf) mutex_lock(&itf->request_barrier)
>> +#define exit_request_barrier(itf) mutex_unlock(&itf->request_barrier)
>> +
>> +static inline void itf_get_cmd(struct fimc_is_interface *itf,
>> +     struct fimc_is_msg *msg, unsigned int index)
>> +{
>> +     struct is_common_reg __iomem *com_regs = itf->com_regs;
>> +
>> +     switch (index) {
>> +     case INTR_GENERAL:
>> +             msg->id = 0;
>> +             msg->command = com_regs->ihcmd;
>> +             msg->instance = com_regs->ihc_sensorid;
>> +             msg->parameter1 = com_regs->ihc_param1;
>> +             msg->parameter2 = com_regs->ihc_param2;
>> +             msg->parameter3 = com_regs->ihc_param3;
>> +             msg->parameter4 = com_regs->ihc_param4;
>> +             break;
>> +     case INTR_SCC_FDONE:
>> +             msg->id = 0;
>> +             msg->command = IHC_FRAME_DONE;
>> +             msg->instance = com_regs->scc_sensor_id;
>> +             msg->parameter1 = com_regs->scc_param1;
>> +             msg->parameter2 = com_regs->scc_param2;
>> +             msg->parameter3 = com_regs->scc_param3;
>> +             msg->parameter4 = 0;
>> +             break;
>> +     case INTR_SCP_FDONE:
>> +             msg->id = 0;
>> +             msg->command = IHC_FRAME_DONE;
>> +             msg->instance = com_regs->scp_sensor_id;
>> +             msg->parameter1 = com_regs->scp_param1;
>> +             msg->parameter2 = com_regs->scp_param2;
>> +             msg->parameter3 = com_regs->scp_param3;
>> +             msg->parameter4 = 0;
>> +             break;
>> +     case INTR_META_DONE:
>> +             msg->id = 0;
>> +             msg->command = IHC_FRAME_DONE;
>> +             msg->instance = com_regs->meta_sensor_id;
>> +             msg->parameter1 = com_regs->meta_param1;
>> +             msg->parameter2 = 0;
>> +             msg->parameter3 = 0;
>> +             msg->parameter4 = 0;
>> +             break;
>> +     case INTR_SHOT_DONE:
>> +             msg->id = 0;
>> +             msg->command = IHC_FRAME_DONE;
>> +             msg->instance = com_regs->shot_sensor_id;
>> +             msg->parameter1 = com_regs->shot_param1;
>> +             msg->parameter2 = com_regs->shot_param2;
>> +             msg->parameter3 = 0;
>> +             msg->parameter4 = 0;
>> +             break;
>> +     default:
>> +             msg->id = 0;
>> +             msg->command = 0;
>> +             msg->instance = 0;
>> +             msg->parameter1 = 0;
>> +             msg->parameter2 = 0;
>> +             msg->parameter3 = 0;
>> +             msg->parameter4 = 0;
>> +             pr_err("unknown command getting\n");
>> +             break;
>> +     }
>> +}
>
> If you memset(msg, 0, sizeof(*msg)) at the beginning of the function,
> you can remove all zero assignements and the switch statement will
> become much shorter.
>

Yes will do that.

>> +
>> +static inline unsigned int itf_get_intr(struct fimc_is_interface *itf)
>> +{
>> +     unsigned int status;
>> +     struct is_common_reg __iomem *com_regs = itf->com_regs;
>> +
>> +     status = readl(itf->regs + INTMSR1) | com_regs->ihcmd_iflag |
>> +             com_regs->scc_iflag |
>> +             com_regs->scp_iflag |
>> +             com_regs->meta_iflag |
>> +             com_regs->shot_iflag;
>> +
>> +     return status;
>> +}
>> +
>> +static void itf_set_state(struct fimc_is_interface *itf,
>> +             unsigned long state)
>> +{
>> +     unsigned long flags;
>> +     spin_lock_irqsave(&itf->slock_state, flags);
>> +     __set_bit(state, &itf->state);
>> +     spin_unlock_irqrestore(&itf->slock_state, flags);
>> +}
>> +
>> +static void itf_clr_state(struct fimc_is_interface *itf,
>> +             unsigned long state)
>> +{
>> +     unsigned long flags;
>> +     spin_lock_irqsave(&itf->slock_state, flags);
>> +     __clear_bit(state, &itf->state);
>> +     spin_unlock_irqrestore(&itf->slock_state, flags);
>> +}
>> +
>> +static int itf_get_state(struct fimc_is_interface *itf,
>> +             unsigned long state)
>> +{
>> +     int ret = 0;
>> +     unsigned long flags;
>> +
>> +     spin_lock_irqsave(&itf->slock_state, flags);
>> +     ret = test_bit(state, &itf->state);
>> +     spin_unlock_irqrestore(&itf->slock_state, flags);
>> +     return ret;
>> +}
>> +
>> +static void itf_init_wakeup(struct fimc_is_interface *itf)
>> +{
>> +     itf_set_state(itf, IS_IF_STATE_INIT);
>> +     wake_up(&itf->irq_queue);
>> +}
>> +
>> +void itf_busy_wakeup(struct fimc_is_interface *itf)
>> +{
>> +     itf_clr_state(itf, IS_IF_STATE_BUSY);
>> +     wake_up(&itf->irq_queue);
>> +}
>> +
>> +static int itf_wait_hw_ready(struct fimc_is_interface *itf)
>> +{
>> +     int ret = 0;
>> +     unsigned int try_count = TRY_RECV_AWARE_COUNT;
>> +     unsigned int cfg = readl(itf->regs + INTMSR0);
>> +     unsigned int status = INTMSR0_GET_INTMSD(0, cfg);
>> +
>> +     while (status) {
>> +             cfg = readl(itf->regs + INTMSR0);
>> +             status = INTMSR0_GET_INTMSD(0, cfg);
>> +
>> +             if (try_count-- == 0) {
>> +                     try_count = TRY_RECV_AWARE_COUNT;
>> +                     pr_err("INTMSR0's 0 bit is not cleared.\n");
>> +                     ret = -EINVAL;
>> +                     break;
>> +             }
>> +     }
>> +     return ret;
>> +}
>
> I think the body could be replaced by more clear code, for example:
> {
>         int t;
>         for (t = TRY_RECV_AWARE_COUNT; t >= 0; t--) {
>                 unsigned int cfg = readl(itf->regs + INTMSR0);
>                 unsigned int status = INTMSR0_GET_INTMSD(0, cfg);
>                 if (!status)
>                         return 0;
>         }
>         pr_err("INTMSR0's 0 bit is not cleared.\n");
>         return -EINVAL;
> }
>

Yes thank you for the suggestion.

>> +
>> +static int itf_wait_idlestate(struct fimc_is_interface *itf)
>> +{
>> +     int ret = 0;
>
> Initialization is not needed here.
>

Ok.

>> +
>> +     ret = wait_event_timeout(itf->irq_queue,
>> +                     !itf_get_state(itf, IS_IF_STATE_BUSY),
>> +                     FIMC_IS_COMMAND_TIMEOUT);
>> +     if (!ret) {
>> +             pr_err("timeout");
>> +             return -ETIME;
>> +     }
>> +     return 0;
>> +}
>> +
>> +int fimc_is_itf_wait_init_state(struct fimc_is_interface *itf)
>> +{
>> +     int ret = 0;
>
> ...
>
>> +
>> +     ret = wait_event_timeout(itf->irq_queue,
>> +             itf_get_state(itf, IS_IF_STATE_INIT),
>> +             FIMC_IS_STARTUP_TIMEOUT);
>> +
>> +     if (!ret) {
>> +             pr_err("timeout\n");
>> +             return -ETIME;
>> +     }
>> +     return 0;
>> +}
>> +
>> +static inline void itf_clr_intr(struct fimc_is_interface *itf,
>> +             unsigned int index)
>> +{
>> +     struct is_common_reg __iomem *com_regs = itf->com_regs;
>> +
>> +     switch (index) {
>> +     case INTR_GENERAL:
>> +             writel((1<<INTR_GENERAL), itf->regs + INTCR1);
>> +             com_regs->ihcmd_iflag = 0;
>> +             break;
>> +     case INTR_SCC_FDONE:
>> +             writel((1<<INTR_SCC_FDONE), itf->regs + INTCR1);
>> +             com_regs->scc_iflag = 0;
>> +             break;
>> +     case INTR_SCP_FDONE:
>> +             writel((1<<INTR_SCP_FDONE), itf->regs + INTCR1);
>> +             com_regs->scp_iflag = 0;
>> +             break;
>> +     case INTR_META_DONE:
>> +             writel((1<<INTR_META_DONE), itf->regs + INTCR1);
>> +             com_regs->meta_iflag = 0;
>> +             break;
>> +     case INTR_SHOT_DONE:
>> +             writel((1<<INTR_SHOT_DONE), itf->regs + INTCR1);
>> +             com_regs->shot_iflag = 0;
>> +             break;
>> +     default:
>> +             pr_err("Unknown command clear\n");
>> +             break;
>> +     }
>> +}
> You could remove all writel and at the end add:
> writel((1<<index), itf->regs + INTCR1). In such case s/break/return/ in
> 'default' statement.
>> +

Yes will do that.

>> +/* Send Host to IS command interrupt */
>> +static void itf_hic_interrupt(struct fimc_is_interface *itf)
>> +{
>> +     writel(INTGR0_INTGD(0), itf->regs + INTGR0);
>> +}
>> +
>> +static int itf_send_sensor_number(struct fimc_is_interface *itf)
>> +{
>> +     struct fimc_is_msg msg;
>> +     unsigned long flags;
>> +
>> +     msg.id = 0;
>> +     msg.command = ISR_DONE;
>> +     msg.instance = 0;
>> +     msg.parameter1 = IHC_GET_SENSOR_NUMBER;
>> +
>> +     msg.parameter2 = 1;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>
> Replace it with:
>
>         struct fimc_is_msg msg = {
>                 .command = ISR_DONE,
>                 .parameter1 = IHC_GET_SENSOR_NUMBER,
>                 .parameter2 = 1
>         };
>         unsigned long flags;
>

Ok.

>> +
>> +     spin_lock_irqsave(&itf->slock, flags);
>> +     itf->com_regs->hicmd = msg.command;
>> +     itf->com_regs->hic_sensorid = msg.instance;
>> +     itf->com_regs->hic_param1 = msg.parameter1;
>> +     itf->com_regs->hic_param2 = msg.parameter2;
>> +     itf->com_regs->hic_param3 = msg.parameter3;
>> +     itf->com_regs->hic_param4 = msg.parameter4;
>> +     itf_hic_interrupt(itf);
>> +     spin_unlock_irqrestore(&itf->slock, flags);
>> +
>> +     return 0;
>> +}
>> +
>> +static int fimc_is_itf_set_cmd(struct fimc_is_interface *itf,
>> +     struct fimc_is_msg *msg)
>> +{
>> +     int ret = 0;
>> +     bool block_io, send_cmd;
>> +     unsigned long flags;
>> +
>> +     enter_request_barrier(itf);
>> +
>> +     switch (msg->command) {
>> +     case HIC_STREAM_ON:
>> +             if (itf->streaming == IS_IF_STREAMING_ON) {
>> +                     send_cmd = false;
>> +             } else {
>> +                     send_cmd = true;
>> +                     block_io = true;
>> +             }
>> +             break;
>> +     case HIC_STREAM_OFF:
>> +             if (itf->streaming == IS_IF_STREAMING_OFF) {
>> +                     send_cmd = false;
>> +             } else {
>> +                     send_cmd = true;
>> +                     block_io = true;
>> +             }
>> +             break;
>> +     case HIC_PROCESS_START:
>> +             if (itf->processing == IS_IF_PROCESSING_ON) {
>> +                     send_cmd = false;
>> +             } else {
>> +                     send_cmd = true;
>> +                     block_io = true;
>> +             }
>> +             break;
>> +     case HIC_PROCESS_STOP:
>> +             if (itf->processing == IS_IF_PROCESSING_OFF) {
>> +                     send_cmd = false;
>> +             } else {
>> +                     send_cmd = true;
>> +                     block_io = true;
>> +             }
>> +             break;
>> +     case HIC_POWER_DOWN:
>> +             if (itf->pdown_ready == IS_IF_POWER_DOWN_READY) {
>> +                     send_cmd = false;
>> +             } else {
>> +                     send_cmd = true;
>> +                     block_io = true;
>> +             }
>> +             break;
>> +     case HIC_OPEN_SENSOR:
>> +     case HIC_GET_SET_FILE_ADDR:
>> +     case HIC_SET_PARAMETER:
>> +     case HIC_PREVIEW_STILL:
>> +     case HIC_GET_STATIC_METADATA:
>> +     case HIC_SET_A5_MEM_ACCESS:
>> +     case HIC_SET_CAM_CONTROL:
>> +             send_cmd = true;
>> +             block_io = true;
>> +             break;
>> +     case HIC_SHOT:
>> +     case ISR_DONE:
>> +             send_cmd = true;
>> +             block_io = false;
>> +             break;
>> +     default:
>> +             send_cmd = true;
>> +             block_io = true;
>> +             break;
>> +     }
>> +
>> +     if (!send_cmd) {
>> +             pr_debug("skipped\n");
>> +             goto exit;
>> +     }
>
> Remove above conditional
> s/send_cmd = false/goto exit/;
> s/send_cmd = true//;
>

Ok.

>
>> +
>> +     ret = itf_wait_hw_ready(itf);
>> +     if (ret) {
>> +             pr_err("waiting for ready is fail");
>> +             ret = -EBUSY;
>> +             goto exit;
>> +     }
>> +
>> +     spin_lock_irqsave(&itf->slock, flags);
>> +     itf_set_state(itf, IS_IF_STATE_BUSY);
>> +     itf->com_regs->hicmd = msg->command;
>> +     itf->com_regs->hic_sensorid = msg->instance;
>> +     itf->com_regs->hic_param1 = msg->parameter1;
>> +     itf->com_regs->hic_param2 = msg->parameter2;
>> +     itf->com_regs->hic_param3 = msg->parameter3;
>> +     itf->com_regs->hic_param4 = msg->parameter4;
>> +     itf_hic_interrupt(itf);
>> +     spin_unlock_irqrestore(&itf->slock, flags);
>> +
>> +     if (!block_io)
>> +             goto exit;
>> +
>> +     ret = itf_wait_idlestate(itf);
>> +     if (ret) {
>> +             pr_err("%d command is timeout\n", msg->command);
>> +             itf_clr_state(itf, IS_IF_STATE_BUSY);
>> +             ret = -ETIME;
>> +             goto exit;
>> +     }
>> +
>> +     if (itf->reply.command == ISR_DONE) {
>> +             switch (msg->command) {
>> +             case HIC_STREAM_ON:
>> +                     itf->streaming = IS_IF_STREAMING_ON;
>> +                     break;
>> +             case HIC_STREAM_OFF:
>> +                     itf->streaming = IS_IF_STREAMING_OFF;
>> +                     break;
>> +             case HIC_PROCESS_START:
>> +                     itf->processing = IS_IF_PROCESSING_ON;
>> +                     break;
>> +             case HIC_PROCESS_STOP:
>> +                     itf->processing = IS_IF_PROCESSING_OFF;
>> +                     break;
>> +             case HIC_POWER_DOWN:
>> +                     itf->pdown_ready = IS_IF_POWER_DOWN_READY;
>> +                     break;
>> +             case HIC_OPEN_SENSOR:
>> +                     if (itf->reply.parameter1 == HIC_POWER_DOWN) {
>> +                             pr_err("firmware power down");
>> +                             itf->pdown_ready = IS_IF_POWER_DOWN_READY;
>> +                             ret = -ECANCELED;
>> +                             goto exit;
>> +                     } else
>> +                             itf->pdown_ready = IS_IF_POWER_DOWN_NREADY;
>> +                     break;
>> +             default:
>> +                     break;
>> +             }
>> +     } else {
>> +             pr_err("ISR_NDONE is occured");
>> +             ret = -EINVAL;
>> +     }
>> +
>> +exit:
>> +     exit_request_barrier(itf);
>> +
>> +     if (ret)
>> +             pr_err("Error returned from FW. See debugfs for error log\n");
>> +
>> +
>> +     return ret;
>> +}
>> +
>> +static int fimc_is_itf_set_cmd_shot(struct fimc_is_interface *itf,
>> +             struct fimc_is_msg *msg)
>> +{
>> +     int ret = 0;
>> +     unsigned long flags;
>> +
>> +     spin_lock_irqsave(&itf->slock, flags);
>> +     itf->com_regs->hicmd = msg->command;
>> +     itf->com_regs->hic_sensorid = msg->instance;
>> +     itf->com_regs->hic_param1 = msg->parameter1;
>> +     itf->com_regs->hic_param2 = msg->parameter2;
>> +     itf->com_regs->hic_param3 = msg->parameter3;
>> +     itf->com_regs->hic_param4 = msg->parameter4;
>> +     itf->com_regs->fcount = msg->parameter3;
>> +     itf_hic_interrupt(itf);
>> +     spin_unlock_irqrestore(&itf->slock, flags);
>> +
>> +     return ret;
>> +}
>> +
>> +static void itf_handle_general(struct fimc_is_interface *itf,
>> +             struct fimc_is_msg *msg)
>> +{
>> +     switch (msg->command) {
>> +
>> +     case IHC_GET_SENSOR_NUMBER:
>> +             pr_debug("IS version : %d.%d\n",
>> +                     ISDRV_VERSION, msg->parameter1);
>> +             /* Respond with sensor number */
>> +             itf_send_sensor_number(itf);
>> +             itf_init_wakeup(itf);
>> +             break;
>> +     case ISR_DONE:
>> +             switch (msg->parameter1) {
>> +             case HIC_OPEN_SENSOR:
>> +                     pr_debug("open done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_GET_SET_FILE_ADDR:
>> +                     pr_debug("saddr(%p) done\n",
>> +                             (void *)msg->parameter2);
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_LOAD_SET_FILE:
>> +                     pr_debug("setfile done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_SET_A5_MEM_ACCESS:
>> +                     pr_debug("cfgmem done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_PROCESS_START:
>> +                     pr_debug("process_on done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_PROCESS_STOP:
>> +                     pr_debug("process_off done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_STREAM_ON:
>> +                     pr_debug("stream_on done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_STREAM_OFF:
>> +                     pr_debug("stream_off done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_SET_PARAMETER:
>> +                     pr_debug("s_param done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_GET_STATIC_METADATA:
>> +                     pr_debug("g_capability done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_PREVIEW_STILL:
>> +                     pr_debug("a_param(%dx%d) done\n",
>> +                             msg->parameter2,
>> +                             msg->parameter3);
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             case HIC_POWER_DOWN:
>> +                     pr_debug("powerdown done\n");
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             /*non-blocking command*/
>> +             case HIC_SHOT:
>> +                     pr_err("shot done is not acceptable\n");
>> +                     break;
>> +             case HIC_SET_CAM_CONTROL:
>> +                     pr_err("camctrl is not acceptable\n");
>> +                     break;
>> +             default:
>> +                     pr_err("unknown done is invokded\n");
>> +                     break;
>> +             }
>
> You can add:
>         bool is_blocking = true;
> at the begining and set it to false in case of non-blocking commands.
> This will allow to remove all the statements:
>                         memcpy(&itf->reply, msg,
>                         sizeof(struct fimc_is_msg));
>                         itf_busy_wakeup(itf);
> and add one conditionally after the switch.
>

Yes will do that.

>> +             break;
>> +     case ISR_NDONE:
>> +             switch (msg->parameter1) {
>> +             case HIC_SHOT:
>> +                     pr_err("shot NOT done is not acceptable\n");
>> +                     break;
>> +             case HIC_SET_CAM_CONTROL:
>> +                     pr_debug("camctrl NOT done\n");
>> +                     break;
>> +             case HIC_SET_PARAMETER:
>> +                     pr_err("s_param NOT done\n");
>> +                     pr_err("param2 : 0x%08X\n", msg->parameter2);
>> +                     pr_err("param3 : 0x%08X\n", msg->parameter3);
>> +                     pr_err("param4 : 0x%08X\n", msg->parameter4);
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             default:
>> +                     pr_err("a command(%d) not done", msg->parameter1);
>> +                     memcpy(&itf->reply, msg,
>> +                             sizeof(struct fimc_is_msg));
>> +                     itf_busy_wakeup(itf);
>> +                     break;
>> +             }
>> +             break;
>> +     case IHC_SET_FACE_MARK:
>> +             pr_err("FACE_MARK(%d,%d,%d) is not acceptable\n",
>> +                     msg->parameter1,
>> +                     msg->parameter2,
>> +                     msg->parameter3);
>> +             break;
>> +     case IHC_AA_DONE:
>> +             pr_err("AA_DONE(%d,%d,%d) is not acceptable\n",
>> +                     msg->parameter1,
>> +                     msg->parameter2,
>> +                     msg->parameter3);
>> +             break;
>> +     case IHC_FLASH_READY:
>> +             pr_err("IHC_FLASH_READY is not acceptable");
>> +             break;
>> +     case IHC_NOT_READY:
>> +             pr_err("IHC_NOT_READY is occured, need reset");
>> +             break;
>> +     default:
>> +             pr_err("func_general unknown(0x%08X) end\n", msg->command);
>> +             break;
>> +     }
>> +}
>> +
>> +static void itf_handle_scaler_done(struct fimc_is_interface *itf,
>> +             struct fimc_is_msg *msg)
>> +{
>> +     struct fimc_is *is = fimc_interface_to_is(itf);
>> +     struct fimc_is_pipeline *pipeline = &is->pipeline;
>> +     struct fimc_is_buf *buf;
>> +     struct fimc_is_scaler *scl;
>> +     struct fimc_is_fmt *fmt;
>> +     struct timeval *tv;
>> +     struct timespec ts;
>> +     unsigned int wh, i;
>> +     unsigned int fcount = msg->parameter1;
>> +     unsigned long *comp_state;
>> +
>> +     if (msg->parameter4 == SCALER_SCC) {
>> +             scl = &pipeline->scaler[SCALER_SCC];
>> +             comp_state = &pipeline->comp_state[IS_SCC];
>> +     } else {
>> +             scl = &pipeline->scaler[SCALER_SCP];
>> +             comp_state = &pipeline->comp_state[IS_SCP];
>> +     }
>> +
>> +     fmt = scl->fmt;
>> +
>> +     fimc_is_pipeline_buf_lock(pipeline);
>> +     if (!list_empty(&scl->run_queue)) {
>> +
>> +             wh = scl->width * scl->height;
>> +             buf = fimc_is_scaler_run_queue_get(scl);
>> +             for (i = 0; i < fmt->num_planes; i++) {
>> +                     vb2_set_plane_payload(buf->vb, i,
>> +                                     (wh * fmt->depth[i]) / 8);
>> +             }
>> +
>> +             /* Set timestamp */
>> +             ktime_get_ts(&ts);
>> +             tv = &buf->vb->v4l2_buf.timestamp;
>> +             tv->tv_sec = ts.tv_sec;
>> +             tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
>> +             buf->vb->v4l2_buf.sequence = fcount;
>> +
>> +             pr_debug("SCP buffer done %d/%d\n",
>> +                             msg->parameter1, msg->parameter3);
>> +             vb2_buffer_done(buf->vb, VB2_BUF_STATE_DONE);
>> +     }
>> +     fimc_is_pipeline_buf_unlock(pipeline);
>> +     clear_bit(COMP_RUN, comp_state);
>> +     wake_up(&scl->event_q);
>> +}
>> +
>> +static void itf_handle_shot_done(struct fimc_is_interface *itf,
>> +             struct fimc_is_msg *msg)
>> +{
>> +     struct fimc_is *is = fimc_interface_to_is(itf);
>> +     struct fimc_is_pipeline *pipeline = &is->pipeline;
>> +     unsigned int status = msg->parameter2;
>> +     struct fimc_is_buf *bayer_buf;
>> +     int ret;
>> +
>> +     if (status != ISR_DONE)
>> +             pr_err("Shot done is invalid(0x%08X)\n", status);
>> +
>> +     /* DQ the bayer input buffer */
>> +     fimc_is_pipeline_buf_lock(pipeline);
>> +     bayer_buf = fimc_is_isp_run_queue_get(&pipeline->isp);
>> +     if (bayer_buf) {
>> +             vb2_buffer_done(bayer_buf->vb, VB2_BUF_STATE_DONE);
>> +             pr_debug("Bayer buffer done.\n");
>> +     }
>> +     fimc_is_pipeline_buf_unlock(pipeline);
>> +
>> +     /* Clear state & call shot again */
>> +     clear_bit(PIPELINE_RUN, &pipeline->state);
>> +
>> +     ret = fimc_is_pipeline_shot(pipeline);
>> +     if (ret)
>> +             pr_err("Shot failed\n");
>> +}
>> +
>> +/* Main FIMC-IS interrupt handler */
>> +static irqreturn_t itf_irq_handler(int irq, void *data)
>> +{
>> +     struct fimc_is_interface *itf;
>> +     struct fimc_is_msg msg;
>> +     unsigned int status;
>> +
>> +     itf = (struct fimc_is_interface *)data;
>> +     status = itf_get_intr(itf);
>> +
>> +     if (status & (1<<INTR_SHOT_DONE)) {
>> +             itf_get_cmd(itf, &msg, INTR_SHOT_DONE);
>> +
>> +             itf_handle_shot_done(itf, &msg);
>> +
>> +             status &= ~(1<<INTR_SHOT_DONE);
>> +             itf_clr_intr(itf, INTR_SHOT_DONE);
>> +     }
>> +
>> +     if (status & (1<<INTR_GENERAL)) {
>> +             itf_get_cmd(itf, &msg, INTR_GENERAL);
>> +
>> +             itf_handle_general(itf, &msg);
>> +
>> +             status &= ~(1<<INTR_GENERAL);
>> +             itf_clr_intr(itf, INTR_GENERAL);
>> +     }
>> +
>> +     if (status & (1<<INTR_SCC_FDONE)) {
>> +             itf_get_cmd(itf, &msg, INTR_SCC_FDONE);
>> +
>> +             msg.parameter4 = SCALER_SCC;
>> +             itf_handle_scaler_done(itf, &msg);
>> +
>> +             status &= ~(1<<INTR_SCC_FDONE);
>> +             itf_clr_intr(itf, INTR_SCC_FDONE);
>> +     }
>> +
>> +     if (status & (1<<INTR_SCP_FDONE)) {
>> +             itf_get_cmd(itf, &msg, INTR_SCP_FDONE);
>> +
>> +             msg.parameter4 = SCALER_SCP;
>> +             itf_handle_scaler_done(itf, &msg);
>> +
>> +             status &= ~(1<<INTR_SCP_FDONE);
>> +             itf_clr_intr(itf, INTR_SCP_FDONE);
>> +     }
>> +
>> +     if (status & (1<<INTR_META_DONE)) {
>> +             status &= ~(1<<INTR_META_DONE);
>> +             itf_clr_intr(itf, INTR_META_DONE);
>> +     }
>
> The code above seems quite redundant, putting it into a loop
> would look better. Also moving body of itf_clr_intr into this loop
> seems to me more clear.
>

Ok will try to clean this up.

>> +
>> +     if (status != 0)
>> +             pr_err("status is NOT all clear(0x%08X)", status);
>> +
>> +     return IRQ_HANDLED;
>> +}
>> +
>> +int fimc_is_itf_open_sensor(struct fimc_is_interface *itf,
>> +             unsigned int instance,
>> +             unsigned int sensor_id,
>> +             unsigned int i2c_channel,
>> +             unsigned int sensor_ext)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_OPEN_SENSOR;
>> +     msg.instance = instance;
>> +     msg.parameter1 = sensor_id;
>> +     msg.parameter2 = i2c_channel;
>> +     msg.parameter3 = sensor_ext;
>> +     msg.parameter4 = 0;
>
> You could use initializer here instead of code,
> the same for the following functions.
>

Ok.

>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_get_setfile_addr(struct fimc_is_interface *itf,
>> +             unsigned int instance, unsigned int *setfile_addr)
>> +{
>> +     int ret;
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_GET_SET_FILE_ADDR;
>> +     msg.instance = instance;
>> +     msg.parameter1 = 0;
>> +     msg.parameter2 = 0;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     ret = fimc_is_itf_set_cmd(itf, &msg);
>> +     *setfile_addr = itf->reply.parameter2;
>> +
>> +     return ret;
>> +}
>> +
>> +int fimc_is_itf_load_setfile(struct fimc_is_interface *itf,
>> +             unsigned int instance)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_LOAD_SET_FILE;
>> +     msg.instance = instance;
>> +     msg.parameter1 = 0;
>> +     msg.parameter2 = 0;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_stream_on(struct fimc_is_interface *itf,
>> +             unsigned int instance)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_STREAM_ON;
>> +     msg.instance = instance;
>> +     msg.parameter1 = 0;
>> +     msg.parameter2 = 0;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_stream_off(struct fimc_is_interface *itf,
>> +             unsigned int instance)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_STREAM_OFF;
>> +     msg.instance = instance;
>> +     msg.parameter1 = 0;
>> +     msg.parameter2 = 0;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_process_on(struct fimc_is_interface *itf,
>> +             unsigned int instance)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_PROCESS_START;
>> +     msg.instance = instance;
>> +     msg.parameter1 = 0;
>> +     msg.parameter2 = 0;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_process_off(struct fimc_is_interface *itf,
>> +             unsigned int instance)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_PROCESS_STOP;
>> +     msg.instance = instance;
>> +     msg.parameter1 = 0;
>> +     msg.parameter2 = 0;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_set_param(struct fimc_is_interface *itf,
>> +             unsigned int instance,
>> +             unsigned int indexes,
>> +             unsigned int lindex,
>> +             unsigned int hindex)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_SET_PARAMETER;
>> +     msg.instance = instance;
>> +     msg.parameter1 = ISS_PREVIEW_STILL;
>> +     msg.parameter2 = indexes;
>> +     msg.parameter3 = lindex;
>> +     msg.parameter4 = hindex;
>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_preview_still(struct fimc_is_interface *itf,
>> +             unsigned int instance)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_PREVIEW_STILL;
>> +     msg.instance = instance;
>> +     msg.parameter1 = 0;
>> +     msg.parameter2 = 0;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_get_capability(struct fimc_is_interface *itf,
>> +     unsigned int instance, unsigned int address)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_GET_STATIC_METADATA;
>> +     msg.instance = instance;
>> +     msg.parameter1 = address;
>> +     msg.parameter2 = 0;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_cfg_mem(struct fimc_is_interface *itf,
>> +             unsigned int instance, unsigned int address,
>> +             unsigned int size)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_SET_A5_MEM_ACCESS;
>> +     msg.instance = instance;
>> +     msg.parameter1 = address;
>> +     msg.parameter2 = size;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     return fimc_is_itf_set_cmd(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_shot_nblk(struct fimc_is_interface *itf,
>> +             unsigned int instance, unsigned int bayer,
>> +             unsigned int shot, unsigned int fcount, unsigned int rcount)
>> +{
>> +     struct fimc_is_msg msg;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_SHOT;
>> +     msg.instance = instance;
>> +     msg.parameter1 = bayer;
>> +     msg.parameter2 = shot;
>> +     msg.parameter3 = fcount;
>> +     msg.parameter4 = rcount;
>> +
>> +     return fimc_is_itf_set_cmd_shot(itf, &msg);
>> +}
>> +
>> +int fimc_is_itf_power_down(struct fimc_is_interface *itf,
>> +             unsigned int instance)
>> +{
>> +     struct fimc_is_msg msg;
>> +     int ret;
>> +
>> +     msg.id = 0;
>> +     msg.command = HIC_POWER_DOWN;
>> +     msg.instance = instance;
>> +     msg.parameter1 = 0;
>> +     msg.parameter2 = 0;
>> +     msg.parameter3 = 0;
>> +     msg.parameter4 = 0;
>> +
>> +     ret = fimc_is_itf_set_cmd(itf, &msg);
>> +     itf_clr_state(itf, IS_IF_STATE_INIT);
>> +
>> +     return ret;
>> +}
>> +
>> +/* Debugfs for showing FW debug messages */
>> +static int fimc_is_log_show(struct seq_file *s, void *data)
>> +{
>> +     struct fimc_is_interface *itf = s->private;
>> +     struct fimc_is *is = fimc_interface_to_is(itf);
>> +
>> +     const u8 *buf = (u8 *) (is->minfo.fw_vaddr + DEBUG_OFFSET);
>> +
>> +     if (is->minfo.fw_vaddr == 0) {
>> +             pr_err("Firmware memory is not initialized\n");
>> +             return -EIO;
>> +     }
>> +
>> +     seq_printf(s, "%s\n", buf);
>> +     return 0;
>> +}
>> +
>> +static int fimc_is_debugfs_open(struct inode *inode, struct file *file)
>> +{
>> +     return single_open(file, fimc_is_log_show, inode->i_private);
>> +}
>> +
>> +static const struct file_operations fimc_is_debugfs_fops = {
>> +     .open           = fimc_is_debugfs_open,
>> +     .read           = seq_read,
>> +     .llseek         = seq_lseek,
>> +     .release        = single_release,
>> +};
>> +
>> +static void fimc_is_debugfs_remove(struct fimc_is_interface *itf)
>> +{
>> +     debugfs_remove(itf->debugfs_entry);
>> +     itf->debugfs_entry = NULL;
>> +}
>> +
>> +static int fimc_is_debugfs_create(struct fimc_is_interface *itf)
>> +{
>> +     struct dentry *dentry;
>> +
>> +     itf->debugfs_entry = debugfs_create_dir("fimc_is", NULL);
>> +
>> +     dentry = debugfs_create_file("fw_log", S_IRUGO, itf->debugfs_entry,
>> +                                     itf, &fimc_is_debugfs_fops);
>> +     if (!dentry)
>> +             fimc_is_debugfs_remove(itf);
>> +
>> +     return itf->debugfs_entry == NULL ? -EIO : 0;
>> +}
>> +
>> +int fimc_is_interface_init(struct fimc_is_interface *itf,
>> +             void __iomem *regs, int irq)
>> +{
>> +     struct fimc_is *is = fimc_interface_to_is(itf);
>> +     struct device *dev = &is->pdev->dev;
>> +     int ret;
>> +
>> +     if (!regs || !irq) {
>> +             pr_err("Invalid args\n");
>> +             return -EINVAL;
>> +     }
>> +
>> +     itf->regs = regs;
>> +     itf->com_regs = (struct is_common_reg *)(regs + ISSR(0));
>> +
>> +     init_waitqueue_head(&itf->irq_queue);
>> +     spin_lock_init(&itf->slock_state);
>> +     spin_lock_init(&itf->slock);
>> +
>> +     /* Register interrupt handler */
>> +     ret = devm_request_irq(dev, irq, itf_irq_handler,
>> +                            0, dev_name(dev), itf);
>> +     if (ret) {
>> +             dev_err(dev, "Failed to install irq (%d)\n", ret);
>> +             return -EINVAL;
>> +     }
>> +
>> +     /* Initialize context vars */
>> +     itf->streaming = IS_IF_STREAMING_INIT;
>> +     itf->processing = IS_IF_PROCESSING_INIT;
>> +     itf->pdown_ready = IS_IF_POWER_DOWN_READY;
>> +     itf->debug_cnt = 0;
>> +     init_request_barrier(itf);
>> +
>> +     /* Debugfs for FW debug log */
>> +     fimc_is_debugfs_create(itf);
>> +
>> +     return 0;
>> +}
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-interface.h b/drivers/media/platform/exynos5-is/fimc-is-interface.h
>> new file mode 100644
>> index 0000000..08994f0
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-interface.h
>> @@ -0,0 +1,131 @@
>> +/*
>> + * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
>> + *
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + *  Arun Kumar K <arun.kk@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +#ifndef FIMC_IS_INTERFACE_H_
>> +#define FIMC_IS_INTERFACE_H_
>> +
>> +#include "fimc-is-core.h"
>> +
>> +#define TRY_RECV_AWARE_COUNT    100
>> +
>> +#define ISDRV_VERSION                111
>> +
>> +#define LOWBIT_OF(num)  (num >= 32 ? 0 : (unsigned int)1<<num)
>> +#define HIGHBIT_OF(num) (num >= 32 ? (unsigned int)1<<(num-32) : 0)
>> +
>> +enum interrupt_map {
>> +     INTR_GENERAL            = 0,
>> +     INTR_ISP_FDONE          = 1,
>> +     INTR_SCC_FDONE          = 2,
>> +     INTR_DNR_FDONE          = 3,
>> +     INTR_SCP_FDONE          = 4,
>> +     /* 5 is ISP YUV DONE */
>> +     INTR_META_DONE          = 6,
>> +     INTR_SHOT_DONE          = 7,
>> +     INTR_MAX_MAP
>> +};
>> +
>> +enum fimc_is_interface_state {
>> +     IS_IF_STATE_INIT,
>> +     IS_IF_STATE_OPEN,
>> +     IS_IF_STATE_START,
>> +     IS_IF_STATE_BUSY
>> +};
>> +
>> +enum streaming_state {
>> +     IS_IF_STREAMING_INIT,
>> +     IS_IF_STREAMING_OFF,
>> +     IS_IF_STREAMING_ON
>> +};
>> +
>> +enum processing_state {
>> +     IS_IF_PROCESSING_INIT,
>> +     IS_IF_PROCESSING_OFF,
>> +     IS_IF_PROCESSING_ON
>> +};
>> +
>> +enum pdown_ready_state {
>> +     IS_IF_POWER_DOWN_READY,
>> +     IS_IF_POWER_DOWN_NREADY
>> +};
>> +
>> +struct fimc_is_msg {
>> +     unsigned int    id;
>> +     unsigned int    command;
>> +     unsigned int    instance;
>> +     unsigned int    parameter1;
>> +     unsigned int    parameter2;
>> +     unsigned int    parameter3;
>> +     unsigned int    parameter4;
>> +};
>
> Why not unsigned int params[4];
>
>> +
>> +struct fimc_is_interface {
>> +
>> +     unsigned long                   state;
>> +
>> +     void __iomem                    *regs;
>> +     struct is_common_reg __iomem    *com_regs;
>> +     spinlock_t                      slock;
>> +     spinlock_t                      slock_state;
>> +     wait_queue_head_t               irq_queue;
>> +
>> +     spinlock_t                      process_barrier;
>> +     struct mutex                    request_barrier;
>> +
>> +     enum streaming_state            streaming;
>> +     enum processing_state           processing;
>> +     enum pdown_ready_state          pdown_ready;
>> +
>> +     struct fimc_is_msg              reply;
>> +
>> +     int                             debug_cnt;
>> +     struct dentry                   *debugfs_entry;
>> +
>> +};
>> +
>> +int fimc_is_interface_init(struct fimc_is_interface *itf,
>> +             void __iomem *regs, int irq);
>> +int fimc_is_itf_wait_init_state(struct fimc_is_interface *itf);
>> +int fimc_is_itf_hw_dump(struct fimc_is_interface *itf);
>> +int fimc_is_itf_open_sensor(struct fimc_is_interface *itf,
>> +             unsigned int instance,
>> +             unsigned int sensor_id,
>> +             unsigned int i2c_channel,
>> +             unsigned int sensor_ext);
>> +int fimc_is_itf_get_setfile_addr(struct fimc_is_interface *this,
>> +             unsigned int instance, unsigned int *setfile_addr);
>> +int fimc_is_itf_load_setfile(struct fimc_is_interface *itf,
>> +             unsigned int instance);
>> +int fimc_is_itf_stream_on(struct fimc_is_interface *itf,
>> +             unsigned int instance);
>> +int fimc_is_itf_stream_off(struct fimc_is_interface *itf,
>> +             unsigned int instance);
>> +int fimc_is_itf_process_on(struct fimc_is_interface *itf,
>> +             unsigned int instance);
>> +int fimc_is_itf_process_off(struct fimc_is_interface *itf,
>> +             unsigned int instance);
>> +int fimc_is_itf_set_param(struct fimc_is_interface *this,
>> +             unsigned int instance,
>> +             unsigned int indexes,
>> +             unsigned int lindex,
>> +             unsigned int hindex);
>> +int fimc_is_itf_preview_still(struct fimc_is_interface *itf,
>> +             unsigned int instance);
>> +int fimc_is_itf_get_capability(struct fimc_is_interface *itf,
>> +     unsigned int instance, unsigned int address);
>> +int fimc_is_itf_cfg_mem(struct fimc_is_interface *itf,
>> +             unsigned int instance, unsigned int address,
>> +             unsigned int size);
>> +int fimc_is_itf_shot_nblk(struct fimc_is_interface *itf,
>> +             unsigned int instance, unsigned int bayer,
>> +             unsigned int shot, unsigned int fcount, unsigned int rcount);
>> +int fimc_is_itf_power_down(struct fimc_is_interface *itf,
>> +             unsigned int instance);
>> +#endif
>>
>
> Regards
> Andrzej
>

Thanks and Regards
Arun

Re: [RFC v2 07/10] exynos5-fimc-is: Adds scaler subdev

[Arun Kumar K]

Hi Hans,

Thank you for the review.

On Wed, Jun 26, 2013 at 12:43 PM, Hans Verkuil <hverkuil@xs4all.nl> wrote:
> On Fri May 31 2013 15:03:25 Arun Kumar K wrote:
>> FIMC-IS has two hardware scalers named as scaler-codec and
>> scaler-preview. This patch adds the common code handling the
>> video nodes and subdevs of both the scalers.
>>
>> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
>> ---
>>  drivers/media/platform/exynos5-is/fimc-is-scaler.c |  492 ++++++++++++++++++++
>>  drivers/media/platform/exynos5-is/fimc-is-scaler.h |  107 +++++
>>  2 files changed, 599 insertions(+)
>>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.c
>>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.h
>>
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-scaler.c b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
>> new file mode 100644
>> index 0000000..b4f3f5c
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
>> @@ -0,0 +1,492 @@
>> +/*
>> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
>> + *
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + *  Arun Kumar K <arun.kk@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <media/v4l2-ioctl.h>
>> +#include <media/videobuf2-dma-contig.h>
>> +
>> +#include "fimc-is.h"
>> +
>> +#define IS_SCALER_DRV_NAME "fimc-is-scaler"
>> +
>> +static const struct fimc_is_fmt formats[] = {
>> +     {
>> +             .name           = "YUV 4:2:0 3p MultiPlanar",
>> +             .fourcc         = V4L2_PIX_FMT_YUV420M,
>> +             .depth          = {8, 2, 2},
>> +             .num_planes     = 3,
>> +     },
>> +     {
>> +             .name           = "YUV 4:2:0 2p MultiPlanar",
>> +             .fourcc         = V4L2_PIX_FMT_NV12M,
>> +             .depth          = {8, 4},
>> +             .num_planes     = 2,
>> +     },
>> +     {
>> +             .name           = "YUV 4:2:2 1p MultiPlanar",
>> +             .fourcc         = V4L2_PIX_FMT_NV16,
>> +             .depth          = {16},
>> +             .num_planes     = 1,
>> +     },
>> +};
>> +#define NUM_FORMATS ARRAY_SIZE(formats)
>> +
>> +static struct fimc_is_fmt *find_format(struct v4l2_format *f)
>> +{
>> +     unsigned int i;
>> +
>> +     for (i = 0; i < NUM_FORMATS; i++) {
>> +             if (formats[i].fourcc == f->fmt.pix_mp.pixelformat)
>> +                     return (struct fimc_is_fmt *) &formats[i];
>> +     }
>> +     return NULL;
>> +}
>> +
>> +static int scaler_video_capture_start_streaming(struct vb2_queue *vq,
>> +                                     unsigned int count)
>> +{
>> +     struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
>> +     int ret;
>> +
>> +     /* Scaler start */
>> +     ret = fimc_is_pipeline_scaler_start(ctx->pipeline,
>> +                     ctx->scaler_id,
>> +                     (unsigned int **)ctx->buf_paddr,
>> +                     ctx->num_buffers,
>> +                     ctx->fmt->num_planes);
>> +     if (ret) {
>> +             pr_err("Scaler start failed.\n");
>> +             return -EINVAL;
>> +     }
>> +
>> +     set_bit(STATE_RUNNING, &ctx->capture_state);
>> +     return 0;
>> +}
>> +
>> +static int scaler_video_capture_stop_streaming(struct vb2_queue *vq)
>> +{
>> +     struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
>> +     int ret;
>> +
>> +     /* Scaler stop */
>> +     ret = fimc_is_pipeline_scaler_stop(ctx->pipeline, ctx->scaler_id);
>> +     if (ret)
>> +             pr_debug("Scaler already stopped.\n");
>> +
>> +     clear_bit(STATE_RUNNING, &ctx->capture_state);
>> +     return 0;
>> +}
>> +
>> +static int scaler_video_capture_queue_setup(struct vb2_queue *vq,
>> +                     const struct v4l2_format *pfmt,
>> +                     unsigned int *num_buffers, unsigned int *num_planes,
>> +                     unsigned int sizes[], void *allocators[])
>> +{
>> +     struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
>> +     struct fimc_is_fmt *fmt = ctx->fmt;
>> +     unsigned int wh;
>> +     int i;
>> +
>> +     if (!fmt)
>> +             return -EINVAL;
>> +
>> +     *num_planes = fmt->num_planes;
>> +     wh = ctx->width * ctx->height;
>> +
>> +     for (i = 0; i < *num_planes; i++) {
>> +             allocators[i] = ctx->alloc_ctx;
>> +             sizes[i] = (wh * fmt->depth[i]) / 8;
>> +     }
>> +     return 0;
>> +}
>> +
>> +static int scaler_video_capture_buffer_init(struct vb2_buffer *vb)
>> +{
>> +     struct vb2_queue *vq = vb->vb2_queue;
>> +     struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
>> +     struct fimc_is_buf *buf;
>> +     struct fimc_is_fmt *fmt;
>> +     int i;
>> +
>> +     buf = &ctx->capture_bufs[vb->v4l2_buf.index];
>> +     /* Initialize buffer */
>> +     buf->vb = vb;
>> +     fmt = ctx->fmt;
>> +     for (i = 0; i < fmt->num_planes; i++)
>> +             buf->paddr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
>> +
>> +     ctx->cap_buf_cnt++;
>> +     return 0;
>> +}
>> +
>> +static void scaler_video_capture_buffer_queue(struct vb2_buffer *vb)
>> +{
>> +     struct vb2_queue *vq = vb->vb2_queue;
>> +     struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
>> +     struct fimc_is_buf *buf;
>> +
>> +     buf = &ctx->capture_bufs[vb->v4l2_buf.index];
>> +
>> +     /* Add buffer to the wait queue */
>> +     pr_debug("Add buffer %d in Scaler %d\n",
>> +                     vb->v4l2_buf.index, ctx->scaler_id);
>> +     fimc_is_pipeline_buf_lock(ctx->pipeline);
>> +     fimc_is_scaler_wait_queue_add(ctx, buf);
>> +     fimc_is_pipeline_buf_unlock(ctx->pipeline);
>> +}
>> +
>> +static void scaler_lock(struct vb2_queue *vq)
>> +{
>> +     struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
>> +     mutex_lock(&ctx->video_lock);
>> +}
>> +
>> +static void scaler_unlock(struct vb2_queue *vq)
>> +{
>> +     struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
>> +     mutex_unlock(&ctx->video_lock);
>> +}
>> +
>> +static const struct vb2_ops scaler_video_capture_qops = {
>> +     .queue_setup            = scaler_video_capture_queue_setup,
>> +     .buf_init               = scaler_video_capture_buffer_init,
>> +     .buf_queue              = scaler_video_capture_buffer_queue,
>> +     .wait_prepare           = scaler_unlock,
>> +     .wait_finish            = scaler_lock,
>> +     .start_streaming        = scaler_video_capture_start_streaming,
>> +     .stop_streaming         = scaler_video_capture_stop_streaming,
>> +};
>> +
>> +static int scaler_video_capture_open(struct file *file)
>> +{
>> +     struct fimc_is_scaler *ctx = video_drvdata(file);
>> +     int ret = 0;
>> +
>> +     /* Check if opened before */
>> +     if (ctx->refcount >= FIMC_IS_MAX_INSTANCES) {
>> +             pr_err("All instances are in use.\n");
>> +             return -EBUSY;
>> +     }
>> +
>> +     INIT_LIST_HEAD(&ctx->wait_queue);
>> +     ctx->wait_queue_cnt = 0;
>> +     INIT_LIST_HEAD(&ctx->run_queue);
>> +     ctx->run_queue_cnt = 0;
>> +
>> +     ctx->fmt = NULL;
>> +     ctx->refcount++;
>> +
>> +     return ret;
>> +}
>> +
>> +static int scaler_video_capture_close(struct file *file)
>> +{
>> +     struct fimc_is_scaler *ctx = video_drvdata(file);
>> +     int ret = 0;
>> +
>> +     ctx->refcount--;
>> +     ctx->capture_state = 0;
>> +     vb2_fop_release(file);
>> +
>> +     return ret;
>> +}
>> +
>> +static const struct v4l2_file_operations scaler_video_capture_fops = {
>> +     .owner          = THIS_MODULE,
>> +     .open           = scaler_video_capture_open,
>> +     .release        = scaler_video_capture_close,
>> +     .poll           = vb2_fop_poll,
>> +     .unlocked_ioctl = video_ioctl2,
>> +     .mmap           = vb2_fop_mmap,
>> +};
>> +
>> +/*
>> + * Video node ioctl operations
>> + */
>> +static int scaler_querycap_capture(struct file *file, void *priv,
>> +                                     struct v4l2_capability *cap)
>> +{
>> +     strncpy(cap->driver, IS_SCALER_DRV_NAME, sizeof(cap->driver) - 1);
>> +     strncpy(cap->card, IS_SCALER_DRV_NAME, sizeof(cap->card) - 1);
>> +     strncpy(cap->bus_info, IS_SCALER_DRV_NAME, sizeof(cap->bus_info) - 1);
>
> bus_info for a platform device must be prefixed with "platform:"
>
>> +     cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
>
> You are missing V4L2_CAP_DEVICE_CAPS.
>
> It's easier to write:
>
>         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
>

Ok will change.

>> +     cap->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
>> +     return 0;
>> +}
>> +
>> +static int scaler_enum_fmt_mplane(struct file *file, void *priv,
>> +                                  struct v4l2_fmtdesc *f)
>> +{
>> +     const struct fimc_is_fmt *fmt;
>> +
>> +     if (f->index >= NUM_FORMATS)
>> +             return -EINVAL;
>> +
>> +     fmt = &formats[f->index];
>> +     strlcpy(f->description, fmt->name, sizeof(f->description));
>> +     f->pixelformat = fmt->fourcc;
>> +     return 0;
>> +}
>> +
>> +static int scaler_g_fmt_mplane(struct file *file, void *priv,
>> +                               struct v4l2_format *f)
>> +{
>> +     struct fimc_is_scaler *ctx = video_drvdata(file);
>> +     struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
>> +     struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
>> +     const struct fimc_is_fmt *fmt = ctx->fmt;
>> +
>> +     plane_fmt->bytesperline = (ctx->width * fmt->depth[0]) / 8;
>> +     plane_fmt->sizeimage = plane_fmt->bytesperline * ctx->height;
>> +
>> +     pixm->num_planes = fmt->num_planes;
>> +     pixm->pixelformat = fmt->fourcc;
>> +     pixm->width = ctx->width;
>> +     pixm->height = ctx->height;
>> +     pixm->field = V4L2_FIELD_NONE;
>> +     pixm->colorspace = V4L2_COLORSPACE_JPEG;
>
> priv must be zeroed: pixm->priv = 0;
>

Ok.

>> +
>> +     return 0;
>> +}
>> +
>> +static int scaler_try_fmt_mplane(struct file *file, void *priv,
>> +                               struct v4l2_format *f)
>> +{
>> +     struct fimc_is_fmt *fmt;
>> +
>> +     if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
>> +             return -EINVAL;
>
> Not necessary, checked by the core for you.
>

Ok.

>> +
>> +     fmt = find_format(f);
>> +     if (!fmt) {
>> +             fmt = (struct fimc_is_fmt *) &formats[0];
>> +             f->fmt.pix_mp.pixelformat = fmt->fourcc;
>> +     }
>> +
>> +     if (fmt->num_planes != f->fmt.pix_mp.num_planes)
>> +             f->fmt.pix_mp.num_planes = fmt->num_planes;
>
> try_fmt must also set field, colorspace, priv and calculate bytesperline
> and sizeimage. Note: if the DMA supports strides > width then a
> bytesperline value > width * depth must be honoured.
>

Ok.

>> +
>> +     return 0;
>> +}
>> +
>> +static int scaler_s_fmt_mplane(struct file *file, void *priv,
>> +                             struct v4l2_format *f)
>> +{
>> +     struct fimc_is_scaler *ctx = video_drvdata(file);
>> +     struct fimc_is_fmt *fmt;
>> +     int ret;
>> +
>> +     ret = scaler_try_fmt_mplane(file, priv, f);
>> +     if (ret)
>> +             return ret;
>> +
>> +     /* Get format type */
>> +     fmt = find_format(f);
>> +     if (!fmt) {
>> +             fmt = (struct fimc_is_fmt *) &formats[0];
>> +             f->fmt.pix_mp.pixelformat = fmt->fourcc;
>> +             f->fmt.pix_mp.num_planes = fmt->num_planes;
>> +     }
>> +
>> +     /* Check width & height */
>> +     if (f->fmt.pix_mp.width > ctx->pipeline->sensor_width ||
>> +             f->fmt.pix_mp.height > ctx->pipeline->sensor_height) {
>> +             f->fmt.pix_mp.width = ctx->pipeline->sensor_width;
>> +             f->fmt.pix_mp.height = ctx->pipeline->sensor_height;
>> +     }
>> +
>> +     /* Save values to context */
>> +     ctx->fmt = fmt;
>> +     ctx->width = f->fmt.pix_mp.width;
>> +     ctx->height = f->fmt.pix_mp.height;
>> +     ctx->pipeline->scaler_width[ctx->scaler_id] = ctx->width;
>> +     ctx->pipeline->scaler_height[ctx->scaler_id] = ctx->height;
>> +     set_bit(STATE_INIT, &ctx->capture_state);
>> +     return 0;
>> +}
>> +
>> +static int scaler_reqbufs(struct file *file, void *priv,
>> +             struct v4l2_requestbuffers *reqbufs)
>> +{
>> +     struct fimc_is_scaler *ctx = video_drvdata(file);
>> +     int ret;
>> +
>> +     if (reqbufs->memory != V4L2_MEMORY_MMAP &&
>> +                     reqbufs->memory != V4L2_MEMORY_DMABUF) {
>> +             pr_err("Memory type not supported\n");
>> +             return -EINVAL;
>> +     }
>
> No need for this, vb2 checks this already.
>

Ok.

>> +
>> +     if (!ctx->fmt) {
>> +             pr_err("Set format not done\n");
>> +             return -EINVAL;
>> +     }
>
> This should never happen, ctx->fmt must always be set to something.
> On driver load a default format should be selected to ensure this.
>

Ok.

>> +
>> +     /* Check whether buffers are already allocated */
>> +     if (test_bit(STATE_BUFS_ALLOCATED, &ctx->capture_state)) {
>> +             pr_err("Buffers already allocated\n");
>> +             return -EINVAL;
>> +     }
>
> vb2 also takes care of this: vb2_is_busy()
>

Ok.

>> +
>> +     ret = vb2_reqbufs(&ctx->vbq, reqbufs);
>> +     if (ret) {
>> +             pr_err("vb2 req buffers failed\n");
>> +             return ret;
>> +     }
>> +
>> +     ctx->num_buffers = reqbufs->count;
>
> vb2 stores this in q->num_buffers, no need to keep track of this.
>

Ok will remove that.

>> +     ctx->cap_buf_cnt = 0;
>> +     set_bit(STATE_BUFS_ALLOCATED, &ctx->capture_state);
>> +     return 0;
>> +}
>
> Frankly I see no reason why you can't use vb2_ioctl_reqbufs instead.
>

Yes will use vb2_ioctl_reqbufs

>> +
>> +static const struct v4l2_ioctl_ops scaler_video_capture_ioctl_ops = {
>> +     .vidioc_querycap                = scaler_querycap_capture,
>> +     .vidioc_enum_fmt_vid_cap_mplane = scaler_enum_fmt_mplane,
>> +     .vidioc_try_fmt_vid_cap_mplane  = scaler_try_fmt_mplane,
>> +     .vidioc_s_fmt_vid_cap_mplane    = scaler_s_fmt_mplane,
>> +     .vidioc_g_fmt_vid_cap_mplane    = scaler_g_fmt_mplane,
>> +     .vidioc_reqbufs                 = scaler_reqbufs,
>> +     .vidioc_querybuf                = vb2_ioctl_querybuf,
>> +     .vidioc_qbuf                    = vb2_ioctl_qbuf,
>> +     .vidioc_dqbuf                   = vb2_ioctl_dqbuf,
>> +     .vidioc_expbuf                  = vb2_ioctl_expbuf,
>> +     .vidioc_streamon                = vb2_ioctl_streamon,
>> +     .vidioc_streamoff               = vb2_ioctl_streamoff,
>> +};
>> +
>> +static int scaler_subdev_registered(struct v4l2_subdev *sd)
>> +{
>> +     struct fimc_is_scaler *ctx = v4l2_get_subdevdata(sd);
>> +     struct vb2_queue *q = &ctx->vbq;
>> +     struct video_device *vfd = &ctx->vfd;
>> +     int ret;
>> +
>> +     mutex_init(&ctx->video_lock);
>> +
>> +     memset(vfd, 0, sizeof(*vfd));
>> +     if (ctx->scaler_id == SCALER_SCC)
>> +             snprintf(vfd->name, sizeof(vfd->name), "fimc-is-scaler.codec");
>> +     else
>> +             snprintf(vfd->name, sizeof(vfd->name),
>> +                             "fimc-is-scaler.preview");
>> +
>> +     vfd->fops = &scaler_video_capture_fops;
>> +     vfd->ioctl_ops = &scaler_video_capture_ioctl_ops;
>> +     vfd->v4l2_dev = sd->v4l2_dev;
>> +     vfd->minor = -1;
>
> No need to set this.
>

Ok

>> +     vfd->release = video_device_release_empty;
>> +     vfd->lock = &ctx->video_lock;
>> +     vfd->queue = q;
>> +     vfd->vfl_dir = VFL_DIR_RX;
>
> In order to provide G/S_PRIORITY support and for supporting control events
> you need to use struct v4l2_fh and set the PRIO flag in vfd->flags. See e.g.
> vivi.c.
>
> Please run the v4l2-compliance tool over any video nodes you make to check
> that the driver implements everything correctly! Always use the latest version
> from the v4l-utils.git repository as this utility is continuously improved.
>
> Most if not all comments I made would have been found with that utility.
> Don't leave home without it :-)
>

Sure will run the tool and correct issues in the next version.

> Regards,
>
>         Hans
>

Thanks and regards
Arun

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Arun Kumar K]

Hi Sylwester,

On Fri, Jun 21, 2013 at 4:55 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> On 05/31/2013 03:03 PM, Arun Kumar K wrote:
>>
>> fimc-is driver takes video data input from the ISP video node
>> which is added in this patch. This node accepts Bayer input
>> buffers which is given from the IS sensors.
>>
>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
>> ---
>>   drivers/media/platform/exynos5-is/fimc-is-isp.c |  438
>> +++++++++++++++++++++++
>>   drivers/media/platform/exynos5-is/fimc-is-isp.h |   89 +++++
>>   2 files changed, 527 insertions(+)
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.c
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.h
>>
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-isp.c
>> b/drivers/media/platform/exynos5-is/fimc-is-isp.c
>> new file mode 100644
>> index 0000000..2890f17
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-isp.c
>> @@ -0,0 +1,438 @@
>> +/*
>> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
>> + *
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + *  Arun Kumar K<arun.kk@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include<media/v4l2-ioctl.h>
>> +#include<media/videobuf2-dma-contig.h>
>> +
>> +#include "fimc-is.h"
>> +
>> +#define ISP_DRV_NAME "fimc-is-isp"
>> +
>> +static const struct fimc_is_fmt formats[] = {
>> +       {
>> +               .name           = "Bayer GR-BG 8bits",
>> +               .fourcc         = V4L2_PIX_FMT_SGRBG8,
>> +               .depth          = {8},
>
>
> Please add spaces betwen {} and the number.
>

Ok

>
>> +               .num_planes     = 1,
>> +       },
>> +       {
>> +               .name           = "Bayer GR-BG 10bits",
>> +               .fourcc         = V4L2_PIX_FMT_SGRBG10,
>> +               .depth          = {10},
>> +               .num_planes     = 1,
>> +       },
>> +       {
>> +               .name           = "Bayer GR-BG 12bits",
>> +               .fourcc         = V4L2_PIX_FMT_SGRBG12,
>> +               .depth          = {12},
>> +               .num_planes     = 1,
>> +       },
>> +};
>> +#define NUM_FORMATS ARRAY_SIZE(formats)
>> +
>> +static struct fimc_is_fmt *find_format(struct v4l2_format *f)
>
>
> Make the return value 'const'...
>

Ok

>
>> +{
>> +       unsigned int i;
>> +
>> +       for (i = 0; i<  NUM_FORMATS; i++) {
>> +               if (formats[i].fourcc == f->fmt.pix_mp.pixelformat)
>> +                       return (struct fimc_is_fmt *)&formats[i];
>
>
> and drop the casting here.
>

Ok

>
>> +       }
>> +       return NULL;
>> +}
>> +
>> +static int isp_video_output_start_streaming(struct vb2_queue *vq,
>> +                                       unsigned int count)
>> +{
>> +       struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
>> +
>> +       /* Set state to RUNNING */
>
>
> This comment doesn't add any value.
>

Yes :) will remove.

>> +       set_bit(STATE_RUNNING,&isp->output_state);
>>
>> +       return 0;
>> +}
>> +
>> +static int isp_video_output_stop_streaming(struct vb2_queue *vq)
>> +{
>> +       struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
>> +
>> +       clear_bit(STATE_RUNNING,&isp->output_state);
>>
>> +       return 0;
>> +}
>> +
>> +static int isp_video_output_queue_setup(struct vb2_queue *vq,
>> +                       const struct v4l2_format *pfmt,
>> +                       unsigned int *num_buffers, unsigned int
>> *num_planes,
>> +                       unsigned int sizes[], void *allocators[])
>> +{
>> +       struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
>> +       struct fimc_is_fmt *fmt = isp->fmt;
>> +       unsigned int wh, i;
>> +
>> +       if (!fmt)
>> +               return -EINVAL;
>> +
>> +       *num_planes = fmt->num_planes;
>> +       wh = isp->width * isp->height;
>> +
>> +       for (i = 0; i<  *num_planes; i++) {
>> +               allocators[i] = isp->alloc_ctx;
>> +               sizes[i] = (wh * fmt->depth[i]) / 8;
>> +       }
>> +       return 0;
>> +}
>> +
>> +static int isp_video_output_buffer_init(struct vb2_buffer *vb)
>> +{
>> +       struct vb2_queue *vq = vb->vb2_queue;
>> +       struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
>> +       struct fimc_is_buf *buf;
>> +
>> +       buf =&isp->output_bufs[vb->v4l2_buf.index];
>>
>> +       /* Initialize buffer */
>> +       buf->vb = vb;
>> +       buf->paddr[0] = vb2_dma_contig_plane_dma_addr(vb, 0);
>> +       isp->out_buf_cnt++;
>> +       return 0;
>> +}
>> +
>> +static void isp_video_output_buffer_queue(struct vb2_buffer *vb)
>> +{
>> +       struct vb2_queue *vq = vb->vb2_queue;
>> +       struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
>> +       struct fimc_is_buf *buf;
>> +
>> +       buf =&isp->output_bufs[vb->v4l2_buf.index];
>>
>> +
>> +       fimc_is_pipeline_buf_lock(isp->pipeline);
>> +       fimc_is_isp_wait_queue_add(isp, buf);
>> +       fimc_is_pipeline_buf_unlock(isp->pipeline);
>> +
>> +       /* Call shot command */
>> +       fimc_is_pipeline_shot(isp->pipeline);
>> +}
>> +
>> +static void isp_lock(struct vb2_queue *vq)
>> +{
>> +       struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
>> +       mutex_lock(&isp->video_lock);
>> +}
>> +
>> +static void isp_unlock(struct vb2_queue *vq)
>> +{
>> +       struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
>> +       mutex_unlock(&isp->video_lock);
>> +}
>> +
>> +static const struct vb2_ops isp_video_output_qops = {
>> +       .queue_setup     = isp_video_output_queue_setup,
>> +       .buf_init        = isp_video_output_buffer_init,
>> +       .buf_queue       = isp_video_output_buffer_queue,
>> +       .wait_prepare    = isp_unlock,
>> +       .wait_finish     = isp_lock,
>> +       .start_streaming = isp_video_output_start_streaming,
>> +       .stop_streaming  = isp_video_output_stop_streaming,
>> +};
>> +
>> +static int isp_video_output_open(struct file *file)
>> +{
>> +       struct fimc_is_isp *isp = video_drvdata(file);
>> +       int ret = 0;
>> +
>> +       /* Check if opened before */
>> +       if (isp->refcount>= FIMC_IS_MAX_INSTANCES) {
>> +               pr_err("All instances are in use.\n");
>> +               return -EBUSY;
>
>
> Multiple open() should be allowed. And device node drivers should
> use struct v4l2_fh.
>

But then we need to restrict the number of instances to the maximum
that hardware can support. Where else can it be taken care?

>
>> +       }
>> +
>> +       INIT_LIST_HEAD(&isp->wait_queue);
>> +       isp->wait_queue_cnt = 0;
>> +       INIT_LIST_HEAD(&isp->run_queue);
>> +       isp->run_queue_cnt = 0;
>
>
> This does not belong here, I would put it into the start_streaming
> handler.
>

Ok

>
>> +       isp->refcount++;
>> +       return ret;
>> +}
>> +
>> +static int isp_video_output_close(struct file *file)
>> +{
>> +       struct fimc_is_isp *isp = video_drvdata(file);
>> +       int ret = 0;
>
>
> This variable looks redundant.
>

Yes will remove.

>
>> +       isp->refcount--;
>> +       isp->output_state = 0;
>> +       vb2_fop_release(file);
>
>
>> +       return ret;
>> +}
>> +
>> +static const struct v4l2_file_operations isp_video_output_fops = {
>> +       .owner          = THIS_MODULE,
>> +       .open           = isp_video_output_open,
>> +       .release        = isp_video_output_close,
>> +       .poll           = vb2_fop_poll,
>> +       .unlocked_ioctl = video_ioctl2,
>> +       .mmap           = vb2_fop_mmap,
>> +};
>> +
>> +/*
>> + * Video node ioctl operations
>> + */
>> +static int isp_querycap_output(struct file *file, void *priv,
>> +                                       struct v4l2_capability *cap)
>> +{
>> +       strncpy(cap->driver, ISP_DRV_NAME, sizeof(cap->driver) - 1);
>> +       strncpy(cap->card, ISP_DRV_NAME, sizeof(cap->card) - 1);
>> +       strncpy(cap->bus_info, ISP_DRV_NAME, sizeof(cap->bus_info) - 1);
>> +       cap->capabilities = V4L2_CAP_STREAMING |
>> V4L2_CAP_VIDEO_OUTPUT_MPLANE;
>> +       cap->device_caps = V4L2_CAP_STREAMING |
>> V4L2_CAP_VIDEO_OUTPUT_MPLANE;
>
>
>         cap->capabilities = V4L2_CAP_STREAMING;
>
>         cap->device_caps = V4L2_CAP_STREAMING |
> V4L2_CAP_VIDEO_OUTPUT_MPLANE;
>
> This should be:
>
>         cap->device_caps = V4L2_CAP_STREAMING;
>         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
>
> Media Controller device nodes must not use V4L2_CAP_VIDEO_{OUTPUT,
> CAPTURE}_(_MPLANE)
> capability flags.
>

Ok

>> +       return 0;
>> +}
>> +
>> +static int isp_enum_fmt_mplane(struct file *file, void *priv,
>> +                                    struct v4l2_fmtdesc *f)
>> +{
>> +       const struct fimc_is_fmt *fmt;
>> +
>> +       if (f->index>= NUM_FORMATS)
>> +               return -EINVAL;
>> +
>> +       fmt =&formats[f->index];
>>
>> +       strlcpy(f->description, fmt->name, sizeof(f->description));
>> +       f->pixelformat = fmt->fourcc;
>> +
>> +       return 0;
>> +}
>> +
>> +static int isp_g_fmt_mplane(struct file *file, void *fh,
>> +                                 struct v4l2_format *f)
>> +{
>> +       struct fimc_is_isp *isp = video_drvdata(file);
>> +       struct v4l2_pix_format_mplane *pixm =&f->fmt.pix_mp;
>> +       struct v4l2_plane_pix_format *plane_fmt =&pixm->plane_fmt[0];
>>
>> +       const struct fimc_is_fmt *fmt = isp->fmt;
>> +
>> +       plane_fmt->bytesperline = (isp->width * fmt->depth[0]) / 8;
>> +       plane_fmt->sizeimage = plane_fmt->bytesperline * isp->height;
>> +
>> +       pixm->num_planes = fmt->num_planes;
>> +       pixm->pixelformat = fmt->fourcc;
>> +       pixm->width = isp->width;
>> +       pixm->height = isp->height;
>> +       pixm->field = V4L2_FIELD_NONE;
>> +       pixm->colorspace = V4L2_COLORSPACE_JPEG;
>> +
>> +       return 0;
>> +}
>> +
>> +static int isp_try_fmt_mplane(struct file *file, void *fh,
>> +               struct v4l2_format *f)
>> +{
>> +       struct fimc_is_fmt *fmt;
>> +
>> +       fmt = find_format(f);
>> +       if (!fmt) {
>> +               fmt = (struct fimc_is_fmt *)&formats[0];
>>
>> +               f->fmt.pix_mp.pixelformat = fmt->fourcc;
>> +       }
>> +
>> +       if (fmt->num_planes != f->fmt.pix_mp.num_planes)
>> +               f->fmt.pix_mp.num_planes = fmt->num_planes;
>> +
>> +       return 0;
>> +}
>> +
>> +static int isp_s_fmt_mplane(struct file *file, void *priv,
>> +               struct v4l2_format *f)
>> +{
>> +       struct fimc_is_isp *isp = video_drvdata(file);
>> +       struct fimc_is_pipeline *p = isp->pipeline;
>> +       struct fimc_is_fmt *fmt;
>> +       unsigned int sensor_width, sensor_height;
>> +       int ret;
>> +
>> +       ret = isp_try_fmt_mplane(file, priv, f);
>> +       if (ret)
>> +               return ret;
>> +
>> +       /* Get format type */
>> +       fmt = find_format(f);
>> +       if (!fmt) {
>> +               fmt = (struct fimc_is_fmt *)&formats[0];
>>
>> +               f->fmt.pix_mp.pixelformat = fmt->fourcc;
>> +               f->fmt.pix_mp.num_planes = fmt->num_planes;
>> +       }
>> +
>> +       /* Check if same as sensor width&  height */
>>
>> +       sensor_width = p->sensor->drvdata->pixel_width;
>> +       sensor_height = p->sensor->drvdata->pixel_height;
>> +       if ((sensor_width != f->fmt.pix_mp.width) ||
>> +               (sensor_height != f->fmt.pix_mp.height)) {
>
>
> What's the point of this check ?
>

Check was added to ensure ISP input width and height is
set same as the sensor output or not.
But yes this cannot be extended to generic (non-IS controlled) sensors.
Will drop this check and let media controller take care.

>
>> +               f->fmt.pix_mp.width = sensor_width;
>> +               f->fmt.pix_mp.height = sensor_height;
>> +       }
>
>
>> +       isp->fmt = fmt;
>>
>> +       isp->width = f->fmt.pix_mp.width;
>> +       isp->height = f->fmt.pix_mp.height;
>> +       isp->size_image = f->fmt.pix_mp.plane_fmt[0].sizeimage;
>> +       set_bit(STATE_INIT,&isp->output_state);
>>
>> +       return 0;
>> +}
>> +
>> +static int isp_reqbufs(struct file *file, void *priv,
>> +               struct v4l2_requestbuffers *reqbufs)
>> +{
>> +       struct fimc_is_isp *isp = video_drvdata(file);
>> +       int ret;
>> +
>> +       ret = vb2_reqbufs(&isp->vbq, reqbufs);
>> +       if (ret) {
>> +               pr_err("vb2 req buffers failed\n");
>> +               return ret;
>> +       }
>> +
>> +       isp->num_buffers = reqbufs->count;
>> +       isp->out_buf_cnt = 0;
>> +       set_bit(STATE_BUFS_ALLOCATED,&isp->output_state);
>>
>> +       return 0;
>> +}
>> +
>> +static const struct v4l2_ioctl_ops isp_video_output_ioctl_ops = {
>> +       .vidioc_querycap                = isp_querycap_output,
>> +       .vidioc_enum_fmt_vid_out_mplane = isp_enum_fmt_mplane,
>> +       .vidioc_try_fmt_vid_out_mplane  = isp_try_fmt_mplane,
>> +       .vidioc_s_fmt_vid_out_mplane    = isp_s_fmt_mplane,
>> +       .vidioc_g_fmt_vid_out_mplane    = isp_g_fmt_mplane,
>> +       .vidioc_reqbufs                 = isp_reqbufs,
>> +       .vidioc_querybuf                = vb2_ioctl_querybuf,
>> +       .vidioc_qbuf                    = vb2_ioctl_qbuf,
>> +       .vidioc_dqbuf                   = vb2_ioctl_dqbuf,
>> +       .vidioc_streamon                = vb2_ioctl_streamon,
>> +       .vidioc_streamoff               = vb2_ioctl_streamoff,
>> +};
>> +
>> +static int isp_subdev_registered(struct v4l2_subdev *sd)
>> +{
>> +       struct fimc_is_isp *isp = v4l2_get_subdevdata(sd);
>> +       struct vb2_queue *q =&isp->vbq;
>> +       struct video_device *vfd =&isp->vfd;
>>
>> +       int ret;
>> +
>> +       mutex_init(&isp->video_lock);
>> +
>> +       memset(vfd, 0, sizeof(*vfd));
>> +       snprintf(vfd->name, sizeof(vfd->name), "fimc-is-isp.output");
>> +
>> +       vfd->fops =&isp_video_output_fops;
>> +       vfd->ioctl_ops =&isp_video_output_ioctl_ops;
>> +       vfd->v4l2_dev = sd->v4l2_dev;
>> +       vfd->minor = -1;
>> +       vfd->release = video_device_release_empty;
>> +       vfd->lock =&isp->video_lock;
>>
>> +       vfd->queue = q;
>> +       vfd->vfl_dir = VFL_DIR_TX;
>> +
>> +       memset(q, 0, sizeof(*q));
>> +       q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
>> +       q->io_modes = VB2_MMAP | VB2_DMABUF;
>> +       q->ops =&isp_video_output_qops;
>> +       q->mem_ops =&vb2_dma_contig_memops;
>> +       q->drv_priv = isp;
>> +
>> +       ret = vb2_queue_init(q);
>> +       if (ret<  0)
>> +               return ret;
>> +
>> +       isp->vd_pad.flags = MEDIA_PAD_FL_SINK;
>> +       ret = media_entity_init(&vfd->entity, 1,&isp->vd_pad, 0);
>>
>> +       if (ret<  0)
>> +               return ret;
>> +
>> +       video_set_drvdata(vfd, isp);
>> +
>> +       ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
>> +       if (ret<  0) {
>> +               media_entity_cleanup(&vfd->entity);
>> +               return ret;
>> +       }
>> +
>> +       v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
>> +                 vfd->name, video_device_node_name(vfd));
>> +       return 0;
>> +}
>> +
>> +static void isp_subdev_unregistered(struct v4l2_subdev *sd)
>> +{
>> +       struct fimc_is_isp *isp = v4l2_get_subdevdata(sd);
>> +
>> +       if (isp&&  video_is_registered(&isp->vfd))
>>
>> +               video_unregister_device(&isp->vfd);
>> +}
>> +
>> +static const struct v4l2_subdev_internal_ops isp_subdev_internal_ops = {
>> +       .registered = isp_subdev_registered,
>> +       .unregistered = isp_subdev_unregistered,
>> +};
>> +
>> +static struct v4l2_subdev_ops isp_subdev_ops;
>> +
>> +int fimc_is_isp_subdev_create(struct fimc_is_isp *isp,
>> +               struct vb2_alloc_ctx *alloc_ctx,
>> +               struct fimc_is_pipeline *pipeline)
>> +{
>> +       struct v4l2_ctrl_handler *handler =&isp->ctrl_handler;
>> +       struct v4l2_subdev *sd =&isp->subdev;
>>
>> +       int ret;
>> +
>> +       /* Init context vars */
>> +       isp->alloc_ctx = alloc_ctx;
>> +       isp->pipeline = pipeline;
>> +       isp->refcount = 0;
>> +       isp->fmt = (struct fimc_is_fmt *)&formats[1];
>
>
> What the casting is needed for ?
>
>> +       v4l2_subdev_init(sd,&isp_subdev_ops);
>>
>> +       sd->owner = THIS_MODULE;
>> +       sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
>> +       snprintf(sd->name, sizeof(sd->name), ISP_DRV_NAME);
>> +
>> +       isp->subdev_pads[ISP_SD_PAD_SINK_DMA].flags = MEDIA_PAD_FL_SINK;
>> +       isp->subdev_pads[ISP_SD_PAD_SINK_OTF].flags = MEDIA_PAD_FL_SINK;
>> +       isp->subdev_pads[ISP_SD_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE;
>> +       ret = media_entity_init(&sd->entity, ISP_SD_PADS_NUM,
>> +                       isp->subdev_pads, 0);
>> +       if (ret<  0)
>> +               return ret;
>> +
>> +       ret = v4l2_ctrl_handler_init(handler, 1);
>> +       if (handler->error)
>> +               goto err_ctrl;
>> +
>> +       sd->ctrl_handler = handler;
>> +       sd->internal_ops =&isp_subdev_internal_ops;
>> +       v4l2_set_subdevdata(sd, isp);
>> +
>> +       return 0;
>> +
>> +err_ctrl:
>> +       media_entity_cleanup(&sd->entity);
>> +       v4l2_ctrl_handler_free(handler);
>> +       return ret;
>> +}
>> +
>> +void fimc_is_isp_subdev_destroy(struct fimc_is_isp *isp)
>> +{
>> +       struct v4l2_subdev *sd =&isp->subdev;
>>
>> +
>> +       v4l2_device_unregister_subdev(sd);
>> +       media_entity_cleanup(&sd->entity);
>> +       v4l2_ctrl_handler_free(&isp->ctrl_handler);
>> +       v4l2_set_subdevdata(sd, NULL);
>> +}
>> +
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-isp.h
>> b/drivers/media/platform/exynos5-is/fimc-is-isp.h
>> new file mode 100644
>> index 0000000..f707a8d
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-isp.h
>> @@ -0,0 +1,89 @@
>> +/*
>> + * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
>> + *
>> + * Copyright (C) 2012 Samsung Electronics Co., Ltd.
>> + *  Arun Kumar K<arun.kk@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +#ifndef FIMC_IS_ISP_H_
>> +#define FIMC_IS_ISP_H_
>> +
>> +#include "fimc-is-core.h"
>> +#include "fimc-is-pipeline.h"
>> +
>> +#define FIMC_IS_ISP_REQ_BUFS_MIN       2
>
>
> This is currently unused, but I guess you need to add some
> code to ensure minimum number of buffer for the DMA interfaces.
>

Yes will do that.

>
>> +#define ISP_SD_PAD_SINK_DMA    0
>> +#define ISP_SD_PAD_SINK_OTF    1
>> +#define ISP_SD_PAD_SRC         2
>> +#define ISP_SD_PADS_NUM                3
>> +
>> +#define ISP_MAX_BUFS           2
>> +
>> +/**
>> + * struct fimc_is_isp - ISP context
>> + * @vfd: video device node
>> + * @fh: v4l2 file handle
>> + * @alloc_ctx: videobuf2 memory allocator context
>> + * @subdev: fimc-is-isp subdev
>> + * @vd_pad: media pad for the output video node
>> + * @subdev_pads: the subdev media pads
>> + * @ctrl_handler: v4l2 control handler
>> + * @video_lock: video lock mutex
>> + * @refcount: keeps track of number of instances opened
>> + * @pipeline: pipeline instance for this isp context
>> + * @vbq: vb2 buffers queue for ISP output video node
>> + * @wait_queue: list holding buffers waiting to be queued to HW
>> + * @wait_queue_cnt: wait queue number of buffers
>> + * @run_queue: list holding buffers queued to HW
>> + * @run_queue_cnt: run queue number of buffers
>> + * @output_bufs: isp output buffers array
>> + * @out_buf_cnt: number of output buffers in use
>> + * @fmt: output plane format for isp
>> + * @width: user configured input width
>> + * @height: user configured input height
>> + * @num_buffers: number of output plane buffers in use
>> + * @size_image: image size in bytes
>> + * @output_state: state of the output video node operations
>> + */
>> +struct fimc_is_isp {
>> +       struct video_device             vfd;
>> +       struct v4l2_fh                  fh;
>> +       struct vb2_alloc_ctx            *alloc_ctx;
>> +       struct v4l2_subdev              subdev;
>> +       struct media_pad                vd_pad;
>> +       struct media_pad                subdev_pads[ISP_SD_PADS_NUM];
>> +       struct v4l2_ctrl_handler        ctrl_handler;
>> +
>> +       struct mutex                    video_lock;
>> +
>> +       unsigned int                    refcount;
>> +
>> +       struct fimc_is_pipeline         *pipeline;
>> +
>> +       struct vb2_queue                vbq;
>> +       struct list_head                wait_queue;
>> +       unsigned int                    wait_queue_cnt;
>> +       struct list_head                run_queue;
>> +       unsigned int                    run_queue_cnt;
>> +
>> +       struct fimc_is_buf              output_bufs[ISP_MAX_BUFS];
>> +       unsigned int                    out_buf_cnt;
>> +
>> +       struct fimc_is_fmt              *fmt;
>> +       unsigned int                    width;
>> +       unsigned int                    height;
>> +       unsigned int                    num_buffers;
>> +       unsigned int                    size_image;
>> +       unsigned long                   output_state;
>> +};
>> +
>> +int fimc_is_isp_subdev_create(struct fimc_is_isp *isp,
>> +               struct vb2_alloc_ctx *alloc_ctx,
>> +               struct fimc_is_pipeline *pipeline);
>> +void fimc_is_isp_subdev_destroy(struct fimc_is_isp *isp);
>> +
>> +#endif /* FIMC_IS_ISP_H_ */
>
>
> Thanks,
> Sylwester

Thanks and regards
Arun

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Arun Kumar K]

Hi Hans,

On Wed, Jun 26, 2013 at 12:45 PM, Hans Verkuil <hverkuil@xs4all.nl> wrote:
> On Fri May 31 2013 15:03:24 Arun Kumar K wrote:
>> fimc-is driver takes video data input from the ISP video node
>> which is added in this patch. This node accepts Bayer input
>> buffers which is given from the IS sensors.
>>
>> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
>> ---
>>  drivers/media/platform/exynos5-is/fimc-is-isp.c |  438 +++++++++++++++++++++++
>>  drivers/media/platform/exynos5-is/fimc-is-isp.h |   89 +++++
>>  2 files changed, 527 insertions(+)
>>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.c
>>  create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.h
>>
>
> The same comments I made for the scaler subdev apply here as well.
>
> Regards,
>
>         Hans


Yes will take care of it in next patchset.

Thanks & Regards
Arun

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Arun Kumar K]

Hi Sylwester,

Thank you for the review.

On Fri, Jun 21, 2013 at 4:34 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> On 05/31/2013 03:03 PM, Arun Kumar K wrote:
>>
>> FIMC-IS uses certain sensors which are exclusively controlled
>> from the IS firmware. This patch adds the sensor subdev for the
>> fimc-is sensors.
>>
>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
>> ---
>>   drivers/media/platform/exynos5-is/fimc-is-sensor.c |  463
>> ++++++++++++++++++++
>>   drivers/media/platform/exynos5-is/fimc-is-sensor.h |  168 +++++++
>>   2 files changed, 631 insertions(+)
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.c
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.h
>>
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.c
>> b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
>> new file mode 100644
>> index 0000000..b8fb834
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
>> @@ -0,0 +1,463 @@
>> +/*
>> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
>> + *
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + * Arun Kumar K<arun.kk@samsung.com>
>> + * Kil-yeon Lim<kilyeon.im@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include<linux/gpio.h>
>> +#include<linux/of_gpio.h>
>> +#include<linux/i2c.h>
>> +#include<linux/of.h>
>> +#include<linux/of_platform.h>
>> +#include<media/v4l2-of.h>
>> +#include "fimc-is-sensor.h"
>> +#include "fimc-is.h"
>> +
>> +#define DRIVER_NAME "fimc-is-sensor"
>> +
>> +static char *sensor_clock_name[] = {
>> +       [SCLK_BAYER]    = "sclk_bayer",
>> +       [SCLK_CAM0]     = "sclk_cam0",
>> +       [SCLK_CAM1]     = "sclk_cam1",
>> +};
>> +
>> +/* Sensor supported formats */
>> +static struct v4l2_mbus_framefmt sensor_formats[FIMC_IS_MAX_SENSORS] = {
>> +       [SENSOR_S5K4E5] = {
>> +               .width          = SENSOR_4E5_WIDTH + 16,
>> +               .height         = SENSOR_4E5_HEIGHT + 10,
>> +               .code           = V4L2_MBUS_FMT_SGRBG10_1X10,
>> +               .field          = V4L2_FIELD_NONE,
>> +               .colorspace     = V4L2_COLORSPACE_SRGB,
>> +       },
>> +       [SENSOR_S5K6A3] = {
>> +               .width          = SENSOR_6A3_WIDTH + 16,
>> +               .height         = SENSOR_6A3_HEIGHT + 10,
>> +               .code           = V4L2_MBUS_FMT_SGRBG10_1X10,
>> +               .field          = V4L2_FIELD_NONE,
>> +               .colorspace     = V4L2_COLORSPACE_SRGB,
>> +       },
>> +};
>> +
>> +static struct fimc_is_sensor *sd_to_fimc_is_sensor(struct v4l2_subdev
>> *sd)
>> +{
>> +       return container_of(sd, struct fimc_is_sensor, subdev);
>> +}
>> +
>> +static void sensor_clk_put(struct fimc_is_sensor *sensor)
>> +{
>> +       int i;
>> +
>> +       for (i = 0; i<  SCLK_MAX_NUM; i++) {
>> +               if (IS_ERR(sensor->clock[i]))
>> +                       continue;
>> +               clk_unprepare(sensor->clock[i]);
>> +               clk_put(sensor->clock[i]);
>> +               sensor->clock[i] = ERR_PTR(-EINVAL);
>> +       }
>> +}
>> +
>> +static int sensor_clk_init(struct fimc_is_sensor *sensor)
>> +{
>> +       int i, ret;
>> +
>> +       /* Get CAM clocks */
>> +       for (i = 0; i<  SCLK_MAX_NUM; i++) {
>> +               sensor->clock[i] = clk_get(NULL, sensor_clock_name[i]);
>> +               if (IS_ERR(sensor->clock[i]))
>> +                       goto err;
>> +               ret = clk_prepare(sensor->clock[i]);
>> +               if (ret<  0) {
>> +                       clk_put(sensor->clock[i]);
>> +                       sensor->clock[i] = ERR_PTR(-EINVAL);
>> +                       goto err;
>> +               }
>> +       }
>> +
>> +       /* Set clock rates */
>> +       ret = clk_set_rate(sensor->clock[SCLK_CAM0], 24 * 1000000);
>> +       ret |= clk_set_rate(sensor->clock[SCLK_BAYER], 24 * 1000000);
>
>
> Please don't obfuscate the return value.
>
>

Ok

>> +       if (ret) {
>> +               pr_err("Failed to set cam clock rates\n");
>> +               goto err;
>> +       }
>> +       return 0;
>> +err:
>> +       sensor_clk_put(sensor);
>> +       pr_err("Failed to init sensor clock\n");
>> +       return -ENXIO;
>
>
>> +}
>> +
>> +static int sensor_clk_enable(struct fimc_is_sensor *sensor)
>> +{
>> +       int ret = 0, i;
>> +
>> +       for (i = 0; i<  SCLK_MAX_NUM; i++) {
>> +               ret = clk_enable(sensor->clock[i]);
>> +               if (ret)
>> +                       return ret;
>> +       }
>
>
> Oh, so you enable all clocks in this driver ? Is it really flexible
> enough ? What if one of these clocks is connected to some external
> sensor with an ISP ? Are this clocks going to be managed/exposed by
> the media device driver as well ?
>

I was hoping that this driver can handle all its clocks as exposed
from the DT. I can see that in exynos4, the media device enables the
cam clocks. In exynos5, there are multiple frequency settings
possible on these clocks depending on modes of operation.
So isn't it better that the sensor driver controls it?


>> +       return ret;
>> +}
>> +
>> +static void sensor_clk_disable(struct fimc_is_sensor *sensor)
>> +{
>> +       int i;
>> +
>> +       for (i = 0; i<  SCLK_MAX_NUM; i++)
>> +               clk_disable(sensor->clock[i]);
>> +}
>> +
>> +static int sensor_enum_mbus_code(struct v4l2_subdev *sd,
>> +                                 struct v4l2_subdev_fh *fh,
>> +                                 struct v4l2_subdev_mbus_code_enum *code)
>> +{
>> +       struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
>> +       struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
>> +
>> +       if (!code)
>> +               return -EINVAL;
>> +
>> +       code->code = sensor_formats[sdata->sensor_id].code;
>> +       return 0;
>> +}
>> +
>> +static int sensor_set_fmt(struct v4l2_subdev *sd,
>> +                         struct v4l2_subdev_fh *fh,
>> +                         struct v4l2_subdev_format *fmt)
>> +{
>> +       struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
>> +       struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
>> +       struct v4l2_mbus_framefmt *sfmt =&fmt->format;
>>
>> +
>> +       if ((sfmt->width != sensor_formats[sdata->sensor_id].width) ||
>> +               (sfmt->height != sensor_formats[sdata->sensor_id].height)
>> ||
>> +               (sfmt->code != sensor_formats[sdata->sensor_id].code))
>
>
> Couldn't this check be just dropped ?
>
>

Yes will remove it.

>> +               *sfmt = sensor_formats[sdata->sensor_id];
>> +
>> +       return 0;
>> +}
>> +
>> +static int sensor_get_fmt(struct v4l2_subdev *sd,
>> +                         struct v4l2_subdev_fh *fh,
>> +                         struct v4l2_subdev_format *fmt)
>> +{
>> +       struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
>> +       struct fimc_is_sensor_drv_data *sdata = sensor->drvdata;
>> +
>> +       fmt->format = sensor_formats[sdata->sensor_id];
>> +       return 0;
>> +}
>> +
>> +static struct v4l2_subdev_pad_ops sensor_pad_ops = {
>> +       .enum_mbus_code         = sensor_enum_mbus_code,
>> +       .get_fmt                = sensor_get_fmt,
>> +       .set_fmt                = sensor_set_fmt,
>> +};
>> +
>> +static int sensor_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
>> +{
>> +       struct v4l2_mbus_framefmt *format = v4l2_subdev_get_try_format(fh,
>> 0);
>> +
>> +       *format = sensor_formats[0];
>> +       return 0;
>> +}
>> +
>> +static const struct v4l2_subdev_internal_ops sensor_sd_internal_ops = {
>> +       .open = sensor_open,
>> +};
>> +
>> +static int sensor_s_power(struct v4l2_subdev *sd, int on)
>> +{
>> +       struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
>> +
>> +       if (on) {
>> +               /* Power on sensor */
>> +               sensor_clk_enable(sensor);
>
>
> The return value from at least this function should not be ignored.
>
>

Ok

>> +               gpio_set_value(sensor->gpio_reset, 1);
>> +       } else {
>> +               /* Power off sensor */
>> +               gpio_set_value(sensor->gpio_reset, 0);
>> +               sensor_clk_disable(sensor);
>> +       }
>> +       return 0;
>> +}
>> +
>> +static struct v4l2_subdev_core_ops sensor_core_ops = {
>> +       .s_power = sensor_s_power,
>> +};
>> +
>> +static int sensor_s_stream(struct v4l2_subdev *sd, int enable)
>> +{
>> +       struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
>> +       int ret;
>> +
>> +       if (enable) {
>> +               pr_debug("Stream ON\n");
>> +               /* Open pipeline */
>> +               ret = fimc_is_pipeline_open(sensor->pipeline, sensor);
>> +               if (ret<  0) {
>> +                       pr_err("Pipeline already opened.\n");
>> +                       return -EBUSY;
>> +               }
>
>
> 'fimc_is_pipeline_' might be a bit confusing prefix for these FIMC-IS
> firmware interface functions, perhaps fimc_ischain_ or something similar
> would be more explicit. But that's just my personal impression, let's
> don't bother with it.
>
>

Yes I too feel that name pipeline is confusion. Will change it to ischain.

>> +               /* Start IS pipeline */
>> +               ret = fimc_is_pipeline_start(sensor->pipeline);
>
>
> OK, using the FIMC-IS firmware interface calls from within the subdev
> drivers is fine. But does the whole pipeline need to be initialized,
> the firmware and the setfile loaded and devices powered on from within
> the sensor's subdev s_stream() operation ?
>
> This is what really bother me most in the current design. Why couldn't
> the media device driver handle dependencies between the subdevs, e.g.
> when sensor -> mipi-csis -> fimc-lite -> memory processing pipeline is
> started, couldn't it call s_power/s_stream on the ISP subdev when those
> calls are made on the sensor subdev ?
>
>

The firmware initialization is done here so that fimc-is sensor can be
used even without the fimc-is components (isp, scc, scp). There is a
possibility of only the pipeline0 being used by the media device which
connects sensor -> mipi csis -> fimc-lite -> memory.
In such a scenario, for using the IS sensor independently, the firmware
should be initialized and started for the sensor to give image output.


>> +               if (ret<  0) {
>> +                       pr_err("Pipeline start failed.\n");
>> +                       return -EINVAL;
>
>
>                         return ret; ?
>>
>> +               }
>> +       } else {
>> +               pr_debug("Stream OFF\n");
>> +               /* Stop IS pipeline */
>> +               ret = fimc_is_pipeline_stop(sensor->pipeline);
>> +               if (ret<  0) {
>> +                       pr_err("Pipeline stop failed.\n");
>> +                       return -EINVAL;
>
>
>                         return ret; ?
>>
>> +               }
>> +
>> +               /* Close pipeline */
>> +               ret = fimc_is_pipeline_close(sensor->pipeline);
>> +               if (ret<  0) {
>> +                       pr_err("Pipeline close failed\n");
>> +                       return -EBUSY;
>> +               }
>> +       }
>> +
>> +       return 0;
>> +}
>> +
>> +static const struct v4l2_subdev_video_ops sensor_video_ops = {
>> +       .s_stream       = sensor_s_stream,
>> +};
>> +
>> +static struct v4l2_subdev_ops sensor_subdev_ops = {
>> +       .core =&sensor_core_ops,
>> +       .pad =&sensor_pad_ops,
>> +       .video =&sensor_video_ops,
>> +};
>> +
>> +static int sensor_parse_dt(struct fimc_is_sensor *sensor,
>> +                       struct device_node *sensor_node)
>> +{
>> +       struct device_node *port, *ep, *remote, *fimc_is_node, *camera;
>> +       struct fimc_is *is_data;
>> +       struct platform_device *pdev_is;
>> +       struct v4l2_of_endpoint endpoint;
>
>
>> +       /* Parse ports */
>>
>> +       port = sensor_node;
>> +       while ((port = of_get_next_child(port, NULL))) {
>> +               if (!of_node_cmp(port->name, "port"))
>> +                       break;
>> +               of_node_put(port);
>> +       };
>> +       if (!port) {
>> +               pr_err("Sensor port undefined\n");
>> +               return -EINVAL;
>> +       }
>> +
>> +       ep = of_get_next_child(port, NULL);
>> +       if (!ep)
>> +               return -EINVAL;
>> +
>> +       port = of_parse_phandle(ep, "remote-endpoint", 0);
>> +       if (port) {
>> +               v4l2_of_parse_endpoint(port,&endpoint);
>> +               sensor->i2c_ch = (endpoint.port>>  2)&  0x1;
>> +       }
>
>
> Couldn't some of this code be replaced with v4l2_of_get_next_endpoint() ?
>

Ok will try that.

>> +       remote = v4l2_of_get_remote_port_parent(ep);
>> +       of_node_put(ep);
>> +
>> +       if (!remote)
>> +               return -EINVAL;
>> +
>> +       camera = of_get_parent(remote);
>> +       fimc_is_node = NULL;
>> +       while ((fimc_is_node = of_get_next_child(camera, fimc_is_node))) {
>> +               if (!of_node_cmp(fimc_is_node->name, "fimc-is"))
>> +                       break;
>> +               of_node_put(fimc_is_node);
>> +       };
>> +       of_node_put(camera);
>> +
>> +       if (!fimc_is_node)
>> +               return -EINVAL;
>> +
>> +       /* Get the IS pipeline context */
>> +       pdev_is = of_find_device_by_node(fimc_is_node);
>> +       is_data = dev_get_drvdata(&pdev_is->dev);
>> +
>> +       if (!is_data)
>> +               return -EINVAL;
>> +
>> +       sensor->pipeline =&is_data->pipeline;
>>
>> +
>> +       return 0;
>> +}
>> +
>> +static const struct of_device_id fimc_is_sensor_of_match[];
>> +
>> +static int fimc_is_sensor_probe(struct i2c_client *client,
>> +                               const struct i2c_device_id *id)
>> +{
>> +       struct device *dev =&client->dev;
>>
>> +       struct fimc_is_sensor *sensor;
>> +       const struct of_device_id *of_id;
>> +       struct v4l2_subdev *sd;
>> +       int gpio, ret;
>> +       unsigned int sensor_id;
>> +
>> +       sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
>> +       if (!sensor)
>> +               return -ENOMEM;
>> +
>> +       sensor->gpio_reset = -EINVAL;
>> +
>> +       gpio = of_get_gpio_flags(dev->of_node, 0, NULL);
>> +       if (gpio_is_valid(gpio)) {
>> +               ret = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW,
>> DRIVER_NAME);
>
>
> You could use devm_gpio_request_one, so the GPIO is properly freed on
> the driver's removal. You should test this driver built as a module as well.
>
>

Ok will do that.

>> +               if (ret<  0)
>> +                       return ret;
>> +       }
>> +       pr_err("GPIO Request success : %d", gpio);
>
>
> pr_debug() or needs to be removed.
>
>
>> +       sensor->gpio_reset = gpio;
>> +
>> +       of_id = of_match_node(fimc_is_sensor_of_match, dev->of_node);
>> +       if (!of_id) {
>> +               ret = -ENODEV;
>> +               goto err_gpio;
>> +       }
>> +
>> +       sensor->drvdata = (struct fimc_is_sensor_drv_data *) of_id->data;
>
>
> No need for casting. Just make struct fimc_is_sensor:drvdata 'const'.
>
>

Ok

>> +       sensor->dev = dev;
>> +
>> +       /* Get FIMC-IS context */
>> +       ret = sensor_parse_dt(sensor, dev->of_node);
>> +       if (ret) {
>> +               pr_err("Unable to obtain IS context\n");
>> +               ret = -ENODEV;
>
>
> Is overwriting ret really needed ?
>

Not needed. Will change.

>> +               goto err_gpio;
>> +       }
>> +
>> +       sd =&sensor->subdev;
>> +       v4l2_i2c_subdev_init(sd, client,&sensor_subdev_ops);
>> +       snprintf(sd->name, sizeof(sd->name),
>> sensor->drvdata->sensor_name);
>> +       sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
>> +
>> +       sensor_id = sensor->drvdata->sensor_id;
>> +       sensor->format.code = sensor_formats[sensor_id].code;
>> +       sensor->format.width = sensor_formats[sensor_id].width;
>> +       sensor->format.height = sensor_formats[sensor_id].height;
>> +
>> +       sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
>> +       ret = media_entity_init(&sd->entity, 1,&sensor->pad, 0);
>>
>> +       if (ret<  0)
>> +               goto err_gpio;
>> +
>> +       v4l2_set_subdevdata(sd, sensor);
>> +       i2c_set_clientdata(client,&sensor->subdev);
>>
>> +
>> +       pm_runtime_no_callbacks(dev);
>> +       pm_runtime_enable(dev);
>> +       sensor_clk_init(sensor);
>> +
>> +       return 0;
>> +err_gpio:
>> +       if (gpio_is_valid(sensor->gpio_reset))
>> +               gpio_free(sensor->gpio_reset);
>> +       return ret;
>> +}
>> +
>> +static int fimc_is_sensor_remove(struct i2c_client *client)
>> +{
>> +       struct v4l2_subdev *sd = i2c_get_clientdata(client);
>> +       struct fimc_is_sensor *sensor = sd_to_fimc_is_sensor(sd);
>> +
>> +       media_entity_cleanup(&sensor->subdev.entity);
>> +       sensor_clk_put(sensor);
>> +
>> +       return 0;
>> +}
>> +
>> +static const struct i2c_device_id fimc_is_sensor_ids[] = {
>> +       { }
>> +};
>> +
>> +static const struct fimc_is_sensor_drv_data s5k4e5_drvdata = {
>> +       .sensor_id = SENSOR_S5K4E5,
>> +       .sensor_name = "s5k4e5",
>> +       .pixel_width = SENSOR_4E5_WIDTH + 16,
>> +       .pixel_height = SENSOR_4E5_HEIGHT + 10,
>> +       .active_width = SENSOR_4E5_WIDTH,
>> +       .active_height = SENSOR_4E5_HEIGHT,
>> +       .max_framerate = 30,
>> +       .setfile_name = "setfile_4e5.bin",
>> +       .ext = {
>> +               .actuator_con = {
>> +                       .product_name = ACTUATOR_NAME_DWXXXX,
>> +                       .peri_type = SE_I2C,
>> +                       .peri_setting.i2c.channel = SENSOR_CONTROL_I2C0,
>> +               },
>> +               .flash_con = {
>> +                       .product_name = FLADRV_NAME_KTD267,
>> +                       .peri_type = SE_GPIO,
>> +                       .peri_setting.gpio.first_gpio_port_no = 1,
>> +                       .peri_setting.gpio.second_gpio_port_no = 2,
>> +               },
>> +               .from_con.product_name = FROMDRV_NAME_NOTHING,
>> +               .mclk = 0,
>> +               .mipi_lane_num = 0,
>> +               .mipi_speed = 0,
>> +               .fast_open_sensor = 0,
>> +               .self_calibration_mode = 0,
>> +       },
>> +};
>> +
>> +static const struct fimc_is_sensor_drv_data s5k6a3_drvdata = {
>> +       .sensor_id = SENSOR_S5K6A3,
>> +       .sensor_name = "s5k6a3",
>> +       .pixel_width = SENSOR_6A3_WIDTH + 16,
>> +       .pixel_height = SENSOR_6A3_HEIGHT + 10,
>> +       .active_width = SENSOR_6A3_WIDTH,
>> +       .active_height = SENSOR_6A3_HEIGHT,
>> +       .max_framerate = 30,
>> +       .setfile_name = "setfile_6a3.bin",
>> +};
>> +
>> +static const struct of_device_id fimc_is_sensor_of_match[] = {
>> +       {
>> +               .compatible     = "samsung,s5k4e5",
>> +               .data           =&s5k4e5_drvdata,
>> +       },
>> +       {
>> +               .compatible     = "samsung,s5k6a3",
>> +               .data           =&s5k6a3_drvdata,
>> +       },
>> +       {  }
>> +};
>> +MODULE_DEVICE_TABLE(of, fimc_is_sensor_of_match);
>> +
>> +static struct i2c_driver fimc_is_sensor_driver = {
>> +       .driver = {
>> +               .of_match_table = fimc_is_sensor_of_match,
>> +               .name           = DRIVER_NAME,
>> +               .owner          = THIS_MODULE,
>> +       },
>> +       .probe          = fimc_is_sensor_probe,
>> +       .remove         = fimc_is_sensor_remove,
>> +       .id_table       = fimc_is_sensor_ids,
>> +};
>> +
>> +module_i2c_driver(fimc_is_sensor_driver);
>> +
>> +MODULE_AUTHOR("Arun Kumar K<arun.kk@samsung.com>");
>> +MODULE_DESCRIPTION("Exynos5 FIMC-IS sensor subdev driver");
>> +MODULE_LICENSE("GPL");
>> diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.h
>> b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
>> new file mode 100644
>> index 0000000..75e5f20
>> --- /dev/null
>> +++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
>> @@ -0,0 +1,168 @@
>> +/*
>> + * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
>> + *
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + * Arun Kumar K<arun.kk@samsung.com>
>> + * Kil-yeon Lim<kilyeon.im@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +#ifndef FIMC_IS_SENSOR_H_
>> +#define FIMC_IS_SENSOR_H_
>> +
>> +#include<linux/clk.h>
>> +#include<linux/device.h>
>> +#include<linux/kernel.h>
>> +#include<linux/platform_device.h>
>> +#include<linux/regulator/consumer.h>
>> +#include<linux/videodev2.h>
>> +#include<media/v4l2-subdev.h>
>> +
>> +#include "fimc-is-pipeline.h"
>> +
>> +#define FIMC_IS_MAX_CAMIF_CLIENTS      2
>> +#define FIMC_IS_MAX_NAME_LEN           32
>> +#define FIMC_IS_MAX_GPIO_NUM           32
>> +#define UART_ISP_SEL                   0
>> +#define UART_ISP_RATIO                 1
>> +
>> +#define FIMC_IS_MAX_SENSORS            4
>> +
>> +#define SENSOR_4E5_WIDTH               2560
>> +#define SENSOR_4E5_HEIGHT              1920
>> +#define SENSOR_6A3_WIDTH               1392
>> +#define SENSOR_6A3_HEIGHT              1392
>> +
>> +enum sensor_id {
>> +       SENSOR_S5K3H2   = 1,
>> +       SENSOR_S5K6A3   = 2,
>> +       SENSOR_S5K4E5   = 3,
>> +       SENSOR_S5K3H7   = 4,
>> +       SENSOR_CUSTOM   = 100,
>> +       SENSOR_END
>> +};
>> +
>> +enum sensor_channel {
>> +       SENSOR_CONTROL_I2C0      = 0,
>> +       SENSOR_CONTROL_I2C1      = 1
>> +};
>> +
>> +enum actuator_name {
>> +       ACTUATOR_NAME_AD5823    = 1,
>> +       ACTUATOR_NAME_DWXXXX    = 2,
>> +       ACTUATOR_NAME_AK7343    = 3,
>> +       ACTUATOR_NAME_HYBRIDVCA = 4,
>> +       ACTUATOR_NAME_NOTHING   = 100,
>> +       ACTUATOR_NAME_END
>> +};
>> +
>> +enum flash_drv_name {
>> +       FLADRV_NAME_KTD267      = 1,
>> +       FLADRV_NAME_NOTHING     = 100,
>> +       FLADRV_NAME_END
>> +};
>> +
>> +enum from_name {
>> +       FROMDRV_NAME_W25Q80BW   = 1,
>> +       FROMDRV_NAME_NOTHING
>> +};
>> +
>> +enum sensor_peri_type {
>> +       SE_I2C,
>> +       SE_SPI,
>> +       SE_GPIO,
>> +       SE_MPWM,
>> +       SE_ADC,
>> +       SE_NULL
>> +};
>> +
>> +struct i2c_type {
>> +       u32 channel;
>> +       u32 slave_address;
>> +       u32 speed;
>> +};
>> +
>> +struct spi_type {
>> +       u32 channel;
>> +};
>> +
>> +struct gpio_type {
>> +       u32 first_gpio_port_no;
>> +       u32 second_gpio_port_no;
>> +};
>> +
>> +union sensor_peri_format {
>> +       struct i2c_type i2c;
>> +       struct spi_type spi;
>> +       struct gpio_type gpio;
>> +};
>> +
>> +struct sensor_protocol {
>> +       unsigned int product_name;
>> +       enum sensor_peri_type peri_type;
>> +       union sensor_peri_format peri_setting;
>> +};
>> +
>> +struct fimc_is_sensor_ext {
>> +       struct sensor_protocol actuator_con;
>> +       struct sensor_protocol flash_con;
>> +       struct sensor_protocol from_con;
>> +
>> +       unsigned int mclk;
>> +       unsigned int mipi_lane_num;
>> +       unsigned int mipi_speed;
>> +       unsigned int fast_open_sensor;
>> +       unsigned int self_calibration_mode;
>> +};
>> +
>> +struct fimc_is_sensor_drv_data {
>> +       unsigned int    sensor_id;
>> +       char            *sensor_name;
>> +       unsigned int    pixel_width;
>> +       unsigned int    pixel_height;
>> +       unsigned int    active_width;
>> +       unsigned int    active_height;
>> +       unsigned int    max_framerate;
>> +       struct fimc_is_sensor_ext ext;
>> +       char            *setfile_name;
>> +};
>> +
>> +enum sensor_clks {
>> +       SCLK_BAYER,
>> +       SCLK_CAM0,
>> +       SCLK_CAM1,
>> +       SCLK_MAX_NUM,
>> +};
>> +
>> +struct sensor_pix_format {
>> +       enum v4l2_mbus_pixelcode code;
>> +};
>> +
>> +/**
>> + * struct fimc_is_sensor - fimc-is sensor context
>> + * @pad: media pad
>> + * @subdev: sensor subdev
>> + * @clock: sensor clocks array
>> + * @dev: sensor device ptr
>> + * @pipeline: is pipeline context pointer
>> + * @drvdata: sensor specific driver data
>> + * @format: v4l2 mbus format for the subdev
>> + * @gpio_reset: gpio pin to be used for sensor power on/off
>> + * @i2c_ch: sensor's i2c channel number
>> + */
>> +struct fimc_is_sensor {
>> +       struct media_pad                pad;
>> +       struct v4l2_subdev              subdev;
>> +       struct clk                      *clock[SCLK_MAX_NUM];
>> +       struct device                   *dev;
>> +
>> +       struct fimc_is_pipeline         *pipeline;
>> +       struct fimc_is_sensor_drv_data  *drvdata;
>> +       struct v4l2_mbus_framefmt       format;
>> +       int                             gpio_reset;
>> +       unsigned int                    i2c_ch;
>> +};
>> +
>> +#endif /* FIMC_IS_SENSOR_H_ */
>
>
> Thanks,
> Sylwester

Thanks and regards
Arun

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Arun Kumar K]

Hi Hans,

Thanks for the review.

On Wed, Jun 26, 2013 at 12:57 PM, Hans Verkuil <hverkuil@xs4all.nl> wrote:
> On Fri May 31 2013 15:03:23 Arun Kumar K wrote:
>> FIMC-IS uses certain sensors which are exclusively controlled
>> from the IS firmware. This patch adds the sensor subdev for the
>> fimc-is sensors.
>>
>> Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im <kilyeon.im@samsung.com>
>
> Not surprisingly I really hate the idea of sensor drivers that are tied to
> a specific SoC, since it completely destroys the reusability of such drivers.
>

Yes agree to it.

> I understand that you have little choice to do something special here, but
> I was wondering whether there is a way of keeping things as generic as
> possible.
>
> I'm just brainstorming here, but as far as I can see this driver is basically
> a partial sensor driver: it handles the clock, the format negotiation and
> power management. Any sensor driver needs that.
>
> What would be nice is if the fmic specific parts are replaced by callbacks
> into the bridge driver using v4l2_subdev_notify().
>
> The platform data (or DT) can also state if this sensor is firmware controlled
> or not. If not, then the missing bits can be implemented in the future by
> someone who needs that.
>
> That way the driver itself remains independent from fimc.
>
> And existing sensor drivers can be adapted to be usable with fimc as well by
> adding support for the notify callback.
>
> Would a scheme along those lines work?
>

Yes this should make the implementation very generic.
Will check the feasibility of this approach.

Thanks & Regards
Arun

Re: [RFC v2 01/10] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation

[Sylwester Nawrocki]

Hi Arun,

On 07/09/2013 01:08 PM, Arun Kumar K wrote:
> On Fri, Jun 21, 2013 at 4:15 AM, Sylwester Nawrocki
> <sylvester.nawrocki@gmail.com>  wrote:
>> On 05/31/2013 03:03 PM, Arun Kumar K wrote:
[...]
>>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>>> ---
>>>    .../devicetree/bindings/media/exynos5-fimc-is.txt  |   41
>>> ++++++++++++++++++++
>>>    1 file changed, 41 insertions(+)
>>>    create mode 100644
>>> Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>> b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>> new file mode 100644
>>> index 0000000..9fd4646
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>> @@ -0,0 +1,41 @@
[...]
>>> +-----------------------------------
>>> +
>>> +The camera subsystem on Samsung Exynos5 SoC has some changes relative
>>> +to previous SoC versions. Exynos5 has almost similar MIPI-CSIS and
>>> +FIMC-LITE IPs but has a much improved version of FIMC-IS which can
>>> +handle sensor controls and camera post-processing operations. The
>>> +Exynos5 FIMC-IS has a dedicated ARM Cortex A5 processor, many
>>> +post-processing blocks (ISP, DRC, FD, ODC, DIS, 3DNR) and two
>>> +dedicated scalers (SCC and SCP).
>>> +
>>> +fimc-is node
>>> +------------
>>> +
>>> +Required properties:
>>> +
>>> +- compatible        : must be "samsung,exynos5250-fimc-is"
>>> +- reg               : physical base address and size of the memory mapped
>>> +                      registers
>>> +- interrupt-parent  : Parent interrupt controller
>>> +- interrupts        : fimc-is interrupt to the parent combiner
>>> +- clocks            : list of clock specifiers, corresponding to entries
>>> in
>>> +                      clock-names property;
>>> +- clock-names       : must contain "isp", "mcu_isp", "isp_div0",
>>> "isp_div1",
>>> +                      "isp_divmpwm", "mcu_isp_div0", "mcu_isp_div1"
>>> entries,
>>> +                      matching entries in the clocks property.
>>> +
>>> +
>>> +Board specific properties:
>>> +
>>> +- pinctrl-names    : pinctrl names for camera port pinmux control, at
>>> least
>>> +                    "default" needs to be specified.
>>> +- pinctrl-0...N           : pinctrl properties corresponding to
>>> pinctrl-names
>>
>>
>> What pins exactly are supposed to be covered by these properties ? For what
>> devices ? Aren't the camera port pins supposed to be specified at the common
>> 'camera' node ? I believe the camera ports are not specific to the FIMC-IS.
>
> These are for the sensor controls (especially clock lines).
> I think I should move these to the sensor node.

This doesn't sound right either. These pins are not a property of an 
external
image sensor device, they are specific to the AP SoC. So IMO these pinctrl
properties belong to some SoC's internal device node.

I think we could add a clock provider for the sclk_cam clocks and then the
pinmux of those clock outputs could be configurable from with the clock 
ops.
E.g. we set the pinumx into CAM_?_CLKOUT function only when a clock is 
enabled.
Disabling a clock would put CLKOUT pin pinmux e.g. into input with pull 
down
state. This would ensure proper CLKOUT pin configuration when image 
sensor is
suspended or entirely powered off. I'm working on something like this for
exynos4.

>>> +pmu subnode
>>> +-----------
>>> +
>>> +Required properties:
>>> + - reg : should contain PMU physical base address and size of the memory
>>> +         mapped registers.
>>
>>
>> What about other devices, like ISP I2C, SPI ? Don't you want to list at
>> least
>> the ones currently used (I2C bus controllers) ?
>>
>
> The present driver doesnt make use of the SPI bus as its used only
> for sensor calibration which is not yet added.

Is it only going to be used by the Cortex-A5 firmware, similarly to the
I2C bus ? If so then it is likely not needed to specify it here right now.
But I believe for complete H/W description we should reserve a possibility
to add those various peripheral device nodes here.

> I2C bus is used by the sensor which has its own node. May be I should
> explain one of the sensor nodes over here?

I would describe at least I2C bus controller node and add a note that image
sensor nodes can be specified there.

Also, it would be good to start adding separate sensor drivers for each
sensor, like s5k6a3, s5k4e3, etc. Ideally we should not have duplicated
fimc-is-sensor.[ch] that would handle various sensors, i.e. same set of
sensors to drivers/media/platform/exynos4-is and drivers/media/platform/
exynos5-is.

After you post the next iteration of this series I could have a look how
it could be done.

--
Thanks,
Sylwester

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Sylwester Nawrocki]

Hi Arun,

On 07/09/2013 02:04 PM, Arun Kumar K wrote:
> On Wed, Jun 26, 2013 at 12:57 PM, Hans Verkuil<hverkuil@xs4all.nl>  wrote:
>> On Fri May 31 2013 15:03:23 Arun Kumar K wrote:
>>> FIMC-IS uses certain sensors which are exclusively controlled
>>> from the IS firmware. This patch adds the sensor subdev for the
>>> fimc-is sensors.
>>>
>>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>>> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
>>
>> Not surprisingly I really hate the idea of sensor drivers that are tied to
>> a specific SoC, since it completely destroys the reusability of such drivers.
>>
>
> Yes agree to it.
>
>> I understand that you have little choice to do something special here, but
>> I was wondering whether there is a way of keeping things as generic as
>> possible.
>>
>> I'm just brainstorming here, but as far as I can see this driver is basically
>> a partial sensor driver: it handles the clock, the format negotiation and
>> power management. Any sensor driver needs that.
>>
>> What would be nice is if the fmic specific parts are replaced by callbacks
>> into the bridge driver using v4l2_subdev_notify().
>>
>> The platform data (or DT) can also state if this sensor is firmware controlled
>> or not. If not, then the missing bits can be implemented in the future by
>> someone who needs that.
>>
>> That way the driver itself remains independent from fimc.
>>
>> And existing sensor drivers can be adapted to be usable with fimc as well by
>> adding support for the notify callback.
>>
>> Would a scheme along those lines work?
>>
>
> Yes this should make the implementation very generic.
> Will check the feasibility of this approach.

Is I suggested earlier, you likely could do without this call back to the
FIMC-IS from within the sensor subdev. Look at your call chain right now:

  /dev/video?     media-dev-driver    sensor-subdev         FIMC-IS
     |                 |                   |                  |
     | VIDIOC_STREAMON |                   |                  |
     |---------------->#     s_stream()    |                  |
     |                 #------------------># pipeline_open()  |
     |                 |                   # ---------------->|
     |                 |                   # pipeline_start() |
     |                 |                   # ---------------->|
     |                 |                   |                  |

Couldn't you move pipeline_open(), pipeline_start() to s_stream handler
of the ISP subdev ? It is currently empty. The media device driver could
call s_stream on the ISP subdev each time it sees s_stream request on
the sensor subdev. And you wouldn't need any hacks to get the pipeline
pointer in the sensor subdev. Then it would be something like:

  /dev/video?     media-dev-driver    sensor-subdev  FIMC-IS-ISP-subdev
     |                 |                   |             |
     | VIDIOC_STREAMON |                   |             |
     |---------------->#     s_stream()    |             |
     |                 #------------------>|             |
     |                 #     s_stream()    |             |
     |                 #-------------------+------------># pipeline_open()
     |                 |                   |             # pipeline_start()
     |                 |                   |             #

I suppose pipeline_open() is better candidate for the s_power callback.
It just needs to be ensured at the media device level the subdev
operations sequences are correct.

--
Regards,
Sylwester

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Sylwester Nawrocki]

On 07/09/2013 01:42 PM, Arun Kumar K wrote:
>>> +       /* Check if same as sensor width&   height */
>>> >>
>>> >>  +       sensor_width = p->sensor->drvdata->pixel_width;
>>> >>  +       sensor_height = p->sensor->drvdata->pixel_height;
>>> >>  +       if ((sensor_width != f->fmt.pix_mp.width) ||
>>> >>  +               (sensor_height != f->fmt.pix_mp.height)) {
>> >
>> >
>> >  What's the point of this check ?
>> >
> Check was added to ensure ISP input width and height is
> set same as the sensor output or not.
> But yes this cannot be extended to generic (non-IS controlled) sensors.
> Will drop this check and let media controller take care.
>
>> >
>>> >>  +               f->fmt.pix_mp.width = sensor_width;
>>> >>  +               f->fmt.pix_mp.height = sensor_height;
>>> >>  +       }

I meant that you could do the assignment unconditionally, since you
always end up with sensor_width/height assigned to pix_mp.width/height.
Indeed, this should be handled by subdev ioctls, and any discrepancies
should be detected while starting streaming and reported to user space.

--
Thanks,
Sylwester

Re: [RFC v2 01/10] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation

[Arun Kumar K]

Hi Sylwester,

On Wed, Jul 17, 2013 at 2:53 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> Hi Arun,
>
>
> On 07/09/2013 01:08 PM, Arun Kumar K wrote:
>>
>> On Fri, Jun 21, 2013 at 4:15 AM, Sylwester Nawrocki
>> <sylvester.nawrocki@gmail.com>  wrote:
>>>
>>> On 05/31/2013 03:03 PM, Arun Kumar K wrote:
>
> [...]
>
>>>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>>>> ---
>>>>    .../devicetree/bindings/media/exynos5-fimc-is.txt  |   41
>>>> ++++++++++++++++++++
>>>>    1 file changed, 41 insertions(+)
>>>>    create mode 100644
>>>> Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>>> b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>>> new file mode 100644
>>>> index 0000000..9fd4646
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt
>>>> @@ -0,0 +1,41 @@
>
> [...]
>
>>>> +-----------------------------------
>>>> +
>>>> +The camera subsystem on Samsung Exynos5 SoC has some changes relative
>>>> +to previous SoC versions. Exynos5 has almost similar MIPI-CSIS and
>>>> +FIMC-LITE IPs but has a much improved version of FIMC-IS which can
>>>> +handle sensor controls and camera post-processing operations. The
>>>> +Exynos5 FIMC-IS has a dedicated ARM Cortex A5 processor, many
>>>> +post-processing blocks (ISP, DRC, FD, ODC, DIS, 3DNR) and two
>>>> +dedicated scalers (SCC and SCP).
>>>> +
>>>> +fimc-is node
>>>> +------------
>>>> +
>>>> +Required properties:
>>>> +
>>>> +- compatible        : must be "samsung,exynos5250-fimc-is"
>>>> +- reg               : physical base address and size of the memory
>>>> mapped
>>>> +                      registers
>>>> +- interrupt-parent  : Parent interrupt controller
>>>> +- interrupts        : fimc-is interrupt to the parent combiner
>>>> +- clocks            : list of clock specifiers, corresponding to
>>>> entries
>>>> in
>>>> +                      clock-names property;
>>>> +- clock-names       : must contain "isp", "mcu_isp", "isp_div0",
>>>> "isp_div1",
>>>> +                      "isp_divmpwm", "mcu_isp_div0", "mcu_isp_div1"
>>>> entries,
>>>> +                      matching entries in the clocks property.
>>>> +
>>>> +
>>>> +Board specific properties:
>>>> +
>>>> +- pinctrl-names    : pinctrl names for camera port pinmux control, at
>>>> least
>>>> +                    "default" needs to be specified.
>>>> +- pinctrl-0...N           : pinctrl properties corresponding to
>>>> pinctrl-names
>>>
>>>
>>>
>>> What pins exactly are supposed to be covered by these properties ? For
>>> what
>>> devices ? Aren't the camera port pins supposed to be specified at the
>>> common
>>> 'camera' node ? I believe the camera ports are not specific to the
>>> FIMC-IS.
>>
>>
>> These are for the sensor controls (especially clock lines).
>> I think I should move these to the sensor node.
>
>
> This doesn't sound right either. These pins are not a property of an
> external
> image sensor device, they are specific to the AP SoC. So IMO these pinctrl
> properties belong to some SoC's internal device node.
>

Ok. Time being I will move it to the camera node pinctrl properties.

> I think we could add a clock provider for the sclk_cam clocks and then the
> pinmux of those clock outputs could be configurable from with the clock ops.
> E.g. we set the pinumx into CAM_?_CLKOUT function only when a clock is
> enabled.
> Disabling a clock would put CLKOUT pin pinmux e.g. into input with pull down
> state. This would ensure proper CLKOUT pin configuration when image sensor
> is
> suspended or entirely powered off. I'm working on something like this for
> exynos4.
>

Ok that would be great. I will refer your exynos4 implementation for doing this.

>
>>>> +pmu subnode
>>>> +-----------
>>>> +
>>>> +Required properties:
>>>> + - reg : should contain PMU physical base address and size of the
>>>> memory
>>>> +         mapped registers.
>>>
>>>
>>>
>>> What about other devices, like ISP I2C, SPI ? Don't you want to list at
>>> least
>>> the ones currently used (I2C bus controllers) ?
>>>
>>
>> The present driver doesnt make use of the SPI bus as its used only
>> for sensor calibration which is not yet added.
>
>
> Is it only going to be used by the Cortex-A5 firmware, similarly to the
> I2C bus ? If so then it is likely not needed to specify it here right now.
> But I believe for complete H/W description we should reserve a possibility
> to add those various peripheral device nodes here.
>

Yes its going to be used  by the firmware and is done for sensor
calibration. The sensor works well even without it and so I didnt
include it in my initial patchset and kept it as a todo.

>
>> I2C bus is used by the sensor which has its own node. May be I should
>> explain one of the sensor nodes over here?
>
>
> I would describe at least I2C bus controller node and add a note that image
> sensor nodes can be specified there.
>

I havent created a dummy i2c device driver for handling the i2c clock
part and everything was handled in the fimc-is-sensor itself.
I was checking your exynos4 implementation and will try to do in similar
lines.

> Also, it would be good to start adding separate sensor drivers for each
> sensor, like s5k6a3, s5k4e3, etc. Ideally we should not have duplicated
> fimc-is-sensor.[ch] that would handle various sensors, i.e. same set of
> sensors to drivers/media/platform/exynos4-is and drivers/media/platform/
> exynos5-is.
>

Yes I hope it can be re-used.

> After you post the next iteration of this series I could have a look how
> it could be done.
>

Ok thanks.

Regards
Arun

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Arun Kumar K]

Hi Sylwester,


On Wed, Jul 17, 2013 at 3:33 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> Hi Arun,
>
>
> On 07/09/2013 02:04 PM, Arun Kumar K wrote:
>>
>> On Wed, Jun 26, 2013 at 12:57 PM, Hans Verkuil<hverkuil@xs4all.nl>  wrote:
>>>
>>> On Fri May 31 2013 15:03:23 Arun Kumar K wrote:
>>>>
>>>> FIMC-IS uses certain sensors which are exclusively controlled
>>>> from the IS firmware. This patch adds the sensor subdev for the
>>>> fimc-is sensors.
>>>>
>>>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>>>> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
>>>
>>>
>>> Not surprisingly I really hate the idea of sensor drivers that are tied
>>> to
>>> a specific SoC, since it completely destroys the reusability of such
>>> drivers.
>>>
>>
>> Yes agree to it.
>>
>>> I understand that you have little choice to do something special here,
>>> but
>>> I was wondering whether there is a way of keeping things as generic as
>>> possible.
>>>
>>> I'm just brainstorming here, but as far as I can see this driver is
>>> basically
>>> a partial sensor driver: it handles the clock, the format negotiation and
>>> power management. Any sensor driver needs that.
>>>
>>> What would be nice is if the fmic specific parts are replaced by
>>> callbacks
>>> into the bridge driver using v4l2_subdev_notify().
>>>
>>> The platform data (or DT) can also state if this sensor is firmware
>>> controlled
>>> or not. If not, then the missing bits can be implemented in the future by
>>> someone who needs that.
>>>
>>> That way the driver itself remains independent from fimc.
>>>
>>> And existing sensor drivers can be adapted to be usable with fimc as well
>>> by
>>> adding support for the notify callback.
>>>
>>> Would a scheme along those lines work?
>>>
>>
>> Yes this should make the implementation very generic.
>> Will check the feasibility of this approach.
>
>
> Is I suggested earlier, you likely could do without this call back to the
> FIMC-IS from within the sensor subdev. Look at your call chain right now:
>
>  /dev/video?     media-dev-driver    sensor-subdev         FIMC-IS
>     |                 |                   |                  |
>     | VIDIOC_STREAMON |                   |                  |
>     |---------------->#     s_stream()    |                  |
>     |                 #------------------># pipeline_open()  |
>     |                 |                   # ---------------->|
>     |                 |                   # pipeline_start() |
>     |                 |                   # ---------------->|
>     |                 |                   |                  |
>
> Couldn't you move pipeline_open(), pipeline_start() to s_stream handler
> of the ISP subdev ? It is currently empty. The media device driver could
> call s_stream on the ISP subdev each time it sees s_stream request on
> the sensor subdev. And you wouldn't need any hacks to get the pipeline
> pointer in the sensor subdev. Then it would be something like:
>
>  /dev/video?     media-dev-driver    sensor-subdev  FIMC-IS-ISP-subdev
>     |                 |                   |             |
>     | VIDIOC_STREAMON |                   |             |
>     |---------------->#     s_stream()    |             |
>     |                 #------------------>|             |
>     |                 #     s_stream()    |             |
>     |                 #-------------------+------------># pipeline_open()
>     |                 |                   |             # pipeline_start()
>     |                 |                   |             #
>
> I suppose pipeline_open() is better candidate for the s_power callback.
> It just needs to be ensured at the media device level the subdev
> operations sequences are correct.
>

It can be done this way. But my intention of putting these calls in
the sensor subdev was to use the sensor subdev independent of
isp subdev. This is for the usecase where the pipeline will only contain

is-sensor --> mipi-csis --> fimc-lite ---> memory

This way you can capture the bayer rgb data from sensor without using
any isp components at all.

The second pipeline which is isp --> scc --> scp
can be used for processing the sensor data and can be created and
used if needed.

In the method you mentioned, the isp subdev has to be used even
when it is not part of the pipeline. Is that allowed?
If its allowed as per media pipeline guidelines, then this definitely
is a better approach. Please suggest on this.

Regards
Arun

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Arun Kumar K]

Hi Sylwester,

On Wed, Jul 17, 2013 at 3:41 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> On 07/09/2013 01:42 PM, Arun Kumar K wrote:
>>>>
>>>> +       /* Check if same as sensor width&   height */
>>>> >>
>>>> >>  +       sensor_width = p->sensor->drvdata->pixel_width;
>>>> >>  +       sensor_height = p->sensor->drvdata->pixel_height;
>>>> >>  +       if ((sensor_width != f->fmt.pix_mp.width) ||
>>>> >>  +               (sensor_height != f->fmt.pix_mp.height)) {
>>>
>>> >
>>> >
>>> >  What's the point of this check ?
>>> >
>>
>> Check was added to ensure ISP input width and height is
>> set same as the sensor output or not.
>> But yes this cannot be extended to generic (non-IS controlled) sensors.
>> Will drop this check and let media controller take care.
>>
>>> >
>>>>
>>>> >>  +               f->fmt.pix_mp.width = sensor_width;
>>>> >>  +               f->fmt.pix_mp.height = sensor_height;
>>>> >>  +       }
>
>
> I meant that you could do the assignment unconditionally, since you
> always end up with sensor_width/height assigned to pix_mp.width/height.
> Indeed, this should be handled by subdev ioctls, and any discrepancies
> should be detected while starting streaming and reported to user space.
>

Ok I got it. Will modify accordingly

Thanks & Regards
Arun

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Sylwester Nawrocki]

On 07/17/2013 06:55 AM, Arun Kumar K wrote:
> On Wed, Jul 17, 2013 at 3:33 AM, Sylwester Nawrocki
> <sylvester.nawrocki@gmail.com> wrote:
>> On 07/09/2013 02:04 PM, Arun Kumar K wrote:
>>>
>>> On Wed, Jun 26, 2013 at 12:57 PM, Hans Verkuil<hverkuil@xs4all.nl>  wrote:
>>>>
>>>> On Fri May 31 2013 15:03:23 Arun Kumar K wrote:
>>>>>
>>>>> FIMC-IS uses certain sensors which are exclusively controlled
>>>>> from the IS firmware. This patch adds the sensor subdev for the
>>>>> fimc-is sensors.
>>>>>
>>>>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>>>>> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
>>>>
>>>>
>>>> Not surprisingly I really hate the idea of sensor drivers that are tied
>>>> to
>>>> a specific SoC, since it completely destroys the reusability of such
>>>> drivers.
>>>>
>>>
>>> Yes agree to it.
>>>
>>>> I understand that you have little choice to do something special here,
>>>> but
>>>> I was wondering whether there is a way of keeping things as generic as
>>>> possible.
>>>>
>>>> I'm just brainstorming here, but as far as I can see this driver is
>>>> basically
>>>> a partial sensor driver: it handles the clock, the format negotiation and
>>>> power management. Any sensor driver needs that.
>>>>
>>>> What would be nice is if the fmic specific parts are replaced by
>>>> callbacks
>>>> into the bridge driver using v4l2_subdev_notify().
>>>>
>>>> The platform data (or DT) can also state if this sensor is firmware
>>>> controlled
>>>> or not. If not, then the missing bits can be implemented in the future by
>>>> someone who needs that.
>>>>
>>>> That way the driver itself remains independent from fimc.
>>>>
>>>> And existing sensor drivers can be adapted to be usable with fimc as well
>>>> by
>>>> adding support for the notify callback.
>>>>
>>>> Would a scheme along those lines work?
>>>>
>>>
>>> Yes this should make the implementation very generic.
>>> Will check the feasibility of this approach.
>>
>>
>> Is I suggested earlier, you likely could do without this call back to the
>> FIMC-IS from within the sensor subdev. Look at your call chain right now:
>>
>>  /dev/video?     media-dev-driver    sensor-subdev         FIMC-IS
>>     |                 |                   |                  |
>>     | VIDIOC_STREAMON |                   |                  |
>>     |---------------->#     s_stream()    |                  |
>>     |                 #------------------># pipeline_open()  |
>>     |                 |                   # ---------------->|
>>     |                 |                   # pipeline_start() |
>>     |                 |                   # ---------------->|
>>     |                 |                   |                  |
>>
>> Couldn't you move pipeline_open(), pipeline_start() to s_stream handler
>> of the ISP subdev ? It is currently empty. The media device driver could
>> call s_stream on the ISP subdev each time it sees s_stream request on
>> the sensor subdev. And you wouldn't need any hacks to get the pipeline
>> pointer in the sensor subdev. Then it would be something like:
>>
>>  /dev/video?     media-dev-driver    sensor-subdev  FIMC-IS-ISP-subdev
>>     |                 |                   |             |
>>     | VIDIOC_STREAMON |                   |             |
>>     |---------------->#     s_stream()    |             |
>>     |                 #------------------>|             |
>>     |                 #     s_stream()    |             |
>>     |                 #-------------------+------------># pipeline_open()
>>     |                 |                   |             # pipeline_start()
>>     |                 |                   |             #
>>
>> I suppose pipeline_open() is better candidate for the s_power callback.
>> It just needs to be ensured at the media device level the subdev
>> operations sequences are correct.
>>
> 
> It can be done this way. But my intention of putting these calls in
> the sensor subdev was to use the sensor subdev independent of
> isp subdev. This is for the usecase where the pipeline will only contain
> 
> is-sensor --> mipi-csis --> fimc-lite ---> memory
> 
> This way you can capture the bayer rgb data from sensor without using
> any isp components at all.
> 
> The second pipeline which is isp --> scc --> scp
> can be used for processing the sensor data and can be created and
> used if needed.
> 
> In the method you mentioned, the isp subdev has to be used even
> when it is not part of the pipeline. Is that allowed?
> If its allowed as per media pipeline guidelines, then this definitely
> is a better approach. Please suggest on this.

Sure, I'm aware of those two relatively separate pipelines. s_power,
s_stream callbacks belong to the kernel so I don't think it would be
an issue to do it as I described. Please note s_power, s_stream are
normally reference counted.
Alternatively you could create a separate subdev for the FIMC-IS
firmware interface. Such subdev wouldn't be exposing device node
and would be used by the media pipeline controller driver to ensure
proper hardware configuration sequences. I don't know the Exynos5
FIMC-IS firmware architecture very well so I'm not sure if it is
worth to create such a separate subdev as the firmware interface
obstruction layer ;) I guess we could do only with subdevs that
are exposed to user space.

Regards,
Sylwester

Re: [RFC v2 05/10] exynos5-fimc-is: Adds the sensor subdev

[Arun Kumar K]

Hi Sylwester,

On Wed, Jul 17, 2013 at 7:44 PM, Sylwester Nawrocki
<s.nawrocki@samsung.com> wrote:
> On 07/17/2013 06:55 AM, Arun Kumar K wrote:
>> On Wed, Jul 17, 2013 at 3:33 AM, Sylwester Nawrocki
>> <sylvester.nawrocki@gmail.com> wrote:
>>> On 07/09/2013 02:04 PM, Arun Kumar K wrote:
>>>>
>>>> On Wed, Jun 26, 2013 at 12:57 PM, Hans Verkuil<hverkuil@xs4all.nl>  wrote:
>>>>>
>>>>> On Fri May 31 2013 15:03:23 Arun Kumar K wrote:
>>>>>>
>>>>>> FIMC-IS uses certain sensors which are exclusively controlled
>>>>>> from the IS firmware. This patch adds the sensor subdev for the
>>>>>> fimc-is sensors.
>>>>>>
>>>>>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>>>>>> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
>>>>>
>>>>>
>>>>> Not surprisingly I really hate the idea of sensor drivers that are tied
>>>>> to
>>>>> a specific SoC, since it completely destroys the reusability of such
>>>>> drivers.
>>>>>
>>>>
>>>> Yes agree to it.
>>>>
>>>>> I understand that you have little choice to do something special here,
>>>>> but
>>>>> I was wondering whether there is a way of keeping things as generic as
>>>>> possible.
>>>>>
>>>>> I'm just brainstorming here, but as far as I can see this driver is
>>>>> basically
>>>>> a partial sensor driver: it handles the clock, the format negotiation and
>>>>> power management. Any sensor driver needs that.
>>>>>
>>>>> What would be nice is if the fmic specific parts are replaced by
>>>>> callbacks
>>>>> into the bridge driver using v4l2_subdev_notify().
>>>>>
>>>>> The platform data (or DT) can also state if this sensor is firmware
>>>>> controlled
>>>>> or not. If not, then the missing bits can be implemented in the future by
>>>>> someone who needs that.
>>>>>
>>>>> That way the driver itself remains independent from fimc.
>>>>>
>>>>> And existing sensor drivers can be adapted to be usable with fimc as well
>>>>> by
>>>>> adding support for the notify callback.
>>>>>
>>>>> Would a scheme along those lines work?
>>>>>
>>>>
>>>> Yes this should make the implementation very generic.
>>>> Will check the feasibility of this approach.
>>>
>>>
>>> Is I suggested earlier, you likely could do without this call back to the
>>> FIMC-IS from within the sensor subdev. Look at your call chain right now:
>>>
>>>  /dev/video?     media-dev-driver    sensor-subdev         FIMC-IS
>>>     |                 |                   |                  |
>>>     | VIDIOC_STREAMON |                   |                  |
>>>     |---------------->#     s_stream()    |                  |
>>>     |                 #------------------># pipeline_open()  |
>>>     |                 |                   # ---------------->|
>>>     |                 |                   # pipeline_start() |
>>>     |                 |                   # ---------------->|
>>>     |                 |                   |                  |
>>>
>>> Couldn't you move pipeline_open(), pipeline_start() to s_stream handler
>>> of the ISP subdev ? It is currently empty. The media device driver could
>>> call s_stream on the ISP subdev each time it sees s_stream request on
>>> the sensor subdev. And you wouldn't need any hacks to get the pipeline
>>> pointer in the sensor subdev. Then it would be something like:
>>>
>>>  /dev/video?     media-dev-driver    sensor-subdev  FIMC-IS-ISP-subdev
>>>     |                 |                   |             |
>>>     | VIDIOC_STREAMON |                   |             |
>>>     |---------------->#     s_stream()    |             |
>>>     |                 #------------------>|             |
>>>     |                 #     s_stream()    |             |
>>>     |                 #-------------------+------------># pipeline_open()
>>>     |                 |                   |             # pipeline_start()
>>>     |                 |                   |             #
>>>
>>> I suppose pipeline_open() is better candidate for the s_power callback.
>>> It just needs to be ensured at the media device level the subdev
>>> operations sequences are correct.
>>>
>>
>> It can be done this way. But my intention of putting these calls in
>> the sensor subdev was to use the sensor subdev independent of
>> isp subdev. This is for the usecase where the pipeline will only contain
>>
>> is-sensor --> mipi-csis --> fimc-lite ---> memory
>>
>> This way you can capture the bayer rgb data from sensor without using
>> any isp components at all.
>>
>> The second pipeline which is isp --> scc --> scp
>> can be used for processing the sensor data and can be created and
>> used if needed.
>>
>> In the method you mentioned, the isp subdev has to be used even
>> when it is not part of the pipeline. Is that allowed?
>> If its allowed as per media pipeline guidelines, then this definitely
>> is a better approach. Please suggest on this.
>
> Sure, I'm aware of those two relatively separate pipelines. s_power,
> s_stream callbacks belong to the kernel so I don't think it would be
> an issue to do it as I described. Please note s_power, s_stream are
> normally reference counted.
> Alternatively you could create a separate subdev for the FIMC-IS
> firmware interface. Such subdev wouldn't be exposing device node
> and would be used by the media pipeline controller driver to ensure
> proper hardware configuration sequences. I don't know the Exynos5
> FIMC-IS firmware architecture very well so I'm not sure if it is
> worth to create such a separate subdev as the firmware interface
> obstruction layer ;) I guess we could do only with subdevs that
> are exposed to user space.
>

Ok I will move those calls to the ISP subdev and sequence the
s_stream, s_power calls properly using media device.

Thanks & Regards
Arun

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Arun Kumar K]

Hi Sylwester,

On Fri, Jun 21, 2013 at 4:55 AM, Sylwester Nawrocki
<sylvester.nawrocki@gmail.com> wrote:
> On 05/31/2013 03:03 PM, Arun Kumar K wrote:
>>
>> fimc-is driver takes video data input from the ISP video node
>> which is added in this patch. This node accepts Bayer input
>> buffers which is given from the IS sensors.
>>
>> Signed-off-by: Arun Kumar K<arun.kk@samsung.com>
>> Signed-off-by: Kilyeon Im<kilyeon.im@samsung.com>
>> ---
>>   drivers/media/platform/exynos5-is/fimc-is-isp.c |  438
>> +++++++++++++++++++++++
>>   drivers/media/platform/exynos5-is/fimc-is-isp.h |   89 +++++
>>   2 files changed, 527 insertions(+)
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.c
>>   create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.h
>>

[snip]

>> + * Video node ioctl operations
>> + */
>> +static int isp_querycap_output(struct file *file, void *priv,
>> +                                       struct v4l2_capability *cap)
>> +{
>> +       strncpy(cap->driver, ISP_DRV_NAME, sizeof(cap->driver) - 1);
>> +       strncpy(cap->card, ISP_DRV_NAME, sizeof(cap->card) - 1);
>> +       strncpy(cap->bus_info, ISP_DRV_NAME, sizeof(cap->bus_info) - 1);
>> +       cap->capabilities = V4L2_CAP_STREAMING |
>> V4L2_CAP_VIDEO_OUTPUT_MPLANE;
>> +       cap->device_caps = V4L2_CAP_STREAMING |
>> V4L2_CAP_VIDEO_OUTPUT_MPLANE;
>
>
>         cap->capabilities = V4L2_CAP_STREAMING;
>
>         cap->device_caps = V4L2_CAP_STREAMING |
> V4L2_CAP_VIDEO_OUTPUT_MPLANE;
>
> This should be:
>
>         cap->device_caps = V4L2_CAP_STREAMING;
>         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
>
> Media Controller device nodes must not use V4L2_CAP_VIDEO_{OUTPUT,
> CAPTURE}_(_MPLANE)
> capability flags.
>

If I dont provide any video capabilities, the v4l2-compliance tool
gives a fail :

     fail: v4l2-compliance.cpp(298) : node->is_video && !(dcaps & video_caps)
test VIDIOC_QUERYCAP: FAIL

This error doesn't come if I give V4L2_CAP_VIDEO_OUTPUT_MPLANE capability.

One more related error compliance tool gives is :

   fail: v4l2-test-formats.cpp(286): Video Output Multiplanar cap not
set, but Video Output Multiplanar formats defined
test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: FAIL

Shall these errors be ignored?

Regards
Arun

Re: [RFC v2 06/10] exynos5-fimc-is: Adds isp subdev

[Sylwester Nawrocki]

Hi Arun,

On 08/02/2013 06:31 AM, Arun Kumar K wrote:
[...]
>>> + * Video node ioctl operations
>>> + */
>>> +static int isp_querycap_output(struct file *file, void *priv,
>>> +                                       struct v4l2_capability *cap)
>>> +{
>>> +       strncpy(cap->driver, ISP_DRV_NAME, sizeof(cap->driver) - 1);
>>> +       strncpy(cap->card, ISP_DRV_NAME, sizeof(cap->card) - 1);
>>> +       strncpy(cap->bus_info, ISP_DRV_NAME, sizeof(cap->bus_info) - 1);
>>> +       cap->capabilities = V4L2_CAP_STREAMING |
>>> V4L2_CAP_VIDEO_OUTPUT_MPLANE;
>>> +       cap->device_caps = V4L2_CAP_STREAMING |
>>> V4L2_CAP_VIDEO_OUTPUT_MPLANE;
>>
>>
>>          cap->capabilities = V4L2_CAP_STREAMING;
>>
>>          cap->device_caps = V4L2_CAP_STREAMING |
>> V4L2_CAP_VIDEO_OUTPUT_MPLANE;
>>
>> This should be:
>>
>>          cap->device_caps = V4L2_CAP_STREAMING;
>>          cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
>>
>> Media Controller device nodes must not use V4L2_CAP_VIDEO_{OUTPUT,
>> CAPTURE}_(_MPLANE) capability flags.
>
> If I dont provide any video capabilities, the v4l2-compliance tool
> gives a fail :
>
>       fail: v4l2-compliance.cpp(298) : node->is_video&&  !(dcaps&  video_caps)
> test VIDIOC_QUERYCAP: FAIL
>
> This error doesn't come if I give V4L2_CAP_VIDEO_OUTPUT_MPLANE capability.
>
> One more related error compliance tool gives is :
>
>     fail: v4l2-test-formats.cpp(286): Video Output Multiplanar cap not
> set, but Video Output Multiplanar formats defined
> test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: FAIL
>
> Shall these errors be ignored?

I think so, yes. The capability flags should be set by a driver-specific
user space library/middleware. Such a library would intercept 
VIDIOC_QUERYBUF
ioctl and set relevant capability flags. I believe v4l2-compliance should
not be used on the bare video device nodes your driver provides. It should
be used together with, e.g. libv4l2 plugin for this driver.

My colleague have been working on such a plugin for exynos4-is driver.
There is still on my todo list modifying FIMC video capture node driver
to allow video device open() even when no links to, e.g. sensor subdev
were created. This is needed because with libv4l2 video device open() must
succeed in order for the plugin to have its initialization routine called.
Then the plugin configures pipeline according to e.g. data stored in a
configuration file, and for some VIDIOC_* ioctls it does additional stuff
on involved subdevices to ensure VIDIOC_* ioctls work as if the /dev/video
would be plain V4L2 video node, without any subdev/MC stuff.

I think you're just using wrong tool for the purpose. v4l2-compliance is
just not suitable for testing MC video nodes without corresponding user
space library that would handle quirks of your device.

If you set the V4L2_CAP_VIDEO_OUTPUT_MPLANE capability standard
applications, e.g. v4l2-src GStreamer plugin (oh, it likely doesn't have
support for _MPLANE yet anyway) may get confused that this video node is
a regular capture video node and users would start filling in bug reports
thinking that your driver is crap because it doesn't work as expected. ;-)

Hans and Mauro may want to correct/add something to what is said above.

--
Thanks,
Sylwester