From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Tomasz Figa <tfiga@chromium.org>,
linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
iommu@lists.linux-foundation.org,
Hsin-Yi Wang <hsinyi@chromium.org>,
youlin.pei@mediatek.com, anan.sun@mediatek.com,
chao.hao@mediatek.com, yen-chang.chen@mediatek.com
Subject: Re: [PATCH v3 13/33] iommu/mediatek: Remove the power status checking in tlb flush all
Date: Tue, 4 Jan 2022 16:55:06 +0100 [thread overview]
Message-ID: <1cb7458d-a012-2e84-82bd-7e4f30ed9162@collabora.com> (raw)
In-Reply-To: <20210923115840.17813-14-yong.wu@mediatek.com>
Il 23/09/21 13:58, Yong Wu ha scritto:
> To simplify the code, Remove the power status checking in the
> tlb_flush_all, remove this:
> if (pm_runtime_get_if_in_use(data->dev) <= 0)
> continue;
>
> After this patch, the mtk_iommu_tlb_flush_all will be called from
> a) isr
> b) pm runtime resume callback
> c) tlb flush range fail case
> d) iommu_create_device_direct_mappings
> -> iommu_flush_iotlb_all
> In first three cases, the power and clock always are enabled; d) is direct
> mapping, the tlb flush is unnecessay since we already have tlb_flush_all
> in the pm_runtime_resume callback. When the iommu's power status is
> changed to active, the tlb always is clean.
>
> In addition, there still are 2 reasons that don't add PM status checking
> in the tlb flush all:
> a) Write tlb flush all register also is ok even though the HW has no
> power and clocks. Write ignore.
Do you mean that the register write seemingly succeeds but the hardware
discards it?
Please, reword the `a` sentence to be clearer.
> b) pm_runtime_get_if_in_use(m4udev) is 0 when the tlb_flush_all
> is called frm pm_runtime_resume cb. From this point, we can not add
> this code above in this tlb_flush_all.
>
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> ---
> drivers/iommu/mtk_iommu.c | 20 +++++++-------------
> 1 file changed, 7 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index e9e94944ed91..4a33b6c6b1db 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -204,10 +204,14 @@ static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom)
> return container_of(dom, struct mtk_iommu_domain, domain);
> }
>
> -static void mtk_iommu_tlb_do_flush_all(struct mtk_iommu_data *data)
> +static void mtk_iommu_tlb_flush_all(struct mtk_iommu_data *data)
> {
> unsigned long flags;
>
> + /*
> + * No need get power status since the HW PM status nearly is active
> + * when entering here.
Please reword this comment to explain the entire situation.
> + */
> spin_lock_irqsave(&data->tlb_lock, flags);
> writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
> data->base + data->plat_data->inv_sel_reg);
> @@ -216,16 +220,6 @@ static void mtk_iommu_tlb_do_flush_all(struct mtk_iommu_data *data)
> spin_unlock_irqrestore(&data->tlb_lock, flags);
> }
>
> -static void mtk_iommu_tlb_flush_all(struct mtk_iommu_data *data)
> -{
> - if (pm_runtime_get_if_in_use(data->dev) <= 0)
> - return;
> -
> - mtk_iommu_tlb_do_flush_all(data);
> -
> - pm_runtime_put(data->dev);
> -}
> -
> static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size,
> struct mtk_iommu_data *data)
> {
> @@ -263,7 +257,7 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size,
> if (ret) {
> dev_warn(data->dev,
> "Partial TLB flush timed out, falling back to full flush\n");
> - mtk_iommu_tlb_do_flush_all(data);
> + mtk_iommu_tlb_flush_all(data);
> }
>
> if (has_pm)
> @@ -993,7 +987,7 @@ static int __maybe_unused mtk_iommu_runtime_resume(struct device *dev)
> *
> * Thus, Make sure the tlb always is clean after each PM resume.
> */
> - mtk_iommu_tlb_do_flush_all(data);
> + mtk_iommu_tlb_flush_all(data);
>
> /*
> * Uppon first resume, only enable the clk and return, since the values of the
>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
next prev parent reply other threads:[~2022-01-04 16:05 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-23 11:58 [PATCH v3 00/33] MT8195 IOMMU SUPPORT Yong Wu
2021-09-23 11:58 ` [PATCH v3 01/33] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2021-09-23 11:58 ` [PATCH v3 02/33] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2021-09-23 11:58 ` [PATCH v3 03/33] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2021-09-23 11:58 ` [PATCH v3 04/33] iommu/mediatek: Remove clk_disable in mtk_iommu_remove Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 05/33] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 06/33] iommu/mediatek: Add 12G~16G support for multi domains Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 07/33] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 08/33] iommu/mediatek: Add a flag NON_STD_AXI Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 09/33] iommu/mediatek: Remove for_each_m4u in tlb_sync_all Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2022-01-09 2:48 ` Yong Wu
2022-01-10 9:16 ` AngeloGioacchino Del Regno
2022-01-10 10:59 ` Yong Wu
2022-01-10 11:40 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 10/33] iommu/mediatek: Add tlb_lock in tlb_flush_all Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 11/33] iommu/mediatek: Remove the granule in the tlb flush Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 12/33] iommu/mediatek: Always tlb_flush_all when each PM resume Yong Wu
2021-11-09 12:21 ` Dafna Hirschfeld
2021-11-10 2:20 ` Yong Wu
2021-11-10 5:29 ` Dafna Hirschfeld
2021-11-10 7:50 ` Yong Wu
2021-11-22 7:05 ` Yong Wu
2021-11-22 11:08 ` Dafna Hirschfeld
2021-11-27 10:11 ` Dafna Hirschfeld
2021-11-30 7:39 ` Yong Wu
2021-11-30 11:33 ` Dafna Hirschfeld
2021-12-06 8:28 ` Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 13/33] iommu/mediatek: Remove the power status checking in tlb flush all Yong Wu
2021-10-22 14:03 ` Dafna Hirschfeld
2021-10-25 4:03 ` Yong Wu
2021-11-04 3:28 ` Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno [this message]
2022-01-09 2:47 ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 14/33] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 15/33] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 16/33] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 17/33] iommu/mediatek: Contain MM IOMMU flow with the MM TYPE Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 18/33] iommu/mediatek: Adjust device link when it is sub-common Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 19/33] iommu/mediatek: Add list_del in mtk_iommu_remove Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 20/33] iommu/mediatek: Allow IOMMU_DOMAIN_UNMANAGED for PCIe VFIO Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 21/33] iommu/mediatek: Add infra iommu support Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 22/33] iommu/mediatek: Add PCIe support Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2022-01-09 2:47 ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 23/33] iommu/mediatek: Add mt8195 support Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 24/33] iommu/mediatek: Only adjust code about register base Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 25/33] iommu/mediatek: Just move code position in hw_init Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 26/33] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2022-01-09 2:46 ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 27/33] iommu/mediatek: Initialise bank HW for each a bank Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 28/33] iommu/mediatek: Add bank_nr and bank_enable Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 29/33] iommu/mediatek: Change the domid to iova_region_id Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 30/33] iommu/mediatek: Get the proper bankid for multi banks Yong Wu
2021-09-23 11:58 ` [PATCH v3 31/33] iommu/mediatek: Initialise/Remove for multi bank dev Yong Wu
2021-09-23 11:58 ` [PATCH v3 32/33] iommu/mediatek: Backup/restore regsiters for multi banks Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 33/33] iommu/mediatek: mt8195: Enable multi banks for infra iommu Yong Wu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1cb7458d-a012-2e84-82bd-7e4f30ed9162@collabora.com \
--to=angelogioacchino.delregno@collabora.com \
--cc=anan.sun@mediatek.com \
--cc=chao.hao@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=hsinyi@chromium.org \
--cc=iommu@lists.linux-foundation.org \
--cc=joro@8bytes.org \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=robh+dt@kernel.org \
--cc=robin.murphy@arm.com \
--cc=srv_heupstream@mediatek.com \
--cc=tfiga@chromium.org \
--cc=will@kernel.org \
--cc=yen-chang.chen@mediatek.com \
--cc=yong.wu@mediatek.com \
--cc=youlin.pei@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).