From: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
To: Yong Wu <yong.wu@mediatek.com>
Cc: youlin.pei@mediatek.com, anan.sun@mediatek.com,
srv_heupstream@mediatek.com,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Robin Murphy <robin.murphy@arm.com>,
sebastian.reichel@collabora.com, yen-chang.chen@mediatek.com,
Fabien Parent <fparent@baylibre.com>,
iommu@lists.linux-foundation.org,
Rob Herring <robh+dt@kernel.org>,
linux-mediatek@lists.infradead.org, yf.wang@mediatek.com,
Hsin-Yi Wang <hsinyi@chromium.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Collabora Kernel ML <kernel@collabora.com>,
Will Deacon <will@kernel.org>,
mingyuan.ma@mediatek.com, linux-arm-kernel@lists.infradead.org,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Subject: Re: [PATCH v3 12/33] iommu/mediatek: Always tlb_flush_all when each PM resume
Date: Mon, 22 Nov 2021 13:08:51 +0200 [thread overview]
Message-ID: <40de67e6-e9c9-9c31-79fb-250ac8998513@collabora.com> (raw)
In-Reply-To: <fd46a6647b7c3a184f32df9a25141a3213a04ee5.camel@mediatek.com>
On 22.11.21 09:05, Yong Wu wrote:
> Hi Dafna,
>
> On Wed, 2021-11-10 at 15:50 +0800, Yong Wu wrote:
>> On Wed, 2021-11-10 at 07:29 +0200, Dafna Hirschfeld wrote:
>>>
>>> On 10.11.21 04:20, Yong Wu wrote:
>>>> On Tue, 2021-11-09 at 14:21 +0200, Dafna Hirschfeld wrote:
>>>>> Hi
>>>>> This patch is needed in order to update the tlb when a device
>>>>> is
>>>>> powered on.
>>>>> Could you send this patch alone without the whole series so it
>>>>> get
>>>>> accepted easier?
>>>>
>>>> Which SoC are you testing on? In previous SoC, the IOMMU HW don't
>>>> have
>>>> power-domain, and we have a "has_pm"[1] in the tlb function for
>>>> that
>>>> case. The "has_pm" should be always 0 for the previous SoC like
>>>> mt8173,
>>>> it should always tlb synchronize.
>>>>
>>>> thus, Could you help share more about your issue? In which case
>>>> it
>>>> lack
>>>> the necessary tlb operation. At least, We need confirm if it
>>>> needs
>>>> a
>>>> "Fixes" tags if sending this patch alone.
>>>
>>> Hi,
>>> I work with the mtk-vcodec driver on mt8173. As you wrote, the
>>> iommu
>>> doesn't
>>> have a power-domain and so when allocating buffers before the
>>> device
>>> is powered
>>> on, there is the warning
>>> "Partial TLB flush timed out, falling back to full flush"
>>> flooding the log buf.
>>
>> oh. Thanks very much for your information. Get it now.
>>
>> This issue should be introduced by the:
>>
>> b34ea31fe013 ("iommu/mediatek: Always enable the clk on resume")
>>
>> tlb failed due to the bclk is not enabled. Could you help try that
>> after reverting this?
>>
>>>
>>> Sebastian Reichel suggested to remove the 'if(has_pm)' check to
>>> avoid
>>> this warning,
>>> and avoid flushing the tlb if the device is off:
>>>
>>> [1] http://ix.io/3Eyr
>>>
>>> This fixes the warning, but then the tlb is not flushed in sync,
>>> Therefore the tlb should be flushed when the device is resumed.
>>>
>>> So the two patches (the one suggested in the link [1] and this
>>> patch)
>>> should be sent together as a 2-patch series.
>>
>> then this is reasonable. You could help this into a new patchset if
>> you
>> are free(add Fixes tag).
>>
>> Thanks.
>>
>>>
>>> Thanks,
>>> Dafna
>>>
>>>>
>>>> Thanks.
>>>>
>>>> [1]
>>>>
>>
>>
> https://elixir.bootlin.com/linux/v5.15/source/drivers/iommu/mtk_iommu.c#L236
>>>>
>>>>> I can resend the patch on your behalf if you want.
>
> What's your plan here?
>
> If you send the two as a independent patchset on v5.16, I will rebase
> yours.
> If you have no time for this, I could help this.
Hi, just sent it in the patchset ` iommu/mediatek: fix tlb flush logic`
Thanks,
Dafna
>
> Thanks.
>
>>>>>
>>>>> Thanks,
>>>>> Dafna
>>>>>
>>>>> On 23.09.21 14:58, Yong Wu wrote:
>>>>>> Prepare for 2 HWs that sharing pgtable in different power-
>>>>>> domains.
>>>>>>
>>>>>> When there are 2 M4U HWs, it may has problem in the
>>>>>> flush_range
>>>>>> in
>>>>>> which
>>>>>> we get the pm_status via the m4u dev, BUT that function don't
>>>>>> reflect the
>>>>>> real power-domain status of the HW since there may be other
>>>>>> HW
>>>>>> also
>>>>>> use
>>>>>> that power-domain.
>>>>>>
>>>>>> The function dma_alloc_attrs help allocate the iommu buffer
>>>>>> which
>>>>>> need the corresponding power domain since tlb flush is needed
>>>>>> when
>>>>>> preparing iova. BUT this function only is for allocating
>>>>>> buffer,
>>>>>> we have no good reason to request the user always call
>>>>>> pm_runtime_get
>>>>>> before calling dma_alloc_xxx. Therefore, we add a
>>>>>> tlb_flush_all
>>>>>> in the pm_runtime_resume to make sure the tlb always is
>>>>>> clean.
>>>>>>
>>>>>> Another solution is always call pm_runtime_get in the
>>>>>> tlb_flush_range.
>>>>>> This will trigger pm runtime resume/backup so often when the
>>>>>> iommu
>>>>>> power is not active at some time(means user don't call
>>>>>> pm_runtime_get
>>>>>> before calling dma_alloc_xxx), This may cause the performance
>>>>>> drop.
>>>>>> thus we don't use this.
>>>>>>
>>>>>> In other case, the iommu's power should always be active via
>>>>>> device
>>>>>> link with smi.
>>>>>>
>>>>>> The previous SoC don't have PM except mt8192. the mt8192
>>>>>> IOMMU
>>>>>> is
>>>>>> display's
>>>>>> power-domain which nearly always is enabled. thus no need fix
>>>>>> tags
>>>>>> here.
>>>>>> Prepare for mt8195.
>>>>>>
>>>>>> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
>>>>>> ---
>>>>>> drivers/iommu/mtk_iommu.c | 11 +++++++++++
>>>>>> 1 file changed, 11 insertions(+)
>>>>>>
>>>>>> diff --git a/drivers/iommu/mtk_iommu.c
>>>>>> b/drivers/iommu/mtk_iommu.c
>>>>>> index 44cf5547d084..e9e94944ed91 100644
>>>>>> --- a/drivers/iommu/mtk_iommu.c
>>>>>> +++ b/drivers/iommu/mtk_iommu.c
>>>>>> @@ -984,6 +984,17 @@ static int __maybe_unused
>>>>>> mtk_iommu_runtime_resume(struct device *dev)
>>>>>> return ret;
>>>>>> }
>>>>>>
>>>>>> + /*
>>>>>> + * Users may allocate dma buffer before they call
>>>>>> pm_runtime_get, then
>>>>>> + * it will lack the necessary tlb flush.
>>>>>> + *
>>>>>> + * We have no good reason to request the users always
>>>>>> call
>>>>>> dma_alloc_xx
>>>>>> + * after pm_runtime_get_sync.
>>>>>> + *
>>>>>> + * Thus, Make sure the tlb always is clean after each
>>>>>> PM
>>>>>> resume.
>>>>>> + */
>>>>>> + mtk_iommu_tlb_do_flush_all(data);
>>>>>> +
>>>>>> /*
>>>>>> * Uppon first resume, only enable the clk and return,
>>>>>> since
>>>>>> the values of the
>>>>>> * registers are not yet set.
>>>>>>
>>
>> _______________________________________________
>> iommu mailing list
>> iommu@lists.linux-foundation.org
>> https://lists.linuxfoundation.org/mailman/listinfo/iommu
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next prev parent reply other threads:[~2021-11-22 12:00 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-23 11:58 [PATCH v3 00/33] MT8195 IOMMU SUPPORT Yong Wu
2021-09-23 11:58 ` [PATCH v3 01/33] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2021-09-23 11:58 ` [PATCH v3 02/33] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2021-09-23 11:58 ` [PATCH v3 03/33] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2021-09-23 11:58 ` [PATCH v3 04/33] iommu/mediatek: Remove clk_disable in mtk_iommu_remove Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 05/33] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 06/33] iommu/mediatek: Add 12G~16G support for multi domains Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 07/33] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 08/33] iommu/mediatek: Add a flag NON_STD_AXI Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 09/33] iommu/mediatek: Remove for_each_m4u in tlb_sync_all Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2022-01-09 2:48 ` Yong Wu
2022-01-10 9:16 ` AngeloGioacchino Del Regno
2022-01-10 10:59 ` Yong Wu
2022-01-10 11:40 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 10/33] iommu/mediatek: Add tlb_lock in tlb_flush_all Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 11/33] iommu/mediatek: Remove the granule in the tlb flush Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 12/33] iommu/mediatek: Always tlb_flush_all when each PM resume Yong Wu
2021-11-09 12:21 ` Dafna Hirschfeld
2021-11-10 2:20 ` Yong Wu
2021-11-10 5:29 ` Dafna Hirschfeld
2021-11-10 7:50 ` Yong Wu
2021-11-22 7:05 ` Yong Wu
2021-11-22 11:08 ` Dafna Hirschfeld [this message]
2021-11-27 10:11 ` Dafna Hirschfeld
2021-11-30 7:39 ` Yong Wu
2021-11-30 11:33 ` Dafna Hirschfeld
2021-12-06 8:28 ` Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 13/33] iommu/mediatek: Remove the power status checking in tlb flush all Yong Wu
2021-10-22 14:03 ` Dafna Hirschfeld
2021-10-25 4:03 ` Yong Wu
2021-11-04 3:28 ` Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2022-01-09 2:47 ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 14/33] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 15/33] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 16/33] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 17/33] iommu/mediatek: Contain MM IOMMU flow with the MM TYPE Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 18/33] iommu/mediatek: Adjust device link when it is sub-common Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 19/33] iommu/mediatek: Add list_del in mtk_iommu_remove Yong Wu
2022-01-04 15:55 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 20/33] iommu/mediatek: Allow IOMMU_DOMAIN_UNMANAGED for PCIe VFIO Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 21/33] iommu/mediatek: Add infra iommu support Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 22/33] iommu/mediatek: Add PCIe support Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2022-01-09 2:47 ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 23/33] iommu/mediatek: Add mt8195 support Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 24/33] iommu/mediatek: Only adjust code about register base Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 25/33] iommu/mediatek: Just move code position in hw_init Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 26/33] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2022-01-09 2:46 ` Yong Wu
2021-09-23 11:58 ` [PATCH v3 27/33] iommu/mediatek: Initialise bank HW for each a bank Yong Wu
2022-01-04 15:54 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 28/33] iommu/mediatek: Add bank_nr and bank_enable Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 29/33] iommu/mediatek: Change the domid to iova_region_id Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 30/33] iommu/mediatek: Get the proper bankid for multi banks Yong Wu
2021-09-23 11:58 ` [PATCH v3 31/33] iommu/mediatek: Initialise/Remove for multi bank dev Yong Wu
2021-09-23 11:58 ` [PATCH v3 32/33] iommu/mediatek: Backup/restore regsiters for multi banks Yong Wu
2022-01-04 15:53 ` AngeloGioacchino Del Regno
2021-09-23 11:58 ` [PATCH v3 33/33] iommu/mediatek: mt8195: Enable multi banks for infra iommu Yong Wu
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