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* [PATCH net-next] net: ethernet: mediatek: support setting MTU
@ 2020-11-23  3:45 DENG Qingfang
  2020-11-24 22:54 ` Jakub Kicinski
  0 siblings, 1 reply; 2+ messages in thread
From: DENG Qingfang @ 2020-11-23  3:45 UTC (permalink / raw)
  To: netdev, Felix Fietkau, John Crispin, Sean Wang, Mark Lee,
	David S . Miller, Jakub Kicinski, Matthias Brugger, Russell King,
	linux-arm-kernel, linux-mediatek
  Cc: Rene van Dorst, Andrew Lunn, David Woodhouse, Frank Wunderlich

MT762x HW, except for MT7628, supports frame length up to 2048
(maximum length on GDM), so allow setting MTU up to 2030.

Signed-off-by: DENG Qingfang <dqfext@gmail.com>
---
 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 36 ++++++++++++++++++++-
 drivers/net/ethernet/mediatek/mtk_eth_soc.h | 11 +++++--
 2 files changed, 43 insertions(+), 4 deletions(-)

Changes RFC -> v1:
	Exclude MT7628

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 6d2d60675ffd..27cae3f43972 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -353,7 +353,7 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode,
 	/* Setup gmac */
 	mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
 	mcr_new = mcr_cur;
-	mcr_new |= MAC_MCR_MAX_RX_1536 | MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
+	mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
 		   MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK;
 
 	/* Only update control register when needed! */
@@ -2499,6 +2499,39 @@ static void mtk_uninit(struct net_device *dev)
 	mtk_rx_irq_disable(eth, ~0);
 }
 
+static int mtk_change_mtu(struct net_device *dev, int new_mtu)
+{
+	int length = new_mtu + MTK_RX_ETH_HLEN;
+	struct mtk_mac *mac = netdev_priv(dev);
+	struct mtk_eth *eth = mac->hw;
+	u32 mcr_cur, mcr_new;
+
+	if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
+		if (length > 1536)
+			return -EINVAL;
+	} else {
+		mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
+		mcr_new = mcr_cur & ~MAC_MCR_MAX_RX_LEN_MASK;
+
+		if (length <= 1518)
+			mcr_new |= MAC_MCR_MAX_RX_LEN(MAC_MCR_MAX_RX_LEN_1518);
+		else if (length <= 1536)
+			mcr_new |= MAC_MCR_MAX_RX_LEN(MAC_MCR_MAX_RX_LEN_1536);
+		else if (length <= 1552)
+			mcr_new |= MAC_MCR_MAX_RX_LEN(MAC_MCR_MAX_RX_LEN_1552);
+		else
+			mcr_new |= MAC_MCR_MAX_RX_LEN(MAC_MCR_MAX_RX_LEN_2048);
+
+		/* Only update control register when needed! */
+		if (mcr_new != mcr_cur)
+			mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id));
+	}
+
+	dev->mtu = new_mtu;
+
+	return 0;
+}
+
 static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 {
 	struct mtk_mac *mac = netdev_priv(dev);
@@ -2795,6 +2828,7 @@ static const struct net_device_ops mtk_netdev_ops = {
 	.ndo_set_mac_address	= mtk_set_mac_address,
 	.ndo_validate_addr	= eth_validate_addr,
 	.ndo_do_ioctl		= mtk_do_ioctl,
+	.ndo_change_mtu		= mtk_change_mtu,
 	.ndo_tx_timeout		= mtk_tx_timeout,
 	.ndo_get_stats64        = mtk_get_stats64,
 	.ndo_fix_features	= mtk_fix_features,
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 454cfcd465fd..cfc11654ccd6 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -17,12 +17,12 @@
 #include <linux/phylink.h>
 
 #define MTK_QDMA_PAGE_SIZE	2048
-#define	MTK_MAX_RX_LENGTH	1536
+#define MTK_MAX_RX_LENGTH	2048
 #define MTK_TX_DMA_BUF_LEN	0x3fff
 #define MTK_DMA_SIZE		256
 #define MTK_NAPI_WEIGHT		64
 #define MTK_MAC_COUNT		2
-#define MTK_RX_ETH_HLEN		(VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
+#define MTK_RX_ETH_HLEN		(ETH_HLEN + ETH_FCS_LEN)
 #define MTK_RX_HLEN		(NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN)
 #define MTK_DMA_DUMMY_DESC	0xffffffff
 #define MTK_DEFAULT_MSG_ENABLE	(NETIF_MSG_DRV | \
@@ -320,7 +320,12 @@
 
 /* Mac control registers */
 #define MTK_MAC_MCR(x)		(0x10100 + (x * 0x100))
-#define MAC_MCR_MAX_RX_1536	BIT(24)
+#define MAC_MCR_MAX_RX_LEN_MASK	GENMASK(25, 24)
+#define MAC_MCR_MAX_RX_LEN(_x)	(MAC_MCR_MAX_RX_LEN_MASK & ((_x) << 24))
+#define MAC_MCR_MAX_RX_LEN_1518	0x0
+#define MAC_MCR_MAX_RX_LEN_1536	0x1
+#define MAC_MCR_MAX_RX_LEN_1552	0x2
+#define MAC_MCR_MAX_RX_LEN_2048	0x3
 #define MAC_MCR_IPG_CFG		(BIT(18) | BIT(16))
 #define MAC_MCR_FORCE_MODE	BIT(15)
 #define MAC_MCR_TX_EN		BIT(14)
-- 
2.25.1


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^ permalink raw reply related	[flat|nested] 2+ messages in thread
* Re: [PATCH net-next] net: ethernet: mediatek: support setting MTU
  2020-11-23  3:45 [PATCH net-next] net: ethernet: mediatek: support setting MTU DENG Qingfang
@ 2020-11-24 22:54 ` Jakub Kicinski
  0 siblings, 0 replies; 2+ messages in thread
From: Jakub Kicinski @ 2020-11-24 22:54 UTC (permalink / raw)
  To: DENG Qingfang
  Cc: Andrew Lunn, Frank Wunderlich, netdev, Sean Wang, Russell King,
	Mark Lee, Rene van Dorst, linux-mediatek, John Crispin,
	Matthias Brugger, David Woodhouse, David S . Miller,
	linux-arm-kernel, Felix Fietkau

On Mon, 23 Nov 2020 11:45:22 +0800 DENG Qingfang wrote:
> MT762x HW, except for MT7628, supports frame length up to 2048
> (maximum length on GDM), so allow setting MTU up to 2030.
> 
> Signed-off-by: DENG Qingfang <dqfext@gmail.com>

> diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> index 6d2d60675ffd..27cae3f43972 100644
> --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> @@ -353,7 +353,7 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode,
>  	/* Setup gmac */
>  	mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
>  	mcr_new = mcr_cur;
> -	mcr_new |= MAC_MCR_MAX_RX_1536 | MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
> +	mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |

This also changes the default MAX_RX from 1536 to 1518 (0).

I think you should at least mention this in the commit message.

>  		   MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK;
>  
>  	/* Only update control register when needed! */

> @@ -320,7 +320,12 @@
>  
>  /* Mac control registers */
>  #define MTK_MAC_MCR(x)		(0x10100 + (x * 0x100))
> -#define MAC_MCR_MAX_RX_1536	BIT(24)
> +#define MAC_MCR_MAX_RX_LEN_MASK	GENMASK(25, 24)
> +#define MAC_MCR_MAX_RX_LEN(_x)	(MAC_MCR_MAX_RX_LEN_MASK & ((_x) << 24))
> +#define MAC_MCR_MAX_RX_LEN_1518	0x0
> +#define MAC_MCR_MAX_RX_LEN_1536	0x1
> +#define MAC_MCR_MAX_RX_LEN_1552	0x2
> +#define MAC_MCR_MAX_RX_LEN_2048	0x3
>  #define MAC_MCR_IPG_CFG		(BIT(18) | BIT(16))
>  #define MAC_MCR_FORCE_MODE	BIT(15)
>  #define MAC_MCR_TX_EN		BIT(14)


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2020-11-24 22:54 ` Jakub Kicinski

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