* [PATCH v8 0/2] Add basic SoC support for mediatek mt7986 @ 2021-11-22 12:32 Sam Shih 2021-11-22 12:32 ` [PATCH v8 1/2] dt-bindings: arm64: dts: mediatek: Add mt7986 series Sam Shih 2021-11-22 12:32 ` [PATCH v8 2/2] arm64: dts: mediatek: add basic mt7986 support Sam Shih 0 siblings, 2 replies; 7+ messages in thread From: Sam Shih @ 2021-11-22 12:32 UTC (permalink / raw) To: Rob Herring, Matthias Brugger, Hsin-Yi Wang, Enric Balletbo i Serra, Fabien Parent, Seiya Wang, Sean Wang, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Cc: John Crispin, Ryder Lee, Sam Shih This patch adds basic SoC support for Mediatek's new 4-core SoC, MT7986, which is mainly for wifi-router application. The MT7986 series includes mt7986a and mt7986b, The difference is that some pins do not exist on mt7986b (two pinctrls compatible string are required), But the basic part of the device tree should be the same, So we only add mt7986a in this basic part patch series. We will separate mt7986a and mt7986b in the pinctrl patch series --- v8: updated dts v7: added memory node back to dts v6: separate basic part into a single patch series According to the maintainer’s suggestion, this patch splits the previous thread into independent patch series. This patch include basic device support. Original thread: https://lore.kernel.org/all/20210914085137.31761-1-sam.shih@mediatek.com/ Sam Shih (2): dt-bindings: arm64: dts: mediatek: Add mt7986 series arm64: dts: mediatek: add basic mt7986 support .../devicetree/bindings/arm/mediatek.yaml | 8 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 37 +++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 148 ++++++++++++++++++ 4 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a.dtsi -- 2.29.2 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v8 1/2] dt-bindings: arm64: dts: mediatek: Add mt7986 series 2021-11-22 12:32 [PATCH v8 0/2] Add basic SoC support for mediatek mt7986 Sam Shih @ 2021-11-22 12:32 ` Sam Shih 2021-12-15 19:31 ` Matthias Brugger 2021-12-15 19:31 ` Matthias Brugger 2021-11-22 12:32 ` [PATCH v8 2/2] arm64: dts: mediatek: add basic mt7986 support Sam Shih 1 sibling, 2 replies; 7+ messages in thread From: Sam Shih @ 2021-11-22 12:32 UTC (permalink / raw) To: Rob Herring, Matthias Brugger, Hsin-Yi Wang, Enric Balletbo i Serra, Fabien Parent, Seiya Wang, Sean Wang, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Cc: John Crispin, Ryder Lee, Sam Shih MT7986 series is Mediatek's new 4-core SoC, which is mainly for wifi-router application. The difference between mt7986a and mt7986b is that some pins do not exist on mt7986b. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> --- v6: separate basic part into a single patch series Original thread: https://lore.kernel.org/all/315d7823aa108c909a3d36464fe54763b76ab2f4.camel@mediatek.com/ v3: changed 'MT7986' to 'MT7986 series' in the commit message v2: added an Acked-by tag --- Documentation/devicetree/bindings/arm/mediatek.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 80a05f6fee85..a9a778269684 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -76,6 +76,14 @@ properties: - enum: - mediatek,mt7629-rfb - const: mediatek,mt7629 + - items: + - enum: + - mediatek,mt7986a-rfb + - const: mediatek,mt7986a + - items: + - enum: + - mediatek,mt7986b-rfb + - const: mediatek,mt7986b - items: - enum: - mediatek,mt8127-moose -- 2.29.2 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v8 1/2] dt-bindings: arm64: dts: mediatek: Add mt7986 series 2021-11-22 12:32 ` [PATCH v8 1/2] dt-bindings: arm64: dts: mediatek: Add mt7986 series Sam Shih @ 2021-12-15 19:31 ` Matthias Brugger 2021-12-15 19:31 ` Matthias Brugger 1 sibling, 0 replies; 7+ messages in thread From: Matthias Brugger @ 2021-12-15 19:31 UTC (permalink / raw) To: Sam Shih, Rob Herring, Hsin-Yi Wang, Enric Balletbo i Serra, Fabien Parent, Seiya Wang, Sean Wang, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Cc: John Crispin, Ryder Lee On 22/11/2021 13:32, Sam Shih wrote: > MT7986 series is Mediatek's new 4-core SoC, which is mainly > for wifi-router application. The difference between mt7986a and mt7986b > is that some pins do not exist on mt7986b. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > Acked-by: Rob Herring <robh@kernel.org> > Applied to v5.16-next/dts64 > --- > v6: separate basic part into a single patch series > > Original thread: > https://lore.kernel.org/all/315d7823aa108c909a3d36464fe54763b76ab2f4.camel@mediatek.com/ > > v3: changed 'MT7986' to 'MT7986 series' in the commit message > v2: added an Acked-by tag > --- > Documentation/devicetree/bindings/arm/mediatek.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml > index 80a05f6fee85..a9a778269684 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek.yaml > +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml > @@ -76,6 +76,14 @@ properties: > - enum: > - mediatek,mt7629-rfb > - const: mediatek,mt7629 > + - items: > + - enum: > + - mediatek,mt7986a-rfb > + - const: mediatek,mt7986a > + - items: > + - enum: > + - mediatek,mt7986b-rfb > + - const: mediatek,mt7986b > - items: > - enum: > - mediatek,mt8127-moose > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v8 1/2] dt-bindings: arm64: dts: mediatek: Add mt7986 series 2021-11-22 12:32 ` [PATCH v8 1/2] dt-bindings: arm64: dts: mediatek: Add mt7986 series Sam Shih 2021-12-15 19:31 ` Matthias Brugger @ 2021-12-15 19:31 ` Matthias Brugger 1 sibling, 0 replies; 7+ messages in thread From: Matthias Brugger @ 2021-12-15 19:31 UTC (permalink / raw) To: Sam Shih, Rob Herring, Hsin-Yi Wang, Enric Balletbo i Serra, Fabien Parent, Seiya Wang, Sean Wang, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Cc: John Crispin, Ryder Lee On 22/11/2021 13:32, Sam Shih wrote: > MT7986 series is Mediatek's new 4-core SoC, which is mainly > for wifi-router application. The difference between mt7986a and mt7986b > is that some pins do not exist on mt7986b. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > Acked-by: Rob Herring <robh@kernel.org> > Applied to v5.16-next/dts64 > --- > v6: separate basic part into a single patch series > > Original thread: > https://lore.kernel.org/all/315d7823aa108c909a3d36464fe54763b76ab2f4.camel@mediatek.com/ > > v3: changed 'MT7986' to 'MT7986 series' in the commit message > v2: added an Acked-by tag > --- > Documentation/devicetree/bindings/arm/mediatek.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml > index 80a05f6fee85..a9a778269684 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek.yaml > +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml > @@ -76,6 +76,14 @@ properties: > - enum: > - mediatek,mt7629-rfb > - const: mediatek,mt7629 > + - items: > + - enum: > + - mediatek,mt7986a-rfb > + - const: mediatek,mt7986a > + - items: > + - enum: > + - mediatek,mt7986b-rfb > + - const: mediatek,mt7986b > - items: > - enum: > - mediatek,mt8127-moose > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v8 2/2] arm64: dts: mediatek: add basic mt7986 support 2021-11-22 12:32 [PATCH v8 0/2] Add basic SoC support for mediatek mt7986 Sam Shih 2021-11-22 12:32 ` [PATCH v8 1/2] dt-bindings: arm64: dts: mediatek: Add mt7986 series Sam Shih @ 2021-11-22 12:32 ` Sam Shih 2021-12-15 19:30 ` Matthias Brugger 2021-12-15 19:33 ` Matthias Brugger 1 sibling, 2 replies; 7+ messages in thread From: Sam Shih @ 2021-11-22 12:32 UTC (permalink / raw) To: Rob Herring, Matthias Brugger, Hsin-Yi Wang, Enric Balletbo i Serra, Fabien Parent, Seiya Wang, Sean Wang, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Cc: John Crispin, Ryder Lee, Sam Shih Add basic chip support for Mediatek mt7986, include basic uart nodes, rng node and watchdog node. Add cpu node, timer node, gic node, psci and reserved-memory node for ARM Trusted Firmware. Signed-off-by: Sam Shih <sam.shih@mediatek.com> --- v8: removed debug bootargs v7: added memory node back to dts v6: removed clock and pinctrl node, to separate basic part into a single patch series Original thread: https://lore.kernel.org/all/20211004124155.1404-1-sam.shih@mediatek.com/ v5: follow reviewr's comment: removed clock freqency node in timer due to we have set CNTFRQ_EL0 in ATF firmware, and also corrected GICD range v4: added missing gic register bases, and fixed range of GICR v3: used the stdout-path instead of console=ttyS0 v2: modified clock and uart node due to clock driver updated --- arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 37 +++++ arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 148 +++++++++++++++++++ 3 files changed, 186 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 4f68ebed2e31..e6c3a73b9e4a 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts new file mode 100644 index 000000000000..6911862390d7 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Author: Sam.Shih <sam.shih@mediatek.com> + */ + +/dts-v1/; +#include "mt7986a.dtsi" + +/ { + model = "MediaTek MT7986a RFB"; + compatible = "mediatek,mt7986a-rfb"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0 0x40000000 0 0x40000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi new file mode 100644 index 000000000000..77906839cc85 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2021 MediaTek Inc. + * Author: Sam.Shih <sam.shih@mediatek.com> + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + system_clk: dummy40m { + compatible = "fixed-clock"; + clock-frequency = <40000000>; + #clock-cells = <0>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x0>; + #cooling-cells = <2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x1>; + #cooling-cells = <2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x2>; + #cooling-cells = <2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + enable-method = "psci"; + compatible = "arm,cortex-a53"; + reg = <0x3>; + #cooling-cells = <2>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ + secmon_reserved: secmon@43000000 { + reg = <0 0x43000000 0 0x30000>; + no-map; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + gic: interrupt-controller@c000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + interrupt-controller; + reg = <0 0x0c000000 0 0x10000>, /* GICD */ + <0 0x0c080000 0 0x80000>, /* GICR */ + <0 0x0c400000 0 0x2000>, /* GICC */ + <0 0x0c410000 0 0x1000>, /* GICH */ + <0 0x0c420000 0 0x2000>; /* GICV */ + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + }; + + watchdog: watchdog@1001c000 { + compatible = "mediatek,mt7986-wdt", + "mediatek,mt6589-wdt"; + reg = <0 0x1001c000 0 0x1000>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + #reset-cells = <1>; + status = "disabled"; + }; + + trng: trng@1020f000 { + compatible = "mediatek,mt7986-rng", + "mediatek,mt7623-rng"; + reg = <0 0x1020f000 0 0x100>; + clocks = <&system_clk>; + clock-names = "rng"; + status = "disabled"; + }; + + uart0: serial@11002000 { + compatible = "mediatek,mt7986-uart", + "mediatek,mt6577-uart"; + reg = <0 0x11002000 0 0x400>; + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&system_clk>; + status = "disabled"; + }; + + uart1: serial@11003000 { + compatible = "mediatek,mt7986-uart", + "mediatek,mt6577-uart"; + reg = <0 0x11003000 0 0x400>; + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&system_clk>; + status = "disabled"; + }; + + uart2: serial@11004000 { + compatible = "mediatek,mt7986-uart", + "mediatek,mt6577-uart"; + reg = <0 0x11004000 0 0x400>; + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&system_clk>; + status = "disabled"; + }; + + }; + +}; -- 2.29.2 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v8 2/2] arm64: dts: mediatek: add basic mt7986 support 2021-11-22 12:32 ` [PATCH v8 2/2] arm64: dts: mediatek: add basic mt7986 support Sam Shih @ 2021-12-15 19:30 ` Matthias Brugger 2021-12-15 19:33 ` Matthias Brugger 1 sibling, 0 replies; 7+ messages in thread From: Matthias Brugger @ 2021-12-15 19:30 UTC (permalink / raw) To: Sam Shih, Rob Herring, Hsin-Yi Wang, Enric Balletbo i Serra, Fabien Parent, Seiya Wang, Sean Wang, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Cc: John Crispin, Ryder Lee On 22/11/2021 13:32, Sam Shih wrote: > Add basic chip support for Mediatek mt7986, include > basic uart nodes, rng node and watchdog node. > > Add cpu node, timer node, gic node, psci and reserved-memory node > for ARM Trusted Firmware. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > Applied to v5.16-next/dts64 Thanks! > --- > v8: removed debug bootargs > v7: added memory node back to dts > v6: removed clock and pinctrl node, to separate basic part into a single > patch series > > Original thread: > https://lore.kernel.org/all/20211004124155.1404-1-sam.shih@mediatek.com/ > > v5: follow reviewr's comment: removed clock freqency node in timer due to > we have set CNTFRQ_EL0 in ATF firmware, and also corrected GICD range > v4: added missing gic register bases, and fixed range of GICR > v3: used the stdout-path instead of console=ttyS0 > v2: modified clock and uart node due to clock driver updated > --- > arch/arm64/boot/dts/mediatek/Makefile | 1 + > arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 37 +++++ > arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 148 +++++++++++++++++++ > 3 files changed, 186 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a.dtsi > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > index 4f68ebed2e31..e6c3a73b9e4a 100644 > --- a/arch/arm64/boot/dts/mediatek/Makefile > +++ b/arch/arm64/boot/dts/mediatek/Makefile > @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts > new file mode 100644 > index 000000000000..6911862390d7 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts > @@ -0,0 +1,37 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/* > + * Copyright (C) 2021 MediaTek Inc. > + * Author: Sam.Shih <sam.shih@mediatek.com> > + */ > + > +/dts-v1/; > +#include "mt7986a.dtsi" > + > +/ { > + model = "MediaTek MT7986a RFB"; > + compatible = "mediatek,mt7986a-rfb"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + memory { > + reg = <0 0x40000000 0 0x40000000>; > + }; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > +&uart1 { > + status = "okay"; > +}; > + > +&uart2 { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > new file mode 100644 > index 000000000000..77906839cc85 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > @@ -0,0 +1,148 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/* > + * Copyright (C) 2021 MediaTek Inc. > + * Author: Sam.Shih <sam.shih@mediatek.com> > + */ > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + system_clk: dummy40m { > + compatible = "fixed-clock"; > + clock-frequency = <40000000>; > + #clock-cells = <0>; > + }; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + enable-method = "psci"; > + reg = <0x0>; > + #cooling-cells = <2>; > + }; > + > + cpu1: cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + enable-method = "psci"; > + reg = <0x1>; > + #cooling-cells = <2>; > + }; > + > + cpu2: cpu@2 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + enable-method = "psci"; > + reg = <0x2>; > + #cooling-cells = <2>; > + }; > + > + cpu3: cpu@3 { > + device_type = "cpu"; > + enable-method = "psci"; > + compatible = "arm,cortex-a53"; > + reg = <0x3>; > + #cooling-cells = <2>; > + }; > + }; > + > + psci { > + compatible = "arm,psci-0.2"; > + method = "smc"; > + }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ > + secmon_reserved: secmon@43000000 { > + reg = <0 0x43000000 0 0x30000>; > + no-map; > + }; > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupt-parent = <&gic>; > + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, > + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, > + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, > + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; > + }; > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "simple-bus"; > + ranges; > + > + gic: interrupt-controller@c000000 { > + compatible = "arm,gic-v3"; > + #interrupt-cells = <3>; > + interrupt-parent = <&gic>; > + interrupt-controller; > + reg = <0 0x0c000000 0 0x10000>, /* GICD */ > + <0 0x0c080000 0 0x80000>, /* GICR */ > + <0 0x0c400000 0 0x2000>, /* GICC */ > + <0 0x0c410000 0 0x1000>, /* GICH */ > + <0 0x0c420000 0 0x2000>; /* GICV */ > + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + watchdog: watchdog@1001c000 { > + compatible = "mediatek,mt7986-wdt", > + "mediatek,mt6589-wdt"; > + reg = <0 0x1001c000 0 0x1000>; > + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; > + #reset-cells = <1>; > + status = "disabled"; > + }; > + > + trng: trng@1020f000 { > + compatible = "mediatek,mt7986-rng", > + "mediatek,mt7623-rng"; > + reg = <0 0x1020f000 0 0x100>; > + clocks = <&system_clk>; > + clock-names = "rng"; > + status = "disabled"; > + }; > + > + uart0: serial@11002000 { > + compatible = "mediatek,mt7986-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11002000 0 0x400>; > + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&system_clk>; > + status = "disabled"; > + }; > + > + uart1: serial@11003000 { > + compatible = "mediatek,mt7986-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11003000 0 0x400>; > + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&system_clk>; > + status = "disabled"; > + }; > + > + uart2: serial@11004000 { > + compatible = "mediatek,mt7986-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11004000 0 0x400>; > + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&system_clk>; > + status = "disabled"; > + }; > + > + }; > + > +}; > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v8 2/2] arm64: dts: mediatek: add basic mt7986 support 2021-11-22 12:32 ` [PATCH v8 2/2] arm64: dts: mediatek: add basic mt7986 support Sam Shih 2021-12-15 19:30 ` Matthias Brugger @ 2021-12-15 19:33 ` Matthias Brugger 1 sibling, 0 replies; 7+ messages in thread From: Matthias Brugger @ 2021-12-15 19:33 UTC (permalink / raw) To: Sam Shih, Rob Herring, Hsin-Yi Wang, Enric Balletbo i Serra, Fabien Parent, Seiya Wang, Sean Wang, devicetree, linux-kernel, linux-arm-kernel, linux-mediatek Cc: John Crispin, Ryder Lee On 22/11/2021 13:32, Sam Shih wrote: > Add basic chip support for Mediatek mt7986, include > basic uart nodes, rng node and watchdog node. > > Add cpu node, timer node, gic node, psci and reserved-memory node > for ARM Trusted Firmware. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > > --- > v8: removed debug bootargs > v7: added memory node back to dts > v6: removed clock and pinctrl node, to separate basic part into a single > patch series > > Original thread: > https://lore.kernel.org/all/20211004124155.1404-1-sam.shih@mediatek.com/ > > v5: follow reviewr's comment: removed clock freqency node in timer due to > we have set CNTFRQ_EL0 in ATF firmware, and also corrected GICD range > v4: added missing gic register bases, and fixed range of GICR > v3: used the stdout-path instead of console=ttyS0 > v2: modified clock and uart node due to clock driver updated > --- > arch/arm64/boot/dts/mediatek/Makefile | 1 + > arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 37 +++++ > arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 148 +++++++++++++++++++ > 3 files changed, 186 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a.dtsi > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > index 4f68ebed2e31..e6c3a73b9e4a 100644 > --- a/arch/arm64/boot/dts/mediatek/Makefile > +++ b/arch/arm64/boot/dts/mediatek/Makefile > @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts > new file mode 100644 > index 000000000000..6911862390d7 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts > @@ -0,0 +1,37 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/* > + * Copyright (C) 2021 MediaTek Inc. > + * Author: Sam.Shih <sam.shih@mediatek.com> > + */ > + > +/dts-v1/; > +#include "mt7986a.dtsi" > + > +/ { > + model = "MediaTek MT7986a RFB"; > + compatible = "mediatek,mt7986a-rfb"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + memory { > + reg = <0 0x40000000 0 0x40000000>; Should be: memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x40000000>; }; Please send a follow-up patch for that. Regards, Matthias > + }; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > +&uart1 { > + status = "okay"; > +}; > + > +&uart2 { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > new file mode 100644 > index 000000000000..77906839cc85 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > @@ -0,0 +1,148 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/* > + * Copyright (C) 2021 MediaTek Inc. > + * Author: Sam.Shih <sam.shih@mediatek.com> > + */ > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + system_clk: dummy40m { > + compatible = "fixed-clock"; > + clock-frequency = <40000000>; > + #clock-cells = <0>; > + }; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + enable-method = "psci"; > + reg = <0x0>; > + #cooling-cells = <2>; > + }; > + > + cpu1: cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + enable-method = "psci"; > + reg = <0x1>; > + #cooling-cells = <2>; > + }; > + > + cpu2: cpu@2 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + enable-method = "psci"; > + reg = <0x2>; > + #cooling-cells = <2>; > + }; > + > + cpu3: cpu@3 { > + device_type = "cpu"; > + enable-method = "psci"; > + compatible = "arm,cortex-a53"; > + reg = <0x3>; > + #cooling-cells = <2>; > + }; > + }; > + > + psci { > + compatible = "arm,psci-0.2"; > + method = "smc"; > + }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ > + secmon_reserved: secmon@43000000 { > + reg = <0 0x43000000 0 0x30000>; > + no-map; > + }; > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupt-parent = <&gic>; > + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, > + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, > + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, > + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; > + }; > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "simple-bus"; > + ranges; > + > + gic: interrupt-controller@c000000 { > + compatible = "arm,gic-v3"; > + #interrupt-cells = <3>; > + interrupt-parent = <&gic>; > + interrupt-controller; > + reg = <0 0x0c000000 0 0x10000>, /* GICD */ > + <0 0x0c080000 0 0x80000>, /* GICR */ > + <0 0x0c400000 0 0x2000>, /* GICC */ > + <0 0x0c410000 0 0x1000>, /* GICH */ > + <0 0x0c420000 0 0x2000>; /* GICV */ > + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + watchdog: watchdog@1001c000 { > + compatible = "mediatek,mt7986-wdt", > + "mediatek,mt6589-wdt"; > + reg = <0 0x1001c000 0 0x1000>; > + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; > + #reset-cells = <1>; > + status = "disabled"; > + }; > + > + trng: trng@1020f000 { > + compatible = "mediatek,mt7986-rng", > + "mediatek,mt7623-rng"; > + reg = <0 0x1020f000 0 0x100>; > + clocks = <&system_clk>; > + clock-names = "rng"; > + status = "disabled"; > + }; > + > + uart0: serial@11002000 { > + compatible = "mediatek,mt7986-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11002000 0 0x400>; > + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&system_clk>; > + status = "disabled"; > + }; > + > + uart1: serial@11003000 { > + compatible = "mediatek,mt7986-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11003000 0 0x400>; > + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&system_clk>; > + status = "disabled"; > + }; > + > + uart2: serial@11004000 { > + compatible = "mediatek,mt7986-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x11004000 0 0x400>; > + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&system_clk>; > + status = "disabled"; > + }; > + > + }; > + > +}; > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-12-16 9:25 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-11-22 12:32 [PATCH v8 0/2] Add basic SoC support for mediatek mt7986 Sam Shih 2021-11-22 12:32 ` [PATCH v8 1/2] dt-bindings: arm64: dts: mediatek: Add mt7986 series Sam Shih 2021-12-15 19:31 ` Matthias Brugger 2021-12-15 19:31 ` Matthias Brugger 2021-11-22 12:32 ` [PATCH v8 2/2] arm64: dts: mediatek: add basic mt7986 support Sam Shih 2021-12-15 19:30 ` Matthias Brugger 2021-12-15 19:33 ` Matthias Brugger
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