* [PATCH 1/2] net: mt7531: only do PLL once after the reset
@ 2022-08-20 21:37 Alexander Couzens
2022-08-20 21:37 ` [PATCH 2/2] net: mt7531: ensure all MACs are powered down before reset Alexander Couzens
2022-08-23 10:58 ` [PATCH 1/2] net: mt7531: only do PLL once after the reset Paolo Abeni
0 siblings, 2 replies; 3+ messages in thread
From: Alexander Couzens @ 2022-08-20 21:37 UTC (permalink / raw)
To: Sean Wang, Landen Chao, DENG Qingfang
Cc: Andrew Lunn, David S . Miller, Daniel Golle, netdev,
linux-mediatek, linux-kernel, Alexander Couzens
Move the PLL init of the switch out of the pad configuration of the port
6 (usally cpu port).
Fix a unidirectional 100 mbit limitation on 1 gbit or 2.5 gbit links for
outbound traffic on port 5 or port 6.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
---
drivers/net/dsa/mt7530.c | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 835807911be0..95a57aeb466e 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -506,14 +506,19 @@ static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv)
static int
mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
{
- struct mt7530_priv *priv = ds->priv;
+ return 0;
+}
+
+static void
+mt7531_pll_setup(struct mt7530_priv *priv)
+{
u32 top_sig;
u32 hwstrap;
u32 xtal;
u32 val;
if (mt7531_dual_sgmii_supported(priv))
- return 0;
+ return;
val = mt7530_read(priv, MT7531_CREV);
top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);
@@ -592,8 +597,6 @@ mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
val |= EN_COREPLL;
mt7530_write(priv, MT7531_PLLGP_EN, val);
usleep_range(25, 35);
-
- return 0;
}
static void
@@ -2331,6 +2334,8 @@ mt7531_setup(struct dsa_switch *ds)
SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
SYS_CTRL_REG_RST);
+ mt7531_pll_setup(priv);
+
if (mt7531_dual_sgmii_supported(priv)) {
priv->p5_intf_sel = P5_INTF_SEL_GMAC5_SGMII;
@@ -2887,8 +2892,6 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int port)
case 6:
interface = PHY_INTERFACE_MODE_2500BASEX;
- mt7531_pad_setup(ds, interface);
-
priv->p6_interface = interface;
break;
default:
--
2.35.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] net: mt7531: ensure all MACs are powered down before reset
2022-08-20 21:37 [PATCH 1/2] net: mt7531: only do PLL once after the reset Alexander Couzens
@ 2022-08-20 21:37 ` Alexander Couzens
2022-08-23 10:58 ` [PATCH 1/2] net: mt7531: only do PLL once after the reset Paolo Abeni
1 sibling, 0 replies; 3+ messages in thread
From: Alexander Couzens @ 2022-08-20 21:37 UTC (permalink / raw)
To: Sean Wang, Landen Chao, DENG Qingfang
Cc: Andrew Lunn, David S . Miller, Daniel Golle, netdev,
linux-mediatek, linux-kernel, Alexander Couzens
The datasheet [1] explicit describes it as requirement for a reset.
[1] MT7531 Reference Manual for Development Board rev 1.0, page 735
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
---
drivers/net/dsa/mt7530.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 95a57aeb466e..409d5c3d76ea 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2329,6 +2329,10 @@ mt7531_setup(struct dsa_switch *ds)
return -ENODEV;
}
+ /* all MACs must be forced link-down before sw reset */
+ for (i = 0; i < MT7530_NUM_PORTS; i++)
+ mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
+
/* Reset the switch through internal reset */
mt7530_write(priv, MT7530_SYS_CTRL,
SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
--
2.35.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] net: mt7531: only do PLL once after the reset
2022-08-20 21:37 [PATCH 1/2] net: mt7531: only do PLL once after the reset Alexander Couzens
2022-08-20 21:37 ` [PATCH 2/2] net: mt7531: ensure all MACs are powered down before reset Alexander Couzens
@ 2022-08-23 10:58 ` Paolo Abeni
1 sibling, 0 replies; 3+ messages in thread
From: Paolo Abeni @ 2022-08-23 10:58 UTC (permalink / raw)
To: Alexander Couzens, Sean Wang, Landen Chao, DENG Qingfang
Cc: Andrew Lunn, David S . Miller, Daniel Golle, netdev,
linux-mediatek, linux-kernel
On Sat, 2022-08-20 at 23:37 +0200, Alexander Couzens wrote:
> Move the PLL init of the switch out of the pad configuration of the port
> 6 (usally cpu port).
>
> Fix a unidirectional 100 mbit limitation on 1 gbit or 2.5 gbit links for
> outbound traffic on port 5 or port 6.
>
> Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
This (and the next patch) looks like a fix suitable for -net. Could you
please re-post, targeting the appropriate tree and more importantly
including a 'Fixes' tag in the commit message of each patch?
Thanks!
Paolo
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-08-23 10:58 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-08-20 21:37 [PATCH 1/2] net: mt7531: only do PLL once after the reset Alexander Couzens
2022-08-20 21:37 ` [PATCH 2/2] net: mt7531: ensure all MACs are powered down before reset Alexander Couzens
2022-08-23 10:58 ` [PATCH 1/2] net: mt7531: only do PLL once after the reset Paolo Abeni
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).