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From: Huacai Chen <chenhc@lemote.com>
To: Ralf Baechle <ralf@linux-mips.org>, James Hogan <jhogan@kernel.org>
Cc: Paul Burton <paul.burton@mips.com>,
	linux-mips@linux-mips.org, linux-mips@vger.kernel.org,
	Fuxin Zhang <zhangfx@lemote.com>,
	Zhangjin Wu <wuzhangjin@gmail.com>,
	Huacai Chen <chenhuacai@gmail.com>,
	Huacai Chen <chenhc@lemote.com>
Subject: [PATCH 3/3] MIPS: Loongson: Unify LOONGSON3/LOONGSON64 Kconfig usage
Date: Sun,  3 Nov 2019 13:20:17 +0800	[thread overview]
Message-ID: <1572758417-29265-3-git-send-email-chenhc@lemote.com> (raw)
In-Reply-To: <1572758417-29265-1-git-send-email-chenhc@lemote.com>

There are mixed LOONGSON3/LOONGSON64 usages in recently changes, let's
establish some rules:

1, In Kconfig symbols, we only use CPU_LOONGSON64, MACH_LOONGSON64 and
SYS_HAS_CPU_LOONGSON64, all other derived symbols use "LOONGSON3" since
they all not widely-used symbols and sometimes not suitable for all
64-bit Loongson processors. E.g., we use symbols LOONGSON3_ENHANCEMENT,
CPU_LOONGSON3_WORKAROUNDS, etc.

2, Hide GSx64/GSx64E in Kconfig title since it is not useful for
general users. However, in the full description we use a more detailed
manner. E.g., GS264/GS464/GS464E/GS464V.

All Kconfig titles and descriptions of Loongson processors and machines
have also been updated in this patch for consistency.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/Kconfig               | 39 +++++++++++++++++++++++----------------
 arch/mips/include/asm/hazards.h |  4 ++--
 arch/mips/loongson64/Kconfig    |  2 +-
 3 files changed, 26 insertions(+), 19 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b578eae..13bd1d2 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -444,7 +444,7 @@ config LASAT
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config MACH_LOONGSON32
-	bool "Loongson-1 family of machines"
+	bool "Loongson 32-bit family of machines"
 	select SYS_SUPPORTS_ZBOOT
 	help
 	  This enables support for the Loongson-1 family of machines.
@@ -454,7 +454,7 @@ config MACH_LOONGSON32
 	  Sciences (CAS).
 
 config MACH_LOONGSON64
-	bool "Loongson-2/3 GSx64 family of machines"
+	bool "Loongson 64-bit family of machines"
 	select ARCH_SPARSEMEM_ENABLE
 	select ARCH_MIGHT_HAVE_PC_PARPORT
 	select ARCH_MIGHT_HAVE_PC_SERIO
@@ -483,8 +483,12 @@ config MACH_LOONGSON64
 	select ZONE_DMA32
 	select NUMA
 	help
-	  This enables the support of Loongson-2/3 family of processors with
-	  GSx64 microarchitecture.
+	  This enables the support of Loongson-2/3 family of machines.
+
+	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
+	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
+	  and Loongson-2F which have been removed), developed by the Institute
+	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
 
 config MACH_PISTACHIO
 	bool "IMG Pistachio SoC based boards"
@@ -1425,7 +1429,7 @@ choice
 	default CPU_R4X00
 
 config CPU_LOONGSON64
-	bool "Loongson GSx64 CPU"
+	bool "Loongson 64-bit CPU"
 	depends on SYS_HAS_CPU_LOONGSON64
 	select ARCH_HAS_PHYS_TO_DMA
 	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1441,17 +1445,20 @@ config CPU_LOONGSON64
 	select GPIOLIB
 	select SWIOTLB
 	help
-		The Loongson GSx64 series of processor cores implements the
-		MIPS64R2 instruction set with many extensions.
+		The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
+		cores implements the MIPS64R2 instruction set with many extensions,
+		including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
+		3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
+		Loongson-2E and Loongson-2F have been removed now.
 
-config LOONGSON64_ENHANCEMENT
-	bool "New Loongson GSx64E CPU Enhancements"
+config LOONGSON3_ENHANCEMENT
+	bool "New Loongson-3 CPU Enhancements"
 	default n
 	select CPU_MIPSR2
 	select CPU_HAS_PREFETCH
 	depends on CPU_LOONGSON64
 	help
-	  New Loongson GSx64E cores (since Loongson-3A R2, as opposed to Loongson-3A
+	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
 	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
 	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
 	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
@@ -1460,17 +1467,17 @@ config LOONGSON64_ENHANCEMENT
 	  This option enable those enhancements which are not probed at run
 	  time. If you want a generic kernel to run on all Loongson 3 machines,
 	  please say 'N' here. If you want a high-performance kernel to run on
-	  new Loongson 3 machines only, please say 'Y' here.
+	  new Loongson-3 machines only, please say 'Y' here.
 
 config CPU_LOONGSON3_WORKAROUNDS
-	bool "Old Loongson 3 LLSC Workarounds"
+	bool "Old Loongson-3 LLSC Workarounds"
 	default y if SMP
 	depends on CPU_LOONGSON64
 	help
-	  Loongson 3 processors have the llsc issues which require workarounds.
+	  Loongson-3 processors have the llsc issues which require workarounds.
 	  Without workarounds the system may hang unexpectedly.
 
-	  Newer Loongson 3 will fix these issues and no workarounds are needed.
+	  Newer Loongson-3 will fix these issues and no workarounds are needed.
 	  The workarounds have no significant side effect on them but may
 	  decrease the performance of the system so this option should be
 	  disabled unless the kernel is intended to be run on old systems.
@@ -1478,7 +1485,7 @@ config CPU_LOONGSON3_WORKAROUNDS
 	  If unsure, please say Y.
 
 config CPU_LOONGSON1B
-	bool "Loongson 1B"
+	bool "Loongson 1B CPU"
 	depends on SYS_HAS_CPU_LOONGSON1B
 	select CPU_LOONGSON32
 	select LEDS_GPIO_REGISTER
@@ -1488,7 +1495,7 @@ config CPU_LOONGSON1B
 	  instruction set.
 
 config CPU_LOONGSON1C
-	bool "Loongson 1C"
+	bool "Loongson 1C CPU"
 	depends on SYS_HAS_CPU_LOONGSON1C
 	select CPU_LOONGSON32
 	select LEDS_GPIO_REGISTER
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index dbe2a30..d1ec7ea 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -23,7 +23,7 @@
  * TLB hazards
  */
 #if (defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)) && \
-	!defined(CONFIG_CPU_CAVIUM_OCTEON) && !defined(CONFIG_LOONGSON64_ENHANCEMENT)
+	!defined(CONFIG_CPU_CAVIUM_OCTEON) && !defined(CONFIG_LOONGSON3_ENHANCEMENT)
 
 /*
  * MIPSR2 defines ehb for hazard avoidance
@@ -159,7 +159,7 @@ do {									\
 
 #elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
 	defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_XLR) || \
-	defined(CONFIG_LOONGSON64_ENHANCEMENT)
+	defined(CONFIG_LOONGSON3_ENHANCEMENT)
 
 /*
  * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
diff --git a/arch/mips/loongson64/Kconfig b/arch/mips/loongson64/Kconfig
index b1aefd0..48b29c1 100644
--- a/arch/mips/loongson64/Kconfig
+++ b/arch/mips/loongson64/Kconfig
@@ -3,7 +3,7 @@ if MACH_LOONGSON64
 
 config RS780_HPET
 	bool "RS780/SBX00 HPET Timer"
-	depends on CONFIG_MACH_LOONGSON64
+	depends on MACH_LOONGSON64
 	select MIPS_EXTERNAL_TIMER
 	help
 	  This option enables the hpet timer of AMD RS780/SBX00.
-- 
2.7.0


  parent reply	other threads:[~2019-11-03  5:19 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1572758417-29265-1-git-send-email-chenhc@lemote.com>
2019-11-03  5:20 ` [PATCH 2/3] MIPS: Loongson: Rename LOONGSON1 to LOONGSON32 Huacai Chen
2019-11-03 11:26   ` Huacai Chen
2019-11-03  5:20 ` Huacai Chen [this message]
2019-11-03  5:35   ` [PATCH 3/3] MIPS: Loongson: Unify LOONGSON3/LOONGSON64 Kconfig usage Jiaxun Yang
2019-11-03 23:08 ` [PATCH 1/3] MIPS: Loongson: Remove Loongson-2E/2F support Maciej W. Rozycki
2019-11-04  6:05   ` Huacai Chen
2019-11-05 13:54   ` Jiaxun Yang
2020-02-26  2:38     ` Maciej W. Rozycki
2019-11-04 19:03 ` Paul Burton
2019-11-05  1:14   ` Huacai Chen

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