* [PATCH 0/3] MIPS: random Alchemy stuff
@ 2017-02-14 12:03 Manuel Lauss
2017-02-14 12:03 ` [PATCH 1/3] MIPS: Alchemy: add devboard machine type to cpuinfo Manuel Lauss
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Manuel Lauss @ 2017-02-14 12:03 UTC (permalink / raw)
To: Linux-MIPS; +Cc: James Hogan, Ralf Baechle, Manuel Lauss
Random inoffensive stuff I accumulated during the last year:
- threaded carddetect interrupts for devboard pcmcia and mmc sockets
- updated cpu feature overrides (the patch shaves about 40kB off
db1xxx defconfig)
- add machine info to /proc/cpuinfo output
All tested with 4.10-rc7 on db1100/db1200/db1300 and db1500.
Thanks!
Manuel
Manuel Lauss (3):
MIPS: Alchemy: add machine type to cpuinfo
MIPS: Alchemy: update cpu feature overrides
MIPS: Alchemy: Threaded carddetect irqs for devboards
arch/mips/alchemy/devboards/db1200.c | 64 ++++++++++++----------
arch/mips/alchemy/devboards/db1300.c | 31 ++++++-----
arch/mips/alchemy/devboards/db1xxx.c | 2 +
.../asm/mach-au1x00/cpu-feature-overrides.h | 26 +++++++++
drivers/pcmcia/db1xxx_ss.c | 33 ++++++-----
5 files changed, 100 insertions(+), 56 deletions(-)
--
2.11.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/3] MIPS: Alchemy: add devboard machine type to cpuinfo
2017-02-14 12:03 [PATCH 0/3] MIPS: random Alchemy stuff Manuel Lauss
@ 2017-02-14 12:03 ` Manuel Lauss
2017-02-14 12:03 ` [PATCH 2/3] MIPS: Alchemy: update cpu feature overrides Manuel Lauss
2017-02-14 12:03 ` [PATCH 3/3] MIPS: Alchemy: Threaded carddetect irqs for devboards Manuel Lauss
2 siblings, 0 replies; 4+ messages in thread
From: Manuel Lauss @ 2017-02-14 12:03 UTC (permalink / raw)
To: Linux-MIPS; +Cc: James Hogan, Ralf Baechle, Manuel Lauss
prints the devboard name in cpuinfo "machine" line.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
arch/mips/alchemy/devboards/db1xxx.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/alchemy/devboards/db1xxx.c b/arch/mips/alchemy/devboards/db1xxx.c
index 2d47f951121a..c9ad28995cd2 100644
--- a/arch/mips/alchemy/devboards/db1xxx.c
+++ b/arch/mips/alchemy/devboards/db1xxx.c
@@ -2,6 +2,7 @@
* Alchemy DB/PB1xxx board support.
*/
+#include <asm/prom.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-db1x00/bcsr.h>
@@ -97,6 +98,7 @@ arch_initcall(db1xxx_arch_init);
static int __init db1xxx_dev_init(void)
{
+ mips_set_machine_name(board_type_str());
switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
case BCSR_WHOAMI_DB1000:
case BCSR_WHOAMI_DB1500:
--
2.11.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/3] MIPS: Alchemy: update cpu feature overrides
2017-02-14 12:03 [PATCH 0/3] MIPS: random Alchemy stuff Manuel Lauss
2017-02-14 12:03 ` [PATCH 1/3] MIPS: Alchemy: add devboard machine type to cpuinfo Manuel Lauss
@ 2017-02-14 12:03 ` Manuel Lauss
2017-02-14 12:03 ` [PATCH 3/3] MIPS: Alchemy: Threaded carddetect irqs for devboards Manuel Lauss
2 siblings, 0 replies; 4+ messages in thread
From: Manuel Lauss @ 2017-02-14 12:03 UTC (permalink / raw)
To: Linux-MIPS; +Cc: James Hogan, Ralf Baechle, Manuel Lauss
No advanced MIPS features for Alchemy.
This patch shaves additional 43kB off the DB1300 kernel
(~0.5% size reduction).
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
.../asm/mach-au1x00/cpu-feature-overrides.h | 26 ++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
index c5b6eef0efa7..7d720aa3bc8b 100644
--- a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
@@ -8,12 +8,16 @@
#define __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H
#define cpu_has_tlb 1
+#define cpu_has_ftlb 0
#define cpu_has_tlbinv 0
#define cpu_has_segments 0
#define cpu_has_eva 0
#define cpu_has_htw 0
+#define cpu_has_ldpte 0
#define cpu_has_rixiex 0
#define cpu_has_maar 0
+#define cpu_has_rw_llb 0
+#define cpu_has_3kex 0
#define cpu_has_4kex 1
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
@@ -30,23 +34,35 @@
#define cpu_has_mcheck 1
#define cpu_has_ejtag 1
#define cpu_has_llsc 1
+#define cpu_has_guestctl0ext 0
+#define cpu_has_guestctl1 0
+#define cpu_has_guestctl2 0
+#define cpu_has_guestid 0
+#define cpu_has_drg 0
+#define cpu_has_bp_ghist 0
#define cpu_has_mips16 0
#define cpu_has_mdmx 0
#define cpu_has_mips3d 0
#define cpu_has_smartmips 0
#define cpu_has_rixi 0
#define cpu_has_mmips 0
+#define cpu_has_lpa 0
+#define cpu_has_mhv 0
#define cpu_has_vtag_icache 0
#define cpu_has_dc_aliases 0
#define cpu_has_ic_fills_f_dc 1
#define cpu_has_pindexed_dcache 0
#define cpu_has_mips32r1 1
#define cpu_has_mips32r2 0
+#define cpu_has_mips32r6 0
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
+#define cpu_has_mips64r6 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
+#define cpu_has_dsp3 0
#define cpu_has_mipsmt 0
+#define cpu_has_vp 0
#define cpu_has_userlocal 0
#define cpu_has_nofpuex 0
#define cpu_has_64bits 0
@@ -57,9 +73,19 @@
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
+#define cpu_scache_line_size() 0
#define cpu_has_perf_cntr_intr_bit 0
#define cpu_has_vz 0
#define cpu_has_msa 0
+#define cpu_has_fre 0
+#define cpu_has_cdmm 0
+#define cpu_has_small_pages 0
+#define cpu_has_nan_legacy 1
+#define cpu_has_nan_2008 1
+#define cpu_has_ebase_wg 0
+#define cpu_has_badinstr 0
+#define cpu_has_badinstrp 0
+#define cpu_has_contextconfig 0
#endif /* __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H */
--
2.11.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/3] MIPS: Alchemy: Threaded carddetect irqs for devboards
2017-02-14 12:03 [PATCH 0/3] MIPS: random Alchemy stuff Manuel Lauss
2017-02-14 12:03 ` [PATCH 1/3] MIPS: Alchemy: add devboard machine type to cpuinfo Manuel Lauss
2017-02-14 12:03 ` [PATCH 2/3] MIPS: Alchemy: update cpu feature overrides Manuel Lauss
@ 2017-02-14 12:03 ` Manuel Lauss
2 siblings, 0 replies; 4+ messages in thread
From: Manuel Lauss @ 2017-02-14 12:03 UTC (permalink / raw)
To: Linux-MIPS; +Cc: James Hogan, Ralf Baechle, Manuel Lauss
This introduces threaded carddetect irqs for the db1200/db1300 boards.
Main benefit is that the broken insertion/ejection interrupt pairs
can now be better supported and debounced in software.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
arch/mips/alchemy/devboards/db1200.c | 64 ++++++++++++++++++++----------------
arch/mips/alchemy/devboards/db1300.c | 31 +++++++++--------
drivers/pcmcia/db1xxx_ss.c | 33 +++++++++++--------
3 files changed, 72 insertions(+), 56 deletions(-)
diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c
index 992442a03d8b..c1bdd6e8191e 100644
--- a/arch/mips/alchemy/devboards/db1200.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -344,28 +344,32 @@ static struct platform_device db1200_ide_dev = {
/* SD carddetects: they're supposed to be edge-triggered, but ack
* doesn't seem to work (CPLD Rev 2). Instead, the screaming one
- * is disabled and its counterpart enabled. The 500ms timeout is
- * because the carddetect isn't debounced in hardware.
+ * is disabled and its counterpart enabled. The 200ms timeout is
+ * because the carddetect usually triggers twice, after debounce.
*/
static irqreturn_t db1200_mmc_cd(int irq, void *ptr)
{
- void(*mmc_cd)(struct mmc_host *, unsigned long);
+ disable_irq_nosync(irq);
+ return IRQ_WAKE_THREAD;
+}
- if (irq == DB1200_SD0_INSERT_INT) {
- disable_irq_nosync(DB1200_SD0_INSERT_INT);
- enable_irq(DB1200_SD0_EJECT_INT);
- } else {
- disable_irq_nosync(DB1200_SD0_EJECT_INT);
- enable_irq(DB1200_SD0_INSERT_INT);
- }
+static irqreturn_t db1200_mmc_cdfn(int irq, void *ptr)
+{
+ void (*mmc_cd)(struct mmc_host *, unsigned long);
/* link against CONFIG_MMC=m */
mmc_cd = symbol_get(mmc_detect_change);
if (mmc_cd) {
- mmc_cd(ptr, msecs_to_jiffies(500));
+ mmc_cd(ptr, msecs_to_jiffies(200));
symbol_put(mmc_detect_change);
}
+ msleep(100); /* debounce */
+ if (irq == DB1200_SD0_INSERT_INT)
+ enable_irq(DB1200_SD0_EJECT_INT);
+ else
+ enable_irq(DB1200_SD0_INSERT_INT);
+
return IRQ_HANDLED;
}
@@ -374,13 +378,13 @@ static int db1200_mmc_cd_setup(void *mmc_host, int en)
int ret;
if (en) {
- ret = request_irq(DB1200_SD0_INSERT_INT, db1200_mmc_cd,
- 0, "sd_insert", mmc_host);
+ ret = request_threaded_irq(DB1200_SD0_INSERT_INT, db1200_mmc_cd,
+ db1200_mmc_cdfn, 0, "sd_insert", mmc_host);
if (ret)
goto out;
- ret = request_irq(DB1200_SD0_EJECT_INT, db1200_mmc_cd,
- 0, "sd_eject", mmc_host);
+ ret = request_threaded_irq(DB1200_SD0_EJECT_INT, db1200_mmc_cd,
+ db1200_mmc_cdfn, 0, "sd_eject", mmc_host);
if (ret) {
free_irq(DB1200_SD0_INSERT_INT, mmc_host);
goto out;
@@ -436,23 +440,27 @@ static struct led_classdev db1200_mmc_led = {
static irqreturn_t pb1200_mmc1_cd(int irq, void *ptr)
{
- void(*mmc_cd)(struct mmc_host *, unsigned long);
+ disable_irq_nosync(irq);
+ return IRQ_WAKE_THREAD;
+}
- if (irq == PB1200_SD1_INSERT_INT) {
- disable_irq_nosync(PB1200_SD1_INSERT_INT);
- enable_irq(PB1200_SD1_EJECT_INT);
- } else {
- disable_irq_nosync(PB1200_SD1_EJECT_INT);
- enable_irq(PB1200_SD1_INSERT_INT);
- }
+static irqreturn_t pb1200_mmc1_cdfn(int irq, void *ptr)
+{
+ void (*mmc_cd)(struct mmc_host *, unsigned long);
/* link against CONFIG_MMC=m */
mmc_cd = symbol_get(mmc_detect_change);
if (mmc_cd) {
- mmc_cd(ptr, msecs_to_jiffies(500));
+ mmc_cd(ptr, msecs_to_jiffies(200));
symbol_put(mmc_detect_change);
}
+ msleep(100); /* debounce */
+ if (irq == PB1200_SD1_INSERT_INT)
+ enable_irq(PB1200_SD1_EJECT_INT);
+ else
+ enable_irq(PB1200_SD1_INSERT_INT);
+
return IRQ_HANDLED;
}
@@ -461,13 +469,13 @@ static int pb1200_mmc1_cd_setup(void *mmc_host, int en)
int ret;
if (en) {
- ret = request_irq(PB1200_SD1_INSERT_INT, pb1200_mmc1_cd, 0,
- "sd1_insert", mmc_host);
+ ret = request_threaded_irq(PB1200_SD1_INSERT_INT, pb1200_mmc1_cd,
+ pb1200_mmc1_cdfn, 0, "sd1_insert", mmc_host);
if (ret)
goto out;
- ret = request_irq(PB1200_SD1_EJECT_INT, pb1200_mmc1_cd, 0,
- "sd1_eject", mmc_host);
+ ret = request_threaded_irq(PB1200_SD1_EJECT_INT, pb1200_mmc1_cd,
+ pb1200_mmc1_cdfn, 0, "sd1_eject", mmc_host);
if (ret) {
free_irq(PB1200_SD1_INSERT_INT, mmc_host);
goto out;
diff --git a/arch/mips/alchemy/devboards/db1300.c b/arch/mips/alchemy/devboards/db1300.c
index d3c087f59f1a..418d657bdd4a 100644
--- a/arch/mips/alchemy/devboards/db1300.c
+++ b/arch/mips/alchemy/devboards/db1300.c
@@ -449,24 +449,27 @@ static struct platform_device db1300_ide_dev = {
static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
{
- void(*mmc_cd)(struct mmc_host *, unsigned long);
+ disable_irq_nosync(irq);
+ return IRQ_WAKE_THREAD;
+}
- /* disable the one currently screaming. No other way to shut it up */
- if (irq == DB1300_SD1_INSERT_INT) {
- disable_irq_nosync(DB1300_SD1_INSERT_INT);
- enable_irq(DB1300_SD1_EJECT_INT);
- } else {
- disable_irq_nosync(DB1300_SD1_EJECT_INT);
- enable_irq(DB1300_SD1_INSERT_INT);
- }
+static irqreturn_t db1300_mmc_cdfn(int irq, void *ptr)
+{
+ void (*mmc_cd)(struct mmc_host *, unsigned long);
/* link against CONFIG_MMC=m. We can only be called once MMC core has
* initialized the controller, so symbol_get() should always succeed.
*/
mmc_cd = symbol_get(mmc_detect_change);
- mmc_cd(ptr, msecs_to_jiffies(500));
+ mmc_cd(ptr, msecs_to_jiffies(200));
symbol_put(mmc_detect_change);
+ msleep(100); /* debounce */
+ if (irq == DB1300_SD1_INSERT_INT)
+ enable_irq(DB1300_SD1_EJECT_INT);
+ else
+ enable_irq(DB1300_SD1_INSERT_INT);
+
return IRQ_HANDLED;
}
@@ -486,13 +489,13 @@ static int db1300_mmc_cd_setup(void *mmc_host, int en)
int ret;
if (en) {
- ret = request_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd, 0,
- "sd_insert", mmc_host);
+ ret = request_threaded_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd,
+ db1300_mmc_cdfn, 0, "sd_insert", mmc_host);
if (ret)
goto out;
- ret = request_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd, 0,
- "sd_eject", mmc_host);
+ ret = request_threaded_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd,
+ db1300_mmc_cdfn, 0, "sd_eject", mmc_host);
if (ret) {
free_irq(DB1300_SD1_INSERT_INT, mmc_host);
goto out;
diff --git a/drivers/pcmcia/db1xxx_ss.c b/drivers/pcmcia/db1xxx_ss.c
index 944674ee3464..19e17829f515 100644
--- a/drivers/pcmcia/db1xxx_ss.c
+++ b/drivers/pcmcia/db1xxx_ss.c
@@ -131,22 +131,27 @@ static irqreturn_t db1000_pcmcia_stschgirq(int irq, void *data)
return IRQ_HANDLED;
}
+/* Db/Pb1200 have separate per-socket insertion and ejection
+ * interrupts which stay asserted as long as the card is
+ * inserted/missing. The one which caused us to be called
+ * needs to be disabled and the other one enabled.
+ */
static irqreturn_t db1200_pcmcia_cdirq(int irq, void *data)
{
+ disable_irq_nosync(irq);
+ return IRQ_WAKE_THREAD;
+}
+
+static irqreturn_t db1200_pcmcia_cdirq_fn(int irq, void *data)
+{
struct db1x_pcmcia_sock *sock = data;
- /* Db/Pb1200 have separate per-socket insertion and ejection
- * interrupts which stay asserted as long as the card is
- * inserted/missing. The one which caused us to be called
- * needs to be disabled and the other one enabled.
- */
- if (irq == sock->insert_irq) {
- disable_irq_nosync(sock->insert_irq);
+ /* Wait a bit for the signals to stop bouncing. */
+ msleep(100);
+ if (irq == sock->insert_irq)
enable_irq(sock->eject_irq);
- } else {
- disable_irq_nosync(sock->eject_irq);
+ else
enable_irq(sock->insert_irq);
- }
pcmcia_parse_events(&sock->socket, SS_DETECT);
@@ -172,13 +177,13 @@ static int db1x_pcmcia_setup_irqs(struct db1x_pcmcia_sock *sock)
*/
if ((sock->board_type == BOARD_TYPE_DB1200) ||
(sock->board_type == BOARD_TYPE_DB1300)) {
- ret = request_irq(sock->insert_irq, db1200_pcmcia_cdirq,
- 0, "pcmcia_insert", sock);
+ ret = request_threaded_irq(sock->insert_irq, db1200_pcmcia_cdirq,
+ db1200_pcmcia_cdirq_fn, 0, "pcmcia_insert", sock);
if (ret)
goto out1;
- ret = request_irq(sock->eject_irq, db1200_pcmcia_cdirq,
- 0, "pcmcia_eject", sock);
+ ret = request_threaded_irq(sock->eject_irq, db1200_pcmcia_cdirq,
+ db1200_pcmcia_cdirq_fn, 0, "pcmcia_eject", sock);
if (ret) {
free_irq(sock->insert_irq, sock);
goto out1;
--
2.11.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-02-14 12:04 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2017-02-14 12:03 [PATCH 0/3] MIPS: random Alchemy stuff Manuel Lauss
2017-02-14 12:03 ` [PATCH 1/3] MIPS: Alchemy: add devboard machine type to cpuinfo Manuel Lauss
2017-02-14 12:03 ` [PATCH 2/3] MIPS: Alchemy: update cpu feature overrides Manuel Lauss
2017-02-14 12:03 ` [PATCH 3/3] MIPS: Alchemy: Threaded carddetect irqs for devboards Manuel Lauss
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