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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: tsbogend@alpha.franken.de
Cc: robh@kernel.org, arnd@arndb.de, catalin.marinas@arm.com,
	Liviu.Dudau@arm.com, bhelgaas@google.com, matthias.bgg@gmail.com,
	gregkh@linuxfoundation.org, linux-mips@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-staging@lists.linux.dev,
	neil@brown.name, linux-kernel@vger.kernel.org
Subject: [PATCH v3 5/6] MIPS: implement architecture-specific 'pci_remap_iospace()'
Date: Sat, 25 Sep 2021 22:32:23 +0200	[thread overview]
Message-ID: <20210925203224.10419-6-sergio.paracuellos@gmail.com> (raw)
In-Reply-To: <20210925203224.10419-1-sergio.paracuellos@gmail.com>

To make PCI IO work we need to properly virtually map IO cpu physical address
and set this virtual address as the address of the first PCI IO port which
is set using function 'set_io_port_base()'.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 arch/mips/include/asm/pci.h |  2 ++
 arch/mips/pci/pci-generic.c | 14 ++++++++++++++
 2 files changed, 16 insertions(+)

diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 9ffc8192adae..35270984a5f0 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -20,6 +20,8 @@
 #include <linux/list.h>
 #include <linux/of.h>
 
+#define pci_remap_iospace pci_remap_iospace
+
 #ifdef CONFIG_PCI_DRIVERS_LEGACY
 
 /*
diff --git a/arch/mips/pci/pci-generic.c b/arch/mips/pci/pci-generic.c
index 95b00017886c..18eb8a453a86 100644
--- a/arch/mips/pci/pci-generic.c
+++ b/arch/mips/pci/pci-generic.c
@@ -46,3 +46,17 @@ void pcibios_fixup_bus(struct pci_bus *bus)
 {
 	pci_read_bridge_bases(bus);
 }
+
+int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr)
+{
+	unsigned long vaddr;
+
+	if (res->start != 0) {
+		WARN_ONCE(1, "resource start address is not zero\n");
+		return -ENODEV;
+	}
+
+	vaddr = (unsigned long)ioremap(phys_addr, resource_size(res));
+	set_io_port_base(vaddr);
+	return 0;
+}
-- 
2.25.1


  parent reply	other threads:[~2021-09-25 20:32 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-25 20:32 [PATCH v3 0/6] MIPS: ralink: fix PCI IO resources Sergio Paracuellos
2021-09-25 20:32 ` [PATCH v3 1/6] Revert "MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT" Sergio Paracuellos
2021-10-03 16:07   ` Thomas Bogendoerfer
2021-09-25 20:32 ` [PATCH v3 2/6] Revert "staging: mt7621-pci: set end limit for 'ioport_resource'" Sergio Paracuellos
2021-09-25 20:32 ` [PATCH v3 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' Sergio Paracuellos
2021-10-03 16:07   ` Thomas Bogendoerfer
2021-09-25 20:32 ` [PATCH v3 4/6] PCI: Allow architecture-specific pci_remap_iospace() Sergio Paracuellos
2021-09-25 20:32 ` Sergio Paracuellos [this message]
2021-10-03 16:08   ` [PATCH v3 5/6] MIPS: implement architecture-specific 'pci_remap_iospace()' Thomas Bogendoerfer
2021-12-16 11:44   ` Xi Ruoyao
2021-12-16 12:46     ` Tiezhu Yang
2021-12-16 12:55     ` Arnd Bergmann
2021-12-16 13:07     ` Jiaxun Yang
2021-12-16 13:50       ` Arnd Bergmann
2021-12-16 14:14         ` Jiaxun Yang
2021-12-16 14:18           ` Arnd Bergmann
2021-12-16 14:27             ` Jiaxun Yang
2021-12-16 14:32               ` Arnd Bergmann
2021-12-16 14:37                 ` Jiaxun Yang
2021-09-25 20:32 ` [PATCH v3 6/6] staging: mt7621-pci: properly adjust base address for the IO window Sergio Paracuellos
2021-09-27  7:51 ` [PATCH v3 0/6] MIPS: ralink: fix PCI IO resources Arnd Bergmann
2021-09-27  9:14   ` Sergio Paracuellos
2021-10-03 16:21 ` Sergio Paracuellos
2021-10-05 10:36   ` Greg KH
2021-10-05 10:51     ` Sergio Paracuellos

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