Re: [PATCH v3 0/6] MIPS: ralink: fix PCI IO resources

[Sergio Paracuellos <sergio.paracuellos@gmail.com>]

Hi Greg,

On Sat, Sep 25, 2021 at 10:32 PM Sergio Paracuellos
<sergio.paracuellos@gmail.com> wrote:
>
> MIPs ralink need a special tratement regarding the way it handles PCI IO
> resources. On MIPS I/O ports are memory mapped, so we access them using normal
> load/store instructions. MIPS 'plat_mem_setup()' function does a call to
> 'set_io_port_base(KSEG1)'. There, variable 'mips_io_port_base'
> is set then using this address which is a virtual address to which all
> ports are being mapped. Ralink I/O space has a mapping of bus address
> equal to the window into the mmio space, with an offset of IO start range
> cpu address. This means that to have this working we need:
> - linux port numbers in the range 0-0xffff.
> - pci port numbers in the range 0-0xffff.
> - io_offset being zero.
>
> These means at the end to have bus address 0 mapped to IO range cpu address.
> We need a way of properly set 'mips_io_port_base' with a virtually mapped
> value of the IO cpu address.
>
> This series do the following approach:
> 1) Revert two bad commit from a previous attempt of make this work [0].
> 2) Set PCI_IOBASE to mips 'mips_io_port_base'.
> 3) Allow architecture dependent 'pci_remap_iospace'.
> 4) Implement 'pci_remap_iospace' for MIPS.
> 5) Be sure IOBASE address for IO window is set with correct value.
>
> More context about this series appoach in this mail thread [1].
>
> Patches related with reverts are from this merge cycle so they are only
> added to the staging git tree. So to have all stuff together I'd like to
> get everybody Ack's to get all of this series through staging tree if
> possible :).
>
> Thanks in advance for your time.
>
> Changes in v3:
>  - Collect Arnd's Acked-by for the patches.
>  - Be sure IO resource start address is zero and WARN_ONCE if it is not
>    on MIPS pci_remap_iospace() patch. Also make use of 'resource_size'
>    instead of do the logic explicitly again.

I think nothing is missing to get this added through the staging tree.

Thanks in advance for your time.

Best regards,
   Sergio Paracuellos

>
> Changes in v2:
>  - re-do commit messages for PCI patch as Bjorn pointed out in previous series.
>  - Add Bjorn's Acked-by for PCI subsystem patch.
>  - Re-do commit message of MIPS 'pci_remap_iospace()' patch to align with changes
>    in the PCI patch (s/architecture dependent/architecture-specific/)
>  - Add Fixes-by tag for MIPS set PCI_IOBASE patch.
>
> [0]: https://www.spinics.net/lists/kernel/msg4051474.html
> [1]: https://lkml.org/lkml/2021/9/22/6
> Sergio Paracuellos (6):
>   Revert "MIPS: ralink: don't define PC_IOBASE but increase
>     IO_SPACE_LIMIT"
>   Revert "staging: mt7621-pci: set end limit for 'ioport_resource'"
>   MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base'
>   PCI: Allow architecture-specific pci_remap_iospace()
>   MIPS: implement architecture-specific 'pci_remap_iospace()'
>   staging: mt7621-pci: properly adjust base address for the IO window
>
>  arch/mips/include/asm/mach-ralink/spaces.h |  4 +++-
>  arch/mips/include/asm/pci.h                |  2 ++
>  arch/mips/pci/pci-generic.c                | 14 ++++++++++++++
>  drivers/pci/pci.c                          |  2 ++
>  drivers/staging/mt7621-pci/pci-mt7621.c    |  4 +---
>  5 files changed, 22 insertions(+), 4 deletions(-)
>
> --
> 2.25.1
>