* [PATCH v2 0/2] irqchip: loongarch-cpu: add DT support
@ 2022-11-14 11:38 Liu Peibao
2022-11-14 11:38 ` [PATCH v2 1/2] " Liu Peibao
2022-11-14 11:38 ` [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller Liu Peibao
0 siblings, 2 replies; 9+ messages in thread
From: Liu Peibao @ 2022-11-14 11:38 UTC (permalink / raw)
To: Thomas Gleixner, Marc Zyngier, Rob Herring, Krzysztof Kozlowski,
Huacai Chen, WANG Xuerui
Cc: Jianmin Lv, Yinbo Zhu, wanghongliang, Liu Peibao, linux-mips,
linux-kernel
This patches add the DT support for LoongArch compatible CPU interrupt
controller.
V1 -> V2: patch2/2: update commit log and remove redundant description in yaml.
Liu Peibao (2):
irqchip: loongarch-cpu: add DT support
dt-bindings: interrupt-controller: add yaml for LoongArch CPU
interrupt controller
.../loongarch,cpu-interrupt-controller.yaml | 34 +++++++++++++++++++
drivers/irqchip/irq-loongarch-cpu.c | 19 +++++++++++
2 files changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml
--
2.20.1
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH v2 1/2] irqchip: loongarch-cpu: add DT support 2022-11-14 11:38 [PATCH v2 0/2] irqchip: loongarch-cpu: add DT support Liu Peibao @ 2022-11-14 11:38 ` Liu Peibao 2022-12-02 2:07 ` Huacai Chen 2022-11-14 11:38 ` [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller Liu Peibao 1 sibling, 1 reply; 9+ messages in thread From: Liu Peibao @ 2022-11-14 11:38 UTC (permalink / raw) To: Thomas Gleixner, Marc Zyngier, Rob Herring, Krzysztof Kozlowski, Huacai Chen, WANG Xuerui Cc: Jianmin Lv, Yinbo Zhu, wanghongliang, Liu Peibao, linux-mips, linux-kernel LoongArch is coming to support booting with FDT, so DT support of this driver is desired. Signed-off-by: Liu Peibao <liupeibao@loongson.cn> --- drivers/irqchip/irq-loongarch-cpu.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/irqchip/irq-loongarch-cpu.c b/drivers/irqchip/irq-loongarch-cpu.c index 741612ba6a52..a28b7c549654 100644 --- a/drivers/irqchip/irq-loongarch-cpu.c +++ b/drivers/irqchip/irq-loongarch-cpu.c @@ -92,6 +92,25 @@ static const struct irq_domain_ops loongarch_cpu_intc_irq_domain_ops = { .xlate = irq_domain_xlate_onecell, }; +#ifdef CONFIG_OF +int __init loongarch_cpu_irq_of_init(struct device_node *of_node, + struct device_node *parent) +{ + cpuintc_handle = of_node_to_fwnode(of_node); + + irq_domain = irq_domain_create_linear(cpuintc_handle, EXCCODE_INT_NUM, + &loongarch_cpu_intc_irq_domain_ops, NULL); + if (!irq_domain) + panic("Failed to add irqdomain for loongarch CPU"); + + set_handle_irq(&handle_cpu_irq); + + return 0; +} +IRQCHIP_DECLARE(cpu_intc, "loongson,cpu-interrupt-controller", + loongarch_cpu_irq_of_init); +#endif + static int __init liointc_parse_madt(union acpi_subtable_headers *header, const unsigned long end) -- 2.20.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/2] irqchip: loongarch-cpu: add DT support 2022-11-14 11:38 ` [PATCH v2 1/2] " Liu Peibao @ 2022-12-02 2:07 ` Huacai Chen 2022-12-02 8:45 ` Marc Zyngier 0 siblings, 1 reply; 9+ messages in thread From: Huacai Chen @ 2022-12-02 2:07 UTC (permalink / raw) To: Liu Peibao Cc: Thomas Gleixner, Marc Zyngier, Rob Herring, Krzysztof Kozlowski, WANG Xuerui, Jianmin Lv, Yinbo Zhu, wanghongliang, linux-mips, linux-kernel Hi, Peibao and Marc, I found this patch has merged but lkp report a problem, this can simply fixed by add "static" before loongarch_cpu_irq_of_init definition. Since Marc's next branch hasn't been tagged yet, can Peibao send a new version and Marc rebase it? Huacai On Mon, Nov 14, 2022 at 7:38 PM Liu Peibao <liupeibao@loongson.cn> wrote: > > LoongArch is coming to support booting with FDT, so DT > support of this driver is desired. > > Signed-off-by: Liu Peibao <liupeibao@loongson.cn> > --- > drivers/irqchip/irq-loongarch-cpu.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/irqchip/irq-loongarch-cpu.c b/drivers/irqchip/irq-loongarch-cpu.c > index 741612ba6a52..a28b7c549654 100644 > --- a/drivers/irqchip/irq-loongarch-cpu.c > +++ b/drivers/irqchip/irq-loongarch-cpu.c > @@ -92,6 +92,25 @@ static const struct irq_domain_ops loongarch_cpu_intc_irq_domain_ops = { > .xlate = irq_domain_xlate_onecell, > }; > > +#ifdef CONFIG_OF > +int __init loongarch_cpu_irq_of_init(struct device_node *of_node, > + struct device_node *parent) > +{ > + cpuintc_handle = of_node_to_fwnode(of_node); > + > + irq_domain = irq_domain_create_linear(cpuintc_handle, EXCCODE_INT_NUM, > + &loongarch_cpu_intc_irq_domain_ops, NULL); > + if (!irq_domain) > + panic("Failed to add irqdomain for loongarch CPU"); > + > + set_handle_irq(&handle_cpu_irq); > + > + return 0; > +} > +IRQCHIP_DECLARE(cpu_intc, "loongson,cpu-interrupt-controller", > + loongarch_cpu_irq_of_init); > +#endif > + > static int __init > liointc_parse_madt(union acpi_subtable_headers *header, > const unsigned long end) > -- > 2.20.1 > ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/2] irqchip: loongarch-cpu: add DT support 2022-12-02 2:07 ` Huacai Chen @ 2022-12-02 8:45 ` Marc Zyngier 2022-12-05 4:42 ` Huacai Chen 0 siblings, 1 reply; 9+ messages in thread From: Marc Zyngier @ 2022-12-02 8:45 UTC (permalink / raw) To: Huacai Chen Cc: Liu Peibao, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, WANG Xuerui, Jianmin Lv, Yinbo Zhu, wanghongliang, linux-mips, linux-kernel On 2022-12-02 02:07, Huacai Chen wrote: > Hi, Peibao and Marc, > > I found this patch has merged but lkp report a problem, this can > simply fixed by add "static" before loongarch_cpu_irq_of_init > definition. Since Marc's next branch hasn't been tagged yet, can > Peibao send a new version and Marc rebase it? Please send in a fix on top of the existing series. Thanks, M. -- Jazz is not dead. It just smells funny... ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/2] irqchip: loongarch-cpu: add DT support 2022-12-02 8:45 ` Marc Zyngier @ 2022-12-05 4:42 ` Huacai Chen 0 siblings, 0 replies; 9+ messages in thread From: Huacai Chen @ 2022-12-05 4:42 UTC (permalink / raw) To: Marc Zyngier Cc: Liu Peibao, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski, WANG Xuerui, Jianmin Lv, Yinbo Zhu, wanghongliang, linux-mips, linux-kernel On Fri, Dec 2, 2022 at 4:45 PM Marc Zyngier <maz@kernel.org> wrote: > > On 2022-12-02 02:07, Huacai Chen wrote: > > Hi, Peibao and Marc, > > > > I found this patch has merged but lkp report a problem, this can > > simply fixed by add "static" before loongarch_cpu_irq_of_init > > definition. Since Marc's next branch hasn't been tagged yet, can > > Peibao send a new version and Marc rebase it? > > Please send in a fix on top of the existing series. OK, I'll send a fix later. Huacai > > Thanks, > > M. > -- > Jazz is not dead. It just smells funny... ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller 2022-11-14 11:38 [PATCH v2 0/2] irqchip: loongarch-cpu: add DT support Liu Peibao 2022-11-14 11:38 ` [PATCH v2 1/2] " Liu Peibao @ 2022-11-14 11:38 ` Liu Peibao 2022-11-15 16:40 ` Krzysztof Kozlowski 2022-12-08 2:09 ` Rob Herring 1 sibling, 2 replies; 9+ messages in thread From: Liu Peibao @ 2022-11-14 11:38 UTC (permalink / raw) To: Thomas Gleixner, Marc Zyngier, Rob Herring, Krzysztof Kozlowski, Huacai Chen, WANG Xuerui Cc: Jianmin Lv, Yinbo Zhu, wanghongliang, Liu Peibao, linux-mips, linux-kernel Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how the 14 IRQs are wired to the platform's internal interrupt controller by devicetree. Signed-off-by: Liu Peibao <liupeibao@loongson.cn> --- .../loongarch,cpu-interrupt-controller.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml new file mode 100644 index 000000000000..2a1cf885c99d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPU Interrupt Controller + +maintainers: + - Liu Peibao <liupeibao@loongson.cn> + +properties: + compatible: + const: loongarch,cpu-interrupt-controller + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + +additionalProperties: false + +required: + - compatible + - '#interrupt-cells' + - interrupt-controller + +examples: + - | + interrupt-controller { + compatible = "loongarch,cpu-interrupt-controller"; + #interrupt-cells = <1>; + interrupt-controller; + }; -- 2.20.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller 2022-11-14 11:38 ` [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller Liu Peibao @ 2022-11-15 16:40 ` Krzysztof Kozlowski 2022-12-08 2:09 ` Rob Herring 1 sibling, 0 replies; 9+ messages in thread From: Krzysztof Kozlowski @ 2022-11-15 16:40 UTC (permalink / raw) To: Liu Peibao, Thomas Gleixner, Marc Zyngier, Rob Herring, Krzysztof Kozlowski, Huacai Chen, WANG Xuerui Cc: Jianmin Lv, Yinbo Zhu, wanghongliang, linux-mips, linux-kernel On 14/11/2022 12:38, Liu Peibao wrote: > Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how > the 14 IRQs are wired to the platform's internal interrupt controller by > devicetree. > > Signed-off-by: Liu Peibao <liupeibao@loongson.cn> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller 2022-11-14 11:38 ` [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller Liu Peibao 2022-11-15 16:40 ` Krzysztof Kozlowski @ 2022-12-08 2:09 ` Rob Herring 2022-12-08 2:46 ` Liu Peibao 1 sibling, 1 reply; 9+ messages in thread From: Rob Herring @ 2022-12-08 2:09 UTC (permalink / raw) To: Liu Peibao Cc: Thomas Gleixner, Marc Zyngier, Krzysztof Kozlowski, Huacai Chen, WANG Xuerui, Jianmin Lv, Yinbo Zhu, wanghongliang, linux-mips, linux-kernel On Mon, Nov 14, 2022 at 07:38:24PM +0800, Liu Peibao wrote: > Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how > the 14 IRQs are wired to the platform's internal interrupt controller by > devicetree. > > Signed-off-by: Liu Peibao <liupeibao@loongson.cn> > --- > .../loongarch,cpu-interrupt-controller.yaml | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml > new file mode 100644 > index 000000000000..2a1cf885c99d > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml > @@ -0,0 +1,34 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: LoongArch CPU Interrupt Controller > + > +maintainers: > + - Liu Peibao <liupeibao@loongson.cn> > + > +properties: > + compatible: > + const: loongarch,cpu-interrupt-controller This doesn't match what the kernel is using. It has loongson rather than loongarch. Please send an incremental fix. (Don't forget the example) Rob ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller 2022-12-08 2:09 ` Rob Herring @ 2022-12-08 2:46 ` Liu Peibao 0 siblings, 0 replies; 9+ messages in thread From: Liu Peibao @ 2022-12-08 2:46 UTC (permalink / raw) To: Rob Herring Cc: Thomas Gleixner, Marc Zyngier, Krzysztof Kozlowski, Huacai Chen, WANG Xuerui, Jianmin Lv, Yinbo Zhu, wanghongliang, linux-mips, linux-kernel On 12/8/22 10:09 AM, Rob Herring wrote: > On Mon, Nov 14, 2022 at 07:38:24PM +0800, Liu Peibao wrote: >> Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how >> the 14 IRQs are wired to the platform's internal interrupt controller by >> devicetree. >> >> Signed-off-by: Liu Peibao <liupeibao@loongson.cn> >> --- >> .../loongarch,cpu-interrupt-controller.yaml | 34 +++++++++++++++++++ >> 1 file changed, 34 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml >> new file mode 100644 >> index 000000000000..2a1cf885c99d >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml >> @@ -0,0 +1,34 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: LoongArch CPU Interrupt Controller >> + >> +maintainers: >> + - Liu Peibao <liupeibao@loongson.cn> >> + >> +properties: >> + compatible: >> + const: loongarch,cpu-interrupt-controller > > This doesn't match what the kernel is using. It has loongson rather than > loongarch. Please send an incremental fix. (Don't forget the example) > > Rob > I will send an incremental fix. It is much embarrassed for my careless. Thanks! BR, Peibao ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2022-12-08 2:46 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-11-14 11:38 [PATCH v2 0/2] irqchip: loongarch-cpu: add DT support Liu Peibao 2022-11-14 11:38 ` [PATCH v2 1/2] " Liu Peibao 2022-12-02 2:07 ` Huacai Chen 2022-12-02 8:45 ` Marc Zyngier 2022-12-05 4:42 ` Huacai Chen 2022-11-14 11:38 ` [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller Liu Peibao 2022-11-15 16:40 ` Krzysztof Kozlowski 2022-12-08 2:09 ` Rob Herring 2022-12-08 2:46 ` Liu Peibao
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).