From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"paul.burton@mips.com" <paul.burton@mips.com>,
"paulburton@kernel.org" <paulburton@kernel.org>,
"jhogan@kernel.org" <jhogan@kernel.org>,
"miquel.raynal@bootlin.com" <miquel.raynal@bootlin.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"syq@debian.org" <syq@debian.org>,
"ralf@linux-mips.org" <ralf@linux-mips.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"jason@lakedaemon.net" <jason@lakedaemon.net>,
"maz@kernel.org" <maz@kernel.org>,
"chenhc@lemote.com" <chenhc@lemote.com>,
"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
"ebiederm@xmission.com" <ebiederm@xmission.com>,
"keescook@chromium.org" <keescook@chromium.org>,
"ak@linux.intel.com" <ak@linux.intel.com>,
"krzk@kernel.org" <krzk@kernel.org>,
"paul@crapouillou.net" <paul@crapouillou.net>,
"prasannatsmkumar@gmail.com" <prasannatsmkumar@gmail.com>,
"sernia.zhou@foxmail.com" <sernia.zhou@foxmail.com>,
"zhenwenjin@gmail.com" <zhenwenjin@gmail.com>
Subject: Re: [PATCH 3/6] dt-bindings: MIPS: Document Ingenic SoCs binding.
Date: Tue, 14 Jan 2020 12:59:43 +0800 [thread overview]
Message-ID: <30183031578977983@vla1-0bfbe4c1c324.qloud-c.yandex.net> (raw)
In-Reply-To: <1578933813-80122-5-git-send-email-zhouyanjie@wanyeetech.com>
14.01.2020, 00:44, "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>:
> Document the available properties for the SoC root node and the
> CPU nodes of the devicetree for the Ingenic XBurst SoCs.
>
> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
> ---
> .../bindings/mips/ingenic/ingenic,cpu.txt | 32 ++++++++++++++++++++++
> .../bindings/mips/ingenic/ingenic,soc,txt | 18 ++++++++++++
> 2 files changed, 50 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.txt
> create mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,soc,txt
>
We'd better use schemas for the document.
See[1]
Thanks.
[1]: https://lwn.net/Articles/771621/
--
Jiaxun Yang
next prev parent reply other threads:[~2020-01-14 4:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <Introduce SMP support for CI20 (based on JZ4780).>
[not found] ` <1578933813-80122-1-git-send-email-zhouyanjie@wanyeetech.com>
2020-01-13 16:43 ` [PATCH 0/6] Introduce SMP support for JZ4780 周琰杰 (Zhou Yanjie)
2020-01-13 16:43 ` [PATCH 1/6] MIPS: JZ4780: Introduce SMP support 周琰杰 (Zhou Yanjie)
2020-01-14 4:55 ` Jiaxun Yang
2020-01-14 13:46 ` Zhou Yanjie
2020-01-13 16:43 ` [PATCH 2/6] clocksource: Ingenic: Add high resolution timer support for SMP 周琰杰 (Zhou Yanjie)
2020-01-13 16:43 ` [PATCH 3/6] dt-bindings: MIPS: Document Ingenic SoCs binding 周琰杰 (Zhou Yanjie)
2020-01-14 4:59 ` Jiaxun Yang [this message]
2020-01-14 13:48 ` Zhou Yanjie
2020-01-13 16:43 ` [PATCH 4/6] MIPS: Ingenic: Add 'cpus' node for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2020-01-13 16:43 ` [PATCH 5/6] MIPS: CI20: Modify DTS to support high resolution timer for SMP 周琰杰 (Zhou Yanjie)
2020-01-13 16:43 ` [PATCH 6/6] MIPS: CI20: Update defconfig to support SMP 周琰杰 (Zhou Yanjie)
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