[PATCH] MIPS: elf_hwcap: Export userspace ASEs

[PATCH] MIPS: elf_hwcap: Export userspace ASEs

[Jiaxun Yang]

A Golang developer reported MIPS hwcap isn't reflecting instructions
that the processor actually supported so programs can't apply optimized
code at runtime.

Thus we export the ASEs that can be used in userspace programs.

Reported-by: Meng Zhou <mengzhuo1203@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-mips@vger.kernel.org
Cc: Paul Burton <paul.burton@mips.com>
Cc: <stable@vger.kernel.org> # 4.14+
---
 arch/mips/include/uapi/asm/hwcap.h | 11 ++++++++++
 arch/mips/kernel/cpu-probe.c       | 33 ++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

diff --git a/arch/mips/include/uapi/asm/hwcap.h b/arch/mips/include/uapi/asm/hwcap.h
index a2aba4b059e6..1ade1daa4921 100644
--- a/arch/mips/include/uapi/asm/hwcap.h
+++ b/arch/mips/include/uapi/asm/hwcap.h
@@ -6,5 +6,16 @@
 #define HWCAP_MIPS_R6		(1 << 0)
 #define HWCAP_MIPS_MSA		(1 << 1)
 #define HWCAP_MIPS_CRC32	(1 << 2)
+#define HWCAP_MIPS_MIPS16	(1 << 3)
+#define HWCAP_MIPS_MDMX     (1 << 4)
+#define HWCAP_MIPS_MIPS3D   (1 << 5)
+#define HWCAP_MIPS_SMARTMIPS (1 << 6)
+#define HWCAP_MIPS_DSP      (1 << 7)
+#define HWCAP_MIPS_DSP2     (1 << 8)
+#define HWCAP_MIPS_DSP3     (1 << 9)
+#define HWCAP_MIPS_MIPS16E2 (1 << 10)
+#define HWCAP_LOONGSON_MMI  (1 << 11)
+#define HWCAP_LOONGSON_EXT  (1 << 12)
+#define HWCAP_LOONGSON_EXT2 (1 << 13)
 
 #endif /* _UAPI_ASM_HWCAP_H */
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c2eb392597bf..f521cbf934e7 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -2180,6 +2180,39 @@ void cpu_probe(void)
 		elf_hwcap |= HWCAP_MIPS_MSA;
 	}
 
+	if (cpu_has_mips16)
+		elf_hwcap |= HWCAP_MIPS_MIPS16;
+
+	if (cpu_has_mdmx)
+		elf_hwcap |= HWCAP_MIPS_MDMX;
+
+	if (cpu_has_mips3d)
+		elf_hwcap |= HWCAP_MIPS_MIPS3D;
+
+	if (cpu_has_smartmips)
+		elf_hwcap |= HWCAP_MIPS_SMARTMIPS;
+
+	if (cpu_has_dsp)
+		elf_hwcap |= HWCAP_MIPS_DSP;
+
+	if (cpu_has_dsp2)
+		elf_hwcap |= HWCAP_MIPS_DSP2;
+
+	if (cpu_has_dsp3)
+		elf_hwcap |= HWCAP_MIPS_DSP3;
+
+	if (cpu_has_mips16e2)
+		elf_hwcap |= HWCAP_MIPS_MIPS16E2;
+
+	if (cpu_has_loongson_mmi)
+		elf_hwcap |= HWCAP_LOONGSON_MMI;
+
+	if (cpu_has_loongson_ext)
+		elf_hwcap |= HWCAP_LOONGSON_EXT;
+
+	if (cpu_has_loongson_ext2)
+		elf_hwcap |= HWCAP_LOONGSON_EXT2;
+
 	if (cpu_has_vz)
 		cpu_probe_vz(c);
 
-- 
2.23.0

[PATCH v1] MIPS: elf_hwcap: Export userspace ASEs

[Jiaxun Yang]

A Golang developer reported MIPS hwcap isn't reflecting instructions
that the processor actually supported so programs can't apply optimized
code at runtime.

Thus we export the ASEs that can be used in userspace programs.

Reported-by: Meng Zhuo <mengzhuo1203@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-mips@vger.kernel.org
Cc: Paul Burton <paul.burton@mips.com>
Cc: <stable@vger.kernel.org> # 4.14+
---
 v1: Fix typo in Meng's name.

 arch/mips/include/uapi/asm/hwcap.h | 11 ++++++++++
 arch/mips/kernel/cpu-probe.c       | 33 ++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

diff --git a/arch/mips/include/uapi/asm/hwcap.h b/arch/mips/include/uapi/asm/hwcap.h
index a2aba4b059e6..1ade1daa4921 100644
--- a/arch/mips/include/uapi/asm/hwcap.h
+++ b/arch/mips/include/uapi/asm/hwcap.h
@@ -6,5 +6,16 @@
 #define HWCAP_MIPS_R6		(1 << 0)
 #define HWCAP_MIPS_MSA		(1 << 1)
 #define HWCAP_MIPS_CRC32	(1 << 2)
+#define HWCAP_MIPS_MIPS16	(1 << 3)
+#define HWCAP_MIPS_MDMX     (1 << 4)
+#define HWCAP_MIPS_MIPS3D   (1 << 5)
+#define HWCAP_MIPS_SMARTMIPS (1 << 6)
+#define HWCAP_MIPS_DSP      (1 << 7)
+#define HWCAP_MIPS_DSP2     (1 << 8)
+#define HWCAP_MIPS_DSP3     (1 << 9)
+#define HWCAP_MIPS_MIPS16E2 (1 << 10)
+#define HWCAP_LOONGSON_MMI  (1 << 11)
+#define HWCAP_LOONGSON_EXT  (1 << 12)
+#define HWCAP_LOONGSON_EXT2 (1 << 13)
 
 #endif /* _UAPI_ASM_HWCAP_H */
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c2eb392597bf..f521cbf934e7 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -2180,6 +2180,39 @@ void cpu_probe(void)
 		elf_hwcap |= HWCAP_MIPS_MSA;
 	}
 
+	if (cpu_has_mips16)
+		elf_hwcap |= HWCAP_MIPS_MIPS16;
+
+	if (cpu_has_mdmx)
+		elf_hwcap |= HWCAP_MIPS_MDMX;
+
+	if (cpu_has_mips3d)
+		elf_hwcap |= HWCAP_MIPS_MIPS3D;
+
+	if (cpu_has_smartmips)
+		elf_hwcap |= HWCAP_MIPS_SMARTMIPS;
+
+	if (cpu_has_dsp)
+		elf_hwcap |= HWCAP_MIPS_DSP;
+
+	if (cpu_has_dsp2)
+		elf_hwcap |= HWCAP_MIPS_DSP2;
+
+	if (cpu_has_dsp3)
+		elf_hwcap |= HWCAP_MIPS_DSP3;
+
+	if (cpu_has_mips16e2)
+		elf_hwcap |= HWCAP_MIPS_MIPS16E2;
+
+	if (cpu_has_loongson_mmi)
+		elf_hwcap |= HWCAP_LOONGSON_MMI;
+
+	if (cpu_has_loongson_ext)
+		elf_hwcap |= HWCAP_LOONGSON_EXT;
+
+	if (cpu_has_loongson_ext2)
+		elf_hwcap |= HWCAP_LOONGSON_EXT2;
+
 	if (cpu_has_vz)
 		cpu_probe_vz(c);
 
-- 
2.23.0

Re: [PATCH v1] MIPS: elf_hwcap: Export userspace ASEs

[Paul Burton]

Hello,

Jiaxun Yang wrote:
> A Golang developer reported MIPS hwcap isn't reflecting instructions
> that the processor actually supported so programs can't apply optimized
> code at runtime.
> 
> Thus we export the ASEs that can be used in userspace programs.

Applied to mips-fixes.

> commit 38dffe1e4dde
> https://git.kernel.org/mips/c/38dffe1e4dde
> 
> Reported-by: Meng Zhuo <mengzhuo1203@gmail.com>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Paul Burton <paul.burton@mips.com>

Thanks,
    Paul

[ This message was auto-generated; if you believe anything is incorrect
  then please email paul.burton@mips.com to report it. ]

Re: [PATCH v1] MIPS: elf_hwcap: Export userspace ASEs

[Maciej W. Rozycki]

On Thu, 10 Oct 2019, Paul Burton wrote:

> > A Golang developer reported MIPS hwcap isn't reflecting instructions
> > that the processor actually supported so programs can't apply optimized
> > code at runtime.
> > 
> > Thus we export the ASEs that can be used in userspace programs.
> 
> Applied to mips-fixes.

 This makes a part of the user ABI, so I would advise discussing this with 
libc folks.  Also you probably want to report microMIPS support too.

  Maciej

Re: [PATCH v1] MIPS: elf_hwcap: Export userspace ASEs

[Jiaxun Yang]

On 2019/10/16 上午7:27, Maciej W. Rozycki wrote:
> On Thu, 10 Oct 2019, Paul Burton wrote:
> 
>>> A Golang developer reported MIPS hwcap isn't reflecting instructions
>>> that the processor actually supported so programs can't apply optimized
>>> code at runtime.
>>>
>>> Thus we export the ASEs that can be used in userspace programs.
>>
>> Applied to mips-fixes.
> 
>   This makes a part of the user ABI, so I would advise discussing this with
> libc folks.  Also you probably want to report microMIPS support too.
Hi Maciej,

How can hwcap advance libc? I know that Arm world is using it to probe 
SIMD extensions in high-level programs like ffmpeg.

microMIPS binary can't be applied at runtime, so userspace programs 
shouldn't aware that.

  Should I Cc this discussion to libc-alpha or other lists?

--
Jiaxun
> 
>    Maciej
> 

Re: [PATCH v1] MIPS: elf_hwcap: Export userspace ASEs

[Maciej W. Rozycki]

On Wed, 16 Oct 2019, Jiaxun Yang wrote:

> >   This makes a part of the user ABI, so I would advise discussing this with
> > libc folks.  Also you probably want to report microMIPS support too.
> 
> How can hwcap advance libc? I know that Arm world is using it to probe SIMD
> extensions in high-level programs like ffmpeg.

 Auxiliary vector entries do get used by libc, including HWCAP, so if you 
introduce new stuff, then you want to consult its potential users.  And 
this is a part of the ABI, so once there it's cast in stone forever.

> microMIPS binary can't be applied at runtime, so userspace programs shouldn't
> aware that.

 Mixing regular MIPS and microMIPS software is fully supported at load 
time as indirect calls made through the GOT (or PLTGOT) are ISA-agnostic, 
i.e. you can use a microMIPS DSO with a regular MIPS executable and vice 
versa.  This is something the dynamic loader can take advantage of, e.g. 
choosing a smaller microMIPS DSO where supported by hardware over a 
corresponding regular MIPS one will usually have a performance advantage 
due to a smaller cache footprint.

 Actually regular MIPS ISA support should be reported these days too, as 
you can have a pure microMIPS CPU with no regular MIPS ISA implemented.

>  Should I Cc this discussion to libc-alpha or other lists?

 For the GNU C Library <libc-alpha@sourceware.org> is indeed the right 
place; I can't speak for other libc implementations (uClibc, musl, etc.).

  Maciej