* [PATCH v1] arm64: tlb: don't set the ttl value in flush_tlb_page_nosync
@ 2020-07-10 9:41 Zhenyu Ye
2020-07-10 15:29 ` Catalin Marinas
0 siblings, 1 reply; 2+ messages in thread
From: Zhenyu Ye @ 2020-07-10 9:41 UTC (permalink / raw)
To: catalin.marinas, will
Cc: yezhenyu2, linux-arm-kernel, linux-kernel, linux-arch, linux-mm,
arm, xiexiangyou
flush_tlb_page_nosync() may be called from pmd level, so we
can not set the ttl = 3 here.
The callstack is as follows:
pmdp_set_access_flags
ptep_set_access_flags
flush_tlb_fix_spurious_fault
flush_tlb_page
flush_tlb_page_nosync
Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Fixes: e735b98a5fe0 ("arm64: Add tlbi_user_level TLB invalidation helper")
Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
---
arch/arm64/include/asm/tlbflush.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index edfec8139ef8..7528c84a94ef 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -252,9 +252,8 @@ static inline void flush_tlb_page_nosync(struct vm_area_struct *vma,
unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));
dsb(ishst);
- /* This function is only called on a small page */
- __tlbi_level(vale1is, addr, 3);
- __tlbi_user_level(vale1is, addr, 3);
+ __tlbi(vale1is, addr);
+ __tlbi_user(vale1is, addr);
}
static inline void flush_tlb_page(struct vm_area_struct *vma,
--
2.19.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v1] arm64: tlb: don't set the ttl value in flush_tlb_page_nosync
2020-07-10 9:41 [PATCH v1] arm64: tlb: don't set the ttl value in flush_tlb_page_nosync Zhenyu Ye
@ 2020-07-10 15:29 ` Catalin Marinas
0 siblings, 0 replies; 2+ messages in thread
From: Catalin Marinas @ 2020-07-10 15:29 UTC (permalink / raw)
To: will, Zhenyu Ye
Cc: arm, linux-arch, linux-kernel, linux-mm, xiexiangyou, linux-arm-kernel
On Fri, 10 Jul 2020 17:41:58 +0800, Zhenyu Ye wrote:
> flush_tlb_page_nosync() may be called from pmd level, so we
> can not set the ttl = 3 here.
>
> The callstack is as follows:
>
> pmdp_set_access_flags
> ptep_set_access_flags
> flush_tlb_fix_spurious_fault
> flush_tlb_page
> flush_tlb_page_nosync
Applied to arm64 (for-next/tlbi), thanks!
[1/1] arm64: tlb: don't set the ttl value in flush_tlb_page_nosync
https://git.kernel.org/arm64/c/61c11656b67b
--
Catalin
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2020-07-10 15:29 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-10 9:41 [PATCH v1] arm64: tlb: don't set the ttl value in flush_tlb_page_nosync Zhenyu Ye
2020-07-10 15:29 ` Catalin Marinas
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).