From: Szabolcs Nagy <szabolcs.nagy@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Dave Martin <Dave.Martin@arm.com>,
linux-arch@vger.kernel.org,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
Andrey Konovalov <andreyknvl@google.com>,
Kevin Brodsky <kevin.brodsky@arm.com>,
Peter Collingbourne <pcc@google.com>,
linux-mm@kvack.org, Vincenzo Frascino <vincenzo.frascino@arm.com>,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org, nd@arm.com
Subject: Re: [PATCH v3 23/23] arm64: mte: Add Memory Tagging Extension documentation
Date: Fri, 15 May 2020 13:04:33 +0100 [thread overview]
Message-ID: <20200515120433.GE27289@arm.com> (raw)
In-Reply-To: <20200515112740.GB22393@gaia>
The 05/15/2020 12:27, Catalin Marinas wrote:
> Thanks Szabolcs. While we are at this, no-one so far asked for the
> GCR_EL1.RRND to be exposed to user (and this implies RGSR_EL1.SEED).
> Since RRND=1 guarantees a distribution "no worse" than that of RRND=0, I
> thought there isn't much point in exposing this configuration to the
> user. The only advantage of RRND=0 I see is that the kernel can change
it seems RRND=1 is the impl specific algorithm.
> the seed randomly but, with only 4 bits per tag, it really doesn't
> matter much.
>
> Anyway, mentioning it here in case anyone is surprised later about the
> lack of RRND configurability.
i'm not familiar with how irg works.
is the seed per process state that's set
up at process startup in some way?
or shared (and thus effectively irg is
non-deterministic in userspace)?
next prev parent reply other threads:[~2020-05-15 12:04 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-21 14:25 [PATCH v3 00/23] arm64: Memory Tagging Extension user-space support Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 01/23] arm64: alternative: Allow alternative_insn to always issue the first instruction Catalin Marinas
2020-04-27 16:57 ` Dave Martin
2020-04-28 11:43 ` Catalin Marinas
2020-04-29 10:26 ` Dave Martin
2020-04-29 14:04 ` Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 02/23] arm64: mte: system register definitions Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 03/23] arm64: mte: CPU feature detection and initial sysreg configuration Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 04/23] arm64: mte: Use Normal Tagged attributes for the linear map Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 05/23] arm64: mte: Assembler macros and default architecture for .S files Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 06/23] arm64: mte: Tags-aware clear_page() implementation Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 07/23] arm64: mte: Tags-aware copy_page() implementation Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 08/23] arm64: Tags-aware memcmp_pages() implementation Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 09/23] arm64: mte: Add specific SIGSEGV codes Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 10/23] arm64: mte: Handle synchronous and asynchronous tag check faults Catalin Marinas
2020-04-23 10:38 ` Catalin Marinas
2020-04-27 16:58 ` Dave Martin
2020-04-28 13:43 ` Catalin Marinas
2020-04-29 10:26 ` Dave Martin
2020-04-21 14:25 ` [PATCH v3 11/23] mm: Introduce arch_calc_vm_flag_bits() Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 12/23] arm64: mte: Add PROT_MTE support to mmap() and mprotect() Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 13/23] mm: Introduce arch_validate_flags() Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 14/23] arm64: mte: Validate the PROT_MTE request via arch_validate_flags() Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 15/23] mm: Allow arm64 mmap(PROT_MTE) on RAM-based files Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 16/23] arm64: mte: Allow user control of the tag check mode via prctl() Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 17/23] arm64: mte: Allow user control of the generated random tags " Catalin Marinas
2020-04-21 14:25 ` [PATCH v3 18/23] arm64: mte: Restore the GCR_EL1 register after a suspend Catalin Marinas
2020-04-23 15:23 ` Lorenzo Pieralisi
2020-04-21 14:25 ` [PATCH v3 19/23] arm64: mte: Add PTRACE_{PEEK,POKE}MTETAGS support Catalin Marinas
2020-04-24 23:28 ` Peter Collingbourne
2020-04-29 10:27 ` Kevin Brodsky
2020-04-29 15:24 ` Catalin Marinas
2020-04-29 16:46 ` Dave Martin
2020-04-30 10:21 ` Catalin Marinas
2020-05-04 16:40 ` Dave Martin
2020-05-05 18:03 ` Luis Machado
2020-05-12 19:05 ` Luis Machado
2020-05-13 10:48 ` Catalin Marinas
2020-05-13 12:52 ` Luis Machado
2020-05-13 14:11 ` Catalin Marinas
2020-05-13 15:09 ` Luis Machado
2020-05-13 16:45 ` Luis Machado
2020-05-13 17:11 ` Catalin Marinas
2020-05-18 16:47 ` Dave Martin
2020-05-18 17:12 ` Luis Machado
2020-05-19 16:10 ` Catalin Marinas
2020-04-21 14:26 ` [PATCH v3 20/23] fs: Allow copy_mount_options() to access user-space in a single pass Catalin Marinas
2020-04-21 15:29 ` Al Viro
2020-04-21 16:45 ` Catalin Marinas
2020-04-27 16:56 ` Dave Martin
2020-04-28 14:06 ` Catalin Marinas
2020-04-29 10:28 ` Dave Martin
2020-04-28 18:16 ` Kevin Brodsky
2020-04-28 19:40 ` Catalin Marinas
2020-04-29 11:58 ` Catalin Marinas
2020-04-28 19:36 ` Catalin Marinas
2020-04-29 10:26 ` Dave Martin
2020-04-29 13:52 ` Catalin Marinas
2020-05-04 16:40 ` Dave Martin
2020-04-21 14:26 ` [PATCH v3 21/23] arm64: mte: Check the DT memory nodes for MTE support Catalin Marinas
2020-04-24 13:57 ` Catalin Marinas
2020-04-24 16:17 ` Catalin Marinas
2020-04-27 11:14 ` Suzuki K Poulose
2020-04-21 14:26 ` [PATCH v3 22/23] arm64: mte: Kconfig entry Catalin Marinas
2020-04-21 14:26 ` [PATCH v3 23/23] arm64: mte: Add Memory Tagging Extension documentation Catalin Marinas
2020-04-29 16:47 ` Dave Martin
2020-04-30 16:23 ` Catalin Marinas
2020-05-04 16:46 ` Dave Martin
2020-05-11 16:40 ` Catalin Marinas
2020-05-13 15:48 ` Dave Martin
2020-05-14 11:37 ` Catalin Marinas
2020-05-15 10:38 ` Catalin Marinas
2020-05-15 11:14 ` Szabolcs Nagy
2020-05-15 11:27 ` Catalin Marinas
2020-05-15 12:04 ` Szabolcs Nagy [this message]
2020-05-15 12:13 ` Catalin Marinas
2020-05-15 12:53 ` Szabolcs Nagy
2020-05-18 16:52 ` Dave Martin
2020-05-18 17:13 ` Catalin Marinas
2020-05-05 10:32 ` Szabolcs Nagy
2020-05-05 17:30 ` Catalin Marinas
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