* [linux-next:master 4777/12851] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:79:6: error: no previous prototype for function 'dcn201_update_clocks_vbios'
@ 2021-11-02 5:56 kernel test robot
0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2021-11-02 5:56 UTC (permalink / raw)
To: Zhan Liu
Cc: llvm, kbuild-all, Linux Memory Management List, Alex Deucher,
Charlene Liu
[-- Attachment #1: Type: text/plain, Size: 20932 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: 9febf119430617d18e1b6ee4b41ce7b07965e21f
commit: 3f68c01be9a2227de1e190317fe34a6fb835a094 [4777/12851] drm/amd/display: add cyan_skillfish display support
config: i386-buildonly-randconfig-r002-20211101 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 264d3b6d4e08401c5b50a85bd76e80b3461d77e6)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=3f68c01be9a2227de1e190317fe34a6fb835a094
git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
git fetch --no-tags linux-next master
git checkout 3f68c01be9a2227de1e190317fe34a6fb835a094
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:79:6: error: no previous prototype for function 'dcn201_update_clocks_vbios' [-Werror,-Wmissing-prototypes]
void dcn201_update_clocks_vbios(struct clk_mgr *clk_mgr,
^
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:79:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void dcn201_update_clocks_vbios(struct clk_mgr *clk_mgr,
^
static
>> drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:134:7: error: variable 'enter_display_off' set but not used [-Werror,-Wunused-but-set-variable]
bool enter_display_off = false;
^
2 errors generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn201/irq_service_dcn201.c:42:20: error: no previous prototype for function 'to_dal_irq_source_dcn201' [-Werror,-Wmissing-prototypes]
enum dc_irq_source to_dal_irq_source_dcn201(
^
drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn201/irq_service_dcn201.c:42:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
enum dc_irq_source to_dal_irq_source_dcn201(
^
static
1 error generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_init.c:127:6: error: no previous prototype for function 'dcn201_hw_sequencer_construct' [-Werror,-Wmissing-prototypes]
void dcn201_hw_sequencer_construct(struct dc *dc)
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_init.c:127:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void dcn201_hw_sequencer_construct(struct dc *dc)
^
static
1 error generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:365:2: error: initializer overrides prior initialization of this subobject [-Werror,-Winitializer-overrides]
DCN_AUX_MASK_SH_LIST(__SHIFT)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:203:2: note: expanded from macro 'DCN_AUX_MASK_SH_LIST'
AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:213:16: note: expanded from macro 'AUX_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:13:1: note: expanded from here
DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:16515:111: note: expanded from macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT'
#define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT 0x1f
^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:365:2: note: previous initialization is here
DCN_AUX_MASK_SH_LIST(__SHIFT)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:201:2: note: expanded from macro 'DCN_AUX_MASK_SH_LIST'
AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:213:16: note: expanded from macro 'AUX_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:7:1: note: expanded from here
DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:16515:111: note: expanded from macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT'
#define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT 0x1f
^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:369:2: error: initializer overrides prior initialization of this subobject [-Werror,-Winitializer-overrides]
DCN_AUX_MASK_SH_LIST(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:203:2: note: expanded from macro 'DCN_AUX_MASK_SH_LIST'
AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:213:16: note: expanded from macro 'AUX_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:70:1: note: expanded from here
DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:16519:111: note: expanded from macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK'
#define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK 0x80000000L
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:369:2: note: previous initialization is here
DCN_AUX_MASK_SH_LIST(_MASK)
^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:201:2: note: expanded from macro 'DCN_AUX_MASK_SH_LIST'
AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:213:16: note: expanded from macro 'AUX_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:64:1: note: expanded from here
DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:16519:111: note: expanded from macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK'
#define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK 0x80000000L
^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:407:3: error: initializer overrides prior initialization of this subobject [-Werror,-Winitializer-overrides]
LINK_ENCODER_MASK_SH_LIST_DCN201(__SHIFT)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:404:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN201'
LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:184:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:173:16: note: expanded from macro 'LE_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:86:1: note: expanded from here
DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:17500:111: note: expanded from macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
#define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:407:3: note: previous initialization is here
LINK_ENCODER_MASK_SH_LIST_DCN201(__SHIFT)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:404:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN201'
LINK_ENCODER_MASK_SH_LIST_DCN20(mask_sh)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.h:175:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN20'
LINK_ENCODER_MASK_SH_LIST_DCN10(mask_sh),\
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:181:2: note: expanded from macro 'LINK_ENCODER_MASK_SH_LIST_DCN10'
LE_SF(DIG0_TMDS_CTL_BITS, TMDS_CTL0, mask_sh), \
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.h:173:16: note: expanded from macro 'LE_SF'
.field_name = reg_name ## __ ## field_name ## post_fix
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
<scratch space>:66:1: note: expanded from here
DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_3_sh_mask.h:17500:111: note: expanded from macro 'DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT'
#define DIG0_TMDS_CTL_BITS__TMDS_CTL0__SHIFT 0x0
^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:411:3: error: initializer overrides prior initialization of this subobject [-Werror,-Winitializer-overrides]
LINK_ENCODER_MASK_SH_LIST_DCN201(_MASK)
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_hwseq.c:88:7: error: variable 'is_in_uma' set but not used [-Werror,-Wunused-but-set-variable]
bool is_in_uma;
^
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_hwseq.c:544:15: error: variable 'hubp' set but not used [-Werror,-Wunused-but-set-variable]
struct hubp *hubp = NULL;
^
2 errors generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_hubp.c:58:6: error: no previous prototype for function 'hubp201_program_deadline' [-Werror,-Wmissing-prototypes]
void hubp201_program_deadline(
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_hubp.c:58:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void hubp201_program_deadline(
^
static
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_hubp.c:66:6: error: no previous prototype for function 'hubp201_program_requestor' [-Werror,-Wmissing-prototypes]
void hubp201_program_requestor(
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_hubp.c:66:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void hubp201_program_requestor(
^
static
2 errors generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_dpp.c:185:11: error: variable 'pixel_width' set but not used [-Werror,-Wunused-but-set-variable]
uint32_t pixel_width;
^
1 error generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_dccg.c:47:6: error: no previous prototype for function 'dccg201_update_dpp_dto' [-Werror,-Wmissing-prototypes]
void dccg201_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk)
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_dccg.c:47:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void dccg201_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk)
^
static
1 error generated.
--
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_link_encoder.c:53:6: error: no previous prototype for function 'dcn201_link_encoder_get_max_link_cap' [-Werror,-Wmissing-prototypes]
void dcn201_link_encoder_get_max_link_cap(struct link_encoder *enc,
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_link_encoder.c:53:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void dcn201_link_encoder_get_max_link_cap(struct link_encoder *enc,
^
static
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_link_encoder.c:69:6: error: no previous prototype for function 'dcn201_link_encoder_is_in_alt_mode' [-Werror,-Wmissing-prototypes]
bool dcn201_link_encoder_is_in_alt_mode(struct link_encoder *enc)
^
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_link_encoder.c:69:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
bool dcn201_link_encoder_is_in_alt_mode(struct link_encoder *enc)
^
static
2 errors generated.
vim +/dcn201_update_clocks_vbios +79 drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
78
> 79 void dcn201_update_clocks_vbios(struct clk_mgr *clk_mgr,
80 struct dc_state *context,
81 bool safe_to_lower)
82 {
83 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
84
85 bool update_dppclk = false;
86 bool update_dispclk = false;
87
88 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->clks.dppclk_khz)) {
89 clk_mgr->clks.dppclk_khz = new_clocks->dppclk_khz;
90 update_dppclk = true;
91 }
92
93 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr->clks.dispclk_khz)) {
94 clk_mgr->clks.dispclk_khz = new_clocks->dispclk_khz;
95 update_dispclk = true;
96 }
97
98 if (update_dppclk || update_dispclk) {
99 struct bp_set_dce_clock_parameters dce_clk_params;
100 struct dc_bios *bp = clk_mgr->ctx->dc_bios;
101
102 if (update_dispclk) {
103 memset(&dce_clk_params, 0, sizeof(dce_clk_params));
104 dce_clk_params.target_clock_frequency = new_clocks->dispclk_khz;
105 dce_clk_params.pll_id = CLOCK_SOURCE_ID_DFS;
106 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK;
107 bp->funcs->set_dce_clock(bp, &dce_clk_params);
108 }
109 /* currently there is no DCECLOCK_TYPE_DPPCLK type defined in VBIOS interface.
110 * vbios program DPPCLK to the same DispCLK limitation
111 */
112 }
113 }
114
115 static void dcn201_init_clocks(struct clk_mgr *clk_mgr)
116 {
117 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
118 clk_mgr->clks.p_state_change_support = true;
119 clk_mgr->clks.prev_p_state_change_support = true;
120 clk_mgr->clks.max_supported_dppclk_khz = 1200000;
121 clk_mgr->clks.max_supported_dispclk_khz = 1200000;
122 }
123
124 static void dcn201_update_clocks(struct clk_mgr *clk_mgr_base,
125 struct dc_state *context,
126 bool safe_to_lower)
127 {
128 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
129 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
130 struct dc *dc = clk_mgr_base->ctx->dc;
131 int display_count;
132 bool update_dppclk = false;
133 bool update_dispclk = false;
> 134 bool enter_display_off = false;
135 bool dpp_clock_lowered = false;
136 bool force_reset = false;
137 bool p_state_change_support;
138 int total_plane_count;
139
140 if (dc->work_arounds.skip_clock_update)
141 return;
142
143 if (clk_mgr_base->clks.dispclk_khz == 0 ||
144 dc->debug.force_clock_mode & 0x1) {
145 force_reset = true;
146
147 dcn2_read_clocks_from_hw_dentist(clk_mgr_base);
148 }
149
150 display_count = clk_mgr_helper_get_active_display_cnt(dc, context);
151
152 if (display_count == 0)
153 enter_display_off = true;
154
155 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz))
156 clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz;
157
158 if (dc->debug.force_min_dcfclk_mhz > 0)
159 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ?
160 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000);
161
162 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz))
163 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz;
164
165 if (should_set_clock(safe_to_lower,
166 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz))
167 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz;
168
169 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz))
170 clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz;
171
172 total_plane_count = clk_mgr_helper_get_active_plane_cnt(dc, context);
173 p_state_change_support = new_clocks->p_state_change_support || (total_plane_count == 0);
174 if (should_update_pstate_support(safe_to_lower, p_state_change_support, clk_mgr_base->clks.p_state_change_support)) {
175 clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support;
176 clk_mgr_base->clks.p_state_change_support = p_state_change_support;
177 }
178
179 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz))
180 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz;
181
182 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) {
183 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz)
184 dpp_clock_lowered = true;
185 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz;
186
187 update_dppclk = true;
188 }
189
190 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) {
191 clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;
192
193 update_dispclk = true;
194 }
195
196 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) {
197 if (dpp_clock_lowered) {
198 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
199 dcn20_update_clocks_update_dentist(clk_mgr, context);
200 } else {
201 if (update_dppclk || update_dispclk)
202 dcn20_update_clocks_update_dentist(clk_mgr, context);
203 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)
204 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
205 }
206 }
207 }
208
---
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