Re: [PATCH v4 11/36] hexagon: Implement the new page table range API

From: Mike Rapoport <rppt@kernel.org>
To: "Matthew Wilcox (Oracle)" <willy@infradead.org>
Cc: linux-arch@vger.kernel.org, linux-mm@kvack.org,
	linux-kernel@vger.kernel.org, Brian Cain <bcain@quicinc.com>
Subject: Re: [PATCH v4 11/36] hexagon: Implement the new page table range API
Date: Wed, 15 Mar 2023 11:54:26 +0200	[thread overview]
Message-ID: <ZBGV0lFu+1c5E5jE@kernel.org> (raw)
In-Reply-To: <20230315051444.3229621-12-willy@infradead.org>

On Wed, Mar 15, 2023 at 05:14:19AM +0000, Matthew Wilcox (Oracle) wrote:
> Add PFN_PTE_SHIFT and update_mmu_cache_range().
> 
> Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
> Acked-by: Brian Cain <bcain@quicinc.com>

Acked-by: Mike Rapoport (IBM) <rppt@kernel.org>

> ---
>  arch/hexagon/include/asm/cacheflush.h | 7 +++++--
>  arch/hexagon/include/asm/pgtable.h    | 9 +--------
>  2 files changed, 6 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/hexagon/include/asm/cacheflush.h b/arch/hexagon/include/asm/cacheflush.h
> index 6eff0730e6ef..63ca314ede89 100644
> --- a/arch/hexagon/include/asm/cacheflush.h
> +++ b/arch/hexagon/include/asm/cacheflush.h
> @@ -58,12 +58,15 @@ extern void flush_cache_all_hexagon(void);
>   * clean the cache when the PTE is set.
>   *
>   */
> -static inline void update_mmu_cache(struct vm_area_struct *vma,
> -					unsigned long address, pte_t *ptep)
> +static inline void update_mmu_cache_range(struct vm_area_struct *vma,
> +		unsigned long address, pte_t *ptep, unsigned int nr)
>  {
>  	/*  generic_ptrace_pokedata doesn't wind up here, does it?  */
>  }
>  
> +#define update_mmu_cache(vma, addr, ptep) \
> +	update_mmu_cache_range(vma, addr, ptep, 1)
> +
>  void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
>  		       unsigned long vaddr, void *dst, void *src, int len);
>  #define copy_to_user_page copy_to_user_page
> diff --git a/arch/hexagon/include/asm/pgtable.h b/arch/hexagon/include/asm/pgtable.h
> index 59393613d086..dd05dd71b8ec 100644
> --- a/arch/hexagon/include/asm/pgtable.h
> +++ b/arch/hexagon/include/asm/pgtable.h
> @@ -338,6 +338,7 @@ static inline int pte_exec(pte_t pte)
>  /* __swp_entry_to_pte - extract PTE from swap entry */
>  #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
>  
> +#define PFN_PTE_SHIFT	PAGE_SHIFT
>  /* pfn_pte - convert page number and protection value to page table entry */
>  #define pfn_pte(pfn, pgprot) __pte((pfn << PAGE_SHIFT) | pgprot_val(pgprot))
>  
> @@ -345,14 +346,6 @@ static inline int pte_exec(pte_t pte)
>  #define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
>  #define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval))
>  
> -/*
> - * set_pte_at - update page table and do whatever magic may be
> - * necessary to make the underlying hardware/firmware take note.
> - *
> - * VM may require a virtual instruction to alert the MMU.
> - */
> -#define set_pte_at(mm, addr, ptep, pte) set_pte(ptep, pte)
> -
>  static inline unsigned long pmd_page_vaddr(pmd_t pmd)
>  {
>  	return (unsigned long)__va(pmd_val(pmd) & PAGE_MASK);
> -- 
> 2.39.2
> 

-- 
Sincerely yours,
Mike.