* [PATCH V1] mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain sdhc hosts
@ 2020-02-07 8:01 Veerabhadrarao Badiganti
2020-02-07 12:04 ` [PATCH V2] " Veerabhadrarao Badiganti
0 siblings, 1 reply; 5+ messages in thread
From: Veerabhadrarao Badiganti @ 2020-02-07 8:01 UTC (permalink / raw)
To: ulf.hansson, adrian.hunter
Cc: asutoshd, stummala, sayalil, cang, rampraka, linux-mmc,
linux-kernel, linux-arm-msm, Ritesh Harjani,
Veerabhadrarao Badiganti, Andy Gross, Bjorn Andersson
From: Ritesh Harjani <riteshh@codeaurora.org>
SDHC core with new 14lpp and later tech DLL should not enable
PWRSAVE_DLL since such controller's internal gating cannot meet
following MCLK requirement:
When MCLK is gated OFF, it is not gated for less than 0.5us and MCLK
must be switched on for at-least 1us before DATA starts coming.
Adding support for this requirement.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
---
drivers/mmc/host/sdhci-msm.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index c3a160c..f27f891 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -977,9 +977,21 @@ static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
goto out;
}
- config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3);
- config |= CORE_PWRSAVE_DLL;
- writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec3);
+ /*
+ * Set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3.
+ * When MCLK is gated OFF, it is not gated for less than 0.5us
+ * and MCLK must be switched on for at-least 1us before DATA
+ * starts coming. Controllers with 14lpp and later tech DLL cannot
+ * guarantee above requirement. So PWRSAVE_DLL should not be
+ * turned on for host controllers using this DLL.
+ */
+ if (msm_host->use_14lpp_dll_reset) {
+ config = readl_relaxed(host->ioaddr +
+ msm_offset->core_vendor_spec3);
+ config |= CORE_PWRSAVE_DLL;
+ writel_relaxed(config, host->ioaddr +
+ msm_offset->core_vendor_spec3);
+ }
/*
* Drain writebuffer to ensure above DLL calibration
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH V2] mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain sdhc hosts
2020-02-07 8:01 [PATCH V1] mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain sdhc hosts Veerabhadrarao Badiganti
@ 2020-02-07 12:04 ` Veerabhadrarao Badiganti
2020-02-07 12:07 ` Can Guo
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Veerabhadrarao Badiganti @ 2020-02-07 12:04 UTC (permalink / raw)
To: ulf.hansson, adrian.hunter
Cc: asutoshd, stummala, sayalil, cang, rampraka, linux-mmc,
linux-kernel, linux-arm-msm, Ritesh Harjani,
Veerabhadrarao Badiganti, Andy Gross, Bjorn Andersson
From: Ritesh Harjani <riteshh@codeaurora.org>
SDHC core with new 14lpp and later tech DLL should not enable
PWRSAVE_DLL since such controller's internal gating cannot meet
following MCLK requirement:
When MCLK is gated OFF, it is not gated for less than 0.5us and MCLK
must be switched on for at-least 1us before DATA starts coming.
Adding support for this requirement.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
--
Changes since V1:
Condition was not correct in V1, which is corrected in V2
--
---
drivers/mmc/host/sdhci-msm.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index c3a160c..aa5b610 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -977,9 +977,21 @@ static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
goto out;
}
- config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3);
- config |= CORE_PWRSAVE_DLL;
- writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec3);
+ /*
+ * Set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3.
+ * When MCLK is gated OFF, it is not gated for less than 0.5us
+ * and MCLK must be switched on for at-least 1us before DATA
+ * starts coming. Controllers with 14lpp and later tech DLL cannot
+ * guarantee above requirement. So PWRSAVE_DLL should not be
+ * turned on for host controllers using this DLL.
+ */
+ if (!msm_host->use_14lpp_dll_reset) {
+ config = readl_relaxed(host->ioaddr +
+ msm_offset->core_vendor_spec3);
+ config |= CORE_PWRSAVE_DLL;
+ writel_relaxed(config, host->ioaddr +
+ msm_offset->core_vendor_spec3);
+ }
/*
* Drain writebuffer to ensure above DLL calibration
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH V2] mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain sdhc hosts
2020-02-07 12:04 ` [PATCH V2] " Veerabhadrarao Badiganti
@ 2020-02-07 12:07 ` Can Guo
2020-02-18 7:11 ` Adrian Hunter
2020-02-18 23:38 ` Ulf Hansson
2 siblings, 0 replies; 5+ messages in thread
From: Can Guo @ 2020-02-07 12:07 UTC (permalink / raw)
To: Veerabhadrarao Badiganti
Cc: ulf.hansson, adrian.hunter, asutoshd, stummala, sayalil,
rampraka, linux-mmc, linux-kernel, linux-arm-msm, Ritesh Harjani,
Andy Gross, Bjorn Andersson
On 2020-02-07 20:04, Veerabhadrarao Badiganti wrote:
> From: Ritesh Harjani <riteshh@codeaurora.org>
>
> SDHC core with new 14lpp and later tech DLL should not enable
> PWRSAVE_DLL since such controller's internal gating cannot meet
> following MCLK requirement:
> When MCLK is gated OFF, it is not gated for less than 0.5us and MCLK
> must be switched on for at-least 1us before DATA starts coming.
>
> Adding support for this requirement.
>
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
> --
Reviewed-by: Can Guo <cang@codeaurora.org>
>
> Changes since V1:
> Condition was not correct in V1, which is corrected in V2
>
> --
> ---
> drivers/mmc/host/sdhci-msm.c | 18 +++++++++++++++---
> 1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c
> b/drivers/mmc/host/sdhci-msm.c
> index c3a160c..aa5b610 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -977,9 +977,21 @@ static int
> sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
> goto out;
> }
>
> - config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3);
> - config |= CORE_PWRSAVE_DLL;
> - writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec3);
> + /*
> + * Set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3.
> + * When MCLK is gated OFF, it is not gated for less than 0.5us
> + * and MCLK must be switched on for at-least 1us before DATA
> + * starts coming. Controllers with 14lpp and later tech DLL cannot
> + * guarantee above requirement. So PWRSAVE_DLL should not be
> + * turned on for host controllers using this DLL.
> + */
> + if (!msm_host->use_14lpp_dll_reset) {
> + config = readl_relaxed(host->ioaddr +
> + msm_offset->core_vendor_spec3);
> + config |= CORE_PWRSAVE_DLL;
> + writel_relaxed(config, host->ioaddr +
> + msm_offset->core_vendor_spec3);
> + }
>
> /*
> * Drain writebuffer to ensure above DLL calibration
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH V2] mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain sdhc hosts
2020-02-07 12:04 ` [PATCH V2] " Veerabhadrarao Badiganti
2020-02-07 12:07 ` Can Guo
@ 2020-02-18 7:11 ` Adrian Hunter
2020-02-18 23:38 ` Ulf Hansson
2 siblings, 0 replies; 5+ messages in thread
From: Adrian Hunter @ 2020-02-18 7:11 UTC (permalink / raw)
To: Veerabhadrarao Badiganti, ulf.hansson
Cc: asutoshd, stummala, sayalil, cang, rampraka, linux-mmc,
linux-kernel, linux-arm-msm, Ritesh Harjani, Andy Gross,
Bjorn Andersson
On 7/02/20 2:04 pm, Veerabhadrarao Badiganti wrote:
> From: Ritesh Harjani <riteshh@codeaurora.org>
>
> SDHC core with new 14lpp and later tech DLL should not enable
> PWRSAVE_DLL since such controller's internal gating cannot meet
> following MCLK requirement:
> When MCLK is gated OFF, it is not gated for less than 0.5us and MCLK
> must be switched on for at-least 1us before DATA starts coming.
>
> Adding support for this requirement.
>
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> --
>
> Changes since V1:
> Condition was not correct in V1, which is corrected in V2
>
> --
> ---
> drivers/mmc/host/sdhci-msm.c | 18 +++++++++++++++---
> 1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index c3a160c..aa5b610 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -977,9 +977,21 @@ static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
> goto out;
> }
>
> - config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3);
> - config |= CORE_PWRSAVE_DLL;
> - writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec3);
> + /*
> + * Set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3.
> + * When MCLK is gated OFF, it is not gated for less than 0.5us
> + * and MCLK must be switched on for at-least 1us before DATA
> + * starts coming. Controllers with 14lpp and later tech DLL cannot
> + * guarantee above requirement. So PWRSAVE_DLL should not be
> + * turned on for host controllers using this DLL.
> + */
> + if (!msm_host->use_14lpp_dll_reset) {
> + config = readl_relaxed(host->ioaddr +
> + msm_offset->core_vendor_spec3);
> + config |= CORE_PWRSAVE_DLL;
> + writel_relaxed(config, host->ioaddr +
> + msm_offset->core_vendor_spec3);
> + }
>
> /*
> * Drain writebuffer to ensure above DLL calibration
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH V2] mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain sdhc hosts
2020-02-07 12:04 ` [PATCH V2] " Veerabhadrarao Badiganti
2020-02-07 12:07 ` Can Guo
2020-02-18 7:11 ` Adrian Hunter
@ 2020-02-18 23:38 ` Ulf Hansson
2 siblings, 0 replies; 5+ messages in thread
From: Ulf Hansson @ 2020-02-18 23:38 UTC (permalink / raw)
To: Veerabhadrarao Badiganti
Cc: Adrian Hunter, Asutosh Das, Sahitya Tummala, Sayali Lokhande,
cang, Ram Prakash Gupta, linux-mmc, Linux Kernel Mailing List,
linux-arm-msm, Ritesh Harjani, Andy Gross, Bjorn Andersson
On Fri, 7 Feb 2020 at 13:05, Veerabhadrarao Badiganti
<vbadigan@codeaurora.org> wrote:
>
> From: Ritesh Harjani <riteshh@codeaurora.org>
>
> SDHC core with new 14lpp and later tech DLL should not enable
> PWRSAVE_DLL since such controller's internal gating cannot meet
> following MCLK requirement:
> When MCLK is gated OFF, it is not gated for less than 0.5us and MCLK
> must be switched on for at-least 1us before DATA starts coming.
>
> Adding support for this requirement.
>
> Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Applied for next, thanks!
Kind regards
Uffe
> --
>
> Changes since V1:
> Condition was not correct in V1, which is corrected in V2
>
> --
> ---
> drivers/mmc/host/sdhci-msm.c | 18 +++++++++++++++---
> 1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index c3a160c..aa5b610 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -977,9 +977,21 @@ static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
> goto out;
> }
>
> - config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3);
> - config |= CORE_PWRSAVE_DLL;
> - writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec3);
> + /*
> + * Set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3.
> + * When MCLK is gated OFF, it is not gated for less than 0.5us
> + * and MCLK must be switched on for at-least 1us before DATA
> + * starts coming. Controllers with 14lpp and later tech DLL cannot
> + * guarantee above requirement. So PWRSAVE_DLL should not be
> + * turned on for host controllers using this DLL.
> + */
> + if (!msm_host->use_14lpp_dll_reset) {
> + config = readl_relaxed(host->ioaddr +
> + msm_offset->core_vendor_spec3);
> + config |= CORE_PWRSAVE_DLL;
> + writel_relaxed(config, host->ioaddr +
> + msm_offset->core_vendor_spec3);
> + }
>
> /*
> * Drain writebuffer to ensure above DLL calibration
> --
> Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-02-18 23:38 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-07 8:01 [PATCH V1] mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain sdhc hosts Veerabhadrarao Badiganti
2020-02-07 12:04 ` [PATCH V2] " Veerabhadrarao Badiganti
2020-02-07 12:07 ` Can Guo
2020-02-18 7:11 ` Adrian Hunter
2020-02-18 23:38 ` Ulf Hansson
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