* [PATCH v5 1/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Convert to yaml file
@ 2021-03-16 2:06 Shawn Lin
2021-03-16 2:06 ` [PATCH v5 2/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Add rockchip support Shawn Lin
2021-03-16 2:06 ` [PATCH v5 3/3] mmc: sdhci-of-dwcmshc: add rockchip platform support Shawn Lin
0 siblings, 2 replies; 4+ messages in thread
From: Shawn Lin @ 2021-03-16 2:06 UTC (permalink / raw)
To: Rob Herring, Ulf Hansson
Cc: linux-mmc, Adrian Hunter, devicetree, linux-rockchip, Shawn Lin
This patch converts sdhci-of-dwcmshc.txt to sdhci-of-dwcmshc.yaml
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes in v5: None
Changes in v4:
- add tag from Rob
Series-changes: 3
- fix filename and other improvments suggested by Rob
.../devicetree/bindings/mmc/sdhci-of-dwcmshc.txt | 20 -------
.../bindings/mmc/snps,dwcmshc-sdhci.yaml | 63 ++++++++++++++++++++++
2 files changed, 63 insertions(+), 20 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt
create mode 100644 Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt b/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt
deleted file mode 100644
index ee4253b..0000000
--- a/Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-* Synopsys DesignWare Cores Mobile Storage Host Controller
-
-Required properties:
-- compatible: should be one of the following:
- "snps,dwcmshc-sdhci"
-- reg: offset and length of the register set for the device.
-- interrupts: a single interrupt specifier.
-- clocks: Array of clocks required for SDHCI; requires at least one for
- core clock.
-- clock-names: Array of names corresponding to clocks property; shall be
- "core" for core clock and "bus" for optional bus clock.
-
-Example:
- sdhci2: sdhci@aa0000 {
- compatible = "snps,dwcmshc-sdhci";
- reg = <0xaa0000 0x1000>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&emmcclk>;
- bus-width = <8>;
- }
diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
new file mode 100644
index 0000000..f99fb9f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synopsys Designware Mobile Storage Host Controller Binding
+
+maintainers:
+ - Ulf Hansson <ulf.hansson@linaro.org>
+ - Jisheng Zhang <Jisheng.Zhang@synaptics.com>
+
+allOf:
+ - $ref: mmc-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - snps,dwcmshc-sdhci
+
+ reg:
+ minItems: 1
+ items:
+ - description: Offset and length of the register set for the device
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ - description: core clock
+ - description: bus clock for optional
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: core
+ - const: bus
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ mmc@aa0000 {
+ compatible = "snps,dwcmshc-sdhci";
+ reg = <0xaa000 0x1000>;
+ interrupts = <0 25 0x4>;
+ clocks = <&cru 17>, <&cru 18>;
+ clock-names = "core", "bus";
+ bus-width = <8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+...
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v5 2/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Add rockchip support
2021-03-16 2:06 [PATCH v5 1/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Convert to yaml file Shawn Lin
@ 2021-03-16 2:06 ` Shawn Lin
2021-03-16 2:06 ` [PATCH v5 3/3] mmc: sdhci-of-dwcmshc: add rockchip platform support Shawn Lin
1 sibling, 0 replies; 4+ messages in thread
From: Shawn Lin @ 2021-03-16 2:06 UTC (permalink / raw)
To: Rob Herring, Ulf Hansson
Cc: linux-mmc, Adrian Hunter, devicetree, linux-rockchip, Shawn Lin
This patch adds rockchip support in sdhci-of-dwcmhsc.yaml
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
Changes in v5: None
Changes in v4:
- rename compatible to rockchip,rk3568-dwcmshc
- constrains rockchip,txclk-tapnum to u8 to match the register map
.../bindings/mmc/snps,dwcmshc-sdhci.yaml | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
index f99fb9f..e6c9a2f 100644
--- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
@@ -16,6 +16,7 @@ allOf:
properties:
compatible:
enum:
+ - rockchip,rk3568-dwcmshc
- snps,dwcmshc-sdhci
reg:
@@ -31,12 +32,24 @@ properties:
items:
- description: core clock
- description: bus clock for optional
+ - description: axi clock for rockchip specified
+ - description: block clock for rockchip specified
+ - description: timer clock for rockchip specified
+
clock-names:
minItems: 1
items:
- const: core
- const: bus
+ - const: axi
+ - const: block
+ - const: timer
+
+ rockchip,txclk-tapnum:
+ description: Specify the number of delay for tx sampling.
+ $ref: /schemas/types.yaml#/definitions/uint8
+
required:
- compatible
@@ -49,6 +62,17 @@ unevaluatedProperties: false
examples:
- |
+ mmc@fe310000 {
+ compatible = "rockchip,rk3568-dwcmshc";
+ reg = <0xfe310000 0x10000>;
+ interrupts = <0 25 0x4>;
+ clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>;
+ clock-names = "core", "bus", "axi", "block", "timer";
+ bus-width = <8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ - |
mmc@aa0000 {
compatible = "snps,dwcmshc-sdhci";
reg = <0xaa000 0x1000>;
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v5 3/3] mmc: sdhci-of-dwcmshc: add rockchip platform support
2021-03-16 2:06 [PATCH v5 1/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Convert to yaml file Shawn Lin
2021-03-16 2:06 ` [PATCH v5 2/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Add rockchip support Shawn Lin
@ 2021-03-16 2:06 ` Shawn Lin
2021-03-16 6:10 ` kernel test robot
1 sibling, 1 reply; 4+ messages in thread
From: Shawn Lin @ 2021-03-16 2:06 UTC (permalink / raw)
To: Rob Herring, Ulf Hansson
Cc: linux-mmc, Adrian Hunter, devicetree, linux-rockchip, Shawn Lin
sdhci based synopsys MMC IP is also used on some rockchip platforms,
so add a basic support here.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
Changes in v5:
- read vendor area1 from standard IP reg and move hs400es
out of rockchip specified, as suggested.
- improve as Johan suggested
- remove Adrian's tag for new review
Changes in v4:
- add comments for disabling rx invert
- add tag from Adrian
drivers/mmc/host/sdhci-of-dwcmshc.c | 259 ++++++++++++++++++++++++++++++++++--
1 file changed, 251 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index 59d8d96..7a8bc16 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -9,9 +9,11 @@
#include <linux/clk.h>
#include <linux/dma-mapping.h>
+#include <linux/iopoll.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/sizes.h>
#include "sdhci-pltfm.h"
@@ -21,11 +23,52 @@
/* DWCMSHC specific Mode Select value */
#define DWCMSHC_CTRL_HS400 0x7
+/* DWC IP vendor area 1 pointer */
+#define DWCMSHC_P_VENDOR_AREA1 0xe8
+#define DWCMSHC_AREA1_MASK GENMASK(11, 0)
+/* Offset inside the vendor area 1 */
+#define DWCMSHC_HOST_CTRL3 0x8
+#define DWCMSHC_EMMC_CONTROL 0x2c
+#define DWCMSHC_ENHANCED_STROBE BIT(8)
+#define DWCMSHC_EMMC_ATCTRL 0x40
+
+/* Rockchip specific Registers */
+#define DWCMSHC_EMMC_DLL_CTRL 0x800
+#define DWCMSHC_EMMC_DLL_RXCLK 0x804
+#define DWCMSHC_EMMC_DLL_TXCLK 0x808
+#define DWCMSHC_EMMC_DLL_STRBIN 0x80c
+#define DLL_STRBIN_TAPNUM_FROM_SW BIT(24)
+#define DWCMSHC_EMMC_DLL_STATUS0 0x840
+#define DWCMSHC_EMMC_DLL_START BIT(0)
+#define DWCMSHC_EMMC_DLL_LOCKED BIT(8)
+#define DWCMSHC_EMMC_DLL_TIMEOUT BIT(9)
+#define DWCMSHC_EMMC_DLL_RXCLK_SRCSEL 29
+#define DWCMSHC_EMMC_DLL_START_POINT 16
+#define DWCMSHC_EMMC_DLL_INC 8
+#define DWCMSHC_EMMC_DLL_DLYENA BIT(27)
+#define DLL_TXCLK_TAPNUM_DEFAULT 0x8
+#define DLL_STRBIN_TAPNUM_DEFAULT 0x8
+#define DLL_TXCLK_TAPNUM_FROM_SW BIT(24)
+#define DLL_RXCLK_NO_INVERTER 1
+#define DLL_RXCLK_INVERTER 0
+#define DLL_LOCK_WO_TMOUT(x) \
+ ((((x) & DWCMSHC_EMMC_DLL_LOCKED) == DWCMSHC_EMMC_DLL_LOCKED) && \
+ (((x) & DWCMSHC_EMMC_DLL_TIMEOUT) == 0))
+#define RK3568_MAX_CLKS 3
+
#define BOUNDARY_OK(addr, len) \
((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
+struct rk3568_priv {
+ /* Rockchip specified optional clocks */
+ struct clk_bulk_data rockchip_clks[RK3568_MAX_CLKS];
+ u8 txclk_tapnum;
+};
+
struct dwcmshc_priv {
struct clk *bus_clk;
+ int vendor_specific_area1; /* P_VENDOR_SPECIFIC_AREA reg */
+ void *priv; /* pointer to SoC private stuff */
};
/*
@@ -100,6 +143,106 @@ static void dwcmshc_set_uhs_signaling(struct sdhci_host *host,
sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
}
+static void dwcmshc_hs400_enhanced_strobe(struct mmc_host *mmc,
+ struct mmc_ios *ios)
+{
+ u32 vendor;
+ struct sdhci_host *host = mmc_priv(mmc);
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
+ int reg = priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL;
+
+ vendor = sdhci_readl(host, reg);
+ if (ios->enhanced_strobe)
+ vendor |= DWCMSHC_ENHANCED_STROBE;
+ else
+ vendor &= ~DWCMSHC_ENHANCED_STROBE;
+
+ sdhci_writel(host, vendor, reg);
+}
+
+static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host);
+ struct rk3568_priv *priv = dwc_priv->priv;
+ u8 txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
+ u32 extra;
+ int err;
+
+ host->mmc->actual_clock = 0;
+
+ /*
+ * DO NOT TOUCH THIS SETTING. RX clk inverter unit is enabled
+ * by default, but it shouldn't be enabled. We should anyway
+ * disable it before issuing any cmds.
+ */
+ extra = DWCMSHC_EMMC_DLL_DLYENA |
+ DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL;
+ sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK);
+
+ if (clock == 0)
+ return;
+
+ /* Rockchip platform only support 375KHz for identify mode */
+ if (clock <= 400000)
+ clock = 375000;
+
+ err = clk_set_rate(pltfm_host->clk, clock);
+ if (err)
+ dev_err(mmc_dev(host->mmc), "fail to set clock %d", clock);
+
+ sdhci_set_clock(host, clock);
+
+ /* Disable cmd conflict check */
+ extra = sdhci_readl(host, DWCMSHC_HOST_CTRL3);
+ extra &= ~BIT(0);
+ sdhci_writel(host, extra, DWCMSHC_HOST_CTRL3);
+
+ if (clock <= 400000) {
+ /* Disable DLL to reset sample clock */
+ sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_CTRL);
+ return;
+ }
+
+ /* Reset DLL */
+ sdhci_writel(host, BIT(1), DWCMSHC_EMMC_DLL_CTRL);
+ udelay(1);
+ sdhci_writel(host, 0x0, DWCMSHC_EMMC_DLL_CTRL);
+
+ /* Init DLL settings */
+ extra = 0x5 << DWCMSHC_EMMC_DLL_START_POINT |
+ 0x2 << DWCMSHC_EMMC_DLL_INC |
+ DWCMSHC_EMMC_DLL_START;
+ sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL);
+ err = readl_poll_timeout(host->ioaddr + DWCMSHC_EMMC_DLL_STATUS0,
+ extra, DLL_LOCK_WO_TMOUT(extra), 1,
+ 500 * USEC_PER_MSEC);
+ if (err) {
+ dev_err(mmc_dev(host->mmc), "DLL lock timeout!\n");
+ return;
+ }
+
+ extra = 0x1 << 16 | /* tune clock stop en */
+ 0x2 << 17 | /* pre-change delay */
+ 0x3 << 19; /* post-change delay */
+ sdhci_writel(host, extra, DWCMSHC_EMMC_ATCTRL);
+
+ if (host->mmc->ios.timing == MMC_TIMING_MMC_HS200 ||
+ host->mmc->ios.timing == MMC_TIMING_MMC_HS400)
+ txclk_tapnum = priv->txclk_tapnum;
+
+ extra = DWCMSHC_EMMC_DLL_DLYENA |
+ DLL_TXCLK_TAPNUM_FROM_SW |
+ txclk_tapnum;
+ sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK);
+
+ extra = DWCMSHC_EMMC_DLL_DLYENA |
+ DLL_STRBIN_TAPNUM_DEFAULT |
+ DLL_STRBIN_TAPNUM_FROM_SW;
+ sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN);
+}
+
static const struct sdhci_ops sdhci_dwcmshc_ops = {
.set_clock = sdhci_set_clock,
.set_bus_width = sdhci_set_bus_width,
@@ -109,21 +252,92 @@ static const struct sdhci_ops sdhci_dwcmshc_ops = {
.adma_write_desc = dwcmshc_adma_write_desc,
};
+static const struct sdhci_ops sdhci_dwcmshc_rk3568_ops = {
+ .set_clock = dwcmshc_rk3568_set_clock,
+ .set_bus_width = sdhci_set_bus_width,
+ .set_uhs_signaling = dwcmshc_set_uhs_signaling,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
+ .reset = sdhci_reset,
+ .adma_write_desc = dwcmshc_adma_write_desc,
+};
+
static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
.ops = &sdhci_dwcmshc_ops,
.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
};
+static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
+ .ops = &sdhci_dwcmshc_rk3568_ops,
+ .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
+ SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
+ .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+ SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
+};
+
+static int dwcmshc_rk3568_init(struct sdhci_host *host, struct rk3568_priv *priv)
+{
+ int err;
+
+ priv->rockchip_clks[0].id = "axi";
+ priv->rockchip_clks[1].id = "block";
+ priv->rockchip_clks[2].id = "timer";
+ err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
+ priv->rockchip_clks);
+ if (err) {
+ dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
+ return err;
+ }
+
+ err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
+ if (err) {
+ dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
+ return err;
+ }
+
+ if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
+ &priv->txclk_tapnum))
+ priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
+
+ /* Disable cmd conflict check */
+ sdhci_writel(host, 0x0, DWCMSHC_HOST_CTRL3);
+ /* Reset previous settings */
+ sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
+ sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
+
+ return 0;
+}
+
+static const struct of_device_id sdhci_dwcmshc_dt_ids[] = {
+ {
+ .compatible = "rockchip,rk3568-dwcmshc",
+ .data = &sdhci_dwcmshc_rk3568_pdata,
+ },
+ {
+ .compatible = "snps,dwcmshc-sdhci",
+ .data = &sdhci_dwcmshc_pdata,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sdhci_dwcmshc_dt_ids);
+
static int dwcmshc_probe(struct platform_device *pdev)
{
struct sdhci_pltfm_host *pltfm_host;
struct sdhci_host *host;
struct dwcmshc_priv *priv;
+ struct rk3568_priv *rk_priv;
+ const struct sdhci_pltfm_data *pltfm_data;
int err;
u32 extra;
- host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
+ pltfm_data = of_device_get_match_data(&pdev->dev);
+ if (!pltfm_data) {
+ dev_err(&pdev->dev, "Error: No device match data found\n");
+ return -ENODEV;
+ }
+
+ host = sdhci_pltfm_init(pdev, pltfm_data,
sizeof(struct dwcmshc_priv));
if (IS_ERR(host))
return PTR_ERR(host);
@@ -159,7 +373,23 @@ static int dwcmshc_probe(struct platform_device *pdev)
sdhci_get_of_property(pdev);
+ priv->vendor_specific_area1 =
+ sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK;
+
host->mmc_host_ops.request = dwcmshc_request;
+ host->mmc_host_ops.hs400_enhanced_strobe = dwcmshc_hs400_enhanced_strobe;
+
+ if (pltfm_data == &sdhci_dwcmshc_rk3568_pdata) {
+ rk_priv = devm_kzalloc(&pdev->dev, sizeof(struct rk3568_priv), GFP_KERNEL);
+ if (!rk_priv)
+ goto err_clk;
+
+ priv->priv = rk_priv;
+
+ err = dwcmshc_rk3568_init(host, rk_priv);
+ if (err)
+ goto err_clk;
+ }
err = sdhci_add_host(host);
if (err)
@@ -170,6 +400,9 @@ static int dwcmshc_probe(struct platform_device *pdev)
err_clk:
clk_disable_unprepare(pltfm_host->clk);
clk_disable_unprepare(priv->bus_clk);
+ if (rk_priv)
+ clk_bulk_disable_unprepare(RK3568_MAX_CLKS,
+ rk_priv->rockchip_clks);
free_pltfm:
sdhci_pltfm_free(pdev);
return err;
@@ -180,12 +413,15 @@ static int dwcmshc_remove(struct platform_device *pdev)
struct sdhci_host *host = platform_get_drvdata(pdev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
+ struct rk3568_priv *rk_priv = priv->priv;
sdhci_remove_host(host, 0);
clk_disable_unprepare(pltfm_host->clk);
clk_disable_unprepare(priv->bus_clk);
-
+ if (rk_priv)
+ clk_bulk_disable_unprepare(RK3568_MAX_CLKS,
+ rk_priv->rockchip_clks);
sdhci_pltfm_free(pdev);
return 0;
@@ -197,6 +433,7 @@ static int dwcmshc_suspend(struct device *dev)
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
+ struct rk3568_priv *rk_priv = priv->priv;
int ret;
ret = sdhci_suspend_host(host);
@@ -207,6 +444,10 @@ static int dwcmshc_suspend(struct device *dev)
if (!IS_ERR(priv->bus_clk))
clk_disable_unprepare(priv->bus_clk);
+ if (rk_priv)
+ clk_bulk_disable_unprepare(RK3568_MAX_CLKS,
+ rk_priv->rockchip_clks);
+
return ret;
}
@@ -215,6 +456,7 @@ static int dwcmshc_resume(struct device *dev)
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
+ struct rk3568_priv *rk_priv = priv->priv;
int ret;
ret = clk_prepare_enable(pltfm_host->clk);
@@ -227,18 +469,19 @@ static int dwcmshc_resume(struct device *dev)
return ret;
}
+ if (rk_priv) {
+ ret = clk_bulk_prepare_enable(RK3568_MAX_CLKS,
+ rk_priv->rockchip_clks);
+ if (ret)
+ return ret;
+ }
+
return sdhci_resume_host(host);
}
#endif
static SIMPLE_DEV_PM_OPS(dwcmshc_pmops, dwcmshc_suspend, dwcmshc_resume);
-static const struct of_device_id sdhci_dwcmshc_dt_ids[] = {
- { .compatible = "snps,dwcmshc-sdhci" },
- {}
-};
-MODULE_DEVICE_TABLE(of, sdhci_dwcmshc_dt_ids);
-
static struct platform_driver sdhci_dwcmshc_driver = {
.driver = {
.name = "sdhci-dwcmshc",
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v5 3/3] mmc: sdhci-of-dwcmshc: add rockchip platform support
2021-03-16 2:06 ` [PATCH v5 3/3] mmc: sdhci-of-dwcmshc: add rockchip platform support Shawn Lin
@ 2021-03-16 6:10 ` kernel test robot
0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2021-03-16 6:10 UTC (permalink / raw)
To: Shawn Lin, Rob Herring, Ulf Hansson
Cc: kbuild-all, clang-built-linux, linux-mmc, Adrian Hunter,
devicetree, linux-rockchip, Shawn Lin
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Hi Shawn,
I love your patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master v5.12-rc3 next-20210315]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Shawn-Lin/dt-bindings-mmc-sdhci-of-dwcmhsc-Convert-to-yaml-file/20210316-100829
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: powerpc-randconfig-r002-20210316 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 50c7504a93fdb90c26870db8c8ea7add895c7725)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://github.com/0day-ci/linux/commit/4e67269c227f3ccf6904cdc31971bf6534d1bcf3
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Shawn-Lin/dt-bindings-mmc-sdhci-of-dwcmhsc-Convert-to-yaml-file/20210316-100829
git checkout 4e67269c227f3ccf6904cdc31971bf6534d1bcf3
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:11:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/powerpc/include/asm/io.h:619:
arch/powerpc/include/asm/io-defs.h:43:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
DEF_PCI_AC_NORET(insb, (unsigned long p, void *b, unsigned long c),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/powerpc/include/asm/io.h:616:3: note: expanded from macro 'DEF_PCI_AC_NORET'
__do_##name al; \
^~~~~~~~~~~~~~
<scratch space>:10:1: note: expanded from here
__do_insb
^
arch/powerpc/include/asm/io.h:556:56: note: expanded from macro '__do_insb'
#define __do_insb(p, b, n) readsb((PCI_IO_ADDR)_IO_BASE+(p), (b), (n))
~~~~~~~~~~~~~~~~~~~~~^
In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:11:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/powerpc/include/asm/io.h:619:
arch/powerpc/include/asm/io-defs.h:45:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
DEF_PCI_AC_NORET(insw, (unsigned long p, void *b, unsigned long c),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/powerpc/include/asm/io.h:616:3: note: expanded from macro 'DEF_PCI_AC_NORET'
__do_##name al; \
^~~~~~~~~~~~~~
<scratch space>:12:1: note: expanded from here
__do_insw
^
arch/powerpc/include/asm/io.h:557:56: note: expanded from macro '__do_insw'
#define __do_insw(p, b, n) readsw((PCI_IO_ADDR)_IO_BASE+(p), (b), (n))
~~~~~~~~~~~~~~~~~~~~~^
In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:11:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/powerpc/include/asm/io.h:619:
arch/powerpc/include/asm/io-defs.h:47:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
DEF_PCI_AC_NORET(insl, (unsigned long p, void *b, unsigned long c),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/powerpc/include/asm/io.h:616:3: note: expanded from macro 'DEF_PCI_AC_NORET'
__do_##name al; \
^~~~~~~~~~~~~~
<scratch space>:14:1: note: expanded from here
__do_insl
^
arch/powerpc/include/asm/io.h:558:56: note: expanded from macro '__do_insl'
#define __do_insl(p, b, n) readsl((PCI_IO_ADDR)_IO_BASE+(p), (b), (n))
~~~~~~~~~~~~~~~~~~~~~^
In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:11:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/powerpc/include/asm/io.h:619:
arch/powerpc/include/asm/io-defs.h:49:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
DEF_PCI_AC_NORET(outsb, (unsigned long p, const void *b, unsigned long c),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/powerpc/include/asm/io.h:616:3: note: expanded from macro 'DEF_PCI_AC_NORET'
__do_##name al; \
^~~~~~~~~~~~~~
<scratch space>:16:1: note: expanded from here
__do_outsb
^
arch/powerpc/include/asm/io.h:559:58: note: expanded from macro '__do_outsb'
#define __do_outsb(p, b, n) writesb((PCI_IO_ADDR)_IO_BASE+(p),(b),(n))
~~~~~~~~~~~~~~~~~~~~~^
In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:11:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/powerpc/include/asm/io.h:619:
arch/powerpc/include/asm/io-defs.h:51:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
DEF_PCI_AC_NORET(outsw, (unsigned long p, const void *b, unsigned long c),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/powerpc/include/asm/io.h:616:3: note: expanded from macro 'DEF_PCI_AC_NORET'
__do_##name al; \
^~~~~~~~~~~~~~
<scratch space>:18:1: note: expanded from here
__do_outsw
^
arch/powerpc/include/asm/io.h:560:58: note: expanded from macro '__do_outsw'
#define __do_outsw(p, b, n) writesw((PCI_IO_ADDR)_IO_BASE+(p),(b),(n))
~~~~~~~~~~~~~~~~~~~~~^
In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:11:
In file included from include/linux/dma-mapping.h:10:
In file included from include/linux/scatterlist.h:9:
In file included from arch/powerpc/include/asm/io.h:619:
arch/powerpc/include/asm/io-defs.h:53:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
DEF_PCI_AC_NORET(outsl, (unsigned long p, const void *b, unsigned long c),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/powerpc/include/asm/io.h:616:3: note: expanded from macro 'DEF_PCI_AC_NORET'
__do_##name al; \
^~~~~~~~~~~~~~
<scratch space>:20:1: note: expanded from here
__do_outsl
^
arch/powerpc/include/asm/io.h:561:58: note: expanded from macro '__do_outsl'
#define __do_outsl(p, b, n) writesl((PCI_IO_ADDR)_IO_BASE+(p),(b),(n))
~~~~~~~~~~~~~~~~~~~~~^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:371:6: warning: variable 'rk_priv' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
if (err)
^~~
drivers/mmc/host/sdhci-of-dwcmshc.c:403:6: note: uninitialized use occurs here
if (rk_priv)
^~~~~~~
drivers/mmc/host/sdhci-of-dwcmshc.c:371:2: note: remove the 'if' if its condition is always false
if (err)
^~~~~~~~
drivers/mmc/host/sdhci-of-dwcmshc.c:329:29: note: initialize the variable 'rk_priv' to silence this warning
struct rk3568_priv *rk_priv;
^
= NULL
7 warnings generated.
vim +371 drivers/mmc/host/sdhci-of-dwcmshc.c
4e67269c227f3c Shawn Lin 2021-03-16 323
e438cf49b3053e Jisheng Zhang 2018-07-06 324 static int dwcmshc_probe(struct platform_device *pdev)
e438cf49b3053e Jisheng Zhang 2018-07-06 325 {
e438cf49b3053e Jisheng Zhang 2018-07-06 326 struct sdhci_pltfm_host *pltfm_host;
e438cf49b3053e Jisheng Zhang 2018-07-06 327 struct sdhci_host *host;
e438cf49b3053e Jisheng Zhang 2018-07-06 328 struct dwcmshc_priv *priv;
4e67269c227f3c Shawn Lin 2021-03-16 329 struct rk3568_priv *rk_priv;
4e67269c227f3c Shawn Lin 2021-03-16 330 const struct sdhci_pltfm_data *pltfm_data;
e438cf49b3053e Jisheng Zhang 2018-07-06 331 int err;
b85c997d2cfefe Jisheng Zhang 2018-08-28 332 u32 extra;
e438cf49b3053e Jisheng Zhang 2018-07-06 333
4e67269c227f3c Shawn Lin 2021-03-16 334 pltfm_data = of_device_get_match_data(&pdev->dev);
4e67269c227f3c Shawn Lin 2021-03-16 335 if (!pltfm_data) {
4e67269c227f3c Shawn Lin 2021-03-16 336 dev_err(&pdev->dev, "Error: No device match data found\n");
4e67269c227f3c Shawn Lin 2021-03-16 337 return -ENODEV;
4e67269c227f3c Shawn Lin 2021-03-16 338 }
4e67269c227f3c Shawn Lin 2021-03-16 339
4e67269c227f3c Shawn Lin 2021-03-16 340 host = sdhci_pltfm_init(pdev, pltfm_data,
e438cf49b3053e Jisheng Zhang 2018-07-06 341 sizeof(struct dwcmshc_priv));
e438cf49b3053e Jisheng Zhang 2018-07-06 342 if (IS_ERR(host))
e438cf49b3053e Jisheng Zhang 2018-07-06 343 return PTR_ERR(host);
e438cf49b3053e Jisheng Zhang 2018-07-06 344
b85c997d2cfefe Jisheng Zhang 2018-08-28 345 /*
b85c997d2cfefe Jisheng Zhang 2018-08-28 346 * extra adma table cnt for cross 128M boundary handling.
b85c997d2cfefe Jisheng Zhang 2018-08-28 347 */
b85c997d2cfefe Jisheng Zhang 2018-08-28 348 extra = DIV_ROUND_UP_ULL(dma_get_required_mask(&pdev->dev), SZ_128M);
b85c997d2cfefe Jisheng Zhang 2018-08-28 349 if (extra > SDHCI_MAX_SEGS)
b85c997d2cfefe Jisheng Zhang 2018-08-28 350 extra = SDHCI_MAX_SEGS;
b85c997d2cfefe Jisheng Zhang 2018-08-28 351 host->adma_table_cnt += extra;
b85c997d2cfefe Jisheng Zhang 2018-08-28 352
e438cf49b3053e Jisheng Zhang 2018-07-06 353 pltfm_host = sdhci_priv(host);
e438cf49b3053e Jisheng Zhang 2018-07-06 354 priv = sdhci_pltfm_priv(pltfm_host);
e438cf49b3053e Jisheng Zhang 2018-07-06 355
e438cf49b3053e Jisheng Zhang 2018-07-06 356 pltfm_host->clk = devm_clk_get(&pdev->dev, "core");
e438cf49b3053e Jisheng Zhang 2018-07-06 357 if (IS_ERR(pltfm_host->clk)) {
e438cf49b3053e Jisheng Zhang 2018-07-06 358 err = PTR_ERR(pltfm_host->clk);
e438cf49b3053e Jisheng Zhang 2018-07-06 359 dev_err(&pdev->dev, "failed to get core clk: %d\n", err);
e438cf49b3053e Jisheng Zhang 2018-07-06 360 goto free_pltfm;
e438cf49b3053e Jisheng Zhang 2018-07-06 361 }
e438cf49b3053e Jisheng Zhang 2018-07-06 362 err = clk_prepare_enable(pltfm_host->clk);
e438cf49b3053e Jisheng Zhang 2018-07-06 363 if (err)
e438cf49b3053e Jisheng Zhang 2018-07-06 364 goto free_pltfm;
e438cf49b3053e Jisheng Zhang 2018-07-06 365
e438cf49b3053e Jisheng Zhang 2018-07-06 366 priv->bus_clk = devm_clk_get(&pdev->dev, "bus");
e438cf49b3053e Jisheng Zhang 2018-07-06 367 if (!IS_ERR(priv->bus_clk))
e438cf49b3053e Jisheng Zhang 2018-07-06 368 clk_prepare_enable(priv->bus_clk);
e438cf49b3053e Jisheng Zhang 2018-07-06 369
e438cf49b3053e Jisheng Zhang 2018-07-06 370 err = mmc_of_parse(host->mmc);
e438cf49b3053e Jisheng Zhang 2018-07-06 @371 if (err)
e438cf49b3053e Jisheng Zhang 2018-07-06 372 goto err_clk;
e438cf49b3053e Jisheng Zhang 2018-07-06 373
e438cf49b3053e Jisheng Zhang 2018-07-06 374 sdhci_get_of_property(pdev);
e438cf49b3053e Jisheng Zhang 2018-07-06 375
4e67269c227f3c Shawn Lin 2021-03-16 376 priv->vendor_specific_area1 =
4e67269c227f3c Shawn Lin 2021-03-16 377 sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK;
4e67269c227f3c Shawn Lin 2021-03-16 378
ca1219c0a74322 Jisheng Zhang 2020-12-29 379 host->mmc_host_ops.request = dwcmshc_request;
4e67269c227f3c Shawn Lin 2021-03-16 380 host->mmc_host_ops.hs400_enhanced_strobe = dwcmshc_hs400_enhanced_strobe;
4e67269c227f3c Shawn Lin 2021-03-16 381
4e67269c227f3c Shawn Lin 2021-03-16 382 if (pltfm_data == &sdhci_dwcmshc_rk3568_pdata) {
4e67269c227f3c Shawn Lin 2021-03-16 383 rk_priv = devm_kzalloc(&pdev->dev, sizeof(struct rk3568_priv), GFP_KERNEL);
4e67269c227f3c Shawn Lin 2021-03-16 384 if (!rk_priv)
4e67269c227f3c Shawn Lin 2021-03-16 385 goto err_clk;
4e67269c227f3c Shawn Lin 2021-03-16 386
4e67269c227f3c Shawn Lin 2021-03-16 387 priv->priv = rk_priv;
4e67269c227f3c Shawn Lin 2021-03-16 388
4e67269c227f3c Shawn Lin 2021-03-16 389 err = dwcmshc_rk3568_init(host, rk_priv);
4e67269c227f3c Shawn Lin 2021-03-16 390 if (err)
4e67269c227f3c Shawn Lin 2021-03-16 391 goto err_clk;
4e67269c227f3c Shawn Lin 2021-03-16 392 }
ca1219c0a74322 Jisheng Zhang 2020-12-29 393
e438cf49b3053e Jisheng Zhang 2018-07-06 394 err = sdhci_add_host(host);
e438cf49b3053e Jisheng Zhang 2018-07-06 395 if (err)
e438cf49b3053e Jisheng Zhang 2018-07-06 396 goto err_clk;
e438cf49b3053e Jisheng Zhang 2018-07-06 397
e438cf49b3053e Jisheng Zhang 2018-07-06 398 return 0;
e438cf49b3053e Jisheng Zhang 2018-07-06 399
e438cf49b3053e Jisheng Zhang 2018-07-06 400 err_clk:
e438cf49b3053e Jisheng Zhang 2018-07-06 401 clk_disable_unprepare(pltfm_host->clk);
e438cf49b3053e Jisheng Zhang 2018-07-06 402 clk_disable_unprepare(priv->bus_clk);
4e67269c227f3c Shawn Lin 2021-03-16 403 if (rk_priv)
4e67269c227f3c Shawn Lin 2021-03-16 404 clk_bulk_disable_unprepare(RK3568_MAX_CLKS,
4e67269c227f3c Shawn Lin 2021-03-16 405 rk_priv->rockchip_clks);
e438cf49b3053e Jisheng Zhang 2018-07-06 406 free_pltfm:
e438cf49b3053e Jisheng Zhang 2018-07-06 407 sdhci_pltfm_free(pdev);
e438cf49b3053e Jisheng Zhang 2018-07-06 408 return err;
e438cf49b3053e Jisheng Zhang 2018-07-06 409 }
e438cf49b3053e Jisheng Zhang 2018-07-06 410
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-03-16 6:14 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-16 2:06 [PATCH v5 1/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Convert to yaml file Shawn Lin
2021-03-16 2:06 ` [PATCH v5 2/3] dt-bindings: mmc: sdhci-of-dwcmhsc: Add rockchip support Shawn Lin
2021-03-16 2:06 ` [PATCH v5 3/3] mmc: sdhci-of-dwcmshc: add rockchip platform support Shawn Lin
2021-03-16 6:10 ` kernel test robot
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