* [PATCH v2 0/4] arm64: dts: qcom: qdu1000: add SDHCI
@ 2023-05-22 9:36 Komal Bajaj
2023-05-22 9:36 ` [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible Komal Bajaj
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Komal Bajaj @ 2023-05-22 9:36 UTC (permalink / raw)
To: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Bjorn Andersson, Konrad Dybcio, Bhupesh Sharma
Cc: Komal Bajaj, linux-mmc, devicetree, linux-kernel, linux-arm-msm
Add sdhc instance for supporting eMMC on QDU1000 and
QRU1000 SoCs.
Changes in v2-
* Updated the binding alphabetically.
* Removed extra comments as suggested by Bhupesh.
* Moved non-removable, no-sd, no-sdio and other properties from
soc to board dts file as suggested by Bhupesh and Konrad.
* Removed extra newlines and leading zeroes as suggested by Konrad.
* Modified sdhc1_opp_table.
* Updated the SDHC node entries alphabetically.
* Moved the status entry at the end.
Komal Bajaj (4):
dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible
arm: dts: qcom: qdu1000: Add SDHCI node
arm64: dts: qcom: qdu1000: Add SDHCI1 pin configuration to DTSI
arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc
.../devicetree/bindings/mmc/sdhci-msm.yaml | 1 +
arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 ++++
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 101 ++++++++++++++++++
3 files changed, 125 insertions(+)
--
2.17.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible
2023-05-22 9:36 [PATCH v2 0/4] arm64: dts: qcom: qdu1000: add SDHCI Komal Bajaj
@ 2023-05-22 9:36 ` Komal Bajaj
2023-05-22 9:50 ` Bhupesh Sharma
2023-05-22 9:36 ` [PATCH v2 2/4] arm: dts: qcom: qdu1000: Add SDHCI node Komal Bajaj
` (2 subsequent siblings)
3 siblings, 1 reply; 11+ messages in thread
From: Komal Bajaj @ 2023-05-22 9:36 UTC (permalink / raw)
To: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Bjorn Andersson, Konrad Dybcio, Bhupesh Sharma
Cc: Komal Bajaj, linux-mmc, devicetree, linux-kernel, linux-arm-msm
Document the compatible for SDHCI on QDU1000 and QRU1000 SoCs.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 4f2d9e8127dd..af29d60ff0d6 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
@@ -39,6 +39,7 @@ properties:
- qcom,ipq9574-sdhci
- qcom,qcm2290-sdhci
- qcom,qcs404-sdhci
+ - qcom,qdu1000-sdhci
- qcom,sc7180-sdhci
- qcom,sc7280-sdhci
- qcom,sdm630-sdhci
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 2/4] arm: dts: qcom: qdu1000: Add SDHCI node
2023-05-22 9:36 [PATCH v2 0/4] arm64: dts: qcom: qdu1000: add SDHCI Komal Bajaj
2023-05-22 9:36 ` [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible Komal Bajaj
@ 2023-05-22 9:36 ` Komal Bajaj
2023-05-22 15:01 ` Bjorn Andersson
2023-05-22 9:36 ` [PATCH v2 3/4] arm64: dts: qcom: qdu1000: Add SDHCI1 pin configuration to DTSI Komal Bajaj
2023-05-22 9:36 ` [PATCH v2 4/4] arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc Komal Bajaj
3 siblings, 1 reply; 11+ messages in thread
From: Komal Bajaj @ 2023-05-22 9:36 UTC (permalink / raw)
To: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Bjorn Andersson, Konrad Dybcio, Bhupesh Sharma
Cc: Komal Bajaj, linux-mmc, devicetree, linux-kernel, linux-arm-msm
Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs.
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 51 +++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 734438113bba..38ee7115a35f 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -19,6 +19,10 @@
chosen: chosen { };
+ aliases {
+ mmc0 = &sdhc_1; /* eMMC */
+ };
+
cpus {
#address-cells = <2>;
#size-cells = <0>;
@@ -842,6 +846,53 @@
#hwlock-cells = <1>;
};
+ sdhc_1: mmc@8804000 {
+ compatible = "qcom,qdu1000-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0x0 0x08804000 0x0 0x1000>,
+ <0x0 0x08805000 0x0 0x1000>;
+ reg-names = "hc", "cqhci";
+
+ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC5_AHB_CLK>,
+ <&gcc GCC_SDCC5_APPS_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface",
+ "core",
+ "xo";
+
+ resets = <&gcc GCC_SDCC5_BCR>;
+
+ interconnects = <&system_noc MASTER_SDCC_1 0 &mc_virt SLAVE_EBI1 0>,
+ <&gem_noc MASTER_APPSS_PROC 0 &system_noc SLAVE_SDCC_2 0>;
+ interconnect-names = "sdhc-ddr", "cpu-sdhc";
+ power-domains = <&rpmhpd QDU1000_CX>;
+ operating-points-v2 = <&sdhc1_opp_table>;
+
+ iommus = <&apps_smmu 0x80 0x0>;
+ dma-coherent;
+
+ bus-width = <8>;
+
+ qcom,dll-config = <0x0007642c>;
+ qcom,ddr-config = <0x80040868>;
+
+ status = "disabled";
+
+ sdhc1_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ opp-peak-kBps = <6528000 1652800>;
+ opp-avg-kBps = <400000 0>;
+ };
+ };
+ };
+
pdc: interrupt-controller@b220000 {
compatible = "qcom,qdu1000-pdc", "qcom,pdc";
reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 3/4] arm64: dts: qcom: qdu1000: Add SDHCI1 pin configuration to DTSI
2023-05-22 9:36 [PATCH v2 0/4] arm64: dts: qcom: qdu1000: add SDHCI Komal Bajaj
2023-05-22 9:36 ` [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible Komal Bajaj
2023-05-22 9:36 ` [PATCH v2 2/4] arm: dts: qcom: qdu1000: Add SDHCI node Komal Bajaj
@ 2023-05-22 9:36 ` Komal Bajaj
2023-05-22 9:49 ` Bhupesh Sharma
2023-05-22 9:36 ` [PATCH v2 4/4] arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc Komal Bajaj
3 siblings, 1 reply; 11+ messages in thread
From: Komal Bajaj @ 2023-05-22 9:36 UTC (permalink / raw)
To: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Bjorn Andersson, Konrad Dybcio, Bhupesh Sharma
Cc: Komal Bajaj, linux-mmc, devicetree, linux-kernel, linux-arm-msm
Add required pins for SDHCI1, so that the interface can work reliably.
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>wq
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 50 +++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 38ee7115a35f..6f23cbfc024c 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1151,6 +1151,56 @@
pins = "gpio31";
function = "gpio";
};
+
+ sdc1_on_state: sdc1-on-state {
+ clk-pins {
+ pins = "sdc1_clk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc1_cmd";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc1_data";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+
+ rclk-pins {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
+ };
+
+ sdc1_off_state: sdc1-off-state {
+ clk-pins {
+ pins = "sdc1_clk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc1_cmd";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc1_data";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ rclk-pins {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
+ };
};
apps_smmu: iommu@15000000 {
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 4/4] arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc
2023-05-22 9:36 [PATCH v2 0/4] arm64: dts: qcom: qdu1000: add SDHCI Komal Bajaj
` (2 preceding siblings ...)
2023-05-22 9:36 ` [PATCH v2 3/4] arm64: dts: qcom: qdu1000: Add SDHCI1 pin configuration to DTSI Komal Bajaj
@ 2023-05-22 9:36 ` Komal Bajaj
2023-05-22 9:53 ` Bhupesh Sharma
3 siblings, 1 reply; 11+ messages in thread
From: Komal Bajaj @ 2023-05-22 9:36 UTC (permalink / raw)
To: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Bjorn Andersson, Konrad Dybcio, Bhupesh Sharma
Cc: Komal Bajaj, linux-mmc, devicetree, linux-kernel, linux-arm-msm
Add sdhci node for emmc in qdu1000-idp.
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
index 9e9fd4b8023e..61d8446a2d55 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
@@ -451,3 +451,26 @@
&uart7 {
status = "okay";
};
+
+&sdhc_1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sdc1_on_state>;
+ pinctrl-1 = <&sdc1_off_state>;
+
+ cap-mmc-hw-reset;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+
+ non-removable;
+ no-sd;
+ no-sdio;
+
+ supports-cqe;
+
+ vmmc-supply = <&vreg_l10a_2p95>;
+ vqmmc-supply = <&vreg_l7a_1p8>;
+
+ status = "okay";
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 3/4] arm64: dts: qcom: qdu1000: Add SDHCI1 pin configuration to DTSI
2023-05-22 9:36 ` [PATCH v2 3/4] arm64: dts: qcom: qdu1000: Add SDHCI1 pin configuration to DTSI Komal Bajaj
@ 2023-05-22 9:49 ` Bhupesh Sharma
0 siblings, 0 replies; 11+ messages in thread
From: Bhupesh Sharma @ 2023-05-22 9:49 UTC (permalink / raw)
To: Komal Bajaj
Cc: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Bjorn Andersson, Konrad Dybcio, linux-mmc,
devicetree, linux-kernel, linux-arm-msm
On Mon, 22 May 2023 at 15:06, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
>
> Add required pins for SDHCI1, so that the interface can work reliably.
>
> Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>wq
Err.. an extra wq .. I think this can be fixed while applying, so
should not require a new version.
Thanks,
Bhupesh
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 50 +++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> index 38ee7115a35f..6f23cbfc024c 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> @@ -1151,6 +1151,56 @@
> pins = "gpio31";
> function = "gpio";
> };
> +
> + sdc1_on_state: sdc1-on-state {
> + clk-pins {
> + pins = "sdc1_clk";
> + drive-strength = <16>;
> + bias-disable;
> + };
> +
> + cmd-pins {
> + pins = "sdc1_cmd";
> + drive-strength = <10>;
> + bias-pull-up;
> + };
> +
> + data-pins {
> + pins = "sdc1_data";
> + drive-strength = <10>;
> + bias-pull-up;
> + };
> +
> + rclk-pins {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> +
> + sdc1_off_state: sdc1-off-state {
> + clk-pins {
> + pins = "sdc1_clk";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + cmd-pins {
> + pins = "sdc1_cmd";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + data-pins {
> + pins = "sdc1_data";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + rclk-pins {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> };
>
> apps_smmu: iommu@15000000 {
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible
2023-05-22 9:36 ` [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible Komal Bajaj
@ 2023-05-22 9:50 ` Bhupesh Sharma
0 siblings, 0 replies; 11+ messages in thread
From: Bhupesh Sharma @ 2023-05-22 9:50 UTC (permalink / raw)
To: Komal Bajaj
Cc: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Bjorn Andersson, Konrad Dybcio, linux-mmc,
devicetree, linux-kernel, linux-arm-msm
On Mon, 22 May 2023 at 15:06, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
>
> Document the compatible for SDHCI on QDU1000 and QRU1000 SoCs.
>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> ---
> Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> index 4f2d9e8127dd..af29d60ff0d6 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
> @@ -39,6 +39,7 @@ properties:
> - qcom,ipq9574-sdhci
> - qcom,qcm2290-sdhci
> - qcom,qcs404-sdhci
> + - qcom,qdu1000-sdhci
> - qcom,sc7180-sdhci
> - qcom,sc7280-sdhci
> - qcom,sdm630-sdhci
> --
> 2.17.1
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Thanks.
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc
2023-05-22 9:36 ` [PATCH v2 4/4] arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc Komal Bajaj
@ 2023-05-22 9:53 ` Bhupesh Sharma
2023-05-23 13:54 ` Komal Bajaj
0 siblings, 1 reply; 11+ messages in thread
From: Bhupesh Sharma @ 2023-05-22 9:53 UTC (permalink / raw)
To: Komal Bajaj
Cc: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Bjorn Andersson, Konrad Dybcio, linux-mmc,
devicetree, linux-kernel, linux-arm-msm
On Mon, 22 May 2023 at 15:06, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
>
> Add sdhci node for emmc in qdu1000-idp.
>
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> index 9e9fd4b8023e..61d8446a2d55 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> @@ -451,3 +451,26 @@
> &uart7 {
> status = "okay";
> };
> +
> +&sdhc_1 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sdc1_on_state>;
> + pinctrl-1 = <&sdc1_off_state>;
> +
> + cap-mmc-hw-reset;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> +
> + non-removable;
> + no-sd;
> + no-sdio;
> +
> + supports-cqe;
> +
> + vmmc-supply = <&vreg_l10a_2p95>;
> + vqmmc-supply = <&vreg_l7a_1p8>;
> +
> + status = "okay";
> +};
This node is out of alphabetical order again.
&uart7 would follow &sdhc_1 and so on...
Thanks,
Bhupesh
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] arm: dts: qcom: qdu1000: Add SDHCI node
2023-05-22 9:36 ` [PATCH v2 2/4] arm: dts: qcom: qdu1000: Add SDHCI node Komal Bajaj
@ 2023-05-22 15:01 ` Bjorn Andersson
2023-05-23 13:53 ` Komal Bajaj
0 siblings, 1 reply; 11+ messages in thread
From: Bjorn Andersson @ 2023-05-22 15:01 UTC (permalink / raw)
To: Komal Bajaj
Cc: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Konrad Dybcio, Bhupesh Sharma, linux-mmc, devicetree,
linux-kernel, linux-arm-msm
On Mon, May 22, 2023 at 03:06:18PM +0530, Komal Bajaj wrote:
Path says arch/arm64/, so $subject should start "arm64: dts: qcom: ..."
> Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs.
>
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 51 +++++++++++++++++++++++++++
> 1 file changed, 51 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> index 734438113bba..38ee7115a35f 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> @@ -19,6 +19,10 @@
>
> chosen: chosen { };
>
> + aliases {
> + mmc0 = &sdhc_1; /* eMMC */
Don't we just have a single SDC instance on this platform? If so you
don't need aliases.
> + };
> +
> cpus {
> #address-cells = <2>;
> #size-cells = <0>;
> @@ -842,6 +846,53 @@
> #hwlock-cells = <1>;
> };
>
> + sdhc_1: mmc@8804000 {
And you can skip the "_1" suffix...
Regards,
Bjorn
> + compatible = "qcom,qdu1000-sdhci", "qcom,sdhci-msm-v5";
> + reg = <0x0 0x08804000 0x0 0x1000>,
> + <0x0 0x08805000 0x0 0x1000>;
> + reg-names = "hc", "cqhci";
> +
> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC5_AHB_CLK>,
> + <&gcc GCC_SDCC5_APPS_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface",
> + "core",
> + "xo";
> +
> + resets = <&gcc GCC_SDCC5_BCR>;
> +
> + interconnects = <&system_noc MASTER_SDCC_1 0 &mc_virt SLAVE_EBI1 0>,
> + <&gem_noc MASTER_APPSS_PROC 0 &system_noc SLAVE_SDCC_2 0>;
> + interconnect-names = "sdhc-ddr", "cpu-sdhc";
> + power-domains = <&rpmhpd QDU1000_CX>;
> + operating-points-v2 = <&sdhc1_opp_table>;
> +
> + iommus = <&apps_smmu 0x80 0x0>;
> + dma-coherent;
> +
> + bus-width = <8>;
> +
> + qcom,dll-config = <0x0007642c>;
> + qcom,ddr-config = <0x80040868>;
> +
> + status = "disabled";
> +
> + sdhc1_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-384000000 {
> + opp-hz = /bits/ 64 <384000000>;
> + required-opps = <&rpmhpd_opp_nom>;
> + opp-peak-kBps = <6528000 1652800>;
> + opp-avg-kBps = <400000 0>;
> + };
> + };
> + };
> +
> pdc: interrupt-controller@b220000 {
> compatible = "qcom,qdu1000-pdc", "qcom,pdc";
> reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/4] arm: dts: qcom: qdu1000: Add SDHCI node
2023-05-22 15:01 ` Bjorn Andersson
@ 2023-05-23 13:53 ` Komal Bajaj
0 siblings, 0 replies; 11+ messages in thread
From: Komal Bajaj @ 2023-05-23 13:53 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Konrad Dybcio, Bhupesh Sharma, linux-mmc, devicetree,
linux-kernel, linux-arm-msm
On 5/22/2023 8:31 PM, Bjorn Andersson wrote:
> On Mon, May 22, 2023 at 03:06:18PM +0530, Komal Bajaj wrote:
>
> Path says arch/arm64/, so $subject should start "arm64: dts: qcom: ..."
>
>> Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs.
>>
>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 51 +++++++++++++++++++++++++++
>> 1 file changed, 51 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
>> index 734438113bba..38ee7115a35f 100644
>> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
>> @@ -19,6 +19,10 @@
>>
>> chosen: chosen { };
>>
>> + aliases {
>> + mmc0 = &sdhc_1; /* eMMC */
> Don't we just have a single SDC instance on this platform? If so you
> don't need aliases.
Sure, will remove aliases.
>
>> + };
>> +
>> cpus {
>> #address-cells = <2>;
>> #size-cells = <0>;
>> @@ -842,6 +846,53 @@
>> #hwlock-cells = <1>;
>> };
>>
>> + sdhc_1: mmc@8804000 {
> And you can skip the "_1" suffix...
Sure
Thanks
Komal
>
> Regards,
> Bjorn
>
>> + compatible = "qcom,qdu1000-sdhci", "qcom,sdhci-msm-v5";
>> + reg = <0x0 0x08804000 0x0 0x1000>,
>> + <0x0 0x08805000 0x0 0x1000>;
>> + reg-names = "hc", "cqhci";
>> +
>> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "hc_irq", "pwr_irq";
>> +
>> + clocks = <&gcc GCC_SDCC5_AHB_CLK>,
>> + <&gcc GCC_SDCC5_APPS_CLK>,
>> + <&rpmhcc RPMH_CXO_CLK>;
>> + clock-names = "iface",
>> + "core",
>> + "xo";
>> +
>> + resets = <&gcc GCC_SDCC5_BCR>;
>> +
>> + interconnects = <&system_noc MASTER_SDCC_1 0 &mc_virt SLAVE_EBI1 0>,
>> + <&gem_noc MASTER_APPSS_PROC 0 &system_noc SLAVE_SDCC_2 0>;
>> + interconnect-names = "sdhc-ddr", "cpu-sdhc";
>> + power-domains = <&rpmhpd QDU1000_CX>;
>> + operating-points-v2 = <&sdhc1_opp_table>;
>> +
>> + iommus = <&apps_smmu 0x80 0x0>;
>> + dma-coherent;
>> +
>> + bus-width = <8>;
>> +
>> + qcom,dll-config = <0x0007642c>;
>> + qcom,ddr-config = <0x80040868>;
>> +
>> + status = "disabled";
>> +
>> + sdhc1_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-384000000 {
>> + opp-hz = /bits/ 64 <384000000>;
>> + required-opps = <&rpmhpd_opp_nom>;
>> + opp-peak-kBps = <6528000 1652800>;
>> + opp-avg-kBps = <400000 0>;
>> + };
>> + };
>> + };
>> +
>> pdc: interrupt-controller@b220000 {
>> compatible = "qcom,qdu1000-pdc", "qcom,pdc";
>> reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
>> --
>> 2.17.1
>>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 4/4] arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc
2023-05-22 9:53 ` Bhupesh Sharma
@ 2023-05-23 13:54 ` Komal Bajaj
0 siblings, 0 replies; 11+ messages in thread
From: Komal Bajaj @ 2023-05-23 13:54 UTC (permalink / raw)
To: Bhupesh Sharma
Cc: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Andy Gross, Bjorn Andersson, Konrad Dybcio, linux-mmc,
devicetree, linux-kernel, linux-arm-msm
On 5/22/2023 3:23 PM, Bhupesh Sharma wrote:
> On Mon, 22 May 2023 at 15:06, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
>> Add sdhci node for emmc in qdu1000-idp.
>>
>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 +++++++++++++++++++++++
>> 1 file changed, 23 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>> index 9e9fd4b8023e..61d8446a2d55 100644
>> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>> @@ -451,3 +451,26 @@
>> &uart7 {
>> status = "okay";
>> };
>> +
>> +&sdhc_1 {
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&sdc1_on_state>;
>> + pinctrl-1 = <&sdc1_off_state>;
>> +
>> + cap-mmc-hw-reset;
>> + mmc-ddr-1_8v;
>> + mmc-hs200-1_8v;
>> + mmc-hs400-1_8v;
>> + mmc-hs400-enhanced-strobe;
>> +
>> + non-removable;
>> + no-sd;
>> + no-sdio;
>> +
>> + supports-cqe;
>> +
>> + vmmc-supply = <&vreg_l10a_2p95>;
>> + vqmmc-supply = <&vreg_l7a_1p8>;
>> +
>> + status = "okay";
>> +};
> This node is out of alphabetical order again.
> &uart7 would follow &sdhc_1 and so on...
Sure will change this next version.
Thanks
Komal
>
> Thanks,
> Bhupesh
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2023-05-23 13:55 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-22 9:36 [PATCH v2 0/4] arm64: dts: qcom: qdu1000: add SDHCI Komal Bajaj
2023-05-22 9:36 ` [PATCH v2 1/4] dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible Komal Bajaj
2023-05-22 9:50 ` Bhupesh Sharma
2023-05-22 9:36 ` [PATCH v2 2/4] arm: dts: qcom: qdu1000: Add SDHCI node Komal Bajaj
2023-05-22 15:01 ` Bjorn Andersson
2023-05-23 13:53 ` Komal Bajaj
2023-05-22 9:36 ` [PATCH v2 3/4] arm64: dts: qcom: qdu1000: Add SDHCI1 pin configuration to DTSI Komal Bajaj
2023-05-22 9:49 ` Bhupesh Sharma
2023-05-22 9:36 ` [PATCH v2 4/4] arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc Komal Bajaj
2023-05-22 9:53 ` Bhupesh Sharma
2023-05-23 13:54 ` Komal Bajaj
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