From: Ulf Hansson <ulf.hansson@linaro.org>
To: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Adrian Hunter <adrian.hunter@intel.com>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
DTML <devicetree@vger.kernel.org>
Subject: Re: [PATCH 1/2] dt-bindings: mmc: arasan: Add compatible strings for Intel Keem Bay
Date: Wed, 18 Mar 2020 12:08:08 +0100 [thread overview]
Message-ID: <CAPDyKFqpeCXqbMZi7cffKEQ1=2xZnUT4Jpi85Fqyfk2eaTU1gQ@mail.gmail.com> (raw)
In-Reply-To: <20200316091324.15968-2-wan.ahmad.zainie.wan.mohamad@intel.com>
On Mon, 16 Mar 2020 at 10:13, Wan Ahmad Zainie
<wan.ahmad.zainie.wan.mohamad@intel.com> wrote:
>
> Add new compatible strings in sdhci-of-arasan.c to support Intel Keem Bay
> eMMC/SD/SDIO controller, based on Arasan SDHCI 5.1.
>
> Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> ---
> .../devicetree/bindings/mmc/arasan,sdhci.txt | 39 +++++++++++++++++++
We are starting to reach a point were I want to see people converting
bindings into the yaml format, rather than extending the existing text
based ones.
Can you please have a look at the sdhci common bindings and the sdhci
arasan variant, that would be a good start.
Kind regards
Uffe
> 1 file changed, 39 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> index 428685eb2ded..50f9cc0eff2a 100644
> --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> @@ -24,6 +24,10 @@ Required Properties:
> For this device it is strongly suggested to include arasan,soc-ctl-syscon.
> - "intel,lgm-sdhci-5.1-sdxc", "arasan,sdhci-5.1": Intel LGM SDXC PHY
> For this device it is strongly suggested to include arasan,soc-ctl-syscon.
> + - "intel,keembay-sdhci-5.1-emmc", "arasan,sdhci-5.1": Keem Bay eMMC PHY
> + For this device it is strongly suggested to include arasan,soc-ctl-syscon.
> + - "intel,keembay-sdhci-5.1-sd": Keem Bay SD controller
> + - "intel,keembay-sdhci-5.1-sdio": Keem Bay SDIO controller
>
> [5] Documentation/devicetree/bindings/mmc/sdhci-am654.txt
>
> @@ -133,3 +137,38 @@ Example:
> phy-names = "phy_arasan";
> arasan,soc-ctl-syscon = <&sysconf>;
> };
> +
> + mmc: mmc@33000000 {
> + compatible = "intel,keembay-sdhci-5.1-emmc", "arasan,sdhci-5.1";
> + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> + reg = <0x0 0x33000000 0x0 0x300>;
> + clock-names = "clk_xin", "clk_ahb";
> + clocks = <&scmi_clk KEEM_BAY_PSS_AUX_EMMC>,
> + <&scmi_clk KEEM_BAY_PSS_EMMC>;
> + phys = <&emmc_phy>;
> + phy-names = "phy_arasan";
> + assigned-clocks = <&scmi_clk KEEM_BAY_PSS_AUX_EMMC>;
> + clock-output-names = "emmc_cardclock";
> + #clock-cells = <0>;
> + arasan,soc-ctl-syscon = <&mmc_phy_syscon>;
> + };
> +
> + sd0: sdhci@31000000 {
> + compatible = "intel,keembay-sdhci-5.1-sd";
> + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> + reg = <0x0 0x31000000 0x0 0x300>;
> + clock-names = "clk_xin", "clk_ahb";
> + clocks = <&scmi_clk KEEM_BAY_PSS_AUX_SD0>,
> + <&scmi_clk KEEM_BAY_PSS_SD0>;
> + arasan,soc-ctl-syscon = <&sd0_phy_syscon>;
> + };
> +
> + sd1: sdhci@32000000 {
> + compatible = "intel,keembay-sdhci-5.1-sdio";
> + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> + reg = <0x0 0x32000000 0x0 0x300>;
> + clock-names = "clk_xin", "clk_ahb";
> + clocks = <&scmi_clk KEEM_BAY_PSS_AUX_SD1>,
> + <&scmi_clk KEEM_BAY_PSS_SD1>;
> + arasan,soc-ctl-syscon = <&sd1_phy_syscon>;
> + };
> --
> 2.17.1
>
next prev parent reply other threads:[~2020-03-18 11:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-16 9:13 [PATCH 0/2] mmc: sdhci-of-arasan: Add support for Intel Keem Wan Ahmad Zainie
2020-03-16 9:13 ` [PATCH 1/2] dt-bindings: mmc: arasan: Add compatible strings for Intel Keem Bay Wan Ahmad Zainie
2020-03-18 11:08 ` Ulf Hansson [this message]
2020-03-19 12:15 ` Wan Mohamad, Wan Ahmad Zainie
2020-03-16 9:13 ` [PATCH 2/2] mmc: sdhci-of-arasan: Add support " Wan Ahmad Zainie
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAPDyKFqpeCXqbMZi7cffKEQ1=2xZnUT4Jpi85Fqyfk2eaTU1gQ@mail.gmail.com' \
--to=ulf.hansson@linaro.org \
--cc=adrian.hunter@intel.com \
--cc=devicetree@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=robh+dt@kernel.org \
--cc=wan.ahmad.zainie.wan.mohamad@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).