From: Roger Pueyo Centelles <roger.pueyo@guifi.net>
To: linux-mtd@lists.infradead.org, Tudor.Ambarus@microchip.com
Cc: marek.vasut@gmail.com, Roger Pueyo Centelles <roger.pueyo@guifi.net>
Subject: [PATCH v1] mtd: spi-nor: Add support for en25qh64
Date: Thu, 7 Feb 2019 20:09:35 +0100 [thread overview]
Message-ID: <20190207190935.5489-1-roger.pueyo@guifi.net> (raw)
In-Reply-To: <fe18a70e-ef22-a91a-7379-55fadb7c0b5c@microchip.com>
The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found
on recent wireless routers. Its 32, 128 and 256 Mbit siblings
are already supported.
Tested on a COMFAST CF-E120A v3 router board.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
---
drivers/mtd/spi-nor/spi-nor.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 6e13bbd1aaa5..33b2d0158a96 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1741,6 +1741,8 @@ static const struct flash_info spi_nor_ids[] = {
{ "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) },
{ "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
{ "en25qh32", INFO(0x1c7016, 0, 64 * 1024, 64, 0) },
+ { "en25qh64", INFO(0x1c7017, 0, 64 * 1024, 128,
+ SECT_4K | SPI_NOR_DUAL_READ) },
{ "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256, 0) },
{ "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) },
{ "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128, SECT_4K) },
--
2.20.1
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next prev parent reply other threads:[~2019-02-07 19:12 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-27 15:03 [PATCH] mtd: spi-nor: Add support for en25qh64 Roger Pueyo Centelles
2019-01-10 17:21 ` Tudor.Ambarus
2019-01-30 14:36 ` Roger Pueyo Centelles | Guifi.net
2019-01-30 16:09 ` Tudor.Ambarus
2019-02-07 19:09 ` Roger Pueyo Centelles [this message]
2019-02-08 9:39 ` [PATCH v1] " Tudor.Ambarus
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