From: Mark Brown <broonie@kernel.org>
To: John Garry <john.garry@huawei.com>
Cc: chenxiang66@hisilicon.com, linux-kernel@vger.kernel.org,
tudor.ambarus@microchip.com, liusimin4@huawei.com,
linuxarm@huawei.com, linux-spi@vger.kernel.org,
marek.vasut@gmail.com, linux-mtd@lists.infradead.org,
xuejiancheng@hisilicon.com,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
wanghuiqiang <wanghuiqiang@huawei.com>,
fengsheng5@huawei.com
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver
Date: Mon, 13 Jan 2020 14:06:27 +0000 [thread overview]
Message-ID: <20200113140627.GJ3897@sirena.org.uk> (raw)
In-Reply-To: <6dd45da9-9ccf-45f7-ed12-8f1406a0a56b@huawei.com>
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On Mon, Jan 13, 2020 at 01:01:06PM +0000, John Garry wrote:
> On 13/01/2020 11:42, Mark Brown wrote:
> > The idiomatic approach appears to be for individual board vendors
> > to allocate IDs, you do end up with multiple IDs from multiple
> > vendors for the same thing.
> But I am not sure how appropriate that same approach would be for some 3rd
> party memory part which we're simply wiring up on our board. Maybe it is.
It seems to be quite common for Intel reference designs to assign
Intel IDs to non-Intel parts on the board (which is where I
became aware of this practice).
> > In general there's not really much standardizaiton for devices,
> > the bindings that do exist aren't really centrally documented and
> > the Windows standard is just to have the basic device
> > registration in the firmware and do all properties based on
> > quirking based on DMI information.
> OK, so there is always DMI. I hoped to avoid this sort of thing in the linux
> driver :)
Yes, there are some merits to an approach like that.
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next prev parent reply other threads:[~2020-01-13 14:07 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-09 14:08 [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-09 14:08 ` [PATCH v2 1/3] mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are John Garry
2020-01-16 11:03 ` Tudor.Ambarus
2019-12-09 14:08 ` [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver John Garry
2020-01-09 15:54 ` John Garry
2020-01-09 21:28 ` Mark Brown
2020-01-10 11:55 ` John Garry
2020-01-10 14:07 ` Mark Brown
2020-01-10 14:58 ` John Garry
2020-01-10 15:12 ` Mark Brown
2020-01-10 16:09 ` John Garry
2020-01-10 19:31 ` Andy Shevchenko
2020-01-13 10:09 ` John Garry
2020-01-13 11:42 ` Mark Brown
2020-01-13 13:01 ` John Garry
2020-01-13 14:06 ` Mark Brown [this message]
2020-01-13 14:17 ` Andy Shevchenko
2020-01-13 14:27 ` Mark Brown
2020-01-13 14:34 ` Andy Shevchenko
2020-01-31 10:08 ` John Garry
2020-01-31 11:39 ` Andy Shevchenko
2020-01-31 12:03 ` John Garry
2020-01-31 15:46 ` Andy Shevchenko
2020-01-31 16:26 ` John Garry
2020-02-01 11:34 ` Mark Brown
2020-02-01 11:32 ` Mark Brown
2020-01-10 19:59 ` Applied "spi: Add HiSilicon v3xx SPI NOR flash controller driver" to the spi tree Mark Brown
2019-12-09 14:08 ` [PATCH v2 3/3] MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver John Garry
2020-01-10 19:59 ` Applied "MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver" to the spi tree Mark Brown
2019-12-16 14:52 ` [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry
2019-12-16 14:56 ` Mark Brown
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