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From: Pratyush Yadav <me@yadavpratyush.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Pratyush Yadav <me@yadavpratyush.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Sekhar Nori <nsekhar@ti.com>, Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH v11 12/14] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h
Date: Thu, 23 Jul 2020 18:42:01 +0530
Message-ID: <20200723131203.40916-13-me@yadavpratyush.com> (raw)
In-Reply-To: <20200723131203.40916-1-me@yadavpratyush.com>

From: Pratyush Yadav <p.yadav@ti.com>

Flashes might want to add a custom setup hook to configure the flash in
the proper mode for operation. But after that, they would still want to
run the default setup hook because it selects the read, program, and
erase operations. Since there is little point in repeating all that
code, expose the spi_nor_default_setup() in core.h to
manufacturer-specific files.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/mtd/spi-nor/core.c | 4 ++--
 drivers/mtd/spi-nor/core.h | 3 +++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index a263196d970f..5ebe0aed0871 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2740,8 +2740,8 @@ static int spi_nor_select_erase(struct spi_nor *nor)
 	return 0;
 }
 
-static int spi_nor_default_setup(struct spi_nor *nor,
-				 const struct spi_nor_hwcaps *hwcaps)
+int spi_nor_default_setup(struct spi_nor *nor,
+			  const struct spi_nor_hwcaps *hwcaps)
 {
 	struct spi_nor_flash_parameter *params = nor->params;
 	u32 ignored_mask, shared_mask;
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index ec54ce6c5403..24cff27c51aa 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -453,6 +453,9 @@ int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
 			     const struct sfdp_bfpt *bfpt,
 			     struct spi_nor_flash_parameter *params);
 
+int spi_nor_default_setup(struct spi_nor *nor,
+			  const struct spi_nor_hwcaps *hwcaps);
+
 static struct spi_nor __maybe_unused *mtd_to_spi_nor(struct mtd_info *mtd)
 {
 	return mtd->priv;
-- 
2.27.0


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Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-23 13:11 [PATCH v11 00/14] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 01/14] mtd: spi-nor: core: add spi_nor_{read, write}_reg() helpers Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 02/14] mtd: spi-nor: core: add spi_nor_controller_ops_erase helper Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 03/14] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 04/14] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 05/14] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 06/14] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 07/14] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 08/14] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 09/14] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-07-23 13:11 ` [PATCH v11 10/14] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-07-23 13:12 ` [PATCH v11 11/14] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-07-23 13:12 ` Pratyush Yadav [this message]
2020-07-23 13:12 ` [PATCH v11 13/14] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-07-23 13:12 ` [PATCH v11 14/14] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav

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