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From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: Boris Brezillon <boris.brezillon@collabora.com>,
	Sekhar Nori <nsekhar@ti.com>, Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH v15 07/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode
Date: Fri, 2 Oct 2020 01:50:37 +0530
Message-ID: <20201001202045.21499-8-p.yadav@ti.com> (raw)
In-Reply-To: <20201001202045.21499-1-p.yadav@ti.com>

Some controllers, like the cadence qspi controller, have trouble reading
only 1 byte in DTR mode. So, do 2 byte reads for SR and FSR commands in
DTR mode, and then discard the second byte.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/mtd/spi-nor/core.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index b5bb4d6cffc1..b83bf5ed2b2d 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -370,7 +370,7 @@ int spi_nor_write_disable(struct spi_nor *nor)
  * spi_nor_read_sr() - Read the Status Register.
  * @nor:	pointer to 'struct spi_nor'.
  * @sr:		pointer to a DMA-able buffer where the value of the
- *              Status Register will be written.
+ *              Status Register will be written. Should be at least 2 bytes.
  *
  * Return: 0 on success, -errno otherwise.
  */
@@ -388,6 +388,11 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
 		if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
 			op.addr.nbytes = nor->params->rdsr_addr_nbytes;
 			op.dummy.nbytes = nor->params->rdsr_dummy;
+			/*
+			 * We don't want to read only one byte in DTR mode. So,
+			 * read 2 and then discard the second byte.
+			 */
+			op.data.nbytes = 2;
 		}
 
 		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
@@ -408,7 +413,8 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
  * spi_nor_read_fsr() - Read the Flag Status Register.
  * @nor:	pointer to 'struct spi_nor'
  * @fsr:	pointer to a DMA-able buffer where the value of the
- *              Flag Status Register will be written.
+ *              Flag Status Register will be written. Should be at least 2
+ *              bytes.
  *
  * Return: 0 on success, -errno otherwise.
  */
@@ -426,6 +432,11 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
 		if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
 			op.addr.nbytes = nor->params->rdsr_addr_nbytes;
 			op.dummy.nbytes = nor->params->rdsr_dummy;
+			/*
+			 * We don't want to read only one byte in DTR mode. So,
+			 * read 2 and then discard the second byte.
+			 */
+			op.data.nbytes = 2;
 		}
 
 		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
-- 
2.28.0


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  parent reply index

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-01 20:20 [PATCH v15 00/15] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg, write_reg, erase}() Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 03/15] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 04/15] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 05/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 06/15] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-10-01 20:20 ` Pratyush Yadav [this message]
2020-10-01 20:20 ` [PATCH v15 08/15] mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 09/15] mtd: spi-nor: Parse SFDP SCCR Map Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 10/15] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-10-02  9:47   ` Tudor.Ambarus
2020-10-01 20:20 ` [PATCH v15 11/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 12/15] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 13/15] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-10-01 20:20 ` [PATCH v15 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-10-03 11:40   ` Vignesh Raghavendra
2020-10-01 20:20 ` [PATCH v15 15/15] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav

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